Power conversion device and control method
By introducing a controller in the power conversion equipment to detect signal delay and control the action of the power device, the reliability problem caused by interference of the driver signal is solved, and the stability and safety of the system are improved.
Patent Information
- Application Number
- PCT/CN2025/078894
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-03-22
- Filing Date
- 2025-02-24
- Publication Date
- 2025-09-25
AI Technical Summary
Since the reference signal received by the driver and the pulse width modulation signal output are easily affected by the wiring and external interference, the reliability of the power device is reduced, affecting the safe operation of the equipment.
By introducing a controller into the power conversion equipment, the delay between the detection signal and the reference signal is detected, and when the delay exceeds the threshold or the level is inconsistent, the power device is controlled to stop operation to ensure system stability and safety.
It improves the reliability and response speed of the system, reduces abnormal conditions of power devices, and ensures the safe and stable operation of the equipment.
Smart Images

Figure CN2025078894_25092025_PF_FP_ABST
Abstract
Description
Power conversion device and control method
[0001] This application claims priority to the Chinese patent application filed with the State Intellectual Property Office of China on March 22, 2024, with application number 202410340671.6, and priority to the Chinese patent application entitled “Power Conversion Device and Control Method”, all contents of which are incorporated by reference into this application. Technical Field
[0002] The present application relates to the field of power supply control technology, and in particular to a power conversion device and a control method. Background Art
[0003] The controller in a power conversion device can send a reference signal to the driver, which then receives and sends a pulse-width modulated signal to the power device based on the reference signal. This allows the power device to operate under the influence of the pulse-width modulated signal, thereby controlling the operation of the device. However, because the reference signal received by the driver can be affected by the wiring, and the pulse-width modulated signal sent by the driver to the power device can also be affected by device failure or external interference, the reliability of the pulse-width modulated signal received by the power device is reduced, which in turn affects the safe operation of the device. Summary of the Invention
[0004] The present application provides a power conversion device and control method, which can promptly control the power device to stop operation when the delay between the detection signal and the reference signal is large, thereby ensuring the stability and safety of the system, with high reliability, fast protection response speed and strong applicability.
[0005] In a first aspect, the present application provides a power conversion device, comprising a controller, a driver, and a power device, wherein the controller is connected to an input terminal of the driver, and an output terminal of the driver is connected to the power device; the controller is configured to output a reference signal to the driver for controlling the operation of the power device; the driver is configured to output a pulse-width modulated signal to the power device based on the received reference signal, the pulse-width modulated signal being configured to control the operation of the power device; the controller is further configured to control the power device to stop operating when the output reference signal changes from a first level to a second level, the duration of the second level is equal to a delay threshold, and the level of the output reference signal is inconsistent with that of a detection signal; the detection signal is the reference signal received by the input terminal of the driver or the pulse-width modulated signal output by the output terminal of the driver. In the present application, the power conversion device detects, through the controller, the duration of time the output reference signal remains at the second level after changing from the first level to the second level, and simultaneously obtains the levels of the detection signal and the output reference signal through the controller. Furthermore, the power conversion device can determine that the delay between the detection signal and the output reference signal is greater than the delay threshold when the duration of the output reference signal remaining at the second level is equal to the delay threshold and the controller detects that the levels of the detection signal and the output reference signal are inconsistent. At this time, the power conversion equipment controls the power devices to stop action in time through the controller, which can ensure the stability and safety of the system, high reliability, fast protection response speed and strong applicability.
[0006] In combination with the first aspect, in a first possible implementation, the controller is further configured to control the power device to stop operating when, during the operation of the power device, the length of time the output reference signal is at the second level is greater than a delay threshold, and the output reference signal and the detection signal change from inconsistent levels to consistent levels. In the present application, the power conversion device can detect the waveform difference between the output reference signal and the detection signal through the controller when the detection signal is subjected to external interference and a temporary level change occurs, resulting in a waveform difference between the detection signal and the output reference signal. When the length of time the output reference signal is continuously at the second level is greater than the delay threshold, and the controller detects that the output reference signal and the detection signal change from inconsistent levels to consistent levels, indicating that a waveform difference occurs between the detection signal and the output reference signal, the power conversion device can promptly control the power device to stop operating through the controller, thereby further improving the stability and safety of the system.
[0007] In conjunction with the first aspect, in a second possible implementation, the controller is further configured to obtain the length of time the detection signal remains at a high level when the power device is operating and the detection signal reaches a rising edge; the controller is further configured to control the power device to cease operation when the length of time the detection signal remains at a high level is greater than or equal to a first pulse width threshold. In this application, the power conversion device obtains the length of time the detection signal remains at a high level via the controller to determine whether the pulse width of the detection signal is too long. Furthermore, when the detection signal is subjected to external interference, resulting in an excessively long pulse width, causing a waveform difference between the detection signal and a reference signal, the controller can promptly control the power device to cease operation, further improving the stability and safety of the system.
[0008] In conjunction with the first aspect, in a third possible implementation, the controller is further configured to obtain the length of time the detection signal remains at a high level when the power device is operating and the detection signal reaches a rising edge; the controller is further configured to control the power device to cease operation when the length of time the detection signal remains at a high level is less than or equal to a second pulse width threshold. In this application, the power conversion device obtains the length of time the detection signal remains at a high level via the controller to determine whether the pulse width of the detection signal is too short. Furthermore, when the detection signal is subjected to external interference, resulting in a pulse width that is too short, causing a waveform difference between the detection signal and a reference signal, the controller can promptly control the power device to cease operation, further improving the stability and safety of the system.
[0009] In combination with any one of the first aspects to the third possible implementation of the first aspect, in a fourth possible implementation, the controller includes a first timing module, a first detection module, and a first processing module, the input end of the first timing module is used to receive the output reference signal, the input end of the first detection module is used to receive the output reference signal and the detection signal, the first input end of the first processing module is connected to the output end of the first timing module, and the second input end of the first processing module is connected to the output end of the first detection module; the first timing module is used to clear the count when the output reference signal changes from the first level to the second level, and start counting the length of time the output reference signal is at the second level, and output a high level to the first input end of the first processing module when the length of time the output reference signal is at the second level is equal to the delay threshold; the first detection module is used to output a high level to the second input end of the first processing module when it is detected that the levels of the output reference signal and the detection signal are inconsistent; the first processing module is used to control the power device to stop operating when receiving the high level output by the first timing module and the high level output by the first detection module. In the present application, the power conversion device can realize delayed detection of the detection signal and the output reference signal through the above-mentioned first timing module, first detection module and first processing module, which has a simple structure, is easy to implement and has strong applicability.
[0010] In combination with the fourth possible implementation of the first aspect, in a fifth possible implementation, the power conversion device further includes a second detection module and a second processing module, the input end of the second detection module is used to receive the output reference signal and the detection signal, the output end of the second detection module is connected to the second input end of the second processing module, and the output end of the first timing module is also connected to the first input end of the second processing module; the first timing module is further used to output a high level to the first input end of the second processing module when it is found that the output reference signal is at the second level for a time length greater than a delay threshold during the operation of the power device; the second detection module is used to output a high level to the second input end of the second processing module when it is detected that the output reference signal and the detection signal change from inconsistent levels to consistent levels; the second processing module is used to control the power device to stop operating when it receives the high level output by the first timing module and the high level output by the second detection module. In this application, the power conversion device can detect the waveform difference between the detection signal and the reference signal caused by a temporary level change due to external interference through the above-mentioned first timing module, second detection module and second processing module. The structure is simple, easy to implement and highly applicable.
[0011] In combination with the fourth possible implementation of the first aspect, in a sixth possible implementation, the power conversion device also includes a second timing module, a third detection module and a third processing module, the input end of the second timing module is used to receive the detection signal, the input end of the third detection module is used to receive the detection signal, the output end of the second timing module is connected to the first input end of the third processing module, and the output end of the third detection module is connected to the second input end of the third processing module; the second timing module is also used to clear the count when a rising edge of the detection signal is detected during the operation of the power device, and start counting the length of time the detection signal is at a high level, and output a high level to the first input end of the third processing module when it is calculated that the length of time the detection signal is at a high level is greater than or equal to the first pulse width threshold; the third detection module is used to output a high level to the second input end of the third processing module when a falling edge of the detection signal is detected; the third processing module is used to control the power device to stop operating when receiving the high level output by the second timing module and the high level output by the third detection module. In the present application, the power conversion device can detect the waveform difference generated by the detection signal due to external interference causing the pulse width to be too long through the above-mentioned second timing module, third detection module and third processing module. It has a simple structure, is easy to implement and has strong applicability.
[0012] In combination with the fourth possible implementation of the first aspect, in a seventh possible implementation, the power conversion device also includes a second timing module, a third detection module and a third processing module, the input end of the second timing module is used to receive the detection signal, the input end of the third detection module is used to receive the detection signal, the output end of the second timing module is connected to the first input end of the third processing module, and the output end of the third detection module is connected to the second input end of the third processing module; the second timing module is also used to clear the count when a rising edge of the detection signal is detected during the operation of the power device, and start counting the length of time the detection signal is at a high level, and output a high level to the first input end of the third processing module when it is calculated that the length of time the detection signal is at a high level is less than or equal to the second pulse width threshold; the third detection module is used to output a high level to the second input end of the third processing module when a falling edge of the detection signal is detected; the third processing module is used to control the power device to stop operating when receiving the high level output by the second timing module and the high level output by the third detection module. In the present application, the power conversion device can detect the waveform difference generated by the detection signal due to external interference causing the pulse width to be too short through the above-mentioned second timing module, third detection module and third processing module. It has a simple structure, is easy to implement and has strong applicability.
[0013] In combination with the fourth possible implementation of the first aspect, in an eighth possible implementation, the first timing module includes a first sampling edge unit, a first counter and a second sampling edge unit, the input end of the first sampling edge unit is used to receive the output reference signal, the output end of the first sampling edge unit is connected to the input end of the first counter, and the output end of the first counter is connected to the first input end of the first processing module through the second sampling edge unit; the first sampling edge unit is used to output a high level to the first counter when a rising edge or falling edge of the output reference signal is detected; the first counter is used to clear the count and start counting when receiving a high level input by the first sampling edge unit, and output a low level to the second sampling edge unit when the value obtained by the count is less than the delay threshold, and output a high level to the second sampling edge unit when the value obtained by the count is greater than or equal to the delay threshold; the second sampling edge unit is used to output a high level to the first input end of the first processing module when a rising edge of the input level of the first counter is detected. In the present application, the first timing module can specifically obtain the time length that the output reference signal is at the second level through the above-mentioned first sampling unit, the first counter and the second sampling unit, and output a high level when the time length that the output reference signal continues to be at the second level is equal to the delay threshold. The structure is simple, easy to implement and has strong applicability.
[0014] In combination with the fifth possible implementation of the first aspect, in a ninth possible implementation, the second detection module includes a first XOR gate and a third sampling edge unit, the input end of the first XOR gate is used to receive the output reference signal and the detection signal, and the output end of the first XOR gate is connected to the second input end of the second processing module through the third sampling edge unit; the first XOR gate is used to output a low level to the third sampling edge unit when the output reference signal is consistent with the detection signal level, and output a high level to the third sampling edge unit when the output reference signal is inconsistent with the detection signal level; the third sampling edge unit is used to output a high level to the second input end of the second processing module when a rising edge of the first XOR gate input level is detected. In the present application, the second detection module can specifically output a high level when the output reference signal and the detection signal change from inconsistent levels to consistent levels through the above-mentioned first XOR gate and the third sampling edge unit, which has a simple structure, is easy to implement, and has strong applicability.
[0015] In combination with the sixth possible implementation of the first aspect, in the tenth possible implementation, the second timing module includes a fourth sampling edge unit and a second counter, the input end of the fourth sampling edge unit is used to receive the detection signal, the output end of the fourth sampling edge unit is connected to the input end of the second counter, and the output end of the second counter is connected to the first input end of the third processing module; the fourth sampling edge unit is used to output a high level to the second counter when the rising edge of the detection signal is detected; the second counter is used to reset the count and start counting when receiving the high level input by the fourth sampling edge unit, and output a low level to the first input end of the third processing module when the value obtained by the count is less than or equal to the first pulse width threshold, and output a high level to the first input end of the third processing module when the value obtained by the count is greater than or equal to the first pulse width threshold. In the present application, the second timing module can specifically obtain the length of time that the detection signal continues to be at a high level through the above-mentioned fourth sampling edge unit and the second counter, and output a high level when the length of time that the detection signal continues to be at a high level is greater than or equal to the first pulse width threshold. It has a simple structure, is easy to implement, and has strong applicability.
[0016] In combination with the seventh possible implementation of the first aspect, in the eleventh possible implementation, the second timing module includes a fourth sampling edge unit, a second counter and a second XOR gate, the input end of the fourth sampling edge unit is used to receive the detection signal, the output end of the fourth sampling edge unit is connected to the input end of the second counter, and the output end of the second counter is connected to the first input end of the third processing module through the second XOR gate; the fourth sampling edge unit is used to output a high level to the second counter when the rising edge of the detection signal is detected; the second counter is used to clear the count and start counting when receiving the high level input by the fourth sampling edge unit, and output a low level to the second XOR gate when the value obtained by the count is less than or equal to the second pulse width threshold, and output a high level to the second XOR gate when the value obtained by the count is greater than or equal to the second pulse width threshold; the second XOR gate is used to output a low level to the first input end of the third processing module when receiving the high level input by the second counter, and output a high level to the first input end of the third processing module when receiving the low level input by the second counter. In the present application, the second timing module can specifically obtain the length of time the detection signal is at a high level through the above-mentioned fourth sampling edge unit, the second counter and the second XOR gate, and output a high level when the length of time the detection signal continues to be at a high level is less than or equal to the second pulse width threshold. It has a simple structure, is easy to implement, and has strong applicability.
[0017] In a second aspect, the present application further provides a drive control method for a power device, wherein the power device is connected to an output terminal of a driver, and the method comprises:
[0018] Outputting a reference signal for controlling the operation of the power device to an input terminal of the driver, so that the driver outputs a pulse width modulation signal to the power device based on the received reference signal, wherein the pulse width modulation signal is used to control the operation of the power device;
[0019] When it is detected that the output reference signal changes from the first level to the second level, and the time length of the second level is equal to the delay threshold, and the level of the output reference signal is inconsistent with the detection signal, the power device is controlled to stop operating; the detection signal is the reference signal received by the input end of the driver or the pulse width modulation signal output by the output end of the driver.
[0020] In conjunction with the second aspect, in a first possible implementation manner, the method further includes:
[0021] During the operation of the power device, when the output reference signal is at the second level for a time length greater than the delay threshold and the output reference signal and the detection signal change from inconsistent levels to consistent levels, the power device is controlled to stop operating.
[0022] In conjunction with the second aspect, in a second possible implementation, the method further includes:
[0023] When the power device is in operation and the detection signal has a rising edge, obtaining the length of time the detection signal is at a high level;
[0024] When the detection signal is at a high level for a time period greater than or equal to a first pulse width threshold, the power device is controlled to stop operating.
[0025] In conjunction with the second aspect, in a third possible implementation, the method further includes:
[0026] When the power device is in operation and the detection signal has a rising edge, obtaining the length of time the detection signal is at a high level;
[0027] When the length of time the detection signal is at a high level is less than or equal to the second pulse width threshold, the power device is controlled to stop operating.
[0028] The beneficial effects of the solution provided in the second aspect can be referred to the description of the first aspect, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS
[0029] FIG1 is a schematic structural diagram of a new energy vehicle provided in an embodiment of the present application;
[0030] FIG2 is a schematic structural diagram of a power conversion device provided in an embodiment of the present application;
[0031] FIG3 is a waveform diagram provided in an embodiment of the present application;
[0032] FIG4 is a schematic diagram of a structure of a controller provided in an embodiment of the present application;
[0033] FIG5 is another waveform diagram provided in an embodiment of the present application;
[0034] FIG6 is another schematic diagram of the structure of the controller provided in an embodiment of the present application;
[0035] FIG7 is a flow chart of a driving control method for a power device provided in the present application. DETAILED DESCRIPTION
[0036] The power conversion device provided in this application includes power devices and can be applied to electronic devices with drive control functions, such as energy storage devices and new energy vehicles. For ease of understanding, the following description uses the application of the power conversion device to new energy vehicles as an example.
[0037] Please refer to Figure 1, which is a schematic diagram of the structure of a new energy vehicle provided in an embodiment of the present application. The new energy vehicle 100 shown in Figure 1 includes a controller 110, a driver 120, and a power device 130. The input end of the driver 120 is connected to the controller 110, and the output end of the driver 120 is connected to the power device 130. It is understood that the power device 130 can be a switching circuit composed of a transistor or a field-effect transistor.
[0038] The controller 110 can control the power device 130 according to the operating state of the new energy vehicle 100 so that the new energy vehicle 100 can operate stably. It should be noted that the power of the pulse width modulation signal required for the operation of the power device 130 is usually relatively high, while the signal power output by the controller 110 is limited. To this end, the controller 110 can obtain a high-power pulse width modulation signal through the driver 120 to achieve the driving of the power device 130. Specifically, the controller 110 can generate a reference signal according to a preset software program and transmit the reference signal to the driver 120. The driver 120 can generate a pulse width modulation signal based on the received reference signal and transmit it to the power device 130 through the output end, thereby driving the power device 130 to operate, so that the new energy vehicle 100 can work.
[0039] It should be noted that in order to ensure stable operation, the new energy vehicle 100 needs to ensure that the pulse width modulation signal transmitted to the power device 130 has high reliability and high safety. However, when the controller 110 transmits the reference signal to the driver 120, the reliability of the reference signal received by the driver 120 will be reduced due to adverse effects such as wiring and interface loss. At the same time, in the process of the driver 120 obtaining the pulse width modulation signal based on the received reference signal, the reliability of the pulse width modulation signal output by the driver 120 to the power device 130 through the output terminal will also be reduced due to adverse effects such as device failure or external interference, which will lead to unstable driving of the power device 130, and further cause abnormal conditions such as overvoltage or overcurrent in the power device, affecting the safety and stability of the new energy vehicle 100.
[0040] In order to ensure the safety and stability of the new energy vehicle 100, in the embodiment of the present application, the controller 110 can detect the signal of the driver 120 to determine whether the reference signal received by the driver 120 is abnormal. Alternatively, the controller 110 can detect the signal at the output end of the driver 120 to determine whether the pulse width modulation signal sent by the driver 120 to the power device 130 is abnormal. Furthermore, when the controller 110 detects that the reference signal received by the driver 120 or the pulse width modulation signal output by the driver 120 is abnormal, it can indicate that the reliability of the pulse width modulation signal received by the power device 130 is reduced. In this case, the controller 110 can control the power device 130 to stop working, thereby reducing safety hazards.
[0041] It should be noted that the above-mentioned controller and the power conversion device can be independent devices, and the controller can be arranged inside or outside the power conversion device. Alternatively, in other cases, the controller can also be a related control device in the power conversion device, such as an integrated circuit (IC). The above-mentioned controller can be a digital signal processing (DSP) unit, a field programmable gate array (FPGA), a microcontroller unit (MCU) or other devices with computing and control functions. Exemplarily, in the new energy vehicle 100, the controller 110 can be a vehicle-grade chip, that is, a control chip used in the vehicle. This type of chip has high reliability requirements and needs to ensure working stability.
[0042] It is understandable that the power conversion device provided in the embodiments of the present application can also be applied to other electronic devices. When the driver provided in the embodiments of the present application is applied to an energy storage device, the controller in the power conversion device can detect the signal at the input or output of the driver to ensure that the pulse width modulation signal of the inverter circuit in the energy storage device has high reliability. When the power conversion device provided in the embodiments of the present application is applied to other electronic devices, the power conversion device can detect the signal at the input or output of the driver to ensure that the pulse width modulation signal of the power device has high reliability. The embodiments of the present application are not illustrated one by one here.
[0043] The above is only an example of the application scenarios of the power conversion device provided by this application, and is not an exhaustive list. This application does not limit the application scenarios.
[0044] As can be seen from the above, the power conversion device can detect the signals at the input and output terminals of the driver through the controller to ensure that the pulse width modulation signal of the power device has high reliability. For ease of understanding, the working principle of the power conversion device provided in the embodiment of the present application is illustrated below with reference to Figures 2 to 6.
[0045] Please refer to Figure 2, which is a schematic diagram of the structure of a power conversion device provided in an embodiment of the present application. The power conversion device 200 shown in Figure 2 includes a controller 210, a driver 220, and a power device 230. The output end of the controller 210 is connected to the input end i1 of the driver 220, and the output end i2 of the driver 220 is connected to the power device 230. As can be seen from the above content, the controller 210 can generate a reference signal according to a preset software program and transmit the reference signal to the input end i1 of the driver 220. The driver 220 can generate a pulse width modulation signal based on the received reference signal and transmit it to the power device 230 through the output end i2 to control the operation of the power device 230. For example, assuming that the power device 230 is a switching tube, the driver 120 can turn the power device 230 on or off by transmitting the pulse width modulation signal to the power device 230. The above is only an example and does not constitute a limitation to the embodiments of the present application.
[0046] It should be noted that the reference signal generated by the controller 210 in the power conversion device 200 is a pulse-width modulated signal. When the controller 210 outputs the reference signal to the driver 220, if the transmission of the reference signal is not affected by wiring, interface loss, or other interference, the reference signal received by the input terminal i1 of the driver 220 and the reference signal output by the controller 210 can maintain a consistent waveform and phase, that is, they are PWM signals that coincide in time. In this case, the reference signal received by the input terminal of the driver 220 is free of anomalies and has high reliability. If the transmission of the reference signal is affected by minor interference, such that the reference signal received by the input terminal i1 of the driver 220 and the reference signal output by the controller 210 have a minor difference in waveform or phase, the reference signal received by the input terminal i1 of the driver 220 still has a certain degree of reliability. The driver 220 generates a pulse-width modulated signal based on the reference signal and transmits it to the power device 230, without affecting the stable operation of the power device 230. On the contrary, if the transmission of the reference signal is subject to significant interference, the reference signal received by the input terminal i1 of the driver 220 and the reference signal output by the controller 210 may have a significant difference in waveform or phase. In this case, the reliability of the reference signal received by the input terminal i1 of the driver 220 is low. If the driver 220 generates a pulse width modulation signal based on the low-reliability reference signal and transmits it to the power device 230, the operation of the power device 230 may become unstable, thereby causing abnormal conditions such as overvoltage or overcurrent in the power device 230. To this end, in the embodiment of the present application, the controller 210 uses the reference signal received by the input terminal i1 of the driver 220 as a detection signal and determines whether the detection signal is abnormal, thereby ensuring the reliability of the pulse width modulation signal received by the power device 230.
[0047] It should be noted that when the driver 220 generates a pulse-width modulated signal based on the received reference signal, if the driver 220 is not affected by external interference or component failure, the pulse-width modulated signal outputted by the output terminal i2 of the driver 220 can maintain a consistent waveform and phase with the reference signal outputted by the controller 210, i.e., the pulse-width modulated signals are temporally coincident. In this case, the pulse-width modulated signal outputted by the output terminal i2 of the driver 220 is free of anomalies and has high reliability. If the driver 220 is affected by minor interference, the pulse-width modulated signal outputted by the output terminal i2 of the driver 220 and the reference signal outputted by the controller 210 may have a minor difference in waveform or phase. In this case, the pulse-width modulated signal outputted by the output terminal i2 of the driver 220 still has high reliability, and the power device 230 can operate stably according to the pulse-width modulated signal. Conversely, if the driver 220 is affected by significant interference or the power device 230 fails, the pulse-width modulated signal outputted by the output terminal i2 of the driver 220 and the reference signal outputted by the controller 210 may have a significant difference in waveform or phase. In this case, the pulse width modulation signal outputted by the output terminal i2 of the driver 220 has low reliability, which may cause unstable operation of the power device 230, and further lead to abnormal conditions such as overvoltage or overcurrent in the power device 230. Therefore, the controller 210 provided in the embodiment of the present application uses the pulse width modulation signal outputted by the output terminal i2 of the driver 220 as a detection signal and determines whether the detection signal is abnormal, thereby ensuring the reliability of the pulse width modulation signal received by the power device 230.
[0048] In some feasible embodiments, in order to detect the reference signal received by the input terminal i1 of the driver 220 and the pulse width modulation signal output by the output terminal i2 of the driver 220, the controller 210 shown in Figure 2 can be connected to the input terminal i1 and the output terminal i2 of the driver 220 respectively to collect the signals of the input terminal i1 and the output terminal i2 of the driver 220.
[0049] It can be seen that in the embodiment of the present application, the controller can determine whether the pulse width modulated signal received by the power device has high reliability by detecting the reference signal received by the input end of the driver and the pulse width modulated signal output by the output end of the driver. It should be noted that the specific implementation of the controller using the reference signal received by the input end of the driver as the detection signal and the controller using the pulse width modulated signal output by the output end of the driver as the detection signal are the same. For ease of understanding, the embodiment of the present application is described below using the example of the controller using the pulse width modulated signal output by the output end of the driver as the detection signal. At the same time, for ease of understanding, the reference signal described in the following content and the accompanying drawings is the reference signal output by the controller, and the detection signal is the reference signal received by the driver or the pulse width modulated signal output by the driver.
[0050] In some feasible embodiments, in order to enable the controller 210 to respond promptly when an abnormality occurs in the detection signal, in the embodiments of the present application, after startup, the controller 210 can collect the pulse width modulated signal output by the output terminal i2 of the driver 220 in real time to obtain a detection signal, determine whether the detection signal is abnormal, and then determine whether the pulse width modulated signal received by the power device 230 is reliable. Specifically, the controller 210 can obtain the pulse width modulated signal output by the driver 220, i.e., the detection signal, by collecting the voltage parameters of the output terminal i2 of the driver 220. Alternatively, the controller 210 can also be communicatively connected to a collection device, which can collect the voltage parameters of the output terminal i2 of the driver 220 and send the collected voltage and other parameters to the controller 210, thereby allowing the controller 210 to obtain the detection signal. It is understood that if the controller 210 uses the reference signal received by the input terminal i1 of the driver 220 as the detection signal, the controller 210 can obtain the detection signal by collecting the voltage parameters of the input terminal i1 of the driver 220 in real time.
[0051] In some feasible embodiments, as can be seen from the above, when there is a significant phase difference between the detection signal and the reference signal, the reliability of the pulse width modulation signal of the power device 230 is low, which may cause unstable operation of the power device 230. To this end, after acquiring the detection signal, the controller 210 can determine whether the detection signal has a delay anomaly by determining whether the phase of the detection signal and the reference signal are consistent. The phase of the detection signal or the reference signal refers to the starting time of the pulse width modulation waveform of the detection signal or the reference signal, that is, the time when the rising edge or falling edge of the pulse width modulation signal occurs. The phase consistency of the detection signal and the reference signal means that the rising edge of the detection signal is aligned with the rising edge of the reference signal, or the falling edge of the detection signal is aligned with the falling edge of the reference signal. The phase difference between the detection signal or the reference signal can be understood as the time difference between the rising edge of the detection signal and the rising edge of the reference signal, or the time difference between the falling edge of the detection signal and the falling edge of the reference signal. When the phase difference between the detection signal and the reference signal is zero or small, the delay between them is zero or small. When the phase difference between the detection signal and the reference signal is large, it means that there is a large delay between the detection signal and the reference signal.
[0052] In some feasible embodiments, when the delay between the detection signal and the reference signal is greater than the delay threshold, the controller 210's drive control of the power device 230 through the driver 220 has significant hysteresis, which can cause unstable operation of the power device 230 and low reliability. The above-mentioned delay threshold is used to represent the maximum value of the delay between the detection signal and the reference signal without affecting the accurate driving of the power device 230. To this end, by obtaining the delay between the detection signal and the reference signal, the controller 210 can promptly control the power device 230 to stop operating when it detects that the delay between the detection signal and the reference signal is greater than the delay threshold, thereby achieving high reliability.
[0053] In some feasible embodiments, the controller 210 may start to obtain the length of time the reference signal is at the second level when detecting that the reference signal changes from the first level to the second level. At the same time, the controller 210 detects the levels of the reference signal and the detection signal to determine whether the delay between the reference signal and the detection signal is greater than the delay threshold.
[0054] It should be noted that the change of the reference signal from the first level to the second level represents a rising edge or falling edge of the reference signal. Specifically, when the first level is low and the second level is high, the reference signal changes from a low level to a high level, which is a rising edge of the reference signal. Conversely, when the first level is high and the second level is low, the reference signal changes from a high level to a low level, which is a falling edge of the reference signal. As can be seen from the above, the time difference between the rising edge or falling edge of the reference signal and the rising edge or falling edge of the detection signal is the delay between the reference signal and the detection signal. It is understood that when the controller 210 obtains that the length of time the reference signal remains at the second level equals the delay threshold, if the levels of the reference signal and the detection signal are inconsistent, it indicates that the detection signal has not changed from the first level to the second level, i.e., the delay between the reference signal and the detection signal is greater than the delay threshold. In this case, the reliability of the pulse width modulation signal of the power device 230 is low, and the controller 210 can promptly control the power device 230 to stop operation. Therefore, the controller 110 can start timing when the reference signal changes from the first level to the second level, that is, when the rising edge or falling edge of the reference signal arrives, and when the time length obtained by timing is equal to the delay threshold, it determines whether the levels of the detection signal and the reference signal are consistent, and then determines whether the delay between the detection signal and the reference signal is greater than the delay threshold.
[0055] It should be noted that the level inconsistency between the reference signal and the detection signal means that the reference signal and the detection signal are different high levels, or different low levels. Similarly, the level consistency between the reference signal and the detection signal means that the reference signal and the detection signal are both high levels, or both low levels. Among them, the controller 210 can judge whether the reference signal and the detection signal are high levels or low levels respectively according to different level thresholds. For example, the controller 210 can judge that the reference signal is high when the level of the reference signal is greater than 3 volts, and judge that the detection signal is high when the level of the detection signal is greater than 10 volts. The embodiments of the present application are not limited to this.
[0056] For example, please refer to Figure 3, which is a waveform diagram provided by an embodiment of the present application. As shown in Figure 3, the rising edge of the reference signal is located at point a1, and the rising edge of the detection signal is located at point b1. The controller 210 can start timing when it detects that the reference signal changes from a low level to a high level at point a1, that is, the first level is a low level and the second level is a high level, to obtain the length of time the reference signal is at a high level. Further, assuming that the above-mentioned delay threshold is 100us, when the controller 210 obtains that the length of time the reference signal is continuously at a high level is equal to 100us, that is, point c1 shown in Figure 3, at this time, the controller 210 detects that the level of the detection signal is consistent with that of the reference signal, indicating that the rising edge of the detection signal has arrived before the delay threshold, then the time difference between the rising edge of the detection signal and the rising edge of the reference signal is less than or equal to the delay threshold. It can be determined that the delay between the detection signal and the reference signal is less than or equal to the delay threshold. The controller 210 can cause the power device 230 to continue to operate.
[0057] For example, as shown in FIG3 , the falling edge of the reference signal is at point a2, and the falling edge of the detection signal is at point b2. The controller 210 can start timing when it detects that the reference signal changes from a high level to a low level at point a2, that is, the first level is a high level and the second level is a low level, to obtain the length of time the reference signal is continuously at a low level. Further, assuming that the above-mentioned delay threshold is 100us, when the controller 210 obtains that the length of time the reference signal is continuously at a low level is equal to 100us, that is, point c2 shown in FIG3 , at this time, the controller 210 detects that the level of the detection signal is consistent with that of the reference signal, indicating that the falling edge of the detection signal has arrived before the delay threshold, then the time difference between the falling edge of the detection signal and the falling edge of the reference signal is less than or equal to the delay threshold. It can be determined that the delay between the detection signal and the reference signal is less than or equal to the delay threshold. The controller 210 can enable the power device 230 to continue to operate.
[0058] For example, as shown in FIG3 , the rising edge of the reference signal is located at point a3, and the rising edge of the detection signal is located at point b3. The controller 210 can start timing when it detects that the reference signal changes from a low level to a high level at point a3, that is, the first level is a low level and the second level is a high level, to obtain the length of time that the reference signal is continuously at a high level. Further, assuming that the above-mentioned delay threshold is 100us, when the controller 210 obtains that the length of time that the reference signal is continuously at a high level is equal to 100us, that is, point c3 shown in FIG3 , at this time, the controller 210 detects that the levels of the detection signal and the reference signal are inconsistent, indicating that the rising edge of the detection signal has not yet arrived, then the time difference between the rising edge of the detection signal and the rising edge of the reference signal is greater than the delay threshold. It can be determined that the delay between the detection signal and the reference signal is greater than the delay threshold. The controller 210 can promptly control the power device 230 to stop the action.
[0059] As can be seen from this, the actual delay between the detection signal and the reference signal shown in FIG3 is significantly greater than 100 μs. However, when the delay between the detection signal and the reference signal is equal to the delay threshold of 100 μs, the power conversion device 200 provided in the embodiment of the present application can determine whether the delay between the detection signal and the reference signal is greater than the delay threshold by determining whether the levels of the detection signal and the reference signal are consistent. In other words, when the delay between the detection signal and the reference signal is large, the controller 210 does not need to obtain the actual delay between the detection signal and the reference signal. Instead, it only needs to determine whether the delay between the detection signal and the reference signal is greater than the delay threshold to determine whether the pulse width modulation signal of the power device 230 is highly reliable. This can reduce the reaction time of the controller 210 when the pulse width modulation signal of the power device 230 is unreliable, and promptly control the power device 230 to stop operating, thereby improving the protection response speed. The above is merely an example and does not constitute a limitation of the embodiments of the present application.
[0060] In an embodiment of the present application, the power conversion device detects, through a controller, the length of time that a reference signal remains at the second level after changing from a first level to a second level. Simultaneously, the controller obtains the levels of the detection signal and the reference signal. Furthermore, the power conversion device can determine that the delay between the detection signal and the reference signal is greater than the delay threshold when the reference signal remains at the second level for a length of time equal to a delay threshold and the controller detects a level inconsistency between the detection signal and the reference signal. At this point, the power conversion device promptly controls the power device to cease operation through the controller, thereby ensuring system stability and safety, high reliability, and a fast protection response speed.
[0061] In some feasible implementations, in order to realize the delay detection between the detection signal and the reference signal in the above content, the specific implementation of the controller can be shown in Figure 4. Specifically, please refer to Figure 4, which is a structural diagram of the controller provided in an embodiment of the present application. The controller 400 shown in Figure 4 includes a first timing module 410, a first detection module 420 and a first processing module 430. The first input end of the above-mentioned first processing module 430 is connected to the output end of the first timing module 410, and the second input end of the above-mentioned first processing module 430 is connected to the output end of the first detection module 420. When the power conversion device starts to run, and the controller 400 outputs a reference signal to the driver and the driver outputs a pulse width modulation signal to the power device, the input end of the above-mentioned first timing module 410 can receive the reference signal, and the input end of the first detection module 420 can receive the reference signal and the detection signal respectively.
[0062] It should be noted that the first timing module 410 in the controller 400 can obtain the reference signal and the length of time the reference signal remains at the second level, so as to output a high level to the first input terminal of the first processing module 430 when the length of time the reference signal remains at the second level equals the delay threshold. The second level can be a high level or a low level. Furthermore, to accurately obtain the length of time the reference signal remains at the second level, the first timing module 410 can reset the count when detecting that the reference signal changes from the first level to the second level, that is, reset the previously obtained length of time and restart the count.
[0063] Specifically, the first timing module 410 shown in FIG4 may include a first edge sampling unit 411, a first counter 412, and a second edge sampling unit 413. The output of the first edge sampling unit 411 is connected to the input of the first counter 412, and the output of the first counter 412 is connected to the first input of the first processing module 430 via the second edge sampling unit 413. When the power conversion device begins operation, the input of the first edge sampling unit 411 may receive a reference signal.
[0064] The first sampling unit 411 can output a high level to the first counter 412 upon detecting that the reference signal changes from a first level to a second level. Furthermore, the first counter 412 can reset its count and begin counting upon receiving a high level input from the first sampling unit 411. That is, upon detecting a rising edge or falling edge of the reference signal, the first sampling unit 411 can control the first counter 412 to begin acquiring the duration of time the reference signal remains at a high or low level. In this case, the duration calculated by the first counter 412 can be as shown in FIG3 . Furthermore, the first counter 412 can be pre-set with a flexibly adjustable delay threshold. The first counter 412 can output a low level to the second sampling unit 413 when the counted value is less than the delay threshold, i.e., the duration of time the reference signal remains at the second level is less than the delay threshold. Furthermore, the first counter 412 can output a high level to the second sampling unit 413 when the counted value is greater than or equal to the delay threshold, i.e., the duration of time the reference signal remains at the second level is greater than or equal to the delay threshold. At this time, the level signal output by the first counter 412 to the second edge sampling unit 413 may be as shown by the window signal in FIG. 3 .
[0065] It is understood that, after receiving the level signal input from the first counter 412, the second edge sampling unit 413 may detect the rising edge of the level signal and, upon detecting the rising edge of the input level signal, output a high level to the first input terminal of the first processing module 430. In other words, when the reference signal remains at the second level for a period of time equal to or greater than the delay threshold, the level signal received by the second edge sampling unit 413 changes from a low level to a high level, and the second edge sampling unit 413 may output a high level to the first input terminal of the first processing module 430.
[0066] It should be noted that after the power conversion device begins operation, the first detection module 420 can respectively obtain a reference signal and a detection signal, and output a high level or a low level based on the levels of the reference signal and the detection signal. Specifically, the first detection module 420 can output a high level when the levels of the reference signal and the detection signal are inconsistent, and output a low level when the levels of the reference signal and the detection signal are consistent. For example, assuming that when the reference signal remains at the second level for a period equal to the delay threshold, the reference signal obtained by the first detection module 420 is a high level, while the detection signal is a low level, the first detection module 420 outputs a high level to the second output terminal of the first processing module 430. Conversely, assuming that when the reference signal remains at the second level for a period equal to the delay threshold, the reference signal obtained by the first detection module 420 is a high level, while the detection signal is a high level, the first detection module 420 outputs a low level to the second output terminal of the first processing module 430. The level signal output by the first detection module 420 to the first input terminal of the first processing module 430 can be shown as the exclusive OR signal in FIG.
[0067] When the first input end of the above-mentioned first processing module 430 receives a high level and the second input end also receives a high level output by the first detection module 420, indicating that the delay between the reference signal and the detection signal is greater than the delay threshold, the first processing module 430 can output a high-level pulse signal as shown in Figure 3 to control the power device to stop operating.
[0068] In some feasible implementations, the first detection module 420 in the controller 400 may be an XOR gate, and the first processing module 430 may be an AND gate. This is merely an example and does not constitute a limitation to the embodiments of the present application.
[0069] In some feasible embodiments, it can be seen from the above that the consistency between the detection signal and the reference signal includes not only phase consistency but also waveform consistency. When the detection signal and the reference signal have a large difference in waveform, the reliability of the pulse width modulation signal of the power device is low, which will cause unstable operation of the power device, and further lead to abnormal conditions such as overvoltage or overcurrent in the power device. To this end, the controller can, after acquiring the detection signal and determining that the phase of the detection signal and the reference signal are consistent, further determine whether the detection signal has a waveform abnormality by determining whether the waveform of the detection signal and the reference signal are consistent. The waveform of the detection signal or the reference signal refers to the length of time that the detection signal or the reference signal is continuously at a high level or a low level, that is, the pulse width of the pulse width modulation signal. The waveform consistency of the detection signal and the reference signal means that the length of time the detection signal is continuously at a high level is consistent with the length of time the reference signal is continuously at a high level, that is, the pulse width of the detection signal and the reference signal are consistent, or the length of time the detection signal is continuously at a low level is consistent with the length of time the reference signal is at a low level. The waveform difference between the detection signal and the reference signal can be understood as the difference between the length of time the detection signal is at a low level or a high level and the length of time the reference signal is at a low level or a high level. When there is a difference in pulse width between the detection signal and the reference signal, it means that there is a difference in waveform between the detection signal and the reference signal.
[0070] In some feasible embodiments, when the reference signal is continuously at a high level, the detection signal may suddenly change from a high level to a low level due to external interference. Alternatively, when the reference signal is continuously at a low level, the detection signal may suddenly change from a low level to a high level due to external interference. In this case, as can be seen from the above, a difference in the waveforms of the detection signal and the reference signal may cause unstable operation of the power device. Therefore, the controller may further detect whether a difference in the waveforms of the reference signal and the detection signal occurs after determining that the delay between the detection signal and the reference signal is less than or equal to a delay threshold.
[0071] In some feasible embodiments, while the power device is operating, the controller continuously obtains the levels of the reference signal and the detection signal, and obtains the length of time the reference signal remains at the second level. Furthermore, when the controller obtains that the reference signal remains at the second level for a period greater than a delay threshold and detects that the reference signal and the detection signal change from being inconsistent in level to being consistent in level, it can be determined that a waveform difference exists between the reference signal and the detection signal, and the controller can promptly control the power device to cease operation.
[0072] For example, please refer to Figure 5, which is another waveform diagram provided by an embodiment of the present application. As shown in Figure 5, the rising edge of the reference signal is located at point a1, and the rising edge of the detection signal is located at point b1. The controller can start timing when it detects that the reference signal changes from a low level to a high level at point a1, that is, the first level is low and the second level is high, to obtain the length of time the reference signal remains at a high level. Further, assuming that the delay threshold is 100us, when the controller obtains that the length of time the reference signal remains at a high level is equal to 100us, that is, point c1 shown in Figure 5, at this time, the controller detects that the detection signal and the reference signal have the same level, both at a high level, indicating that the rising edge of the detection signal arrives before the delay threshold. The difference in the length of time between the rising edge of the detection signal and the rising edge of the reference signal is less than or equal to the delay threshold. Therefore, it can be determined that the delay between the detection signal and the reference signal is less than or equal to the delay threshold, and the controller can activate the power device. Furthermore, the detection signal suddenly changes from a high level to a low level at point b2 shown in Figure 5, and changes back to a high level at point b3. It is understandable that a brief change in the detection signal from a high level to a low level during a period of high level can cause a driving error in the power device, affecting the stable operation of the device. Therefore, in the embodiment of the present application, the controller can detect at point b3 that the detection signal and the reference signal change from a level mismatch to a level match, indicating a change in the waveform representing the detection signal. This can then determine that a waveform difference has occurred between the detection signal and the reference signal. At this point, the power conversion device uses the controller to promptly stop the power device, ensuring system stability, safety, and reliability.
[0073] In some feasible embodiments, in order to implement the delay detection between the detection signal and the reference signal, as well as the detection of the waveform difference between the detection signal and the reference signal, the controller 400 shown in FIG4 may further include a second detection module 440 and a second processing module 450. A first input end of the second processing module 450 is connected to the output end of the first timing module 410, and a second input end of the second processing module 450 is connected to the output end of the second detection module 440. When the power conversion device starts operating, and the controller 400 outputs a reference signal to the driver, and the driver outputs a pulse width modulated signal to the power device, the input end of the first timing module 410 can receive the reference signal, and the input end of the second detection module 440 can receive the reference signal and the detection signal, respectively.
[0074] As can be seen from the above, the first timing module 410 can output a high level to the first input terminal of the first processing module 430 when the duration of the reference signal remaining at the second level equals the delay threshold. At this point, if the second input terminal of the first processing module 430 also receives the high level output by the first detection module 420, indicating that the delay between the reference signal and the detection signal is greater than the delay threshold, the first processing module 430 can control the power device to stop operating. Conversely, if the second input terminal of the first processing module 430 receives the low level output by the first detection module 420, indicating that the delay between the reference signal and the detection signal is less than or equal to the delay threshold, the power device can continue to operate. Furthermore, while the power device is operating, the first timing module 410 can continue to obtain the duration of the reference signal remaining at the second level. It is understood that when the duration of the reference signal remaining at the second level obtained by the first timing module 410 is greater than the delay threshold, the first timing module 410 can output a high level to the first input terminal of the second processing module 450. The level signal output by the first timing module 410 can be shown as the timing signal in FIG.
[0075] After the power conversion device starts running, the second detection module 440 can respectively obtain the reference signal and the detection signal, and output a high level or a low level based on the levels of the reference signal and the detection signal. Specifically, the second detection module 440 can output a high level when the reference signal and the detection signal change from inconsistent levels to consistent levels. Exemplarily, assuming that the second detection module 440 obtains that the reference signal is continuously at a high level, and the detection signal changes from a low level to a high level, the second detection module 440 outputs a high level to the second output terminal of the second processing module 450. Conversely, assuming that the first detection module 420 obtains that both the reference signal and the detection signal are continuously at a high level, the second detection module 440 outputs a low level to the second output terminal of the second processing module 450.
[0076] Specifically, the second detection module 440 shown in Figure 4 may include a first XOR gate 441 and a third edge sampling unit 442. The output of the first XOR gate 441 is connected to the input of the third edge sampling unit 442, and the output of the third edge sampling unit 442 is connected to the second input of the second processing module 450. When the power conversion device begins operation, the input of the first XOR gate 441 can receive the reference signal and the detection signal.
[0077] The above-mentioned first XOR gate 441 can output a high level or a low level according to the levels of the reference signal and the detection signal. Specifically, the first XOR gate 441 can output a high level when the levels of the reference signal and the detection signal are inconsistent, and output a low level when the levels of the reference signal and the detection signal are consistent. Exemplarily, assuming that the first XOR gate 441 obtains a high level of the reference signal and the detection signal, the first XOR gate 441 outputs a high level to the third sampling edge unit 442. On the contrary, assuming that the first XOR gate 441 obtains a high level of the reference signal and the detection signal is a high level, the first XOR gate 441 outputs a low level to the third sampling edge unit 442. Among them, the level signal output by the first XOR gate 441 to the third sampling edge unit 442 can be shown as the XOR signal of Figure 5.
[0078] After receiving the level signal input from the first XOR gate 441, the third edge sampling unit 442 can detect the rising edge of the level signal and, upon detecting the rising edge of the input level signal, output a high level to the second input terminal of the second processing module 450. In other words, when the reference signal and the detection signal change from being level-consistent to being level-inconsistent, the level signal received by the third edge sampling unit 442 changes from a high level to a low level, and the third edge sampling unit 442 can output a high level to the second input terminal of the second processing module 450. At this point, the level signal output by the third edge sampling unit 442 can be shown as the event signal in FIG5 .
[0079] When the first input end of the above-mentioned second processing module 450 receives a high level and the second input end also receives a high level output by the second detection module 440, it indicates that when the length of time the reference signal continues to be at the second level is greater than the delay threshold, a waveform difference is generated between the reference signal and the detection signal. Then, the second processing module 450 can output a high-level pulse signal as shown in Figure 5 to control the power device to stop operating.
[0080] In some feasible implementations, the second processing module 450 may be an AND gate, which is merely an example and does not limit the embodiments of the present application.
[0081] In general, in the embodiment of the present application, the power conversion device can detect the situation shown in FIG5 where the detection signal is subjected to external interference and produces a sudden change in level, so as to determine the waveform difference between the detection signal and the reference signal through a controller. Specifically, when the detection signal is subjected to external interference and produces a short-term level change, resulting in a waveform difference between the detection signal and the reference signal, the power conversion device can detect the levels of the reference signal and the detection signal through a controller when the length of time the reference signal is at the second level is greater than a delay threshold. Furthermore, when the reference signal and the detection signal change from inconsistent levels to consistent levels, indicating that a waveform difference has occurred between the detection signal and the reference signal, the power conversion device can promptly control the power device to stop the action through the controller, thereby further improving the stability and safety of the system.
[0082] In addition, when the detection signal is subject to external interference, the pulse width may be too long or too short, resulting in a large difference in waveform between the detection signal and the reference signal. This can lead to low reliability of the pulse width modulation signal of the power device, unstable operation of the power device, and even abnormal conditions such as overvoltage or overcurrent in the power device. To this end, the controller can also detect the pulse width of the detection signal when detecting the waveform difference between the reference signal and the detection signal. As can be seen from the above content, the pulse width of the detection signal refers to the length of time that the detection signal remains at a high level, or the length of time between the rising edge and the falling edge of the detection signal.
[0083] In some feasible embodiments, when the power conversion device starts operating and the power device is in operation, the controller can obtain the level of the detection signal and, upon detecting the rising edge of the detection signal, begin to obtain the length of time the detection signal remains at a high level. When detecting that the length of time the detection signal remains at a high level is greater than or equal to a first pulse threshold, the controller determines that the pulse width of the detection signal is too long, thereby promptly controlling the power device to stop operating. The first pulse threshold can be understood as the maximum value of the pulse width of the detection signal.
[0084] It should be noted that during the operation of the power device, the detection signal changes from a low level to a high level, which is the rising edge of the detection signal. The controller resets the count and restarts counting upon detecting the rising edge of the detection signal to obtain the length of time the detection signal remains at a high level, i.e., the pulse width of the detection signal. Therefore, if the controller determines that the detection signal remains at a high level for a period greater than or equal to the first pulse threshold, the pulse width of the detection signal is excessively long.
[0085] In some feasible implementations, in order to detect the pulse width of the detection signal, the specific implementation of the controller can be as shown in Figure 6. Specifically, please refer to Figure 6, which is another structural schematic diagram of the controller provided in an embodiment of the present application. The controller 600 shown in Figure 6 includes a second timing module 610, a third detection module 620 and a third processing module 630. The first input end of the third processing module 630 is connected to the output end of the second timing module 610, and the second input end of the third processing module 630 is connected to the output end of the third detection module 620. After the power conversion device starts running, the input end of the second timing module 610 can receive the detection signal, and the input end of the third detection module 620 can receive the detection signal.
[0086] The second timing module 610 can obtain the detection signal and the length of time the detection signal remains at a high level, and output a high level to the first input terminal of the third processing module 630 when the length of time the detection signal remains at a high level is greater than or equal to the first pulse width threshold. Furthermore, to accurately obtain the length of time the detection signal remains at a high level, the second timing module 610 can reset the count upon detecting a rising edge of the detection signal, that is, reset the previously obtained length of time and restart the count.
[0087] Specifically, the second timing module 610 shown in FIG6 may include a fourth edge sampling unit 611 and a second counter 612. The output of the fourth edge sampling unit 611 is connected to the input of the second counter 612, and the output of the second counter 612 is connected to the first input of the third processing module 630. When the power conversion device begins operation, the input of the fourth edge sampling unit 611 may receive a detection signal.
[0088] The fourth sampling edge unit 611 can output a high level to the second counter 612 when detecting that the detection signal changes from a low level to a high level. Furthermore, the second counter 612 can reset the count and start counting when receiving the high level input by the fourth sampling edge unit 611. That is, the fourth sampling edge unit 611 can control the second counter 612 to start acquiring the length of time the detection signal remains at a high level when detecting the rising edge of the detection signal. Furthermore, the second counter 612 can be pre-set with a first pulse width threshold that can be flexibly adjusted, and the second counter 612 can output a low level to the first input terminal of the third processing module 630 when the value obtained by counting is less than the first pulse width threshold, that is, the pulse width of the detection signal is less than the first pulse width threshold, and the second counter 612 can output a high level to the first input terminal of the third processing module 630 when the value obtained by counting is greater than or equal to the first pulse width threshold, that is, the pulse width of the detection signal is greater than or equal to the first pulse width threshold.
[0089] After the power conversion device begins operation, the third detection module 620 can detect the level of the detection signal and, upon detecting a falling edge of the detection signal, that is, upon detecting a change in the detection signal from a high level to a low level, output a high level to the second input terminal of the third processing module 630. At this time, if the first input terminal of the third processing module 630 also receives a high level input from the second timing module 610, indicating that the detection signal has remained at a high level for a period greater than or equal to a first pulse width threshold, i.e., the pulse width of the detection signal is too long, the third processing module 630 can control the power device to stop operating.
[0090] In some feasible embodiments, when the power conversion equipment starts to run and the power device is in action, the controller 600 can obtain the level of the detection signal, and when the rising edge of the detection signal is detected, start to obtain the length of time the detection signal is at a high level, and when it is detected that the length of time the detection signal is continuously at a high level is greater than or equal to the first pulse threshold, it is determined that the pulse width of the detection signal is too long, and the power device can be controlled to stop action in time.
[0091] It should be noted that during the operation of the power device, the detection signal changes from a low level to a high level, which is the rising edge of the detection signal. The controller 600 resets the count and restarts counting upon detecting the rising edge of the detection signal to obtain the length of time the detection signal remains at a high level, i.e., the pulse width of the detection signal. Therefore, when the controller 600 obtains that the detection signal remains at a high level for a period greater than or equal to the first pulse threshold, it indicates that the pulse width of the detection signal is too long.
[0092] In some feasible implementations, in order to detect whether the pulse width of the detection signal is too short, the second timing module 610 in the controller 600 shown in FIG6 may further include a second XOR gate 613. The input end of the second XOR gate 613 is connected to the output end of the second counter 612, and the output end of the second XOR gate 613 is connected to the first input end of the third processing module 630.
[0093] The second timing module 610 can obtain the detection signal and the length of time the detection signal is at a high level, so as to output a high level to the first input terminal of the third processing module 630 when the length of time the detection signal is continuously at a high level is less than or equal to the second pulse width threshold.
[0094] Specifically, the second counter 612 shown in Figure 6 can clear the count and start counting when receiving the high level input by the fourth sampling edge unit 611 to obtain the length of time that the detection signal continues to be at a high level. Furthermore, a second pulse width threshold that can be flexibly adjusted can be pre-set in the second counter 612. The second pulse threshold can be understood as the minimum value of the pulse width of the detection signal. When the value obtained by the second counter 612 is less than or equal to the second pulse width threshold, that is, the pulse width of the detection signal is less than or equal to the second pulse width threshold, a low level is output to the input end of the second XOR gate 613. When the value obtained by the second counter 612 is greater than the second pulse width threshold, that is, the pulse width of the detection signal is greater than the second pulse width threshold, a high level is output to the input end of the second XOR gate 613.
[0095] Furthermore, the second XOR gate 613 may output a low level to the first input terminal of the third processing module 630 upon receiving a high level signal from the second counter 612, and may output a high level signal to the first input terminal of the third processing module 630 upon receiving a low level signal from the second counter 612, thereby inverting the level signal output by the second counter 612. It is understood that when the first input terminal of the third processing module 630 receives a high level signal from the second timing module 610 and the first input terminal also receives a high level signal from the third detection module 620, indicating that the duration of time the detection signal remains at a high level is less than or equal to the second pulse width threshold, i.e., the pulse width of the detection signal is too short, the third processing module 630 may control the power device to stop operating.
[0096] It should be noted that when the controller 600 shown in FIG6 detects whether the pulse width of the detection signal is too long, the second XOR gate 613 can transparently transmit the level signal output by the second counter 612 directly to the first input terminal of the third processing module 630. Specifically, the second XOR gate 613 can output a high level to the first input terminal of the third processing module 630 upon receiving a high level signal from the second counter 612, and output a low level signal to the first input terminal of the third processing module 630 upon receiving a low level signal from the second counter 612, thereby transparently transmitting the level signal output by the second counter 612. In other words, when the power conversion device detects the pulse width of the detection signal through the controller 600 shown in FIG6, the second XOR gate 613 in FIG6 can be controlled to transparently transmit the input level signal to detect whether the pulse width of the detection signal is too long. Alternatively, the controller 600 can control the second XOR gate 613 to invert the input level signal to detect whether the pulse width of the detection signal is too short.
[0097] In some feasible implementations, the power conversion device may further be provided with different controllers 600 to respectively detect whether the pulse width of the detection signal is too long or too short.
[0098] In an embodiment of the present application, the power conversion device detects, through a controller, the length of time that a reference signal remains at the second level after changing from a first level to a second level. Simultaneously, the controller obtains the levels of the detection signal and the reference signal. Furthermore, the power conversion device can determine that the delay between the detection signal and the reference signal is greater than the delay threshold when the reference signal remains at the second level for a length of time equal to a delay threshold and the controller detects a level inconsistency between the detection signal and the reference signal. At this point, the power conversion device promptly controls the power device to cease operation through the controller, thereby ensuring system stability and safety, high reliability, and a fast protection response speed.
[0099] Please refer to Figure 7, which is a flow chart of a power device drive control method provided by the present application. The power device drive control method provided by the embodiment of the present application is applicable to the controller shown in Figures 1 to 6. Specifically, the drive control method can be executed by the controller in the power conversion device. Specifically, the power device drive control method may include the following steps:
[0100] S101 . Outputting a reference signal for controlling an operation of a power device to a driver, so that the driver outputs a pulse width modulation signal to the power device based on the received reference signal.
[0101] It will be appreciated that the pulse-width modulated signal is used to control the operation of the power device. The controller can generate a reference signal according to a preset software program and transmit the reference signal to the input terminal of the driver. The driver can generate a pulse-width modulated signal based on the received reference signal and transmit it to the power device through the output terminal to control the operation of the power device. For example, assuming that the power device is a switching transistor, the driver can turn the power device on or off by transmitting the pulse-width modulated signal to the power device. The above is merely an example and does not constitute a limitation on the embodiments of the present application.
[0102] It should be noted that the reference signal generated by the controller in a power conversion device is a pulse-width modulated signal. When the controller transmits the reference signal to the driver, if the transmission of the reference signal is subject to significant interference, the reference signal received by the driver's input terminal may differ significantly from the reference signal generated by the controller in waveform or phase. In this case, the reliability of the reference signal received by the driver's input terminal is low. If the driver generates a pulse-width modulated signal based on this low-reliability reference signal and transmits it to the power device, the power device's operation may become unstable, leading to abnormal conditions such as overvoltage or overcurrent in the power device.
[0103] Similarly, if the driver is subject to significant interference, the pulse-width modulated signal output by the driver's output terminal may differ significantly from the reference signal generated by the controller in waveform or phase. In this case, the pulse-width modulated signal output by the driver's output terminal has low reliability, which may cause unstable operation of the power device. Therefore, the embodiments of the present application can determine whether the pulse-width modulated signal received by the power device has high reliability by detecting the reference signal received by the driver's input terminal and the pulse-width modulated signal output by the driver's output terminal.
[0104] The specific implementation of the above S101 can refer to the implementation performed by the controller in Figures 1 to 6 above, and the embodiment of the present application will not be repeated here.
[0105] S102 : When the output reference signal changes from the first level to the second level, the duration of the second level is equal to the delay threshold, and the levels of the output reference signal and the detection signal are inconsistent, control the power device to stop operating.
[0106] It is understood that when there is a significant phase difference between the detection signal and the reference signal, the reliability of the pulse width modulation signal of the power device is low, resulting in unstable operation of the power device. To this end, after acquiring the detection signal, the controller can determine whether the phase of the detection signal and the reference signal are consistent to determine whether the detection signal has a delay anomaly. Specifically, the controller can first obtain the length of time that the reference signal remains at the second level to determine whether the delay between the reference signal and the detection signal is greater than a delay threshold.
[0107] It can be understood that the above-mentioned detection signal is a reference signal received by the input end of the driver or a pulse width modulation signal output by the output end of the driver. The power conversion device detects the length of time that the reference signal remains at the second level after changing from the first level to the second level through the controller, and at the same time, obtains the levels of the detection signal and the reference signal through the controller. Furthermore, the power conversion device can determine that the delay between the detection signal and the reference signal is greater than the delay threshold when the length of time that the reference signal remains at the second level is equal to the delay threshold and the controller detects that the levels of the detection signal and the reference signal are inconsistent. At this time, the power conversion device controls the power device to stop the action in time through the controller, which can ensure the stability and safety of the system, high reliability, fast protection response speed, and strong applicability.
[0108] The specific implementation of the above S102 can refer to the implementation performed by the controller in Figures 1 to 6 above, and the embodiment of the present application will not be repeated here.
[0109] In an optional embodiment, the method further includes: during the operation of the power device, when the time length during which the output reference signal is at the second level is greater than a delay threshold and the output reference signal and the detection signal change from inconsistent levels to consistent levels, controlling the power device to stop operating.
[0110] It is understandable that the drive control method provided in the embodiment of the present application can detect the waveform difference between the reference signal and the detection signal through the controller when the detection signal is subjected to external interference and causes a brief level change, resulting in a waveform difference between the detection signal and the reference signal. Specifically, when the reference signal is continuously at the second level for a period greater than the delay threshold, and the controller detects that the reference signal and the detection signal change from a level inconsistency to a level consistency, indicating that a waveform difference has occurred between the detection signal and the reference signal, the power conversion device can promptly control the power device to stop operation through the controller, further improving the stability and safety of the system.
[0111] In an optional embodiment, the method further includes: when the power device is in operation and the detection signal has a rising edge, obtaining the length of time the detection signal is at a high level; when the length of time the detection signal is at a high level is greater than or equal to a first pulse width threshold, controlling the power device to stop operating.
[0112] It can be understood that the driving control method provided in the embodiment of the present application obtains the length of time that the detection signal is continuously at a high level to determine whether the pulse width of the detection signal is too long. Then, when the detection signal is subject to external interference, resulting in a pulse width that is too long, causing a waveform difference between the detection signal and the reference signal, the controller can promptly control the power device to stop operating, thereby further improving the stability and safety of the system.
[0113] In an optional embodiment, the method further includes: when the power device is in operation and the detection signal has a rising edge, obtaining the length of time the detection signal is at a high level; when the length of time the detection signal is at a high level is less than or equal to a second pulse width threshold, controlling the power device to stop operating.
[0114] It can be understood that the driving control method provided in the embodiment of the present application obtains the length of time that the detection signal is continuously at a high level to determine whether the pulse width of the detection signal is too short. Then, when the detection signal is subject to external interference, resulting in a pulse width that is too short, causing a waveform difference between the detection signal and the reference signal, the controller can promptly control the power device to stop operating, thereby further improving the stability and safety of the system.
Claims
1. A power conversion device, characterized in that: The power conversion device includes a controller, a driver and a power device, wherein the controller is connected to the input end of the driver, and the output end of the driver is connected to the power device; The controller is configured to output a reference signal for controlling the operation of the power device to the driver; The driver is configured to output a pulse width modulation signal to the power device based on the received reference signal, wherein the pulse width modulation signal is used to control the operation of the power device; The controller is further configured to control the power device to stop operating when the output reference signal changes from a first level to a second level, the duration of the second level is equal to a delay threshold, and the levels of the output reference signal and a detection signal are inconsistent; the detection signal is a reference signal received by the input end of the driver or a pulse width modulation signal output by the output end of the driver.
2. The power conversion device according to claim 1, characterized in that The controller is further configured to control the power device to stop operating when, during the operation of the power device, the length of time the output reference signal is at the second level is greater than the delay threshold, and when the output reference signal and the detection signal change from inconsistent levels to consistent levels.
3. The power conversion device according to claim 1, characterized in that The controller is further configured to obtain a time length during which the detection signal is at a high level when the power device is in operation and the detection signal has a rising edge; The controller is further configured to control the power device to stop operating when the detection signal is at a high level for a period of time greater than or equal to a first pulse width threshold.
4. The power conversion device according to claim 1, characterized in that: The controller is further configured to obtain a time length during which the detection signal is at a high level when the power device is in operation and the detection signal has a rising edge; The controller is further configured to control the power device to stop operating when the length of time the detection signal is at a high level is less than or equal to a second pulse width threshold.
5. The power conversion device according to any one of claims 1 to 4, characterized in that: The controller includes a first timing module, a first detection module, and a first processing module, wherein an input end of the first timing module is used to receive the output reference signal, an input end of the first detection module is used to receive the output reference signal and the detection signal, a first input end of the first processing module is connected to an output end of the first timing module, and a second input end of the first processing module is connected to an output end of the first detection module; The first timing module is configured to reset the count when the output reference signal changes from the first level to the second level, start counting the length of time the output reference signal remains at the second level, and output a high level to the first input terminal of the first processing module when the length of time the output reference signal remains at the second level is equal to the delay threshold; The first detection module is configured to output a high level to the second input terminal of the first processing module when detecting that the levels of the output reference signal and the detection signal are inconsistent; The first processing module is configured to control the power device to stop operating when receiving the high level output by the first timing module and the high level output by the first detection module.
6. The power conversion device according to claim 5, characterized in that: The power conversion device further includes a second detection module and a second processing module, wherein an input end of the second detection module is used to receive the output reference signal and the detection signal, an output end of the second detection module is connected to a second input end of the second processing module, and an output end of the first timing module is also connected to a first input end of the second processing module; The first timing module is further configured to output a high level to the first input terminal of the second processing module when it is obtained that the time length during which the output reference signal is at the second level is greater than the delay threshold during the operation of the power device; The second detection module is configured to output a high level to the second input terminal of the second processing module when detecting that the output reference signal and the detection signal change from inconsistent levels to consistent levels; The second processing module is configured to control the power device to stop operating when receiving the high level output by the first timing module and the high level output by the second detection module.
7. The power conversion device according to claim 5, characterized in that: The power conversion device further includes a second timing module, a third detection module and a third processing module, wherein the input end of the second timing module is used to receive the detection signal, the input end of the third detection module is used to receive the detection signal, the output end of the second timing module is connected to the first input end of the third processing module, and the output end of the third detection module is connected to the second input end of the third processing module; The second timing module is further configured to reset the count when a rising edge of the detection signal is detected during the operation of the power device, start counting the length of time the detection signal is at a high level, and output a high level to the first input terminal of the third processing module when it is calculated that the length of time the detection signal is at a high level is greater than or equal to a first pulse width threshold; The third detection module is configured to output a high level to the second input terminal of the third processing module when detecting a falling edge of the detection signal; The third processing module is configured to control the power device to stop operating when receiving the high level output by the second timing module and the high level output by the third detection module.
8. The power conversion device according to claim 5, characterized in that: The power conversion device further includes a second timing module, a third detection module and a third processing module, wherein the input end of the second timing module is used to receive the detection signal, the input end of the third detection module is used to receive the detection signal, the output end of the second timing module is connected to the first input end of the third processing module, and the output end of the third detection module is connected to the second input end of the third processing module; The second timing module is further configured to reset the count when a rising edge of the detection signal is detected during the operation of the power device, start counting the length of time the detection signal is at a high level, and output a high level to the first input terminal of the third processing module when it is calculated that the length of time the detection signal is at a high level is less than or equal to a second pulse width threshold; The third detection module is configured to output a high level to the second input terminal of the third processing module when detecting a falling edge of the detection signal; The third processing module is configured to control the power device to stop operating when receiving the high level output by the second timing module and the high level output by the third detection module.
9. The power conversion device according to claim 5, characterized in that: The first timing module includes a first edge sampling unit, a first counter, and a second edge sampling unit, wherein the input end of the first edge sampling unit is used to receive the output reference signal, the output end of the first edge sampling unit is connected to the input end of the first counter, and the output end of the first counter is connected to the first input end of the first processing module through the second edge sampling unit; The first edge sampling unit is configured to output a high level to the first counter when detecting a rising edge or a falling edge of the output reference signal; The first counter is configured to reset the count and start counting when receiving a high level input by the first sampling edge unit, and output a low level to the second sampling edge unit when the counted value is less than the delay threshold, and output a high level to the second sampling edge unit when the counted value is greater than or equal to the delay threshold; The second edge sampling unit is configured to output a high level to the first input terminal of the first processing module when detecting a rising edge of the first counter input level.
10. The power conversion device according to claim 6, characterized in that: The second detection module includes a first XOR gate and a third sampling unit, the input end of the first XOR gate is used to receive the output reference signal and the detection signal, and the output end of the first XOR gate is connected to the second input end of the second processing module through the third sampling unit; The first XOR gate is configured to output a low level to the third edge sampling unit when the level of the output reference signal is consistent with the level of the detection signal, and output a high level to the third edge sampling unit when the level of the output reference signal is inconsistent with the level of the detection signal; The third edge sampling unit is configured to output a high level to the second input terminal of the second processing module when detecting a rising edge of the first XOR gate input level.
11. The power conversion device according to claim 7, characterized in that: The second timing module includes a fourth sampling edge unit and a second counter, the input end of the fourth sampling edge unit is used to receive the detection signal, the output end of the fourth sampling edge unit is connected to the input end of the second counter, and the output end of the second counter is connected to the first input end of the third processing module; The fourth edge sampling unit is configured to output a high level to the second counter when a rising edge of the detection signal is detected; The second counter is configured to clear the count and start counting when receiving a high level input from the fourth sampling edge unit, and output a low level to the first input end of the third processing module when the value obtained by counting is less than or equal to the first pulse width threshold, and output a high level to the first input end of the third processing module when the value obtained by counting is greater than or equal to the first pulse width threshold.
12. The power conversion device according to claim 8, characterized in that: The second timing module includes a fourth sampling edge unit, a second counter and a second XOR gate, the input end of the fourth sampling edge unit is used to receive the detection signal, the output end of the fourth sampling edge unit is connected to the input end of the second counter, and the output end of the second counter is connected to the first input end of the third processing module through the second XOR gate; The fourth edge sampling unit is configured to output a high level to the second counter when a rising edge of the detection signal is detected; the second counter being configured to reset the count and start counting upon receiving a high level input by the fourth edge sampling unit, and output a low level to the second XOR gate when the counted value is less than or equal to the second pulse width threshold, and output a high level to the second XOR gate when the counted value is greater than or equal to the second pulse width threshold; The second XOR gate is configured to output a low level to the first input terminal of the third processing module when receiving a high level input from the second counter, and to output a high level to the first input terminal of the third processing module when receiving a low level input from the second counter.
13. A control method for a power conversion device, characterized in that: The power device is connected to the output end of the driver, and the method includes: Outputting a reference signal for controlling the operation of the power device to an input terminal of the driver, so that the driver outputs a pulse width modulation signal to the power device based on the received reference signal, wherein the pulse width modulation signal is used to control the operation of the power device; When the output reference signal changes from a first level to a second level, and the length of time it remains at the second level is equal to a delay threshold, and the levels of the output reference signal and the detection signal are inconsistent, the power device is controlled to stop operating; the detection signal is a reference signal received by the input end of the driver or a pulse width modulation signal output by the output end of the driver.
14. The control method according to claim 13, characterized in that: The method further comprises: During the operation of the power device, when the time length of the output reference signal at the second level is greater than the delay threshold and the output reference signal and the detection signal change from inconsistent levels to consistent levels, the power device is controlled to stop operating.
15. The control method according to claim 13, characterized in that: The method further comprises: When the power device is in operation and the detection signal has a rising edge, obtaining a time length during which the detection signal is at a high level; When the detection signal is at a high level for a period of time greater than or equal to a first pulse width threshold, the power device is controlled to stop operating.
Citation Information
Patent Citations
Rapid fault detection circuit based on pulse feedback
CN104049166A
Phase adjusting circuit, delay locking circuit and memory
CN117238338A
Positive system is repaiied in time delay of data signal border
CN205899288U
Switch fault deteting controller of compensated capacitance
CN2773702Y
A Low Latency Digital Clock Fault Detector
US20160299806A1