Battery management circuit, battery management chip and vehicle

Abstract

A vehicle (400), provided with a battery management chip (300). The battery management chip (300) is provided with a battery management circuit (100). The battery management circuit (100) comprises an amplitude-phase detection device (1) and a waveform generator (2); a first input end of the amplitude-phase detection device (1) is connected to a positive electrode of a battery (200), and an output end of the waveform generator (2) is separately connected to the positive electrode of the battery (200) and a second input end of the amplitude-phase detection device (1); the waveform generator (2) is configured to apply alternating-current excitation signals of different frequencies to the battery (200); and the amplitude-phase detection device (1) is configured to detect the amplitude and phase of the impedance of the battery (200) under the alternating-current excitation signals of different frequencies.

Description

Battery management circuit, battery management chip and vehicle

[0001] This application claims priority to the Chinese patent application filed with the China Patent Office on March 28, 2024, with application number 2024103900439. The entire contents of the above application are incorporated by reference into this application. Technical Field

[0002] The present application relates to the field of battery technology, and in particular to a battery management circuit, a battery management chip and a vehicle. Background Art

[0003] The Battery Management System (BMS) can monitor changes in battery parameters such as voltage, current, and temperature, and combine complex algorithms to estimate the battery's charge and life. Technical issues

[0004] However, the accuracy of estimating changes in battery parameters such as voltage, current and temperature is low, and the algorithm is computationally intensive and highly complex. In addition, an industrial control computer is required to ensure the real-time performance of the battery management system. Technical Solutions

[0005] In a first aspect, the present application provides a battery management circuit, comprising:

[0006] an amplitude-phase detection device, wherein a first input terminal of the amplitude-phase detection device is connected to the positive electrode of the battery, and the amplitude-phase detection device is configured to detect the amplitude and phase of the impedance of the battery under AC excitation signals of different frequencies; and

[0007] The waveform generator has an output terminal connected to the positive electrode of the battery and the second input terminal of the amplitude and phase detection device respectively. The waveform generator is configured to apply AC excitation signals of different frequencies to the battery.

[0008] In one embodiment, the AC excitation signals of different frequencies are swept frequency triangle wave signals ranging from 0.01 Hz to 500 KHz.

[0009] In one embodiment, the battery management circuit further comprises:

[0010] an analog-to-digital conversion device, one end of the analog-to-digital conversion device being connected to an output end of the amplitude-phase detection device;

[0011] a storage device, one end of the storage device being connected to the other end of the analog-to-digital conversion device; and

[0012] A communication device is connected to the other end of the storage device.

[0013] In one embodiment, the battery management circuit further includes a filter device;

[0014] One end of the filter device is connected to the analog-to-digital converter device, and the other end of the filter device is connected to the storage device.

[0015] In one embodiment, the battery management circuit further includes: at least one of a voltage acquisition device, a current acquisition device, a temperature acquisition device, and a multiplexer;

[0016] The voltage collection device is connected to the positive electrode of the battery, the negative electrode of the battery and the multiplexer respectively;

[0017] The current collection device is connected to the positive electrode of the battery or the negative electrode of the battery, and the current collection device is connected to the multiplexer;

[0018] The temperature acquisition device is connected to the multiplexer;

[0019] The amplitude and phase detection device is connected to the multiplexer; and

[0020] The multiplexer is connected to the input terminal of the analog-to-digital conversion device.

[0021] In one embodiment, the waveform generator includes: a hysteresis voltage comparator, a first switching device, a sign circuit, an inverting integrator, and a voltage-to-current converter;

[0022] Wherein, the first end of the hysteresis voltage comparator is connected to the second end of the inverting integrator, and the second end of the hysteresis voltage comparator is connected to the control end of the first switching device;

[0023] The first switching device is connected between the first terminal of the sign circuit and the ground terminal;

[0024] The second terminal of the sign circuit is connected to the first terminal of the inverting integrator;

[0025] The second terminal of the inverting integrator is connected to the first terminal of the voltage-to-current converter; and

[0026] The second end of the voltage-current converter is connected to the positive electrode of the battery and the second input end of the amplitude and phase detection device respectively.

[0027] In one embodiment, the waveform generator further comprises a voltage-reducing device;

[0028] The second end of the inverting integrator is connected to the first end of the voltage-current converter via a step-down device.

[0029] In one embodiment, the waveform generator further comprises a current limiting device;

[0030] The second terminal of the hysteresis voltage comparator is connected to the control terminal of the first switching device through a current limiting device.

[0031] In one embodiment, the hysteresis voltage comparator includes: a first resistor, a second resistor, a third resistor, a fourth resistor, a first operational amplifier, and a third diode;

[0032] The inverting input terminal of the first operational amplifier is connected to the second terminal of the inverting integrator, the non-inverting input terminal of the first operational amplifier is grounded via the second resistor, and the output terminal of the first operational amplifier is connected to the first terminal of the first resistor;

[0033] The third resistor is connected between the non-inverting input terminal of the first operational amplifier and the second terminal of the first resistor;

[0034] The fourth resistor is connected between the second end of the first resistor and the control end of the first switching device; and

[0035] An anode of the third diode is connected to the control terminal of the first switching device, and a cathode of the third diode is grounded.

[0036] In one embodiment, the hysteresis voltage comparator further includes: a first diode and a second diode;

[0037] Wherein, the second end of the first resistor is connected to the cathode of the first diode;

[0038] The anode of the first diode is connected to the anode of the second diode;

[0039] The cathode of the second diode is grounded; and

[0040] The first diode and the second diode are voltage-stabilizing diodes.

[0041] In one embodiment, the symbol circuit includes: a fundamental wave generator, a sixth resistor, a seventh resistor, a second operational amplifier, an eighth resistor, and a ninth resistor;

[0042] Wherein, the fundamental wave generator is connected between the ground terminal and the first end of the sixth resistor;

[0043] The second end of the sixth resistor is connected to the first switching device;

[0044] The seventh resistor is connected between the second end of the sixth resistor and the non-inverting input terminal of the second operational amplifier;

[0045] The eighth resistor is connected between the ground terminal and the inverting input terminal of the second operational amplifier;

[0046] a ninth resistor connected between the inverting input terminal of the second operational amplifier and the output terminal of the second operational amplifier; and

[0047] The output terminal of the second operational amplifier is connected to the first terminal of the inverting integrator.

[0048] In one embodiment, the fundamental wave generator is a square wave generator.

[0049] In one embodiment, the inverting integrator includes: a tenth resistor, a first capacitor, and a third operational amplifier;

[0050] wherein the tenth resistor is connected between the second terminal of the sign circuit and the inverting input terminal of the third operational amplifier; and

[0051] The non-inverting input terminal of the third operational amplifier is grounded, the output terminal of the third operational amplifier is connected to the second terminal of the sign circuit through the first capacitor, and the output terminal of the third operational amplifier is connected to the voltage-current converter.

[0052] In one embodiment, the voltage-to-current converter includes: an eleventh resistor, a twelfth resistor, a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, and a fourth operational amplifier;

[0053] Wherein, the eleventh resistor is connected between the non-inverting input terminal of the fourth operational amplifier and the ground terminal;

[0054] The twelfth resistor is connected between the output terminal of the fourth operational amplifier and the inverting input terminal of the fourth operational amplifier;

[0055] A thirteenth resistor and a fourteenth resistor connected in series are connected between the output terminal of the fourth operational amplifier and the ground terminal;

[0056] A fifteenth resistor is connected between the second terminal of the inverting integrator and the inverting input terminal of the fourth operational amplifier;

[0057] A non-inverting input terminal of the fourth operational amplifier is connected to a first intermediate point, which is a connection point between the thirteenth resistor and the fourteenth resistor; and

[0058] The first intermediate point is connected to the positive terminal of the battery.

[0059] In one embodiment, the voltage-reducing device includes: a first inductor, a fourth diode, a second capacitor, and a second switch device;

[0060] The second switch device is connected between the second terminal of the inverting integrator and the first terminal of the first inductor, and the control terminal of the second switch device is configured to receive the step-down control signal;

[0061] The cathode of the fourth diode is connected to the first end of the first inductor, and the anode of the fourth diode is grounded;

[0062] The second capacitor is connected between the second terminal of the first inductor and the ground terminal; and

[0063] The second end of the first inductor is connected to the first end of the voltage-current converter.

[0064] In one embodiment, the current limiting device is a fifth resistor.

[0065] In one embodiment, the voltage-to-current converter includes: an eleventh resistor, a twelfth resistor, a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, a fourth operational amplifier, and a fifth operational amplifier;

[0066] Wherein, the eleventh resistor is connected between the second terminal of the inverting integrator and the non-inverting input terminal of the fourth operational amplifier;

[0067] The twelfth resistor is connected between the output terminal of the fourth operational amplifier and the inverting input terminal of the fourth operational amplifier;

[0068] The thirteenth resistor is connected between the output terminal of the fourth operational amplifier and the non-inverting input terminal of the fifth operational amplifier;

[0069] The fourteenth resistor is connected between the output terminal of the fifth operational amplifier and the non-inverting input terminal of the fourth operational amplifier;

[0070] A fifteenth resistor is connected between the inverting input terminal of the fourth operational amplifier and the ground terminal; and

[0071] The inverting input terminal of the fifth operational amplifier is connected to the output terminal of the fifth operational amplifier, and the non-inverting input terminal of the fifth operational amplifier is connected to the positive electrode of the battery.

[0072] In one embodiment, the voltage-to-current converter further includes: an eleventh resistor, a twelfth resistor, a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, a sixteenth resistor, a seventeenth resistor, an eighteenth resistor, a fourth operational amplifier, and a fifth operational amplifier;

[0073] Wherein, the eleventh resistor is connected between the second terminal of the inverting integrator and the non-inverting input terminal of the fourth operational amplifier;

[0074] The twelfth resistor is connected between the output terminal of the fourth operational amplifier and the inverting input terminal of the fourth operational amplifier;

[0075] The thirteenth resistor is connected between the output terminal of the fourth operational amplifier and the non-inverting input terminal of the fifth operational amplifier;

[0076] A fifteenth resistor is connected between the inverting input terminal of the fourth operational amplifier and the ground terminal;

[0077] The fourteenth resistor, the eighteenth resistor, and the sixteenth resistor are sequentially connected in series between the non-inverting input terminal of the fourth operational amplifier and the non-inverting input terminal of the fifth operational amplifier;

[0078] The seventeenth resistor is connected between the output terminal of the fourth operational amplifier and the second intermediate point, and the second intermediate point is the connection point between the fourteenth resistor and the eighteenth resistor; and

[0079] The second intermediate point is connected to the positive terminal of the battery.

[0080] In one embodiment, the amplitude and phase detection device includes: an amplitude detection device and a phase detection device;

[0081] wherein the second input terminal of the amplitude detection device is connected to the output terminal of the waveform generator, and the first input terminal of the amplitude detection device is connected to the positive electrode of the battery; and

[0082] The second input terminal of the phase detection device is connected to the output terminal of the waveform generator, and the first input terminal of the phase detection device is connected to the positive electrode of the battery.

[0083] In one embodiment, the amplitude detection device includes: a first detection circuit, a second detection circuit and a nineteenth resistor;

[0084] Wherein, the first end of the first detection circuit is connected to the output end of the waveform generator;

[0085] The first terminal of the second detection circuit is connected to the positive terminal of the battery; and

[0086] The nineteenth resistor is connected between the second end of the first detection circuit and the second end of the second detection circuit.

[0087] In one embodiment, the first detection circuit includes: a fifth diode;

[0088] The anode of the fifth diode is connected to the output end of the waveform generator, and the cathode of the fifth diode is connected to the nineteenth resistor.

[0089] In one embodiment, the first detection circuit further includes a first filtering circuit;

[0090] The first filtering circuit is connected between the cathode of the fifth diode and the ground terminal.

[0091] In one embodiment, the first filtering circuit includes: a twenty-first resistor and a third capacitor;

[0092] The twenty-first resistor and the third capacitor are respectively connected in parallel between the cathode of the fifth diode and the ground terminal.

[0093] In one embodiment, the second detection circuit includes: a sixth diode;

[0094] The cathode of the sixth diode is connected to the positive electrode of the battery, and the anode of the sixth diode is connected to the nineteenth resistor.

[0095] In one embodiment, the second detection circuit further includes: a second filtering circuit;

[0096] The second filtering circuit is connected between the anode of the sixth diode and the ground terminal.

[0097] In one embodiment, the second filtering circuit includes: a twenty-second resistor and a fourth capacitor;

[0098] The twenty-second resistor and the fourth capacitor are respectively connected in parallel between the anode of the sixth diode and the ground terminal.

[0099] In one embodiment, the phase detection device includes: a third detection circuit, a fourth detection circuit, a twentieth resistor, an adding circuit, and a subtracting circuit;

[0100] Wherein, a first terminal of the adding circuit is connected to the output terminal of the waveform generator, and a second terminal of the adding circuit is connected to the positive electrode of the battery;

[0101] The first terminal of the third detection circuit is connected to the third terminal of the adding circuit;

[0102] A first terminal of the subtraction circuit is connected to an output terminal of the waveform generator, and a second terminal of the subtraction circuit is connected to a positive terminal of the battery;

[0103] A first terminal of the fourth detection circuit is connected to the third terminal of the subtraction circuit; and

[0104] The twentieth resistor is connected between the second end of the third detection circuit and the second end of the fourth detection circuit.

[0105] In one embodiment, the third detection circuit includes: a seventh diode;

[0106] The cathode of the seventh diode is connected to the third terminal of the adding circuit, and the anode of the seventh diode is connected to the twentieth resistor.

[0107] In one embodiment, the third detection circuit further includes: a third filtering circuit;

[0108] The third filtering circuit is connected between the anode of the seventh diode and the ground terminal.

[0109] In one embodiment, the fourth detection circuit includes: an eighth diode;

[0110] The anode of the eighth diode is connected to the third terminal of the subtraction circuit, and the cathode of the eighth diode is connected to the twentieth resistor.

[0111] In one embodiment, the fourth detection circuit further includes: a fourth filtering circuit;

[0112] The fourth filtering circuit is connected between the cathode of the eighth diode and the ground terminal.

[0113] In one embodiment, the adding circuit includes: a twenty-third resistor, a twenty-fourth resistor, a twenty-fifth resistor, a twenty-sixth resistor, a twenty-seventh resistor, and a sixth operational amplifier;

[0114] The twenty-third resistor is connected between the ground terminal and the inverting input terminal of the sixth operational amplifier;

[0115] The twenty-fourth resistor is connected between the inverting input terminal of the sixth operational amplifier and the output terminal of the sixth operational amplifier;

[0116] A twenty-fifth resistor is connected between the output terminal of the waveform generator and the non-inverting input terminal of the sixth operational amplifier;

[0117] The twenty-sixth resistor is connected between the positive electrode of the battery and the non-inverting input terminal of the sixth operational amplifier;

[0118] The twenty-seventh resistor is connected between the non-inverting input terminal of the sixth operational amplifier and the ground terminal; and

[0119] The output terminal of the sixth operational amplifier is connected to the first terminal of the third detection circuit.

[0120] In one embodiment, the subtraction circuit includes: a twenty-eighth resistor, a twenty-ninth resistor, a thirtieth resistor, a thirty-first resistor, and a seventh operational amplifier;

[0121] wherein the twenty-eight resistors are connected between the inverting input terminal of the seventh operational amplifier and the output terminal of the seventh operational amplifier;

[0122] The output terminal of the seventh operational amplifier is connected to the first terminal of the fourth detection circuit;

[0123] The twenty-ninth resistor is connected between the inverting input terminal of the seventh operational amplifier and the output terminal of the waveform generator;

[0124] The 30th resistor is connected between the non-inverting input of the 7th operational amplifier and the positive terminal of the battery; and

[0125] The thirty-first resistor is connected between the non-inverting input terminal of the seventh operational amplifier and the ground terminal.

[0126] In a second aspect, the present application provides a battery management chip, comprising the battery management circuit provided in the first aspect.

[0127] In a third aspect, the present application provides a vehicle, comprising the battery management circuit provided in the first aspect or the battery management chip provided in the second aspect. Beneficial effects

[0128] The battery management circuit provided in this application can be installed in a vehicle in the form of a battery management chip. The battery management circuit includes an amplitude-phase detection device and a waveform generator. The output of the waveform generator is connected to the positive electrode of the battery and the second input of the amplitude-phase detection device, respectively; the first input of the amplitude-phase detection device is connected to the positive electrode of the battery. The waveform generator is configured to apply AC excitation signals of different frequencies to the battery, and the amplitude-phase detection device is configured to detect the amplitude and phase of the battery's impedance under the AC excitation signals of different frequencies. This allows for estimating the battery's charge level and lifespan, and can better characterize the kinetic information of the electrode process and the conductivity of the battery material. BRIEF DESCRIPTION OF THE DRAWINGS

[0129] FIG1 is a structural diagram of a battery management circuit provided by the present application;

[0130] FIG2 is a second structural diagram of a battery management circuit provided by the present application;

[0131] FIG3 is a third structural diagram of the battery management circuit provided by the present application;

[0132] FIG4 is a third structural diagram of the battery management circuit provided by the present application;

[0133] FIG5 is a structural diagram of a waveform generator provided by the present application;

[0134] FIG6 is a second structural diagram of the waveform generator provided by the present application;

[0135] FIG7 is a third structural diagram of the waveform generator provided by the present application;

[0136] FIG8 is a fourth structural diagram of a waveform generator provided by the present application;

[0137] FIG9 is a fifth structural diagram of a waveform generator provided by the present application;

[0138] FIG10 is a schematic structural diagram of an amplitude and phase detection device provided by the present application;

[0139] FIG11 is a schematic structural diagram of an amplitude detection device provided by the present application;

[0140] FIG12 is a schematic structural diagram of a phase detection device provided by the present application;

[0141] FIG13 is a schematic diagram of a vehicle provided in the present application. Modes for Carrying Out the Invention

[0142] As shown in FIG1 , the present application provides a battery management circuit 100 , which includes an amplitude and phase detection device 1 and a waveform generator 2 ;

[0143] Among them, the output end of the waveform generator 2 is respectively connected to the positive pole of the battery 200 and the second input end of the amplitude and phase detection device 1; the first input end of the amplitude and phase detection device 1 is connected to the positive pole of the battery 200; the waveform generator 2 can be configured to apply AC excitation signals of different frequencies to the battery 200, and the amplitude and phase detection device 1 can be configured to detect the amplitude and phase of the impedance of the battery 200 under AC excitation signals of different frequencies.

[0144] In the present application, the amplitude and phase detection device 1 and the waveform generator 2 can be integrated into the battery management circuit 100. The waveform generator 2 provides AC excitation signals of different frequencies to the battery 200. Under the stimulation of the AC excitation signal input by the waveform generator 2, the battery 200 generates voltage disturbances.

[0145] The amplitude and phase detection device 1 can detect the voltage and current disturbances at both ends of the battery 200, and combined with the AC excitation signals of different frequencies input by the waveform generator 2, it can obtain the amplitude and phase of the impedance of the battery 200 under different AC excitation signals.

[0146] The battery 200 provided herein may not be a purely resistive element; in actual use, the battery 200 exhibits capacitive or inductive properties. Therefore, the impedance expression for the battery 200 can be composed of two components: amplitude and phase. Based on this, the impedance spectrum of the battery 200 can be determined by determining the amplitude and phase of the impedance of the battery 200 under different AC excitation signals.

[0147] The impedance spectrum of the battery 200 provided in this application can serve as an important parameter reflecting the performance of the battery 200. It can also serve as an effective parameter for judging and influencing the charge and discharge performance of the battery 200 to accurately reflect the working status of the battery 200. Therefore, the impedance spectrum of the battery 200 provided in this application can provide a basis for evaluating the power and life of the battery 200.

[0148] In addition, the impedance spectrum can also reflect the positive and negative electrode active subradius of the battery 200, the positive and negative electrode electrolyte volume fraction, the aging state of the positive and negative electrode liquid phase conductivity, the ohmic internal resistance, SEI film impedance, charge transfer internal resistance and the diffusion impedance value of lithium electrons.

[0149] The battery management circuit 100 provided in this application is a battery 200 management system that can estimate the power and life of the battery 200, and compared with general voltage and current data, it can better characterize the kinetic information in the electrode process and the conductivity of the battery 200 material.

[0150] The negative electrode of the battery 200 mentioned in this application can be grounded (in the chip, grounding is specifically connected to a reference voltage) to enable the battery management circuit 100 to work.

[0151] The battery management circuit 100 provided in this application includes an amplitude and phase detection device and a waveform generator;

[0152] The output end of the waveform generator is connected to the positive pole of the battery 200 and the second input end of the amplitude and phase detection device respectively; the first input end of the amplitude and phase detection device is connected to the positive pole of the battery 200; the waveform generator is configured to apply AC excitation signals of different frequencies to the battery 200, and the amplitude and phase detection device is configured to detect the amplitude and phase of the impedance of the battery 200 under AC excitation signals of different frequencies.

[0153] In one embodiment of the present application, the AC excitation signals of different frequencies may be swept frequency triangle wave signals of 0.01 Hz to 500 kHz.

[0154] In this application, a broadband triangular wave signal is used as the AC excitation signal, enabling a single measurement, i.e., multi-frequency impedance spectroscopy testing. This significantly reduces the operating time of the battery management circuit 100 provided herein, enabling rapid detection of the impedance amplitude and phase of the battery 200 under different AC excitation signals.

[0155] In addition, since the frequency of the triangle wave signal changes slowly, signal distortion can be reduced. At the same time, if calculation accuracy is required, five signal points with odd multiples of the frequency can be extracted. This not only reduces the frequency sweep time, but also increases the accuracy of the impedance calculation during subsequent digital signal processing.

[0156] In one embodiment of the present application, as shown in Figure 2, the battery management circuit 100 provided in the present application also includes an analog-to-digital conversion device 3, a storage device 4 and a communication device 5, and the amplitude and phase detection device 1, the analog-to-digital conversion device 3, the storage device 4 and the communication device 5 are connected in sequence.

[0157] In the present application, the analog-to-digital converter 3 can convert the analog signal output by the amplitude and phase detection device 1 into a digital signal to realize data conversion from analog signal to digital signal. The analog signal can represent the amplitude and phase of the impedance of the battery 200 under different AC excitation signals.

[0158] The storage device 4 can store the conversion result so that the communication device 5 can perform data communication on the conversion result.

[0159] In the present application, the battery management circuit 100 includes an analog-to-digital conversion device, a storage device, and a communication device, which can realize the external presentation of the data of the amplitude and phase detection device.

[0160] In one embodiment of the present application, as shown in FIG3 , the battery management circuit 100 provided in the present application further includes a filter device 6 , and the analog-to-digital converter device 3 is connected to the storage device 4 via the filter device 6 .

[0161] In the present application, a filter device is provided in the battery management circuit 100. The filter device can filter out invalid signals in the digital signal output by the analog-to-digital converter device to retain useful signals.

[0162] In one embodiment of the present application, as shown in FIG4 , the battery management circuit 100 provided by the present application further includes at least one of a voltage acquisition device 7 , a current acquisition device 8 , a temperature acquisition device 9 , and a multiplexer 10 ;

[0163] Among them, the voltage collection device 7 is connected to the positive electrode of the battery 200, the negative electrode of the battery 200 and the multiplexer 10 respectively; the current collection device 8 is connected to the positive electrode of the battery 200 or the negative electrode of the battery 200, and the current collection device 8 is connected to the multiplexer 10; the temperature collection device 9 is connected to the multiplexer 10; the amplitude and phase detection device 1 is connected to the multiplexer 10; and the multiplexer 10 is connected to the input end of the analog-to-digital conversion device 3.

[0164] In the present application, a voltage acquisition device 7, a current acquisition device 8, and a temperature acquisition device 9 may be provided in the battery management circuit 100. The voltage acquisition device 7 may acquire the voltage of the battery 200, the current acquisition device 8 may acquire the current of the battery 200, and the temperature acquisition device 9 may acquire the temperature of the battery 200.

[0165] In one embodiment, the present application may transmit one signal to the back-end circuit through a multiplexer.

[0166] Based on the battery management circuit 100 provided in this embodiment, the voltage, current and temperature of the battery 200 can be detected.

[0167] In one embodiment of the present application, as shown in FIG5 , the waveform generator 2 includes a hysteresis voltage comparator 21 , a first switching device 22 , a sign circuit 23 , an inverting integrator 24 , and a voltage-to-current converter 25 ;

[0168] Among them, the first end of the hysteresis voltage comparator 21 is connected to the second end of the inverting integrator 24, and the second end of the hysteresis voltage comparator 21 is connected to the control end of the first switching device 22; the first switching device 22 is connected between the first end of the sign circuit 23 and the ground end; the second end of the sign circuit 23 is connected to the first end of the inverting integrator 24; the second end of the inverting integrator 24 is connected to the first end of the voltage-current converter 25; the second end of the voltage-current converter 25 is respectively connected to the positive electrode of the battery 200 and the second input end of the amplitude and phase detection device 1.

[0169] In the present application, the hysteresis voltage comparator 21 outputs a square wave signal having a preset threshold value, which can control the first switch device 22 so that the output signal of the sign circuit 23 is proportionally amplified with the input signal.

[0170] Inverting integrator 24 integrates and inverts the signal output by sign circuit 23 to achieve frequency change of the triangular wave signal. By changing the voltage amplitude of the input signal to sign circuit 23, a periodic frequency sweep signal input and oscillation process can be completed, thereby outputting a stable triangular wave signal with a constant frequency.

[0171] Since the battery 200 is a low-resistance energy storage device, a slight error in applying voltage to the battery 200 may cause a huge current change in the battery 200. Therefore, the present application may also add a voltage-current converter 25 to the second end of the inverting integrator 24.

[0172] In one embodiment of the present application, based on the waveform generator 2 shown in Figure 5, as shown in Figure 6, the waveform generator 2 also includes a buck device 26; wherein the second end of the inverting integrator 24 can be connected to the first end of the voltage-current converter 25 through the buck device 26.

[0173] In this application, the battery management circuit 100 can be implemented based on an AC signal. However, the AC excitation signal input to the battery 200 must be kept small, as this may damage the internal structure of the system. Therefore, this application can introduce a step-down device 26 to step down the output signal of the inverting integrator 24 to perform AC modulation.

[0174] In one embodiment of the present application, as shown in FIG6 , the waveform generator 2 further includes a current limiting device 27 ; wherein the second end of the hysteresis voltage comparator 21 is connected to the control end of the first switching device 22 through the current limiting device 27 .

[0175] In an example, the current limiting device may be a resistor, that is, the fifth resistor shown in FIG. 7 .

[0176] In the present application, the current limiting device 27 can limit the amplitude of the control signal input to the control terminal of the first switching device 22 , thereby preventing the first switching device 22 from being damaged and improving the reliability of the first switching device 22 .

[0177] In one embodiment of the present application, as shown in any one of FIG. 7 , FIG. 8 to FIG. 9 , the hysteresis voltage comparator 21 includes a first resistor R1 , a second resistor R2 , a third resistor R3 , a fourth resistor R4 , a first operational amplifier U1 , and a third diode D3 ;

[0178] Among them, the inverting input terminal of the first operational amplifier U1 is connected to the second terminal of the inverting integrator 24, the non-inverting input terminal of the first operational amplifier U1 is grounded through the second resistor R2, and the output terminal of the first operational amplifier U1 is connected to the first terminal of the first resistor R1; the third resistor R3 is connected between the non-inverting input terminal of the first operational amplifier U1 and the second terminal of the first resistor R1; the fourth resistor R4 is connected between the second terminal of the first resistor R1 and the control terminal of the first switching device 22; the anode of the third diode D3 is connected to the control terminal of the first switching device 22, and the cathode of the third diode D3 is grounded.

[0179] In the battery management circuit 100 provided in the present application, the hysteresis voltage comparator may also be implemented using other structures, which is not limited in the present application.

[0180] In one embodiment of the present application, as shown in any one of FIG. 7 , FIG. 8 to FIG. 9 , the hysteresis voltage comparator 21 further includes a first diode D1 and a second diode D2 ;

[0181] The second end of the first resistor R1 is connected to the cathode of the first diode D1; the anode of the first diode D1 is connected to the anode of the second diode D2; the cathode of the second diode D2 is grounded; the first diode D1 and the second diode D2 can be zener diodes.

[0182] In the present application, the first diode D1 and the second diode D2 may form a voltage stabilizer, so that the hysteresis voltage comparator 21 outputs a square wave signal with a stable voltage.

[0183] In one embodiment of the present application, as shown in any one of FIG. 7 , FIG. 8 to FIG. 9 , the sign circuit 23 includes a fundamental wave generator W, a sixth resistor R6 , a seventh resistor R7 , a second operational amplifier U2 , an eighth resistor R8 , and a ninth resistor R9 ;

[0184] Among them, the fundamental wave generator W is connected between the ground end and the first end of the sixth resistor R6; the second end of the sixth resistor R6 is connected to the first switching device 22; the seventh resistor R7 is connected between the second end of the sixth resistor R6 and the positive input end of the second operational amplifier U2; the eighth resistor R8 is connected between the ground end and the inverting input end of the second operational amplifier U2; the ninth resistor R9 is connected between the inverting input end of the second operational amplifier U2 and the output end of the second operational amplifier U2; the output end of the second operational amplifier U2 is connected to the first end of the inverting integrator 24.

[0185] In the battery management circuit 100 provided in this application, the sign circuit 23 may also be implemented using other structures, which is not limited in this application.

[0186] In one embodiment of the present application, as shown in any one of FIG. 7 , FIG. 8 to FIG. 9 , the fundamental wave generator W in the present application may be a square wave generator.

[0187] In one embodiment of the present application, as shown in any one of FIG. 7 , FIG. 8 to FIG. 9 , the inverting integrator 24 includes a tenth resistor R10 , a first capacitor C, and a third operational amplifier U3 ;

[0188] Among them, the tenth resistor R10 is connected between the second end of the sign circuit 23 and the inverting input end of the third operational amplifier U3; the non-inverting input end of the third operational amplifier U3 is grounded, the output end of the third operational amplifier U3 is connected to the second end of the sign circuit 23 through the first capacitor C1, and the output end of the third operational amplifier U3 is connected to the voltage-current converter 25.

[0189] In the battery management circuit 100 provided in this application, the inverting integrator 24 may also be implemented using other structures, which is not limited in this application.

[0190] In one embodiment of the present application, as shown in FIG7 , the voltage-to-current converter 25 includes an eleventh resistor R11 , a twelfth resistor R12 , a thirteenth resistor R13 , a fourteenth resistor R14 , a fifteenth resistor R15 and a fourth operational amplifier U4 ;

[0191] Among them, the eleventh resistor R11 is connected between the positive input terminal of the fourth operational amplifier U4 and the ground terminal; the twelfth resistor R12 is connected between the output terminal of the fourth operational amplifier U4 and the inverting input terminal of the fourth operational amplifier U4; the thirteenth resistor R13 and the fourteenth resistor R14 are connected in series and connected between the output terminal of the fourth operational amplifier U4 and the ground terminal; the fifteenth resistor R15 is connected between the second end of the inverting integrator 24 and the inverting input terminal of the fourth operational amplifier U4; the positive input terminal of the fourth operational amplifier U4 is connected to the first intermediate point M, and the first intermediate point M23 is the connection point between the thirteenth resistor R13 and the fourteenth resistor R14; the first intermediate point M is connected to the positive pole of the battery 200.

[0192] In the battery management circuit 100 provided in the present application, the voltage-current converter 25 may also be implemented using other structures, which is not limited in the present application.

[0193] In one embodiment of the present application, as shown in any one of FIG. 7 , FIG. 8 to FIG. 9 , the buck device 26 includes a first inductor L1 , a fourth diode D4 , a second capacitor C2 and a second switch device Q2 ;

[0194] Among them, the second switching device Q2 is connected between the second end of the inverting integrator 24 and the first end of the first inductor L1, and the control end of the second switching device Q2 is configured to receive the step-down control signal; the cathode of the fourth diode D4 is connected to the first end of the first inductor L1, and the anode of the fourth diode D4 is grounded; the second capacitor C2 is connected between the second end of the first inductor L1 and the ground end; the second end of the first inductor L1 is connected to the first end of the voltage-current converter 25.

[0195] In the battery management circuit 100 provided in the present application, the voltage-reducing device 26 may also be implemented using other structures, which is not limited in the present application.

[0196] In one embodiment of the present application, as shown in FIG8 , the voltage-to-current converter 25 includes an eleventh resistor R11 , a twelfth resistor R12 , a thirteenth resistor R13 , a fourteenth resistor R14 , a fifteenth resistor R15 , a fourth operational amplifier U4 , and a fifth operational amplifier U5 ;

[0197] Among them, the eleventh resistor R11 is connected between the second end of the inverting integrator 24 and the positive input terminal of the fourth op amp U4; the twelfth resistor R12 is connected between the output terminal of the fourth op amp U4 and the inverting input terminal of the fourth op amp U4; the thirteenth resistor R13 is connected between the output terminal of the fourth op amp U4 and the positive input terminal of the fifth op amp U5; the fourteenth resistor R14 is connected between the output terminal of the fifth op amp U5 and the positive input terminal of the fourth op amp; the fifteenth resistor R15 is connected between the inverting input terminal of the fourth op amp U4 and the ground terminal; the inverting input terminal of the fifth op amp U5 is connected to the output terminal of the fifth op amp U5, and the positive input terminal of the fifth op amp U5 is connected to the positive pole of the battery 200.

[0198] In the present application, the structure of the voltage-to-current converter 25 shown in FIG8 differs from the structure of the voltage-to-current converter 25 shown in FIG7 in that the voltage-to-current converter 25 shown in FIG8 additionally uses a fifth op amp U5, and the fifth op amp U5 forms a voltage follower circuit, which enables the input and output of the voltage-to-current converter 25 to be in phase. This reduces the distortion of the output current signal of the voltage-to-current converter 25 and improves noise suppression capabilities.

[0199] In one embodiment of the present application, as shown in FIG9 , the voltage-to-current converter 25 further includes an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13, a fourteenth resistor R14, a fifteenth resistor R15, a sixteenth resistor R16, a seventeenth resistor R17, an eighteenth resistor R18, a fourth operational amplifier U4, and a fifth operational amplifier U5;

[0200] Among them, the eleventh resistor R11 is connected between the second end of the inverting integrator 24 and the non-inverting input terminal of the fourth operational amplifier U4; the twelfth resistor R12 is connected between the output terminal of the fourth operational amplifier U4 and the inverting input terminal of the fourth operational amplifier U4; the thirteenth resistor R13 is connected between the output terminal of the fourth operational amplifier U4 and the non-inverting input terminal of the fifth operational amplifier U5; the fifteenth resistor R15 is connected between the inverting input terminal of the fourth operational amplifier U4 and the ground terminal; the fourteenth resistor R14, the eighteenth resistor R18, and the sixteenth resistor R16 are connected in series in sequence between the non-inverting input terminal of the fourth operational amplifier U4 and the non-inverting input terminal of the fifth operational amplifier U5; the seventeenth resistor R17 is connected between the output terminal of the fourth operational amplifier U4 and the second intermediate point N, where the second intermediate point N is the connection point between the fourteenth resistor R14 and the eighteenth resistor R18; the second intermediate point N is connected to the positive pole of the battery 200.

[0201] In the present application, the structure of the voltage-current converter 25 shown in Figure 9 is different from the structure of the voltage-current converter 25 shown in Figure 7 in that the voltage-current converter 25 shown in Figure 9 additionally uses a fifth operational amplifier U5, and the fifth operational amplifier U5 forms a bridge differential excitation structure, which can enable the output signals of the voltage-current converter 25 to maintain an approximately linear correlation, so that the output current of the voltage-current converter 25 is less affected by changes in the amplitude of the input signal and has better constant current characteristics.

[0202] In one embodiment of the present application, as shown in FIG1 , the amplitude and phase detection device 1 includes an amplitude detection device 11 and a phase detection device 12 ;

[0203] Among them, the second input end of the amplitude detection device 11 is connected to the output end of the waveform generator 2, and the first input end of the amplitude detection device 11 is connected to the positive pole of the battery 200; the second input end of the phase detection device 12 is connected to the output end of the waveform generator 2, and the first input end of the phase detection device 12 is connected to the positive pole of the battery 200.

[0204] In the present application, the amplitude and phase detection device 1 is specifically implemented by an amplitude detection device 11 and a phase detection device 12. The amplitude detection device 11 can be configured to detect the amplitude of the impedance of the battery 200 under AC excitation signals of different frequencies. The phase detection device 12 can be configured to detect the phase of the impedance of the battery 200 under AC excitation signals of different frequencies.

[0205] In one embodiment of the present application, as shown in FIG10 , the amplitude detection device 11 includes a first detection circuit 111 , a second detection circuit 112 and a nineteenth resistor R19 ;

[0206] Among them, the first end of the first detection circuit 111 is connected to the output end of the waveform generator 2; the first end of the second detection circuit 112 is connected to the positive electrode of the battery 200; the nineteenth resistor R19 is connected between the second end of the first detection circuit 111 and the second end of the second detection circuit 112.

[0207] In the battery management circuit 100 provided in the present application, the amplitude detection device 11 may also be implemented using other structures, which is not limited in the present application.

[0208] In one embodiment of the present application, as shown in FIG11 , the first detection circuit 111 includes a fifth diode D5 ; wherein the anode of the fifth diode D5 is connected to the output end of the waveform generator 2 , and the cathode of the fifth diode D5 is connected to the nineteenth resistor R19 .

[0209] In the battery management circuit 100 provided in the present application, the first detection circuit 111 may also be implemented using other structures, which is not limited in the present application.

[0210] In one embodiment of the present application, as shown in FIG11 , the first detection circuit 111 further includes a first filtering circuit 1111 ; wherein the first filtering circuit 1111 is connected between the cathode of the fifth diode D5 and the ground terminal.

[0211] In the present application, adding the first filter circuit 1111 to the first detection circuit 111 can enable the first detection circuit 111 to perform more accurate detection.

[0212] In one embodiment of the present application, as shown in FIG11 , the first filtering circuit 1111 includes a twenty-first resistor R21 and a third capacitor C3 ; wherein the twenty-first resistor R21 and the third capacitor C3 are respectively connected in parallel between the cathode of the fifth diode D5 and the ground terminal.

[0213] In the present application, the first filter circuit 1111 may be an RC filter. Meanwhile, in the battery management circuit 100 provided in the present application, the first filter circuit 1111 may also be implemented using other structures, which is not limited in the present application.

[0214] In one embodiment of the present application, as shown in FIG11 , the second detection circuit 112 includes a sixth diode D6 ; wherein the cathode of the sixth diode D6 is connected to the positive electrode of the battery 200 , and the anode of the sixth diode D6 is connected to the nineteenth resistor R19 .

[0215] In the battery management circuit 100 provided in this application, the second detection circuit 112 may also be implemented using other structures, which is not limited in this application.

[0216] In one embodiment of the present application, as shown in FIG11 , the second detection circuit 112 further includes a second filter circuit 1121 ; wherein the second filter circuit 1121 is connected between the anode of the sixth diode D6 and the ground terminal.

[0217] In the present application, adding a second filter circuit 1121 to the second detection circuit 112 can enable the second detection circuit 112 to perform more accurate detection.

[0218] In one embodiment of the present application, as shown in FIG11 , the second filtering circuit 1121 includes a twenty-second resistor R22 and a fourth capacitor C4 ; wherein the twenty-second resistor R22 and the fourth capacitor C4 are respectively connected in parallel between the anode of the sixth diode D6 and the ground terminal.

[0219] In the present application, the second filter circuit 1121 may be an RC filter. Meanwhile, in the battery management circuit 100 provided in the present application, the second filter circuit 1121 may also be implemented using other structures, which is not limited in the present application.

[0220] In one embodiment of the present application, taking FIG. 11 as an example, the working principle of the amplitude detection device 11 may be:

[0221] First, the AC excitation signal output by the waveform generator is recorded as:

[0222] Among them, U I1 ,ω and AC excitation signals are amplitude, frequency and phase.

[0223] The output signal from the positive electrode of the battery 200 Denoted as:

[0224] Among them, U I2 ,ω and are the output signals of the positive electrode of the battery 200 amplitude, frequency and phase.

[0225] On this basis, the current of the first detection circuit for:

[0226] in, is the voltage across the fifth diode D5.

[0227] Current of the second detection circuit for:

[0228] in, is the voltage across the sixth diode D6.

[0229] Based on the above content, in the case of including the first filtering circuit and the second filtering circuit, it can be obtained:

[0230] in, is the voltage across the twenty-first resistor R21.

[0231] in, is the voltage across the twenty-second resistor R22.

[0232] Without including the first filtering circuit and the second filtering circuit, we can get:

[0233] Based on the above formula, by constructing the amplitude detection device shown in FIG11 and based on the above formula 7 or formula 8, the amplitude U of the impedance of the battery 200 can be obtained.MAG .

[0234] It should be noted that a, b, and c in the above formula are parameters of the corresponding diode, and their values ​​can be fixed.

[0235] In one embodiment of the present application, as shown in FIG10 , the phase detection device 12 includes a third detection circuit 122 , a fourth detection circuit 123 , a twentieth resistor R20 , an adding circuit 121 and a subtracting circuit 124 ;

[0236] Among them, the first end of the adding circuit 121 is connected to the output end of the waveform generator 2, and the second end of the adding circuit 121 is connected to the positive electrode of the battery 200; the first end of the third detection circuit 122 is connected to the third end of the adding circuit 121; the first end of the subtraction circuit 124 is connected to the output end of the waveform generator 2, and the second end of the subtraction circuit 124 is connected to the positive electrode of the battery 200; the first end of the fourth detection circuit 123 is connected to the third end of the subtraction circuit 124; and the twentieth resistor R20 is connected between the second end of the third detection circuit 122 and the second end of the fourth detection circuit 123.

[0237] In the battery management circuit 100 provided in the present application, the phase detection device 12 may also be implemented using other structures, which is not limited in the present application.

[0238] In one embodiment of the present application, as shown in FIG12 , the third detection circuit 122 includes a seventh diode D7 ; wherein the cathode of the seventh diode D7 is connected to the third end of the adding circuit 121 , and the anode of the seventh diode D7 is connected to the twentieth resistor R20 .

[0239] In the battery management circuit 100 provided in this application, the third detection circuit 122 may also be implemented using other structures, which is not limited in this application.

[0240] In one embodiment of the present application, as shown in FIG12 , the third detection circuit 122 further includes: a third filtering circuit 1221 ; wherein the third filtering circuit 1221 is connected between the anode of the seventh diode D7 and the ground terminal.

[0241] In the present application, adding the third filter circuit 1221 to the third detection circuit 122 can enable the third detection circuit 122 to perform more accurate detection.

[0242] In one embodiment of the present application, as shown in FIG12 , the third filtering circuit 1221 includes a thirty-second resistor R32 and a fifth capacitor C5 ; wherein the thirty-second resistor R32 and the fifth capacitor C5 are respectively connected in parallel between the anode of the seventh diode D7 and the ground terminal.

[0243] In the present application, the third filter circuit 1221 may be an RC filter. Meanwhile, in the battery management circuit 100 provided in the present application, the third filter circuit 1221 may also be implemented using other structures, which is not limited in the present application.

[0244] In one embodiment of the present application, as shown in FIG12 , the fourth detection circuit 123 includes an eighth diode D8 ; wherein the anode of the eighth diode D8 is connected to the third end of the subtraction circuit 124 , and the cathode of the eighth diode D8 is connected to the twentieth resistor R20 .

[0245] In the battery management circuit 100 provided in the present application, the fourth detection circuit 123 may also be implemented using other structures, which is not limited in the present application.

[0246] In one embodiment of the present application, as shown in FIG12 , the fourth detection circuit 123 further includes a fourth filtering circuit 1231 ; wherein the fourth filtering circuit 1231 is connected between the cathode of the eighth diode D8 and the ground terminal.

[0247] In the present application, adding the fourth filter circuit 1231 to the fourth detection circuit 123 can enable the fourth detection circuit 123 to perform more accurate detection.

[0248] In one embodiment of the present application, as shown in FIG12 , the fourth detection circuit 123 includes a thirty-third resistor R33 and a fifth capacitor C5 ; wherein the thirty-second resistor R32 and the fifth capacitor C5 are respectively connected in parallel between the cathode of the eighth diode D8 and the ground terminal.

[0249] In the present application, the fourth detection circuit 123 may be an RC filter. Meanwhile, in the battery management circuit 100 provided in the present application, the fourth detection circuit 123 may also be implemented using other structures, which is not limited in the present application.

[0250] In one embodiment of the present application, taking FIG. 12 as an example, the working principle of the phase detection device 12 may be:

[0251] Current of the third detection circuit for:

[0252] in, is the voltage across the seventh diode D7.

[0253] Current of the fourth detection circuit for:

[0254] in, is the voltage across the eighth diode D8.

[0255] Based on the above content, in the case of including the third filtering circuit and the fourth filtering circuit, it can be obtained:

[0256] in, is the voltage across the thirty-third resistor R33.

[0257] in, is the voltage across the thirty-second resistor R32.

[0258] Without including the third filtering circuit and the fourth filtering circuit, it can be obtained:

[0259] Based on the above formula, it can be known that by constructing the phase detection device 12 as shown in FIG12 and based on the above formula 14 or formula 13, the phase U of the impedance of the battery 200 can be obtained. phase .

[0260] In one embodiment of the present application, as shown in FIG12 , the adding circuit 121 includes a twenty-third resistor R23 , a twenty-fourth resistor R24 ​​, a twenty-fifth resistor R25 , a twenty-sixth resistor R26 , a twenty-seventh resistor R27 and a sixth operational amplifier U6 ;

[0261] Among them, the twenty-third resistor R23 is connected between the ground terminal and the inverting input terminal of the sixth operational amplifier U6; the twenty-fourth resistor R24 ​​is connected between the inverting input terminal of the sixth operational amplifier U6 and the output terminal of the sixth operational amplifier U6; the twenty-fifth resistor R25 is connected between the output terminal of the waveform generator 2 and the non-inverting input terminal of the sixth operational amplifier U6; the twenty-sixth resistor R26 is connected between the positive pole of the battery 200 and the non-inverting input terminal of the sixth operational amplifier U6; the twenty-seventh resistor R27 is connected between the non-inverting input terminal of the sixth operational amplifier U6 and the ground terminal; the output terminal of the sixth operational amplifier U6 is connected to the first terminal of the third detection circuit 122.

[0262] In the battery management circuit 100 provided in this application, the adding circuit 121 may also be implemented using other structures, which is not limited in this application.

[0263] In one embodiment of the present application, as shown in FIG12 , the subtraction circuit 124 includes a twenty-eighth resistor R28 , a twenty-ninth resistor R29 , a thirtieth resistor R30 , a thirty-first resistor R31 and a seventh operational amplifier U7 ;

[0264] Among them, the twenty-eighth resistor R28 is connected between the inverting input terminal of the seventh operational amplifier U7 and the output terminal of the seventh operational amplifier U7; the output terminal of the seventh operational amplifier U7 is connected to the first terminal of the fourth detection circuit 123; the twenty-ninth resistor R29 is connected between the inverting input terminal of the seventh operational amplifier U7 and the output terminal of the waveform generator 2; the thirtieth resistor R30 is connected between the non-inverting input terminal of the seventh operational amplifier U7 and the positive electrode of the battery 200; and the thirty-first resistor R31 is connected between the non-inverting input terminal of the seventh operational amplifier U7 and the ground terminal.

[0265] In the battery management circuit 100 provided in this application, the subtraction circuit 124 may also be implemented using other structures, which is not limited in this application.

[0266] In one embodiment of the present application, as shown in FIG13 , the present application further provides a battery management chip 300 , and the battery management chip 300 includes the battery management circuit 100 provided in the present application.

[0267] In one embodiment of the present application, as shown in FIG13 , the present application further provides a vehicle 400 , which includes the battery management circuit 100 or the battery management chip 300 provided in the present application.

Claims

1. A battery management circuit (100), comprising: An amplitude and phase detection device (1), wherein a first input terminal of the amplitude and phase detection device (1) is connected to a positive electrode of a battery (200), and the amplitude and phase detection device (1) is configured to detect the amplitude and phase of the impedance of the battery (200) under AC excitation signals of different frequencies; and A waveform generator (2), wherein an output end of the waveform generator (2) is respectively connected to the positive electrode of the battery (200) and the second input end of the amplitude and phase detection device (1), and the waveform generator (2) is configured to apply AC excitation signals of different frequencies to the battery (200).

2. The battery management circuit (100) according to claim 1, wherein: The AC excitation signals of different frequencies are swept frequency triangle wave signals of 0.01 Hz to 500 KHz.

3. The battery management circuit (100) according to any one of claims 1-2, further comprising: an analog-to-digital conversion device (3), one end of the analog-to-digital conversion device (3) being connected to the output end of the amplitude-phase detection device (1); a storage device (4), one end of the storage device (4) being connected to the other end of the analog-to-digital conversion device (3); and A communication device (5) is connected to the other end of the storage device (4).

4. The battery management circuit (100) according to claim 3, further comprising a filter device (6); in, One end of the filter device (6) is connected to the analog-to-digital converter device (3), and the other end of the filter device (6) is connected to the storage device (4).

5. The battery management circuit (100) according to claim 3 or 4, further comprising: at least one of a voltage acquisition device (7), a current acquisition device (8), a temperature acquisition device (9), and a multiplexer (10); The voltage collection device (7) is respectively connected to the positive electrode of the battery (200), the negative electrode of the battery (200) and the multiplexer (10); The current collection device (8) is connected to the positive electrode of the battery (200) or the negative electrode of the battery (200), and the current collection device (8) is connected to the multiplexer (10); The temperature acquisition device (9) is connected to the multiplexer (10); The amplitude and phase detection device (1) is connected to the multiplexer (10); and The multiplexer (10) is connected to the input end of the analog-to-digital conversion device (3).

6. The battery management circuit (100) according to claim 2, wherein: The waveform generator (2) comprises: a hysteresis voltage comparator (21), a first switching device (22), a sign circuit (23), an inverting integrator (24) and a voltage-current converter (25); Wherein, the first end of the hysteresis voltage comparator (21) is connected to the second end of the inverting integrator (24), and the second end of the hysteresis voltage comparator (21) is connected to the control end of the first switching device (22); The first switch device (22) is connected between a first terminal of the sign circuit (23) and a ground terminal; The second end of the sign circuit (23) is connected to the first end of the inverting integrator (24); The second end of the inverting integrator (24) is connected to the first end of the voltage-current converter (25); and The second end of the voltage-current converter (25) is connected to the positive electrode of the battery (200) and the second input end of the amplitude and phase detection device (1) respectively.

7. The battery management circuit (100) according to claim 6, wherein: The waveform generator (2) further includes a voltage-reducing device (26); The second end of the inverting integrator (24) is connected to the first end of the voltage-current converter (25) through the voltage-down device (26).

8. The battery management circuit (100) according to any one of claims 6-7, wherein: The waveform generator (2) further includes a current limiting device (27); The second end of the hysteresis voltage comparator (21) is connected to the control end of the first switch device (22) through the current limiting device (27).

9. The battery management circuit (100) according to any one of claims 6 to 8, wherein: The hysteresis voltage comparator (21) comprises: a first resistor (R1), a second resistor (R2), a third resistor (R3), a fourth resistor (R4), a first operational amplifier (U1) and a third diode (D3); wherein the inverting input terminal of the first operational amplifier (U1) is connected to the second terminal of the inverting integrator (24), the non-inverting input terminal of the first operational amplifier (U1) is grounded via the second resistor (R2), and the output terminal of the first operational amplifier (U1) is connected to the first terminal of the first resistor (R1); The third resistor (R3) is connected between the non-inverting input terminal of the first operational amplifier (U1) and the second end of the first resistor (R1); The fourth resistor (R4) is connected between the second end of the first resistor (R1) and the control end of the first switching device (22); and The anode of the third diode (D3) is connected to the control terminal of the first switching device (22), and the cathode of the third diode (D3) is grounded.

10. The battery management circuit (100) according to claim 9, wherein: The hysteresis voltage comparator (21) further includes: a first diode (D1) and a second diode (D2); Wherein, the second end of the first resistor (R1) is connected to the cathode of the first diode (D1); The anode of the first diode (D1) is connected to the anode of the second diode (D2); The cathode of the second diode (D2) is grounded; and The first diode (D1) and the second diode (D2) are voltage-stabilizing diodes.

11. The battery management circuit (100) according to any one of claims 6 to 10, wherein: The symbol circuit (23) includes: a fundamental wave generator (W), a sixth resistor (R6), a seventh resistor (R7), a second operational amplifier (U2), an eighth resistor (R8) and a ninth resistor (R9); wherein the fundamental wave generator (W) is connected between the ground terminal and the first end of the sixth resistor (R6); A second end of the sixth resistor (R6) is connected to the first switch device (22); The seventh resistor (R7) is connected between the second end of the sixth resistor (R6) and the non-inverting input end of the second operational amplifier (U2); The eighth resistor (R8) is connected between the ground terminal and the inverting input terminal of the second operational amplifier (U2); The ninth resistor (R9) is connected between the inverting input terminal of the second operational amplifier (U2) and the output terminal of the second operational amplifier (U2); and The output end of the second operational amplifier (U2) is connected to the first end of the inverting integrator (24).

12. The battery management circuit (100) according to claim 11, wherein: The fundamental wave generator (W) is a square wave generator.

13. The battery management circuit (100) according to any one of claims 6 to 12, wherein: The inverting integrator (24) includes: a tenth resistor (R10), a first capacitor (C1) and a third operational amplifier (U3); wherein the tenth resistor (R10) is connected between the second end of the sign circuit (23) and the inverting input end of the third operational amplifier (U3); and The non-inverting input terminal of the third operational amplifier (U3) is grounded, the output terminal of the third operational amplifier (U3) is connected to the second terminal of the sign circuit (23) via the first capacitor (C1), and the output terminal of the third operational amplifier (U3) is connected to the voltage-current converter (25).

14. The battery management circuit (100) according to any one of claims 6 to 13, wherein: The voltage-current converter (25) includes: an eleventh resistor (R11), a twelfth resistor (R12), a thirteenth resistor (R13), a fourteenth resistor (R14), a fifteenth resistor (R15) and a fourth operational amplifier (U4); wherein the eleventh resistor (R11) is connected between the non-inverting input terminal of the fourth operational amplifier (U4) and the ground terminal; The twelfth resistor (R12) is connected between the output terminal of the fourth operational amplifier (U4) and the inverting input terminal of the fourth operational amplifier (U4); The thirteenth resistor (R13) and the fourteenth resistor (R14) connected in series are connected between the output terminal of the fourth operational amplifier (U4) and the ground terminal; The fifteenth resistor (R15) is connected between the second end of the inverting integrator (24) and the inverting input end of the fourth operational amplifier (U4); The non-inverting input terminal of the fourth operational amplifier (U4) is connected to a first intermediate point (M), and the first intermediate point (M) is a connection point between the thirteenth resistor (R13) and the fourteenth resistor (R14); and The first intermediate point (M) is connected to the positive electrode of the battery (200).

15. The battery management circuit (100) according to claim 7, wherein: The voltage-reducing device (26) includes: a first inductor (L1), a fourth diode (D4), a second capacitor (C2), and a second switch device (Q2); The second switching device (Q2) is connected between the second end of the inverting integrator (24) and the first end of the first inductor (L1), and the control end of the second switching device (Q2) is configured to receive a step-down control signal; The cathode of the fourth diode (D4) is connected to the first end of the first inductor (L1), and the anode of the fourth diode (D4) is grounded; The second capacitor (C2) is connected between the second end of the first inductor (L1) and the ground end; and The second end of the first inductor (L1) is connected to the first end of the voltage-current converter (25).

16. The battery management circuit (100) according to claim 8, wherein: The current limiting device (27) is a fifth resistor (R5).

17. The battery management circuit (100) according to claim 16, wherein: The voltage-current converter (25) includes: an eleventh resistor (R11), a twelfth resistor (R12), a thirteenth resistor (R13), a fourteenth resistor (R14), a fifteenth resistor (R15), a fourth operational amplifier (U4), and a fifth operational amplifier (U5); The eleventh resistor (R11) is connected between the second end of the inverting integrator (24) and the non-inverting input end of the fourth operational amplifier (U4); The twelfth resistor (R12) is connected between the output terminal of the fourth operational amplifier (U4) and the inverting input terminal of the fourth operational amplifier (U4); The thirteenth resistor (R13) is connected between the output terminal of the fourth operational amplifier (U4) and the non-inverting input terminal of the fifth operational amplifier (U5); The fourteenth resistor (R14) is connected between the output terminal of the fifth operational amplifier (U5) and the non-inverting input terminal of the fourth operational amplifier; The fifteenth resistor (R15) is connected between the inverting input terminal of the fourth operational amplifier (U4) and the ground terminal; and The inverting input terminal of the fifth operational amplifier (U5) is connected to the output terminal of the fifth operational amplifier (U5), and the non-inverting input terminal of the fifth operational amplifier (U5) is connected to the positive electrode of the battery (200).

18. The battery management circuit (100) according to claim 17, wherein: The voltage-current converter (25) further includes: an eleventh resistor (R11), a twelfth resistor (R12), a thirteenth resistor (R13), a fourteenth resistor (R14), a fifteenth resistor (R15), a sixteenth resistor (R16), a seventeenth resistor (R17), an eighteenth resistor (R18), a fourth operational amplifier (U4), and a fifth operational amplifier (U5); The eleventh resistor (R11) is connected between the second end of the inverting integrator (24) and the non-inverting input end of the fourth operational amplifier (U4); The twelfth resistor (R12) is connected between the output terminal of the fourth operational amplifier (U4) and the inverting input terminal of the fourth operational amplifier (U4); The thirteenth resistor (R13) is connected between the output terminal of the fourth operational amplifier (U4) and the non-inverting input terminal of the fifth operational amplifier (U5); The fifteenth resistor (R15) is connected between the inverting input terminal of the fourth operational amplifier (U4) and the ground terminal; The fourteenth resistor (R14), the eighteenth resistor (R18), and the sixteenth resistor (R16) are sequentially connected in series between the non-inverting input terminal of the fourth operational amplifier (U4) and the non-inverting input terminal of the fifth operational amplifier (U5); The seventeenth resistor (R17) is connected between the output terminal of the fourth operational amplifier (U4) and a second intermediate point (N), and the second intermediate point (N) is a connection point between the fourteenth resistor (R14) and the eighteenth resistor (R18); and The second intermediate point (N) is connected to the positive electrode of the battery (200).

19. The battery management circuit (100) according to any one of claims 1 to 18, wherein: The amplitude and phase detection device (1) comprises: an amplitude detection device (11) and a phase detection device (12); wherein the second input terminal of the amplitude detection device (11) is connected to the output terminal of the waveform generator (2), and the first input terminal of the amplitude detection device (11) is connected to the positive electrode of the battery (200); and The second input end of the phase detection device (12) is connected to the output end of the waveform generator (2), and the first input end of the phase detection device (12) is connected to the positive electrode of the battery (200).

20. The battery management circuit (100) according to claim 19, wherein: The amplitude detection device (11) comprises: a first detection circuit (111), a second detection circuit (112) and a nineteenth resistor (R19); Wherein, the first end of the first detection circuit (111) is connected to the output end of the waveform generator (2); A first end of the second detection circuit (112) is connected to the positive electrode of the battery (200); and The nineteenth resistor (R19) is connected between the second end of the first detection circuit (111) and the second end of the second detection circuit (112).

21. The battery management circuit (100) according to claim 20, wherein: The first detection circuit (111) includes: a fifth diode (D5); The anode of the fifth diode (D5) is connected to the output end of the waveform generator (2), and the cathode of the fifth diode (D5) is connected to the nineteenth resistor (R19).

22. The battery management circuit (100) according to claim 21, wherein: The first detection circuit (111) further includes a first filtering circuit (1111); The first filtering circuit (1111) is connected between the cathode of the fifth diode (D5) and the ground terminal.

23. The battery management circuit (100) according to claim 22, wherein: The first filtering circuit (1111) comprises: a twenty-first resistor (R21) and a third capacitor (C3); The twenty-first resistor (R21) and the third capacitor (C3) are respectively connected in parallel between the cathode of the fifth diode (D5) and the ground terminal.

24. The battery management circuit (100) according to claim 20, wherein: The second detection circuit (112) includes: a sixth diode (D6); The cathode of the sixth diode (D6) is connected to the positive electrode of the battery (200), and the anode of the sixth diode (D6) is connected to the nineteenth resistor (R19).

25. The battery management circuit (100) according to claim 24, wherein: The second detection circuit (112) further includes: a second filtering circuit (1121); The second filtering circuit (1121) is connected between the anode of the sixth diode (D6) and the ground terminal.

26. The battery management circuit (100) according to claim 25, wherein: The second filtering circuit (1121) comprises: a twenty-second resistor (R22) and a fourth capacitor (C4); The twenty-second resistor (R22) and the fourth capacitor (C4) are respectively connected in parallel between the anode of the sixth diode (D6) and the ground terminal.

27. The battery management circuit (100) according to claim 19, wherein: The phase detection device (12) includes: a third detection circuit (122), a fourth detection circuit (123), a twentieth resistor (R20), an addition circuit (121) and a subtraction circuit (124); Wherein, a first end of the adding circuit (121) is connected to the output end of the waveform generator (2), and a second end of the adding circuit (121) is connected to the positive electrode of the battery (200); The first end of the third detection circuit (122) is connected to the third end of the adding circuit (121); A first end of the subtraction circuit (124) is connected to the output end of the waveform generator (2), and a second end of the subtraction circuit (124) is connected to the positive electrode of the battery (200); The first terminal of the fourth detection circuit (123) is connected to the third terminal of the subtraction circuit (124); and The twentieth resistor (R20) is connected between the second end of the third detection circuit (122) and the second end of the fourth detection circuit (123).

28. The battery management circuit (100) according to claim 27, wherein: The third detection circuit (122) includes: a seventh diode (D7); The cathode of the seventh diode (D7) is connected to the third terminal of the adding circuit (121), and the anode of the seventh diode (D7) is connected to the twentieth resistor (R20).

29. The battery management circuit (100) according to claim 28, wherein: The third detection circuit (122) further includes: a third filtering circuit (1221); The third filtering circuit (1221) is connected between the anode of the seventh diode (D7) and the ground terminal.

30. The battery management circuit (100) according to claim 27, wherein: The fourth detection circuit (123) includes: an eighth diode (D8); The anode of the eighth diode (D8) is connected to the third terminal of the subtraction circuit (124), and the cathode of the eighth diode (D8) is connected to the twentieth resistor (R20).

31. The battery management circuit (100) according to claim 30, wherein: The fourth detection circuit (123) further includes: a fourth filtering circuit (1231); The fourth filtering circuit (1231) is connected between the cathode of the eighth diode (D8) and the ground terminal.

32. The battery management circuit (100) according to claim 27, wherein: The adding circuit (121) includes: a twenty-third resistor (R23), a twenty-fourth resistor (R24), a twenty-fifth resistor (R25), a twenty-sixth resistor (R26), a twenty-seventh resistor (R27) and a sixth operational amplifier (U6); wherein the twenty-third resistor (R23) is connected between the ground terminal and the inverting input terminal of the sixth operational amplifier (U6); The twenty-fourth resistor (R24) is connected between the inverting input terminal of the sixth operational amplifier (U6) and the output terminal of the sixth operational amplifier; The twenty-fifth resistor (R25) is connected between the output terminal of the waveform generator (2) and the non-inverting input terminal of the sixth operational amplifier (U6); The twenty-sixth resistor (R26) is connected between the positive electrode of the battery (200) and the non-inverting input terminal of the sixth operational amplifier (U6); The twenty-seventh resistor (R27) is connected between the non-inverting input terminal of the sixth operational amplifier (U6) and the ground terminal; and The output end of the sixth operational amplifier (U6) is connected to the first end of the third detection circuit (122).

33. The battery management circuit (100) according to claim 27, wherein: The subtraction circuit (124) includes: a twenty-eighth resistor (R28), a twenty-ninth resistor (R29), a thirtieth resistor (R30), a thirty-first resistor (R31) and a seventh operational amplifier (U7); wherein the twenty-eight resistors (R28) are connected between the inverting input terminal of the seventh operational amplifier (U7) and the output terminal of the seventh operational amplifier (U7); The output end of the seventh operational amplifier (U7) is connected to the first end of the fourth detection circuit (123); The twenty-ninth resistor (R29) is connected between the inverting input terminal of the seventh operational amplifier (U7) and the output terminal of the waveform generator (2); The 30th resistor (R30) is connected between the non-inverting input of the seventh operational amplifier (U7) and the positive electrode of the battery (200); and The thirty-first resistor (R31) is connected between the non-inverting input terminal of the seventh operational amplifier (U7) and the ground terminal.

34. A battery management chip (300), comprising the battery management circuit (100) according to any one of claims 1 to 33.

35. A vehicle (400) comprising the battery management circuit (100) according to any one of claims 1 to 33 or the battery management chip (300) according to claim 34.

Images