Display motherboard, display panel and display module

Abstract

A display motherboard, comprising a display area, a frame area located on at least one side of the display area and a cutting area located on the side of the frame area distant from the display area. The frame area is provided with a plurality of binding terminals arranged along a first direction; and the cutting area is provided with a plurality of adapter cables arranged along the first direction. One end of each adapter cable is correspondingly connected to a binding terminal, and the other end of each adapter cable extends in the direction distant from the display area. Along a second direction, at least one adapter cable has a different width, and the maximum width of the adapter cable is less than or equal to the width of each binding terminal, wherein the second direction intersects with the first direction, the width of the adapter cable is the size of the adapter cable in the first direction, and the width of the binding terminal is the size of the binding terminal in the first direction.

Description

Display motherboard, display panel and display module

[0001] This application claims priority to Chinese patent application No. 202410354667.5, filed on March 26, 2024, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present disclosure relates to the field of display technology, and in particular to a display motherboard, a display panel, and a display module. Background Art

[0003] Organic Light Emitting Diode (OLED) display panels have many advantages such as self-luminescence, ultra-thinness, fast response speed, high contrast, and wide viewing angle, and are currently a type of display panel that has received widespread attention. Summary of the Invention

[0004] In one aspect, a display motherboard is provided, comprising: a display area, a frame area located on at least one side of the display area, and a cutting area located on a side of the frame area away from the display area. The frame area is provided with a plurality of binding terminals arranged along a first direction; the cutting area is provided with a plurality of adapter wires arranged along the first direction, one end of each adapter wire being connected to the binding terminal, and the other end of each adapter wire extending away from the display area; wherein, along a second direction, the width of at least one adapter wire varies; and the maximum width of each adapter wire is less than or equal to the width of the binding terminal; wherein, the second direction intersects the first direction, the width of each adapter wire is the dimension of each adapter wire in the first direction, and the width of each binding terminal is the dimension of each binding terminal in the first direction.

[0005] In some embodiments, the transfer line includes a first transfer section, a second transfer section, and a third transfer section that are connected in sequence; the first transfer section is connected to the binding terminal, and the third transfer section is connected to the connecting wire; the width of at least part of the second transfer section is smaller than the width of the first transfer section, and smaller than the width of the third transfer section.

[0006] In some embodiments, widths of the second transition sections are equal along the second direction.

[0007] In some embodiments, along the second direction, the second transition section includes: a first section and a second section, the first end of the first section is connected to the first transition section, the second end of the first section is connected to the second end of the second section, and the first end of the second section is connected to the third transition section; along the direction from the first end of the first section to the second end of the first section, the width of the first section decreases; along the direction from the first end of the second section to the second end of the second section, the width of the second section decreases.

[0008] In some embodiments, the rate of change of the width reduction of the first segment remains unchanged along the direction from the first end of the first segment to the second end of the first segment; and the rate of change of the width reduction of the second segment remains unchanged along the direction from the first end of the second segment to the second end of the second segment.

[0009] In some embodiments, along the direction from the first end of the first segment to the second end of the first segment, the first segment includes a plurality of first sub-segments connected in sequence, and the width of the first sub-segment relatively away from the first transition segment is smaller than the width of the first sub-segment relatively close to the first transition segment; along the direction from the first end of the second segment to the second end of the second segment, the second segment includes a plurality of second sub-segments connected in sequence, and the width of the second sub-segment relatively away from the third transition segment is smaller than the width of the second sub-segment relatively close to the third transition segment.

[0010] In some embodiments, along the second direction, the second transfer segment of the transfer line includes: multiple third sub-segments and multiple fourth sub-segments that are alternately arranged and connected; the width of each third sub-segment in the multiple third sub-segments is greater than the width of any fourth sub-segment in the multiple fourth sub-segments.

[0011] In some embodiments, the width of each segment of the third sub-segment is equal, and the width of each segment of the fourth sub-segment is equal.

[0012] In some embodiments, the width of each section of the third sub-segment is equal; along the second direction, the second transition section has a middle position, and along the direction from the first transition section of the transition line to the middle position, the width of the fourth sub-segment relatively away from the first transition section is smaller than the width of the fourth sub-segment relatively close to the first transition section; along the direction from the third transition section of the transition line to the middle position, the width of the fourth sub-segment relatively away from the third transition section is smaller than the width of the fourth sub-segment relatively close to the third transition section.

[0013] In some embodiments, the display motherboard includes: multiple layers of conductive layers and multiple layers of insulating layers arranged alternately; the cutting area includes: a first area, a second area and a third area, the first transfer section of the transfer line is located in the first area, the second transfer section of the transfer line is located in the second area, and the third transfer section of the transfer line is located in the third area; wherein, the insulating layer of the first area includes: an organic film layer and / or an inorganic film layer; the insulating layer of the second area includes: an inorganic film layer; the insulating layer of the third area includes: an organic film layer and / or an inorganic film layer.

[0014] In some embodiments, the display motherboard includes: multiple conductive layers and an inorganic insulating layer located between every two adjacent conductive layers in the multiple conductive layers; wherein at least one pair of two adjacent transfer lines are located in different conductive layers.

[0015] In some embodiments, the plurality of said adapter wires include: a plurality of first-class adapter wires and a plurality of second-class adapter wires; the plurality of first-class adapter wires and the plurality of second-class adapter wires are located in different said conductive layers; along the first direction, the plurality of said adapter wires are divided into a plurality of adapter wire groups arranged side by side, and each of the plurality of adapter wire groups includes: a first-class adapter wire among the plurality of first-class adapter wires and a second-class adapter wire among the plurality of second-class adapter wires.

[0016] In some embodiments, the multi-layer conductive layer includes: at least one gate metal layer and at least one source-drain metal layer; the first type of patch cord is located in any one of the at least one gate metal layer, and the second type of patch cord is located in any one of the at least one source-drain metal layer. Alternatively, the multi-layer conductive layer includes: at least two gate metal layers; the first type of patch cord is located in any one of the at least two gate metal layers, and the second type of patch cord is located in a gate metal layer other than the gate metal layer where the first type of patch cord is located. Alternatively, the multi-layer conductive layer includes: at least two source-drain metal layers; the first type of patch cord is located in any one of the at least two source-drain metal layers, and the second type of patch cord is located in a source-drain metal layer other than the source-drain metal layer where the first type of patch cord is located.

[0017] In some embodiments, the plurality of said adapter wires further include a plurality of third-category adapter wires; the plurality of third-category adapter wires and the plurality of first-category adapter wires and the plurality of second-category adapter wires are located on different conductive layers; the adapter wire group further includes: a third-category adapter wire among the plurality of third-category adapter wires.

[0018] In some embodiments, in one of the patch cord groups, the third-type patch cord is located on a side of the second-type patch cord away from the first-type patch cord.

[0019] In some embodiments, the first transition segment includes: a first gate metal layer, a first source / drain metal layer, and a second source / drain metal layer, arranged in sequence; a first insulating layer is disposed between two adjacent first transition segments, and the first insulating layer covers edges of the first transition segment. The second transition segment includes: a first gate metal layer and a first insulating layer, arranged in sequence; the first insulating layer covers the second transition segment.

[0020] In some embodiments, the first transition section further includes a third source / drain metal layer and a second insulating layer disposed on a side of the second source / drain metal layer away from the first source / drain metal layer. The second insulating layer is located between two adjacent first transition sections and exposes the third source / drain metal layer.

[0021] In some embodiments, the cutting area is further provided with a plurality of unit test terminals, and the unit test terminals are correspondingly connected to the adapter wires; the unit test terminals are used to connect to a test structure to perform a display test on the display motherboard.

[0022] On the other hand, a display panel is provided, which includes: a display area, a frame area located on at least one side of the display area, and a sub-cutting area located on a side of the frame area away from the display area, wherein the frame area is provided with a plurality of binding terminals arranged along a first direction; the sub-cutting area is provided with a plurality of sub-transfer wires arranged along the first direction, one end of the sub-transfer wire is correspondingly connected to the binding terminal, and the other end of the sub-transfer wire extends in a direction away from the display area; wherein, along the second direction, the width of at least one of the sub-transfer wires is different, and the maximum width of the sub-transfer wire is less than or equal to the width of the binding terminal; wherein the second direction intersects with the first direction, the width of the sub-transfer wire is the size of the sub-transfer wire in the first direction, and the width of the binding terminal is the size of the binding terminal in the first direction.

[0023] In some embodiments, the sub-transfer wire includes a first transfer segment and a sub-second transfer segment, one end of the first transfer segment is connected to the binding terminal, the other end of the first transfer segment is connected to one end of the sub-second transfer segment, and the other end of the sub-second transfer segment extends away from the display area; the width of at least part of the sub-second transfer segment is smaller than the width of the first transfer segment.

[0024] In yet another aspect, a display module is provided. The display module includes: a display panel according to any of the above embodiments. The display module also includes a flexible circuit board, the flexible circuit board including a plurality of leads, the plurality of leads correspondingly connected to a plurality of binding terminals located in a border region of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] To more clearly illustrate the technical solutions of the present disclosure, the following briefly introduces the drawings required for use in some embodiments of the present disclosure. Obviously, the drawings described below are only drawings of some embodiments of the present disclosure, and those skilled in the art can also derive other drawings based on these drawings. Furthermore, the drawings described below are schematic diagrams and are not intended to limit the actual dimensions of the products, actual processes of the methods, etc. involved in the embodiments of the present disclosure.

[0026] FIG1 is a structural diagram corresponding to a display module prepared according to some embodiments of the present disclosure;

[0027] FIG2 is an enlarged view of the display motherboard at point A provided in FIG1 ;

[0028] FIG3 is an enlarged view of a portion B of the display motherboard provided in FIG2 ;

[0029] FIG4 is an enlarged view of a portion C of the display motherboard provided in FIG3 ;

[0030] FIG5 is a structural diagram of a display motherboard according to some embodiments of the present disclosure;

[0031] FIG6 is an enlarged view of a portion D of the display motherboard provided in FIG5 ;

[0032] FIG7 is a structural diagram of a patch cord according to some embodiments of the present disclosure;

[0033] FIG8 is another structural diagram of a patch cord according to some embodiments of the present disclosure;

[0034] FIG9 is another structural diagram of a patch cord according to some embodiments of the present disclosure;

[0035] FIG10 is another structural diagram of a patch cord according to some embodiments of the present disclosure;

[0036] FIG11 is another structural diagram of a patch cord according to some embodiments of the present disclosure;

[0037] FIG12 is a diagram illustrating a film layer arrangement structure of a display motherboard according to some embodiments of the present disclosure;

[0038] FIG13A is a cross-sectional view of the first transition section shown in FIG6 along section line EE;

[0039] FIG13B is another cross-sectional view of the first transition section shown in FIG6 along section line EE;

[0040] FIG14 is a cross-sectional view of the connecting wires of the display motherboard shown in FIG6 along the section line GG;

[0041] FIG15 is a cross-sectional view of the adapter cable of the display motherboard shown in FIG6 along the cross-sectional line FF;

[0042] FIG16 is another enlarged view of the display motherboard at position D provided in FIG5 ;

[0043] FIG17 is a cross-sectional view of the adapter cable of the display motherboard provided in FIG16 along the section line HH;

[0044] FIG18 is another enlarged view of the display motherboard at position D provided in FIG5 ;

[0045] FIG19 is a cross-sectional view of the adapter cable of the display motherboard provided in FIG18 along the cross-sectional line KK;

[0046] FIG20 is another enlarged view of the display motherboard at position D provided in FIG5 ;

[0047] FIG21 is a cross-sectional view of the adapter cable of the display motherboard provided in FIG20 along the cross-sectional line LL;

[0048] FIG22 is another enlarged view of the display motherboard at position D provided in FIG5 ;

[0049] FIG23 is a cross-sectional view of the adapter cable of the display motherboard provided in FIG22 along the section line MM;

[0050] FIG24 is another enlarged view of the display motherboard at position D provided in FIG5 ;

[0051] FIG25 is a cross-sectional view of the adapter cable of the display motherboard provided in FIG24 along the cross-sectional line NN;

[0052] FIG26 is a structural diagram of a display module according to some embodiments of the present disclosure;

[0053] FIG27 is an enlarged view of a portion Q of the display module provided in FIG26 ;

[0054] FIG. 28 is another enlarged view of a portion Q of the display module provided in FIG. 26 . DETAILED DESCRIPTION

[0055] The following will be combined with the accompanying drawings to clearly and completely describe the technical solutions in some embodiments of the present disclosure. Obviously, the embodiments described are only some embodiments of the present disclosure, not all embodiments. Based on the embodiments provided by the present disclosure, all other embodiments obtained by ordinary technicians in this field are within the scope of protection of the present disclosure.

[0056] Unless the context requires otherwise, throughout the specification and claims, the term "comprise" and its other forms, such as the third person singular form "comprises" and the present participle form "comprising", are to be interpreted as open and inclusive, that is, "including, but not limited to". In the description of the specification, the terms "one embodiment", "some embodiments", "exemplary embodiments", "example", "specific example" or "some examples" are intended to indicate that the particular features, structures, materials or characteristics associated with the embodiment or example are included in at least one embodiment or example of the present disclosure. The schematic representation of the above terms does not necessarily refer to the same embodiment or example. In addition, the particular features, structures, materials or characteristics may be included in any one or more embodiments or examples in any appropriate manner.

[0057] In the following, the terms "first" and "second" are used for descriptive purposes only and should not be understood to indicate or imply relative importance or implicitly specify the number of the technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the embodiments of the present disclosure, unless otherwise specified, "plurality" means two or more.

[0058] When describing some embodiments, the expressions "coupled" and "connected" and their derivatives may be used. The term "connected" should be understood in a broad sense. For example, "connection" can be a fixed connection, a detachable connection, or an integral connection; it can be directly connected or indirectly connected through an intermediate medium. The term "coupled" indicates, for example, that two or more components are in direct physical or electrical contact. The term "coupled" or "communicatively coupled" may also refer to two or more components that are not in direct contact with each other, but still cooperate or interact with each other. The embodiments disclosed herein are not necessarily limited to the contents of this document.

[0059] “At least one of A, B and C” has the same meaning as “at least one of A, B or C” and both include the following combinations of A, B and C: A only, B only, C only, the combination of A and B, the combination of A and C, the combination of B and C, and the combination of A, B and C.

[0060] “A and / or B” includes the following three combinations: A only, B only, and a combination of A and B.

[0061] The use of "adapted to" or "configured to" herein is intended to be open and inclusive language that does not exclude devices adapted or configured to perform additional tasks or steps.

[0062] Additionally, the use of “based on” is meant to be open and inclusive, as a process, step, calculation, or other action “based on” one or more stated conditions or values ​​may, in practice, be based on additional conditions or values ​​beyond those stated.

[0063] As used herein, "about," "substantially," or "approximately" includes the stated value and an average value that is within an acceptable range of deviation from the particular value as determined by one of ordinary skill in the art taking into account the measurements in question and the errors associated with the measurement of the particular quantity (i.e., the limitations of the measurement system).

[0064] As used herein, "parallel", "perpendicular", and "equal" include the situations described and situations similar to the situations described, and the range of the similar situations is within an acceptable deviation range, wherein the acceptable deviation range is as determined by a person of ordinary skill in the art taking into account the measurement in question and the errors associated with the measurement of the specific quantity (i.e., the limitations of the measurement system). For example, "parallel" includes absolute parallelism and approximate parallelism, wherein the acceptable deviation range of approximate parallelism can be, for example, a deviation within 5°; "perpendicular" includes absolute perpendicularity and approximate perpendicularity, wherein the acceptable deviation range of approximate perpendicularity can also be, for example, a deviation within 5°. "Equal" includes absolute equality and approximate equality, wherein the acceptable deviation range of approximate equality can be, for example, that the difference between the two equals is less than or equal to 5% of either one.

[0065] It will be understood that when a layer or element is referred to as being on another layer or substrate, it can be directly on the other layer or substrate, or intervening layers may be present therebetween.

[0066] Exemplary embodiments are described herein with reference to cross-sectional and / or plan views that are idealized exemplary drawings. In the drawings, the thickness of layers and the area of ​​regions are exaggerated for clarity. Therefore, variations in shape relative to the drawings due to, for example, manufacturing techniques and / or tolerances are contemplated. Therefore, the exemplary embodiments should not be construed as limited to the shapes of the regions shown herein, but rather include deviations in shape due to, for example, manufacturing. For example, an etched region shown as a rectangle will typically have curved features. Therefore, the regions shown in the drawings are schematic in nature, and their shapes are not intended to illustrate the actual shape of regions of the device and are not intended to limit the scope of the exemplary embodiments.

[0067] In some embodiments, as shown in FIG. 1 , the process of preparing the display module 300 may include three process stages: a substrate cutting stage, a panel testing stage, and a module stage.

[0068] In the substrate cutting section, the packaged substrate 1000 is cut into a plurality of display motherboards 200. Each display motherboard 200 is used to form a display panel 100.

[0069] As shown in Figures 1 and 2, Figure 2 is an enlarged view of point A of the display motherboard 200 shown in Figure 1. Each display motherboard 200 includes a display area 10, a border area 20 located on at least one side of the display area 10, and a cutting area 30 located on the side of the border area 20 away from the display area 10.

[0070] As shown in Figures 2 and 3, Figure 3 is an enlarged view of point B of the display motherboard 200 shown in Figure 2. The embodiment of the present disclosure is exemplified by a frame area 20 surrounding the display area 10. The frame area 20 on the lower side of the display area 10 has a binding area 11, and the binding area 11 is provided with a plurality of binding terminals 12. The plurality of binding terminals 12 are correspondingly connected to the circuits of the display area 10 and the frame area 20. For example, the circuit of the display area 10 includes: a pixel driving circuit, etc., and the circuit of the frame area 20 includes: a GOA (Gate on Array, array substrate row driving) circuit, etc. The circuits of the display area 10 and the frame area 20 are used to drive the display area 10 to realize the display function.

[0071] The cutting area 30 may be provided with a plurality of patch cords 21, one end of each of which is connected to a plurality of binding terminals 12, for example, in a one-to-one correspondence between each of the patch cords 21 and the binding terminals 12. The cutting area 30 may also be provided with a plurality of connected connecting wires 31 and a plurality of unit test terminals 33. The other ends of each of the patch cords 21 are connected to a plurality of connecting wires 31, for example, in a one-to-one correspondence between each of the patch cords 21 and the connecting wires 31.

[0072] That is, the plurality of adapter wires 21 are used to connect the plurality of unit test terminals 33 with the circuits of the display area 10 and the frame area 20 .

[0073] For example, during the panel test phase, a DC or AC signal is input to the multiple unit test terminals 33. This signal is transmitted via the multiple binding terminals 12 of the binding area 11 to the circuits in the display area 10 and the frame area 20, thereby enabling display in the display area 10 and testing the display condition of the display area 10. The purpose of the panel test is to detect display defects in the display area 10 and prevent display motherboards 200 with display defects from being sent to the next process.

[0074] For example, in the cutting area 30 , an electrostatic discharge unit 32 connected between the plurality of connecting wires 31 and the plurality of unit test terminals 33 is further provided. The electrostatic discharge unit 32 can effectively prevent static electricity from affecting the display of the display area 10 .

[0075] As shown in FIG4 , FIG4 is an enlarged view of point C of the display motherboard 200 shown in FIG3 . In the module section, a laser cutting process is used to cut along the cutting line L of the cutting area 30 to remove the portion of the display motherboard 200 away from the cutting line L, that is, the portion 30A of the cutting area 30 located away from the cutting line L and away from the border area 20. The display area 10, the border area 20, and the portion 30B of the cutting area 30 located along the cutting line L and close to the border area 20 of the display motherboard 200 are formed into the display panel 100 (as shown in FIG1 ).

[0076] Next, a circuit board is connected to the display panel 100 to form a display module 300. The circuit board is provided with circuitry for sending various control signals to the display panel 100. For example, this circuitry includes a source driver IC, a TCON (Timing Controller) chip, and a power supply chip. The circuit board, for example, includes a flexible circuit board 301. The connection between the circuit board and the display panel 100 can be achieved by connecting multiple leads 3011 (as shown in FIG. 27 ) on the flexible circuit board 301 to the binding terminals 12 (as shown in FIG. 3 ) of the binding area 11 of the display panel 100 in a one-to-one correspondence.

[0077] However, due to the small spacing d1 between adjacent patch cords 21, during laser cutting of the module section, particles generated by cutting the patch cords 21, as well as burns, peeling, and cracks in the film layer on which the patch cords 21 are located, can cause short circuits between adjacent patch cords 21. Furthermore, due to the wide width d2 of the patch cords 21, greater laser energy is required for cutting. Higher laser energy can cause greater thermal damage to the cutting line L, making it more likely to cause short circuits between adjacent patch cords 21, thereby affecting the display quality of the display panel 100.

[0078] Based on this, as shown in Figures 1, 5, and 6, where Figure 6 is an enlarged view of a portion D of the display motherboard 200 shown in Figure 5, an embodiment of the present disclosure provides a display motherboard 200, which includes a display area 10, a frame area 20 located on at least one side of the display area 10, and a cutting area 30 located away from the display area 10 in the frame area 20. The frame area 20 is provided with a plurality of binding terminals 12 arranged along a first direction X, and the cutting area 30 is provided with a plurality of adapter wires 21 arranged along the first direction X. One end of the adapter wire 21 is connected to the binding terminal 12, and the other end of the adapter wire 21 extends in a direction away from the display area 10.

[0079] For example, the embodiment of the present disclosure is exemplified by the frame area 20 surrounding the display area 10 , but the embodiment of the present disclosure is not limited thereto. For example, the frame area 20 can be located on one side of the display area 10 .

[0080] Exemplarily, the first direction X is the horizontal direction as shown in FIG6 , and the frame area 20 and the cutting area 30 are arranged in the vertical direction as shown in FIG6 . For example, the vertical direction as shown in FIG6 is the second direction Y. Multiple binding terminals 12 are arranged in the horizontal direction of the frame area 20 , and multiple adapter wires 21 and multiple connecting wires 31 are arranged in the horizontal direction of the cutting area 30 . A binding terminal 12, a adapter wire 21, and a connecting wire 31 are connected in the vertical direction to form a wire for transmitting a DC or AC signal, thereby achieving the purpose of transmitting a DC or AC signal to the circuits of the display area 10 and the frame area 20 , so as to detect the display status of the display area 10.

[0081] Exemplarily, the first direction X is perpendicular to the second direction Y. It should be noted that the longitudinal direction may be a direction having a certain angle with the second direction Y as shown in FIG6 , for example, the angle is an acute angle.

[0082] Exemplarily, as shown in FIG3 , the cutting area 30 is further provided with a plurality of unit test terminals 33 , which are correspondingly connected to the connecting wires 31 , and are used to connect a test structure (not shown in the figure) to perform display testing on the display motherboard 200 .

[0083] In some examples, as shown in Figure 6, along the second direction Y, the width d2 of at least one adapter line 21 is different; and the maximum width d20 of the adapter line 21 is less than or equal to the width d3 of the binding terminal; wherein, the width d2 of the adapter line 21 is the size of the adapter line 21 in the first direction X, and the width d3 of the binding terminal 12 is the size of the binding terminal 12 in the first direction X.

[0084] The adapter wire 21 of the display motherboard 200 provided in the embodiment as shown in FIG4 has a width d2 of the adapter wire 21 that remains consistent along the second direction Y. Moreover, the width d2 of the adapter wire 21 is substantially consistent with the width d3 of the binding terminal 12 , and the width d2 of the adapter wire 21 is substantially consistent with the width d4 of the connecting wire 31 , that is, d2=d3=d4.

[0085] As shown in FIG. 6, along the second direction Y, the width d2 of the jumper wire 21 varies, and the maximum width d20 of the jumper wire 21 is less than or equal to the width d3 of the bonding terminal. That is, a part of the width d2 of the jumper wire 21 along the second direction Y is reduced. That is, compared with the jumper wire 21 shown in FIG. 4 above, by reducing the width d2 of a part of the jumper wire 21, the spacing d1 between adjacent jumper wires 21 increases in the part where the width d2 of the jumper wire 21 is reduced. During the laser cutting process of the module section, the risk of short - circuit of the jumper wire 21 can be reduced.

[0086] Moreover, since the width d2 of a part of the jumper wire 21 is reduced, during cutting, the laser energy required can be relatively reduced, the degree of thermal damage in the cutting area 30 can be slowed down, and the problem of short - circuit between adjacent jumper wires 21 can be effectively alleviated.

[0087] In some embodiments, as shown in FIG. 6, the jumper wire 21 includes a first jumper segment 21a, a second jumper segment 21b, and a third jumper segment 21c connected in sequence. The first jumper segment 21a is connected to the bonding terminal 12, and the third jumper segment 21c is connected to the connecting wire 31; at least part of the width d22 of the second jumper segment 21b is less than the width d21 of the first jumper segment 21a and less than the width d23 of the third jumper segment 21c, that is, d22 < d21 and d22 < d23.

[0088] Exemplarily, the width d21 of the first jumper segment 21a is substantially the same as the width d23 of the third jumper segment 21c, the width d21 of the first jumper segment 21a is substantially the same as the width d3 of the bonding terminal, and the width d23 of the third jumper segment 21c is substantially the same as the width d4 of the connecting wire 31, that is, d21 = d23 = d3 = d4. For example, the width d21 of the first jumper segment 21a and the width d23 of the third jumper segment 21c are both equal to the maximum width d20 of the jumper wire 21, that is, d21 = d23 = d20. Moreover, the width d22 of the second jumper segment 21b is less than the maximum width d20 of the jumper wire 21, that is, d22 < d20.

[0089] That is to say, along the second direction Y, the width d2 of the jumper wire 21 is reduced at the second jumper segment 21b. During the laser cutting process of the jumper wire 21 in the module section, since the position of the cutting track L can be located in the area where the second jumper segment 21b is located, by reducing the width d22 of the second jumper segment 21b, the spacing d1 between adjacent second jumper segments 21b increases. Therefore, the risk of short - circuit between adjacent jumper wires 21 caused by particles generated during the cutting of the jumper wire 21, burns, peeling, cracks, etc. of the film layer where the jumper wire 21 is located can be reduced.

[0090] Moreover, by setting the width d22 of the second transition section 21b to be less than the width d21 of the first transition section 21a and less than the width d23 of the third transition section 21c, that is, d22 < d21 and d22 < d23. During cutting, less laser energy is required, reducing the degree of thermal damage in the cutting area 30 and effectively alleviating the problem of short - circuiting of adjacent connection lines 21.

[0091] Furthermore, by setting the width d21 of the first transition section 21a to be greater than the width d22 of the second transition section 21b, the overlapping area when the first transition section 21a is connected to the bonding terminal 12 can be increased. By setting the width d23 of the third transition section 21c to be greater than the width d22 of the second transition section 21b, the overlapping area when the third transition section 21c is connected to the connecting wire 31 can be increased, thus ensuring the stability of DC or AC signal transmission.

[0092] In some embodiments, as shown in FIG. 7, along the second direction Y, the width d22 of the second transition section 21b is equal.

[0093] That is to say, the width d22 of the second transition section 21b is less than the width d21 of the first transition section 21a, the width d22 of the second transition section 21b is less than the width d23 of the third transition section 21c, and along the second direction Y, the width d22 of the second transition section 21b remains consistent.

[0094] By reducing the width d22 of the second transition section 21b, the distance d1 between adjacent second transition sections 21b increases. Therefore, the risk of short - circuiting between adjacent connection lines 21 caused by particles generated during cutting of the connection lines 21, burns, peeling, and cracks in the film layer where the connection lines 21 are located can be reduced. During cutting, less laser energy is required, reducing the degree of thermal damage in the cutting area 30 and effectively alleviating the problem of short - circuiting of adjacent connection lines 21.

[0095] In some embodiments, as shown in FIGS. 8 and 9, along the second direction Y, the second transition section 21b includes: a first segment 21b1 and a second segment 21b2. The first end M1 of the first segment 21b1 is connected to the first transition section 21a, the second end M2 of the first segment 21b1 is connected to the second end Q2 of the second segment 21b2, and the first end Q1 of the second segment 21b2 is connected to the third transition section 21c. Along the direction Y1 from the first end M1 to the second end M2 of the first segment 21b1, the width d22 of the first segment 21b1 decreases; along the direction Y2 from the first end Q1 to the second end Q2 of the second segment 21b2, the width d22 of the second segment 21b2 decreases.

[0096] That is, as shown in Figures 8 and 9, the width d22 of the second transition segment 21b varies along the direction Y1 from the first end M1 of the first segment 21b1 to the second end M2 of the first segment 21b1. The width d22 of the second transition segment 21b varies along the direction Y2 from the first end Q1 of the second segment 21b2 to the second end Q2 of the second segment 21b2.

[0097] In some examples, as shown in FIG8 , the width d22 of the first segment 21b1 decreases at a constant rate along the direction Y1 from the first end M1 of the first segment 21b1 to the second end M2 of the first segment 21b1. The width d22 of the second segment 21b2 decreases at a constant rate along the direction Y2 from the first end Q1 of the second segment 21b2 to the second end Q2 of the second segment 21b2. That is, along the direction Y1, the width d22 of the first segment 21b1 decreases at a constant rate. Along the direction Y2, the width d22 of the second segment 21b2 decreases at a constant rate.

[0098] For example, the rate of decrease in the width d22 of the first segment 21b1 can be equal to the rate of decrease in the width d22 of the second segment 21b2. The point T where the second end M2 of the first segment 21b1 connects to the second end Q2 of the second segment 21b2 can be the location where the width d22 of the second transition segment 21b is at its minimum. When the cutting line L is located in the area where the second end M2 of the first segment 21b1 connects to the second end Q2 of the second segment 21b2, lower laser energy can be used to reduce the degree of thermal damage to the cutting area 30, effectively alleviating the problem of shorting adjacent transition lines 21.

[0099] In some examples, as shown in FIG9 , along a direction Y1 from the first end M1 of the first segment 21b1 to the second end M2 of the first segment 21b1, the first segment 21b1 includes a plurality of sequentially connected first sub-segments 22a, and a width d22 of the first sub-segments 22a relatively farther from the first transition segment 21a is smaller than a width d22 of the first sub-segments 22a relatively closer to the first transition segment 21a. Along a direction Y2 from the first end Q1 of the second segment 21b2 to the second end Q2 of the second segment 21b2, the second segment 21b2 includes a plurality of sequentially connected second sub-segments 22b, and a width d22 of the second sub-segments 22b relatively farther from the third transition segment 21c is smaller than a width d22 of the second sub-segments 22b relatively closer to the third transition segment 21c.

[0100] For example, as shown in FIG9 , along the direction Y1 from the first end M1 of the first segment 21b1 to the second end M2 of the first segment 21b1, the first segment 21b1 includes two connected first sub-segments 22a, namely the first sub-segment 22aa and the first sub-segment 22ab. The first sub-segment 22aa is closer to the first transition segment 21a than the first sub-segment 22ab. The width d22b of the first sub-segment 22ab, which is relatively far from the first transition segment 21a, is smaller than the width d22a of the first sub-segment 22aa, which is relatively close to the first transition segment 21a, i.e., d22b <d22a。

[0101] Along the direction Y2 from the first end Q1 to the second end Q2 of the second segment 21b2, the second segment 21b2 includes two connected second sub-segments 22b, namely the second sub-segment 22b1 and the second sub-segment 22b2. The second sub-segment 22b1 is closer to the third transition segment 21c than the second sub-segment 22b2. The width d222 of the second sub-segment 22b2, which is relatively far from the third transition segment 21c, is smaller than the width d221 of the second sub-segment 22b1, which is relatively close to the third transition segment 21c, i.e., d222 <d221。

[0102] For example, the width d22b of the connected first subsegment 22ab and the width d222 of the connected second subsegment 22b2 are equal, i.e., d22b = d222. The width d22a of the first subsegment 22aa and the width d221 of the second subsegment 22b1 are equal, i.e., d22a = d221. Furthermore, the length h1 of the first subsegment 22aa in the second direction Y and the length h2 of the second subsegment 22b1 are equal, i.e., h1 = h2.

[0103] The different widths d22 of the second transition segments 21b along the second direction Y increase the spacing d1 between adjacent second transition segments 21b, thereby reducing the risk of shorting between adjacent transition segments 21 due to particles generated during cutting, burns, peeling, and cracks in the film layer on which the transition segments 21 are located, and other factors. During cutting, less laser energy is required, mitigating thermal damage to the cutting area 30 and effectively alleviating the problem of shorting between adjacent transition segments 21.

[0104] In some embodiments, as shown in Figures 10 and 11, along the second direction Y, the second transfer segment 21b of the transfer line 21 includes: multiple third sub-segments 23 and multiple fourth sub-segments 24 that are alternately arranged and connected; the width d30 of each third sub-segment 23 in the multiple third sub-segments 23 is greater than the width d40 of any fourth sub-segment 24 in the multiple fourth sub-segments 24.

[0105] The alternating arrangement of multiple third sub-segments 23 and multiple fourth sub-segments 24 means that a fourth sub-segment 24 is arranged between every two third sub-segments 23 ; and a third sub-segment 23 is arranged between every two fourth sub-segments 24 .

[0106] In some examples, as shown in FIG10 , the second transition segment 21 b includes a third subsegment 231, a third subsegment 232, a third subsegment 233, a fourth subsegment 241, a fourth subsegment 242, a fourth subsegment 243, and a fourth subsegment 244. The fourth subsegment 241, the third subsegment 231, the fourth subsegment 242, the third subsegment 232, the fourth subsegment 243, the third subsegment 233, and the fourth subsegment 244 are sequentially connected to form the second transition segment 21 b.

[0107] The width d30 of each third sub-segment 23 is greater than the width d40 of any fourth sub-segment 24, i.e., d30 > d40. For example, the width d30 of the third sub-segment 23 may be equal to the width d21 of the first transition segment 21a, and the width d30 of the third sub-segment 23 may be equal to the width d23 of the third transition segment 21c, i.e., d30 = d21 = d23 > d40.

[0108] By configuring the second transition section 21b to include multiple fourth sub-segments 24, the width d40 of the fourth sub-segments 24 is reduced, and the spacing d1 between adjacent fourth sub-segments 24 is increased. This reduces the risk of shorting between adjacent transition wires 21 due to particles generated during cutting, burns, peeling, and cracks in the film layer on which the transition wires 21 are located, and the like. During cutting, less laser energy is required, mitigating the degree of thermal damage to the cutting area 30 and effectively alleviating the problem of shorting between adjacent transition wires 21.

[0109] In some embodiments, as shown in FIG. 10 , the width d30 of each third sub-segment 23 is equal, and the width d40 of each fourth sub-segment is equal.

[0110] Exemplarily, the second transition section 21b includes three third sub-segments 23, namely: the third sub-segment 231, the third sub-segment 232 and the third sub-segment 233, and the width d30 of the third sub-segment 231, the third sub-segment 232 and the third sub-segment 233 are consistent. The second transition section 21b includes four fourth sub-segments, namely: the fourth sub-segment 241, the fourth sub-segment 242, the fourth sub-segment 243 and the fourth sub-segment 244, and the width d40 of the fourth sub-segment 241, the fourth sub-segment 242, the fourth sub-segment 243 and the fourth sub-segment 244 are consistent.

[0111] In some embodiments, as shown in FIG. 11, the width d30 of each third sub-segment 23 is equal. Along the second direction Y, the second transition segment 21b has a middle position U. Along the direction from the first transition segment 21a to the middle position U of the transition line 21, the width d40 of the fourth sub-segment 24 relatively farther from the first transition segment 21a is smaller than the width d40 of the fourth sub-segment 24 relatively closer to the first transition segment 21a. Along the direction from the third transition segment 21c to the middle position U of the transition line 21, the width d40 of the fourth sub-segment 24 relatively farther from the third transition segment 21c is smaller than the width d40 of the fourth sub-segment 24 relatively closer to the third transition segment 21c.

[0112] It should be noted that the middle position U can be understood as that along the second direction Y, the dimensions from the middle position U to both ends of the second transition segment 21b are equal.

[0113] It can be understood that along the direction from the first transition segment 21a to the middle position U of the transition line 21, it is the same direction as the above-mentioned direction Y1 from the first end M1 to the second end M2 of the first segment 21b1 of the second transition segment 21b. Along the direction from the third transition segment 21c to the middle position U of the transition line 21, it is the same direction as the above-mentioned direction Y2 from the first end Q1 to the second end Q2 of the second segment 21b2 of the second transition segment 21b.

[0114] Exemplarily, along the direction from the first transition segment 21a to the middle position U of the transition line 21, the fourth sub-segment 242 is farther from the first transition segment 21a than the fourth sub-segment 241, and the width d41 of the fourth sub-segment 242 is smaller than the width d42 of the fourth sub-segment 242, that is, d42 < d41. Along the direction from the third transition segment 21c to the middle position U of the transition line 21, the fourth sub-segment 243 is farther from the third transition segment 21c than the fourth sub-segment 244, and the width d43 of the fourth sub-segment 243 is smaller than the width d44 of the fourth sub-segment 244, that is, d43 < d44.

[0115] Exemplarily, the width d42 of the fourth sub-segment 242 and the width d43 of the fourth sub-segment 243 can be equal, that is, d42 = d43. The width d41 of the fourth sub-segment 242 and the width d44 of the fourth sub-segment 244 can be equal, that is, d41 = d44.

[0116] By setting the widths of multiple fourth sub-segments 24 to differ, i.e., the width d40 of some fourth sub-segments 24 is further reduced relative to the width d40 of other fourth sub-segments 24, the spacing d1 of the fourth sub-segments 24 with further reduced width d40 is increased. This reduces the risk of shorting between adjacent patch cords 21 due to particles generated during cutting, burns, peeling, and cracks in the film layer on which the patch cords 21 are located, and the like. During cutting, less laser energy is required, reducing the degree of thermal damage to the cutting area 30 and effectively alleviating the problem of shorting between adjacent patch cords 21.

[0117] In some embodiments, as shown in FIG6 , the display motherboard 200 includes an organic film layer. Due to poor adhesion, the organic film layer is easily separated from adjacent film layers. When laser cutting is performed along the cutting line L, to prevent the organic film layer from peeling off during the laser cutting process, the organic film layer is not provided in a portion of the cutting area 30.

[0118] In order to facilitate understanding of the structural diagram of the film layer arrangement of the cutting area 30 , the structural diagram of the film layer arrangement of the display motherboard 200 is introduced below.

[0119] As shown in FIG12 , the display motherboard 200 includes a stacked substrate 40, a first gate insulating layer 51, a first gate metal layer 52, a second gate insulating layer 53, a second gate metal layer 54, a first insulating layer 61, a first source / drain metal layer 62, a first passivation layer 63, a second source / drain metal layer 64, a second passivation layer 65, a third source / drain metal layer 66, a planarization layer 67, a pixel defining layer 68, a first non-polar insulating layer 70, and a touch metal layer 71. The first gate metal layer 52, the second gate metal layer 54, the first source / drain metal layer 62, the second source / drain metal layer 64, the third source / drain metal layer 66, and the touch metal layer 71 are conductive layers. The first gate insulating layer 51, the second gate insulating layer 53, the first insulating layer 61, the first passivation layer 63, the second passivation layer 65, the planarization layer 67, the pixel defining layer 68, and the first non-polar insulating layer 70 are insulating layers.

[0120] It will be understood that the above film layer structure is merely an example for description herein. In other embodiments of the present application, the display motherboard 200 may include more or fewer film layers. For example, it may include fewer or more gate metal layers, such as a third gate metal layer. For example, it may include fewer or more source / drain metal layers, such as four source / drain metal layers. For example, it may include fewer or more passivation layers, or even fewer or more planarization layers.

[0121] Exemplarily, the materials of the first gate insulating layer 51, the second gate insulating layer 53, the first insulating layer 61, the first passivation layer 63, and the second passivation layer 65 include inorganic materials, for example, the inorganic materials include silicon nitride (SiNx), silicon oxide (SiOx), and silicon oxynitride (SiNxOy). In other words, the first gate insulating layer 51, the second gate insulating layer 53, the first insulating layer 61, the first passivation layer 63, and the second passivation layer 65 are inorganic film layers. The arrangement of the inorganic film layers in some embodiments of the present disclosure is not limited thereto.

[0122] Exemplarily, the material of the planarization layer 67 and the pixel definition layer 68 includes an organic material, for example, the organic material includes polyimide, that is, the planarization layer 67 and the pixel definition layer 68 are organic film layers. The configuration of the organic film layer in some embodiments of the present disclosure is not limited thereto.

[0123] For example, as shown in Figures 13A and 13B, Figure 13A is a cross-sectional view of the first transition segment 21a shown in Figure 6 along section line EE, and Figure 13B is another cross-sectional view of the first transition segment 21a shown in Figure 6 along section line EE. The first transition segment 21a includes: a first gate metal layer 52, a first source / drain metal layer 62, and a second source / drain metal layer 64, which are arranged in sequence. A first insulating layer 61 is provided between two adjacent first transition segments 21a, and the first insulating layer 61 covers the edges of the first transition segment 21a.

[0124] As shown in FIG. 15 , the second transition segment 21 b includes: a first gate metal layer 52 and a first insulating layer 61 arranged in sequence, and the first insulating layer 61 covers the second transition segment 21 b.

[0125] As shown in Figure 13A, the first transition section 21a also includes a third source-drain metal layer 66 and a second insulating layer 69 arranged on the side of the second source-drain metal layer 64 away from the first source-drain metal layer 62. The second insulating layer 69 is located between two adjacent first transition sections 21a and exposes the third source-drain metal layer 66.

[0126] For example, as shown in FIG14 , FIG14 is a cross-sectional view of the connecting wire 31 of the display motherboard 200 shown in FIG6 along the section line GG. The connecting wire 31 is located in the third source / drain metal layer 66, but some embodiments of the present disclosure are not limited to this. The connecting wire 31 may also be located in at least one of the first gate metal layer 52, the second gate metal layer 54, the first source / drain metal layer 62, and the second source / drain metal layer 64. The cutting area 30 where the connecting wire 31 is located includes organic film layers such as a planarization layer 67 and a pixel definition layer 68.

[0127] For example, as shown in FIG15 , FIG15 is a cross-sectional view of the transfer line 21 (second transfer section 21 b) of the display motherboard 200 shown in FIG6 along section line FF. The transfer line 21 is located on the first gate metal layer 52, but this is not a limitation in some embodiments of the present disclosure. The cutting area 30 where the second transfer section 21 b is located does not include organic film layers such as the planarization layer 67 and the pixel definition layer 68.

[0128] That is, as shown in FIG. 6 , in the cutting area 30 , the organic film layer has a boundary N1 and a boundary N2 , and the organic film layer is not provided in the region between the boundary N1 and the boundary N2 .

[0129] Exemplarily, as shown in FIG6 , the cutting area 30 includes a first area 201 located on the side of the boundary N1 facing the binding area 11. The first area 201 is provided with an organic film layer, and the first transition section 21a is located in the first area 201. The cutting area 30 also includes a second area 202 located between the boundary N1 and the boundary N2. The film layer of the second area 202 does not include an organic material, that is, the second area 202 is not provided with an organic film layer. The second transition section 21b is located in the second area 202. The cutting area 30 also includes a third area 203 located on the side of the boundary N2 away from the binding area 11. The third area 203 is provided with an organic film layer, and the third transition section 21c is located in the third area 203.

[0130] That is, the insulating layer of the first area 201 includes an organic film layer and an inorganic film layer, the insulating layer of the third area 203 includes an organic film layer and an inorganic film layer, and the insulating layer of the second area 202 includes an inorganic film layer. That is, the insulating layer of the second area 202 does not include an organic film layer.

[0131] Since the film layer in the second region 202 does not include an organic film layer, peeling of the film layer during cutting can be effectively prevented.

[0132] In some examples, as shown in FIG6 , the width d2 of the patch line 21 can decrease from the boundary of the organic film layer. That is, in the second direction Y from the bonding area 11 to the cutting area 30, the width d2 of the patch line 21 decreases from the boundary N1 of the organic film layer. In the second direction Y from the cutting area 30 to the bonding area 11, the width d2 of the patch line 21 decreases from the boundary N2 of the organic film layer.

[0133] Exemplarily, the cutting road L may be located between the boundary N1 and the boundary N2 where no organic film layer is set. By setting the width d2 of the portion of the transfer line 21 between the boundary N1 and the boundary N2 to be reduced, so that the area where the width d2 of the transfer line 21 is reduced overlaps with the area where the cutting road L is located, it can be effectively ensured that the width d2 of the transfer line 21 in the area where the cutting road L is located is small, and the distance d1 between adjacent transfer lines 21 is large, thereby reducing the risk of short-circuiting the transfer line 21.

[0134] In some embodiments, as shown in Figures 12, 16, and 17, where Figure 17 is a cross-sectional view of the transfer line 21 (second transfer section 21b) of the display motherboard 200 shown in Figure 16 along section line HH, the display motherboard 200 includes multiple conductive layers and an inorganic insulating layer located between each adjacent two conductive layers. Each adjacent transfer line 21 is located on a different conductive layer.

[0135] It should be noted that FIG. 6 , FIG. 16 , FIG. 18 , FIG. 20 , FIG. 22 and FIG. 24 are enlarged views obtained at point D of the display motherboard 200 corresponding to six structures respectively.

[0136] In some examples, the multi-layer conductive layer includes: at least one gate metal layer and at least one source / drain metal layer, the first type of jumper 211 is located at any one of the at least one gate metal layer, and the second type of jumper 212 is located at any one of the at least one source / drain metal layer.

[0137] Exemplarily, as shown in FIG12 , the conductive layer includes two gate metal layers and three source / drain metal layers. The two gate metal layers are a first gate metal layer 52 and a second gate metal layer 54, and the three source / drain metal layers are a first source / drain metal layer 62, a second source / drain metal layer 64, and a third source / drain metal layer 66. The inorganic insulating layer includes a first gate insulating layer 51, a second gate insulating layer 53, a first insulating layer 61, a first passivation layer 63, and a second passivation layer 65.

[0138] In some examples, as shown in Figures 16 and 17, the multiple patch cords 21 include: multiple first-class patch cords 211 and multiple second-class patch cords 212; the multiple first-class patch cords 211 and the multiple second-class patch cords 212 are located in different conductive layers; along the first direction X, the multiple patch cords 21 are divided into multiple patch cord groups 210 arranged side by side, and each patch cord group 210 in the multiple patch cord groups 210 includes: one first-class patch cord 211 among the multiple first-class patch cords 211 and one second-class patch cord 212 among the multiple second-class patch cords 212.

[0139] Exemplarily, as shown in Figures 16 and 17, the first-type patch cord 211 is located on the first gate metal layer 52, and the second-type patch cord 212 is located on the third source / drain metal layer 66. The first-type patch cord 211 and the second-type patch cord 212 are arranged alternately, that is, a second-type patch cord 212 is arranged between every two adjacent first-type patch cords 211, and a first-type patch cord 211 is arranged between every two adjacent second-type patch cords 212. An adjacent first-type patch cord 211 and a second-type patch cord 212 constitute a patch cord group 210, and multiple patch cord groups 210 are evenly arranged along the first direction X.

[0140] In some examples, as shown in Figures 18 and 19, where Figure 19 is a cross-sectional view of the transfer line 21 (second transfer segment 21b) of the display motherboard 200 shown in Figure 18 along section line KK, the multi-layer conductive layer includes: at least two gate metal layers; the first-type transfer line 211 is located in any one of the at least two gate metal layers; and the second-type transfer line 212 is located in a gate metal layer other than the gate metal layer where the first-type transfer line 211 is located.

[0141] Exemplarily, the multi-layer conductive layer includes two gate metal layers, namely a first gate metal layer 52 and a second gate metal layer 54. The first type of connecting line 211 is located in the first gate metal layer 52, and the second type of connecting line 212 is located in the second gate metal layer 54.

[0142] In some examples, as shown in Figures 12, 20, and 21, where Figure 21 is a cross-sectional view of the transfer line 21 (second transfer segment 21b) of the display motherboard 200 shown in Figure 20 along section line LL, the multi-layer conductive layer includes: at least two source-drain metal layers; a first-type transfer line 211 is located in any one of the at least two source-drain metal layers; and a second-type transfer line 212 is located in a source-drain metal layer other than the source-drain metal layer where the first-type transfer line 211 is located.

[0143] Exemplarily, the multi-layer conductive layer includes three source / drain metal layers, namely, a first source / drain metal layer 62, a second source / drain metal layer 64, and a third source / drain metal layer 66. The first-type adapter line 211 is located in the first source / drain metal layer 62, and the second-type adapter line 212 is located in the second source / drain metal layer 64.

[0144] In some embodiments, as shown in Figures 22 and 23, where Figure 23 is a cross-sectional view of the adapter cable 21 (second adapter segment 21b) of the display motherboard 200 shown in Figure 22 along section line MM, the plurality of adapter cables 21 further include a plurality of third-type adapter cables 213. The plurality of third-type adapter cables 213 are located on a different conductive layer than the plurality of first-type adapter cables 211 and the plurality of second-type adapter cables 212. The adapter cable group 210 further includes: one third-type adapter cable 213 from the plurality of third-type adapter cables 213.

[0145] Exemplarily, the first-type patch cord 211 is located on the first source / drain metal layer 62, the second-type patch cord 212 is located on the second source / drain metal layer 64, and the third-type patch cord 213 is located on the third source / drain metal layer 66. For example, a first-type patch cord 211, a second-type patch cord 212, and a third-type patch cord 213 sequentially arranged in the first direction X constitute a patch cord group 210. That is, in a patch cord group 210, the third-type patch cord 213 is located on the side of the second-type patch cord 212 away from the first-type patch cord 211. Multiple patch cord groups 210 are evenly arranged along the first direction X.

[0146] In some examples, as shown in Figures 24 and 25, where Figure 25 is a cross-sectional view of the transfer line 21 (second transfer segment 21b) of the display motherboard 200 shown in Figure 24 along section line NN, the multi-layer conductive layer includes three gate metal layers, for example, the three gate metal layers are: a first gate metal layer 52, a second gate metal layer 54, and a third gate metal layer 56. The first type of transfer line 211 is located in the first gate metal layer 52, the second type of transfer line 212 is located in the second gate metal layer 54, and the third type of transfer line 213 is located in the third gate metal layer 56.

[0147] As shown in FIG15 , the patch cord 21 is located on the first gate metal layer 52 , and the spacing d1 between adjacent patch cords 21 is the distance d5 between two adjacent patch cords 21 in the first direction X, i.e., d1=d5. As shown in FIG15 , FIG17 , FIG19 , FIG21 , FIG23 , and FIG25 , compared to when two adjacent patch cords 21 are located on the same conductive layer, when two adjacent patch cords 21 are located on different conductive layers, the spacing d1 between the two adjacent patch cords 21 is greater than the distance d5 between the two adjacent patch cords 21 in the first direction X, i.e., d1>d5. In other words, by arranging that each two adjacent patch cords 21 are located on different conductive layers, the spacing d1 between the two adjacent patch cords 21 can be increased, thereby reducing the risk of short circuits between the patch cords 21 caused by cutting the patch cords 21.

[0148] As shown in FIG1 and FIG6 , embodiments of the present disclosure further provide a display panel 100, comprising: a display area 10; a frame area 20 located on at least one side of the display area 10; and a sub-cutting area 102 located away from the display area 10 and away from the frame area 20. The frame area 20 is provided with a plurality of binding terminals 12 arranged along a first direction X. The sub-cutting area 102 is provided with a plurality of sub-patch lines 21q arranged along the first direction X. One end of each sub-patch line 21q is connected to a corresponding binding terminal 12, and the other end of each sub-patch line 21q extends away from the display area 10. The width d2 of at least one sub-patch line 21q varies along a second direction Y, and the maximum width of each sub-patch line 21q is less than or equal to the width d3 of the binding terminal 12. The second direction Y intersects the first direction X, and the width d2 of each sub-patch line 21q is the dimension of the sub-patch line 21q in the first direction X, while the width d3 of each binding terminal 12 is the dimension of the binding terminal 12 in the first direction X.

[0149] It is understandable that the sub-cutting area 102 is the portion 30B of the cutting area 30 located on the cutting line L close to the frame area 20 , and the sub-connection line 21q is the portion of the connection line 21 located on the cutting line L close to the display area 10 .

[0150] That is, as shown in Figures 1, 6, and 16, a laser cutting process is used to cut along the cutting line L of the cutting area 30 to remove the portion of the display motherboard 200 that is away from the display area 10 from the cutting line L, that is, the portion of the cutting area 30 that is located away from the display area 10 along the cutting line L is removed. The display area 10, the frame area 20, and the portion 30B of the cutting area 30 that is located along the cutting line L and close to the display area 10 (that is, the sub-cutting area 102) of the display motherboard 200 are formed into the display panel 100.

[0151] By setting the width d2 of at least one sub-patch line 21q to vary along the second direction Y, and by ensuring that the maximum width of the sub-patch line 21q is less than or equal to the width d3 of the binding terminal 12, that is, the width d2 of a portion of the sub-patch line 21q along the second direction Y is reduced, the spacing d1 between adjacent sub-patch lines 21q at the portion where the width d2 is reduced is increased. This can reduce the risk of short circuits between the sub-patch lines 21q.

[0152] In some examples, as shown in FIG6 , the sub-transfer wire 21q includes a first transfer segment 21a and a sub-second transfer segment 21bq. One end of the first transfer segment 21a is connected to the binding terminal 12, and the other end of the first transfer segment 21a is connected to one end of the sub-second transfer segment 21bq. The other end of the sub-second transfer segment 21bq extends away from the display area 10. The width d22 of at least a portion of the sub-second transfer segment 21bq is smaller than the width d21 of the first transfer segment 21a.

[0153] That is, along the second direction Y, the width d2 of the sub-transfer wire 21q is reduced at the sub-second transfer section 21bq, thereby reducing the risk of short circuit between the sub-second transfer sections 21bq.

[0154] For example, as shown in Figures 13A and 13B, Figure 13A is a cross-sectional view of the first transition segment 21a shown in Figure 6 along section line EE, and Figure 13B is another cross-sectional view of the first transition segment 21a shown in Figure 6 along section line EE. The first transition segment 21a includes: a first gate metal layer 52, a first source / drain metal layer 62, and a second source / drain metal layer 64, which are arranged in sequence. A first insulating layer 61 is provided between two adjacent first transition segments 21a, and the first insulating layer 61 covers the edges of the first transition segment 21a.

[0155] It is understood that the film layer configuration of the sub-second transition segment 21bq is the same as that of the second transition segment 21b. As shown in Figure 15, the second transition segment 21b includes: a first gate metal layer 52 and a first insulating layer 61 arranged in sequence, with the first insulating layer 61 covering the second transition segment 21b. Therefore, the sub-second transition segment 21bq includes: a first gate metal layer 52 and a first insulating layer 61 arranged in sequence, with the first insulating layer 61 covering the second transition segment 21b.

[0156] As shown in Figure 13A, the first transition section 21a also includes a third source-drain metal layer 66 and a second insulating layer 69 arranged on the side of the second source-drain metal layer 64 away from the first source-drain metal layer 62. The second insulating layer 69 is located between two adjacent first transition sections 21a and exposes the third source-drain metal layer 66.

[0157] As shown in Figures 26 and 27, embodiments of the present disclosure further provide a display module 300, which includes the display panel 100 described in any of the above embodiments and a flexible circuit board 301. The flexible circuit board 301 includes a plurality of leads 3011, which are connected to a plurality of binding terminals 12 located in the border area 20 of the display panel 100.

[0158] As shown in Figures 27 and 28, Figure 28 shows the relative positional relationship between the flexible circuit board 301 and the frame area 20. The frame area 20 is provided with multiple signal lines 101, which are correspondingly connected to multiple binding terminals 12. The multiple signal lines 101 are used to connect to the circuits of the display area 10 and the frame area 20. Portion 30B of the cutting area 30 retains a portion 21D of the adapter wire 21 after being cut. This portion 21D of the adapter wire 21 is not directly connected to the leads 3011 of the flexible circuit board 301. The leads 3011 of the flexible circuit board 301 are directly connected to the binding terminals 12. In other words, the flexible circuit board 301 and the frame area 20 have an overlapping area 10A. For example, there is a certain distance d50 between the overlapping area 10A and the multiple signal lines 101 in the second direction Y. In this overlapping area 10A, the leads 3011 of the flexible circuit board 301 are correspondingly connected to the binding terminals 12.

[0159] The beneficial effects of the display module 300 are the same as those of the display panel 100 provided in some embodiments of the present disclosure, and are not further described here.

[0160] The above description is merely a specific embodiment of the present disclosure, but the scope of protection of the present disclosure is not limited thereto. Any changes or substitutions that a person skilled in the art can conceive within the technical scope disclosed in the present disclosure should be included within the scope of protection of the present disclosure. Therefore, the scope of protection of the present disclosure should be based on the scope of protection of the claims.

Claims

1. A display motherboard, comprising: Display area; A frame area located on at least one side of the display area is provided with a plurality of binding terminals arranged along a first direction; A cutting area located on a side of the frame area away from the display area is provided with a plurality of adapter wires arranged along the first direction, one end of each adapter wire is connected to the corresponding binding terminal, and the other ends of each adapter wire extend in a direction away from the display area; In which, along the second direction, the width of at least one of the adapter wires is different, and the maximum width of the adapter wire is less than or equal to the width of the binding terminal; in which, the second direction intersects with the first direction, the width of the adapter wire is the size of the adapter wire in the first direction, and the width of the binding terminal is the size of the binding terminal in the first direction.

2. The display motherboard according to claim 1, wherein: The adapter line includes a first adapter section, a second adapter section, and a third adapter section that are sequentially connected; the first adapter section is connected to the binding terminal, and the third adapter section extends in a direction away from the display area; The width of at least a portion of the second transition section is smaller than the width of the first transition section and smaller than the width of the third transition section.

3. The display motherboard according to claim 2, wherein: Along the second direction, the widths of the second transition sections are equal.

4. The display motherboard according to claim 2, wherein: Along the second direction, the second transition section includes: a first section and a second section, the first end of the first section is connected to the first transition section, the second end of the first section is connected to the second end of the second section, and the first end of the second section is connected to the third transition section; The width of the first segment decreases along a direction from the first end of the first segment to the second end of the first segment; The width of the second segment decreases along a direction from the first end of the second segment to the second end of the second segment.

5. The display motherboard according to claim 4, wherein: The rate of change of the width of the first segment decreasing from the first end of the first segment to the second end of the first segment remains constant; Along the direction from the first end of the second segment to the second end of the second segment, the rate of change of the reduction of the width of the second segment remains constant.

6. The display motherboard according to claim 4, wherein: Along the direction from the first end of the first segment to the second end of the first segment, the first segment includes a plurality of first sub-segments connected in sequence, and the width of the first sub-segment relatively far from the first transition segment is smaller than the width of the first sub-segment relatively close to the first transition segment; Along the direction from the first end of the second segment to the second end of the second segment, the second segment includes a plurality of second sub-segments connected in sequence, and the width of the second sub-segment relatively far away from the third transition segment is smaller than the width of the second sub-segment relatively close to the third transition segment.

7. The display motherboard according to claim 2, wherein: Along the second direction, the second transfer section of the transfer line includes: a plurality of third sub-segments and a plurality of fourth sub-segments that are alternately arranged and connected; A width of each of the plurality of third sub-segments is greater than a width of any fourth sub-segment of the plurality of fourth sub-segments.

8. The display motherboard according to claim 7, wherein: The width of each third sub-segment is equal, and the width of each fourth sub-segment is equal.

9. The display motherboard according to claim 7, wherein: The width of the third sub-segment of each segment is equal; Along the second direction, the second transition section has a middle position, and along the direction from the first transition section of the transition line to the middle position, the width of the fourth sub-segment relatively far from the first transition section is smaller than the width of the fourth sub-segment relatively close to the first transition section; Along the direction from the third transition section to the middle position of the transition line, the width of the fourth sub-section relatively far from the third transition section is smaller than the width of the fourth sub-section relatively close to the third transition section.

10. The display motherboard according to any one of claims 2 to 9, comprising: Multiple conductive layers and multiple insulating layers arranged alternately; The cutting area includes: a first area, a second area and a third area, the first transfer section of the transfer line is located in the first area, the second transfer section of the transfer line is located in the second area, and the third transfer section of the transfer line is located in the third area; The insulating layer in the first region includes an organic film layer and / or an inorganic film layer; the insulating layer in the second region includes an inorganic film layer; and the insulating layer in the third region includes an organic film layer and / or an inorganic film layer.

11. The display motherboard according to any one of claims 1 to 10, comprising: A plurality of conductive layers and an inorganic insulating layer located between every two adjacent conductive layers in the plurality of conductive layers; Wherein, at least one pair of two adjacent transfer wires are located in different conductive layers.

12. The display motherboard according to claim 11, wherein: The plurality of patch cords include: a plurality of first-type patch cords and a plurality of second-type patch cords; the plurality of first-type patch cords and the plurality of second-type patch cords are located in different conductive layers; Along the first direction, the plurality of patch cords are divided into a plurality of patch cord groups arranged side by side, each of the plurality of patch cord groups including: a first type patch cord from the plurality of first type patch cords and a second type patch cord from the plurality of second type patch cords.

13. The display motherboard according to claim 12, wherein: The multi-layer conductive layer includes: at least one gate metal layer and at least one source / drain metal layer; the first type of connecting line is located in any layer of the at least one gate metal layer, and the second type of connecting line is located in any layer of the at least one source / drain metal layer; or The multi-layer conductive layer includes: at least two gate metal layers; the first-type patch cord is located in any one of the at least two gate metal layers, and the second-type patch cord is located in a gate metal layer other than the gate metal layer where the first-type patch cord is located; or The multi-layer conductive layer includes: at least two source-drain metal layers; the first type of adapter is located at any one of the at least two source-drain metal layers, and the second type of adapter is located at a source-drain metal layer other than the source-drain metal layer where the first type of adapter is located.

14. The display motherboard according to claim 12 or 13, wherein: The plurality of patch cords further include a plurality of third-type patch cords; the plurality of third-type patch cords and the plurality of first-type patch cords and the plurality of second-type patch cords are located in different conductive layers; The patch cord group further includes: a third-category patch cord among the plurality of third-category patch cords.

15. The display motherboard according to claim 14, wherein: In one of the patch cord groups, the third type of patch cord is located on a side of the second type of patch cord away from the first type of patch cord.

16. The display motherboard according to claim 2, wherein: The first transfer section includes: a first gate metal layer, a first source-drain metal layer, and a second source-drain metal layer arranged in sequence, a first insulating layer is arranged between two adjacent first transfer sections, and the first insulating layer covers the edge of the first transfer section; The second transfer segment includes: a first gate metal layer and a first insulating layer arranged in sequence, and the first insulating layer covers the second transfer segment.

17. The display motherboard according to claim 16, the first transition segment further comprises a third source-drain metal layer and a second insulating layer arranged on a side of the second source-drain metal layer away from the first source-drain metal layer, and the second insulating layer is located between two adjacent first transition segments and exposes the third source-drain metal layer.

18. The display motherboard according to any one of claims 1 to 17, wherein: The cutting area is further provided with a plurality of unit test terminals, which are correspondingly connected to the adapter wires; the unit test terminals are used to connect to a test structure to perform a display test on the display motherboard.

19. A display panel comprising: Display area; A frame area located on at least one side of the display area is provided with a plurality of binding terminals arranged along a first direction; A sub-cutting area located on a side of the frame area away from the display area is provided with a plurality of sub-patch lines arranged along the first direction, one end of each sub-patch line is connected to the corresponding binding terminal, and the other end of each sub-patch line extends in a direction away from the display area; Among them, along the second direction, the width of at least one of the sub-transfer wires is different, and the maximum width of the sub-transfer wire is less than or equal to the width of the binding terminal; wherein, the second direction intersects with the first direction, the width of the sub-transfer wire is the size of the sub-transfer wire in the first direction, and the width of the binding terminal is the size of the binding terminal in the first direction.

20. The display panel according to claim 19, wherein The sub-adapter wire includes a first adaptor segment and a sub-second adaptor segment, wherein one end of the first adaptor segment is connected to the binding terminal, the other end of the first adaptor segment is connected to one end of the sub-second adaptor segment, and the other end of the sub-second adaptor segment extends away from the display area; The width of at least part of the second sub-transition segment is smaller than the width of the first transition segment.

21. A display module comprising: The display panel according to claim 19 or 20; A flexible circuit board includes a plurality of leads, and the plurality of leads are correspondingly connected to a plurality of binding terminals located in the frame area of ​​the display panel.

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