Communication system and communication apparatus

By adopting chain-cascaded bus pin cross-connection and parallel connection in box-type devices, the problem of flexible expansion of box-type devices in different business scenarios is solved, flexible connection and management of devices are achieved, costs are reduced, and adaptability is improved.

WO2025200930A1PCT designated stage Publication Date: 2025-10-02HUAWEI TECH CO LTD
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Patent Information

Application Number
PCT/CN2025/079779
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-03-28
Filing Date
2025-02-28
Publication Date
2025-10-02

AI Technical Summary

Technical Problem

Existing box-type devices are difficult to flexibly expand their functions when facing different business scenarios, resulting in the need to develop multiple devices to meet the requirements of different scenarios, which increases costs.

Method used

By adopting a chain cascade method between the main device and multiple expansion devices, and utilizing bus pin cross connection and parallel connection, flexible connection and management of the main device and expansion devices can be achieved, supporting transparent transmission and management of multiple bus types.

Benefits of technology

It realizes flexible connection and management between the main equipment and the expansion device, supports flexible expansion of business functions, reduces equipment development costs, and improves the adaptability and flexibility of the equipment.

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Abstract

A communication system and a communication apparatus. The communication system comprises a master device, and a plurality of expansion apparatuses, which are cascaded to the master device in a chained manner and comprise a first expansion apparatus and a second expansion apparatus, wherein the master device comprises a first physical interface, which is an input / output interface for a plurality of buses, the plurality of buses comprise a plurality of buses of the same type, and the plurality of buses of the same type comprise a first bus and a second bus; and in the first expansion apparatus, the first bus is a bus used by the first expansion apparatus, the second bus is a bus not used by the first expansion apparatus, and the second bus passes through the first expansion apparatus in a manner of bus pin cross-connection, such that chained expansion is flexibly performed on the master device, thereby meeting function expansion demands during a service change.
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Description

Communication system and communication device

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to the Chinese patent application filed with the State Intellectual Property Office of the People's Republic of China on March 28, 2024, with application number 202410374502.4 and invention name "A Communication System and Communication Device", the entire contents of which are incorporated by reference into this application. Technical Field

[0003] The present application relates to the field of communication technology, and in particular to a communication system and a communication device. Background Art

[0004] A box-type device is a chassis-type device that integrates electronic components, processors, memory, and other hardware devices. Box-type devices offer advantages such as compact size, ease of maintenance, and large storage capacity. They are widely used in smart homes, entertainment devices, industrial automation, and other fields.

[0005] As shown in Figure 1, a box-type device typically includes different types of chips to implement different functions. For example, a box-type device uses a system-on-chip (SoC), which includes a central processing unit (CPU), memory chips / storage chips, and business function chips. Business function chips include, for example, computing chips for providing artificial intelligence (AI) computing power and encryption chips for providing security functions. Different chips communicate internally and externally through low-speed or high-speed interfaces to meet business scenario requirements.

[0006] However, due to the diverse demands of various business scenarios, hardware requirements vary. For example, some scenarios require large storage, others require large memory, some require Wi-Fi interfaces, and still others require LTE / 5G interfaces. Providing a comprehensive box-type device would require integrating multiple functional chips and interfaces, making the cost of a single device high. Providing different box-type devices to meet the demands of different scenarios would require developing multiple box-type devices.

[0007] One current solution is to use a main device and expansion modules, adding different expansion modules to the main device to meet the needs of different scenarios. However, how to flexibly add expansion modules to the main device to meet the needs of different scenarios remains an important issue that needs to be solved. Summary of the Invention

[0008] The present application provides a communication system and a communication device for flexibly chain-expanding a main device to meet the functional expansion requirements of business changes.

[0009] In a first aspect, the present application provides a communication system, which may include a main device and multiple expansion devices chain-cascaded with the main device, the multiple expansion devices including a first expansion device and a second expansion device, wherein the main device includes a first physical interface, which is an input / output interface of multiple buses, and the multiple buses include multiple buses of the same type, and the multiple buses of the same type include a first bus and a second bus; in the first expansion device, the first bus is a bus used by the first expansion device, and the second bus is a bus not used by the first expansion device, and the second bus penetrates the first expansion device in a manner of cross-connection of bus pins.

[0010] The above system allows the hardware interface of a master device to be exposed to the outside world in a bus-based manner. Multiple expansion devices can be equipped with the same physical interface, including bus pins for multiple buses. Furthermore, within each expansion device, the connection between the bus pins is configured based on the expansion device's usage of the multiple buses. This allows the master device to communicate with multiple expansion devices in cascade mode via the first physical interface, while also allowing for flexible installation locations.

[0011] In combination with the first aspect, in a possible implementation, the first expansion device may be connected to the second expansion device through a third expansion device, and in the third expansion device, the second bus penetrates the third expansion device in a manner of cross-connection of bus pins.

[0012] In conjunction with the first aspect, in one possible implementation, the multiple buses of the same type may be management buses, the first bus being a first management bus, and the second bus being a second management bus. The master device may obtain attribute information of the first expansion device via the first management bus, and the master device may obtain attribute information of the second expansion device via the second management bus.

[0013] Exemplarily, the master device obtaining the attribute information of the first expansion device through the first management bus may include: the master device obtaining the attribute information of the first expansion device from an electrically erasable programmable read-only memory (EEPROM) chip of the first expansion device through the first management bus. Similarly, the master device obtaining the attribute information of the first expansion device through the second management bus may include: the master device obtaining the attribute information of the second expansion device from an electrically erasable programmable read-only memory (EEPROM) chip of the second expansion device through the second management bus.

[0014] For any extension device, the attribute information may include at least one of the following: service bus information; service driver loading information; extended service interface information; manufacturer information, and identification information of the extension device.

[0015] In combination with the first aspect, in a possible implementation, the management bus includes at least one of the following buses: an I2C bus; a presence signal bus.

[0016] In combination with the first aspect, in a possible implementation, the multiple buses also include a first service bus and a second service bus. In the first expansion device, for the first service bus used by itself, the connection between the first service bus and other expansion devices is interrupted; for the second service bus not used by itself, the second service bus penetrates the first expansion device in a manner where the bus pins are connected in parallel.

[0017] In combination with the first aspect, in a possible implementation, the multiple buses include one or more of the following service buses: an SPI bus; a PCIe bus; a SATA bus; or an Ethernet bus.

[0018] In combination with the first aspect, in a possible implementation, if there is a service conflict among the multiple extension devices, the master device is further configured to instruct to remove the conflicting extension device from the multiple extension devices.

[0019] In combination with the first aspect, in a possible implementation, the multiple expansion devices have service conflicts, including: the sum of the number of buses of the same type in the multiple buses is less than the number of buses of the same type required by the multiple expansion devices.

[0020] In conjunction with the first aspect, in one possible implementation, the master device is a box-type device, such as a box-type gateway, a box-type switch, or a box-type router. For example, in an enterprise campus scenario, the multiple expansion devices include any of the following: a network module or box-type device with Power over Ethernet (POE) functionality; a hardware component or box-type device with artificial intelligence (AI) computing functionality; or an Ethernet-based electrical port module or box-type device.

[0021] In a second aspect, the present application provides a communication device, comprising a physical interface, wherein the physical interface is an input / output interface of multiple buses, wherein the multiple buses include multiple buses of the same type, and the multiple buses of the same type include a first bus and a second bus; in the communication device, the first bus is a bus used by the communication device, and the second bus is a bus not used by the communication device, and the second bus penetrates the communication device in a manner of cross-connection of bus pins.

[0022] With reference to the second aspect, in a possible implementation, the multiple buses of the same type are management buses, the first bus is a first management bus, and the second bus is a second management bus.

[0023] In combination with the second aspect, in a possible implementation, the communication device includes an electrically erasable programmable read-only memory (EEPROM) chip, the EEPROM chip stores attribute information of the communication device, and the communication device provides the attribute information to the master device through the first management bus.

[0024] In conjunction with the second aspect, in a possible implementation, the attribute information includes at least one of the following: service bus information; service driver loading information; extended service interface information; manufacturer information, and identification information of an extended device.

[0025] In conjunction with the second aspect, in a possible implementation, the management bus includes at least one of the following buses: an I2C bus; a presence signal bus.

[0026] In combination with the second aspect, in a possible implementation, the multiple buses also include a first service bus and a second service bus. In the communication device, for the first service bus used by itself, the connection between the first service bus and other expansion devices is interrupted; for the second service bus not used by itself, the second service bus penetrates the communication device in a manner where the bus pins are connected in parallel.

[0027] In combination with the second aspect, in a possible implementation, the multiple buses include one or more of the following service buses: an SPI bus; a PCIe bus; a SATA bus; or an Ethernet bus.

[0028] In combination with the second aspect, in one possible implementation, the communication device may include any one of the following: a network module or box-type device with Power over Ethernet (POE) function; a hardware component or box-type device with artificial intelligence (AI) computing function; or an Ethernet-based electrical port module or box-type device.

[0029] The technical effects that can be achieved by any possible implementation method in any aspect of the above-mentioned second aspect can be referred to the description of the technical effects that can be achieved by any possible implementation method in any aspect of the above-mentioned first to second aspects, and the repetitions will not be discussed. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] FIG1 shows a schematic structural diagram of a box-type device;

[0031] FIG2 is a schematic diagram showing an application scenario applicable to the communication system of an embodiment of the present application;

[0032] 3A-3B are schematic diagrams showing the structure of a communication system applicable to an embodiment of the present application;

[0033] Figures 4 to 6 show different structural diagrams of the communication system according to the embodiment of the present application;

[0034] FIG7 is a schematic diagram showing I / O signals interacting between a main device and any expansion device according to an embodiment of the present application;

[0035] FIG8 shows a schematic diagram of a service conflict analysis process of multiple extension devices according to an embodiment of the present application. DETAILED DESCRIPTION

[0036] In order to make the purpose, technical solutions and advantages of this application clearer, this application will be further described in detail below with reference to the accompanying drawings.

[0037] FIG2 shows a schematic diagram of an application scenario applicable to the communication system of an embodiment of the present application.

[0038] As shown in Figure 2, the application scenario can be an enterprise campus scenario, which may include at least one electronic device, including but not limited to lighting equipment, cameras, power supply equipment, etc. The at least one electronic device can access the network through the corresponding access side network device, so that the operation and maintenance personnel can control and manage different electronic devices through the management and analysis platform on the computer side. Among them, the access side network devices of different electronic devices may include switches, routers, edge computing gateways and other devices, and different access side network devices can also be interconnected to form a ring structure (called a ring network) so that different electronic devices can communicate directly or indirectly.

[0039] In an optional embodiment, the access side network device in this scenario can be a box-type device, such as a box-type gateway, a box-type switch, or a box-type router. The box-type device can serve as the main device in the communication system of the embodiment of the present application, mainly used to implement services. Based on the main device, multiple expansion devices can also be added. The communication system of the embodiment of the present application may include the main device and multiple expansion devices cascaded with the main device. These multiple expansion devices can be used to implement the service function expansion of the main device to meet the functional expansion requirements of the service changes in the application scenario.

[0040] For example, the multiple expansion devices may include a network module or box-type device with Power over Ethernet (POE) function to power industrial cameras in the enterprise park. Or, for example, the multiple expansion devices may include hardware components or box-type devices with artificial intelligence (AI) computing functions to process and analyze data collected by industrial cameras in the enterprise park. Or, for example, the multiple expansion devices may include Ethernet-based electrical port modules or box-type devices to connect more field devices to the network.

[0041] It should be understood that this is only an example of the function of the expansion device and not any limitation. In other embodiments, the architecture of the corresponding communication system can be designed according to the actual application scenario and the functional expansion requirements of the main device, etc., which will not be repeated here.

[0042] In an embodiment of the present application, in order to enable the multiple expansion devices cascaded in a chain with the main device to be adjusted at will, including adjusting the installation position or replacing the expansion device, and to improve the flexibility of the expansion solution, one implementation method is to set a first physical interface on the main device, and the first physical interface is an input / output interface of multiple buses, including bus pins of multiple buses, so as to open the hardware interface of the main device to the outside in a bus manner. The same physical interface can be set on multiple expansion devices, including bus pins of multiple buses. At the same time, in each expansion device, the connection method between the bus pins is set according to the use of the multiple buses by the expansion device itself, so that the main device can communicate in cascade with multiple expansion devices through the first physical interface, and the installation position can be adjusted at will.

[0043] Taking multiple expansion devices including a first expansion device and a second expansion device as an example, as shown in Figure 3A, the main device may be provided with a system-on-a-chip (SoC), which is represented as a first chip. The SoC may be integrated with multiple hardware components, such as a central processing unit (CPU), a memory controller, an input / output (I / O) interface, a communication interface, etc. The CPU may be responsible for running programs and controlling the entire communication system. The memory controller is responsible for processing access requests to the memory and data transmission, including but not limited to various types of memory such as random access memory (RAM), dynamic random access memory (DRAM), flash memory (Flash), and embedded multimedia card (eMMC). The input / output (I / O) interface may include a variety of different interface types, such as a universal serial bus (USB) interface, a high definition multimedia interface (HDMI) interface, etc. The communication interface is responsible for processing wireless and wired communication functions, such as a Wi-Fi interface, a Bluetooth communication interface, an Ethernet port, etc. The first physical interface on the master device is an input / output interface of multiple buses. The first physical interface includes bus pins of the multiple buses, that is, bus signal input / output points.

[0044] The first expansion device may include a second chip, which can be used to expand the functions of the main device. For example, the second chip may be an AI chip, which is used to provide AI computing power for the main device. The second expansion device may include a third chip, which may be a local area network switch (LAN switch, LSW) chip, which is used to realize the exchange and transmission of network data. The first expansion device or the second expansion device may also include an extended service interface, such as an Ethernet port, for expanding functional services. In other examples, the second chip or the third chip may also be a chip for realizing other functions. Optionally, a system-level chip may also be used in the first expansion device or the second expansion device, including at least one chip. The embodiments of the present application do not impose any restrictions on the hardware components of the expansion device.

[0045] The first expansion device includes a second physical interface and a third physical interface, and the second expansion device includes a fourth physical interface and a fifth physical interface. The second physical interface, the third physical interface, the fourth physical interface, and the fifth physical interface are all input / output interfaces for multiple buses, including bus pins for multiple buses. Outside the device, the first physical interface is adapted to the second physical interface, and the third physical interface is adapted to the fourth physical interface. The fifth physical interface can be adapted to other expansion devices cascaded in a chain after the second expansion device. Inside the expansion device, for bus ① used by the first expansion device itself, for example, bus ① is connected to the second chip, the signal of bus ① is interrupted at the first expansion device. For bus ② not used by the first expansion device itself, the signal of bus ② passes through the first expansion device and is transparently transmitted to the second expansion device. For bus ② used by the second expansion device itself, for example, bus ② is connected to the third chip, the signal of bus ② is interrupted at the first expansion device. Similarly, for other bus signals not used by either the first or second expansion device, they are also transparently transmitted to other expansion devices (not shown in the figure).

[0046] The installation order of the first expansion device and the second expansion device in Figure 3A can also be adjusted. At this time, as shown in Figure 3B, the first physical interface is adapted to the fourth physical interface, and the fifth physical interface is adapted to the second physical interface. Inside the second expansion device, for the bus ② used by the second expansion device itself, for example, bus ② is connected to the third chip, then the signal of the bus ② is interrupted at the first expansion device. For the bus ① not used by the second expansion device itself, the signal of the bus ① penetrates the second expansion device and is transparently transmitted to the first expansion device. For the bus ① used by the first expansion device itself, for example, bus ① is connected to the second chip, then the signal of the bus ① is interrupted at the first expansion device. Similarly, for other bus signals that are not used by the first expansion device and the second expansion device, they are also transparently transmitted to other expansion devices (not shown in the figure).

[0047] As can be seen from Figures 3A and 3B, the embodiments of the present application can not only realize the chain cascade between the main device and multiple expansion devices, but also flexibly adjust each expansion device so that there is no need to perceive the differences between the expansion devices during installation, thereby flexibly expanding the business functions of the main device to meet the functional expansion requirements of business changes.

[0048] To facilitate understanding, the communication system of the embodiment of the present application is described in detail below with reference to different examples.

[0049] Exemplarily, based on the potential demand for extended business functions of the main device, the multiple buses may include but are not limited to one or more of the following types of buses: high-speed serial computer expansion bus standard (Peripheral Component Interconnect Express, PCIe) bus, USB, Ethernet bus, serial advanced technology attachment (Serial Advanced Technology Attachment, SATA) bus, integrated circuit bus (Inter-Integrated Circuit Bus, I2C), serial peripheral interface (Serial Peripheral Interface, SPI) bus, etc.

[0050] The multiple buses may include a single bus of a single type or multiple buses of the same type. For a single bus of a single type, if an expansion device itself uses the bus, the bus's connection with other expansion devices is interrupted. If an expansion device itself does not use the bus, the bus passes through the expansion device with its bus pins connected in parallel. For multiple buses of the same type, if an expansion device itself uses at least one of the multiple buses of the same type, the other buses not used by the expansion device pass through the expansion device with their bus pins connected in cross-connection.

[0051] In other words, the multiple expansion devices chain-cascaded with the main device include a first expansion device and a second expansion device, and the multiple buses of the same type include a first bus and a second bus. In the first expansion device, the first bus is the bus used by the first expansion device, and the second bus is the bus not used by the first expansion device. The second bus penetrates the first expansion device by cross-connecting the bus pins. If the first expansion device is connected to the second expansion device through a third expansion device, in the third expansion device, the second bus penetrates the third expansion device by cross-connecting the bus pins. The multiple buses can also include a single bus of a certain type. In the first expansion device, for the bus used by itself, the connection between the bus and other expansion devices is interrupted; for the bus not used by itself, the bus penetrates the first expansion device by connecting the bus pins in parallel.

[0052] As shown in Table 1 below, the multiple buses of the main device can be divided into management buses and business buses according to their uses. The management bus can be used to achieve unified management of different expansion devices by the main device, and the business bus can be used to transmit business-related signals or business data between the main device and each expansion device.

[0053] Table 1

[0054] As an example, the management bus may include an I2C bus for transmitting I2C signals between the main device and the expansion device, so that the main device can obtain the attribute information of each expansion device through the corresponding I2C bus and manage each expansion device based on the attribute information. The management bus may also include a bus for transmitting a presence signal, so that the main device can detect the presence status of the expansion device and decide whether to manage the expansion device. The service bus can be used to exchange service signals or service data between the main device and the service chip of the directly or indirectly connected expansion device, so that the expansion device can expand the service functions of the main device to meet the functional expansion requirements of the service change.

[0055] Example 1:

[0056] Exemplarily, as shown in FIG4 , the multiple buses of the same type among the multiple buses of the master device may be three management buses, such as three I2C buses, represented as I2C1, I2C2, and I2C3 buses. Alternatively, the multiple buses of the same type among the multiple buses of the master device may also be three in-position signal buses, represented as in-position 1, in-position 2, and in-position 3 buses. The multiple buses of the master device may also include a single bus of a single type, such as a PCIe bus and a SATA bus. Expansion device 1, expansion device 2, and expansion device 3 are configured to each use an I2C bus and a in-position signal bus. Expansion device 1 is configured to use the SATA bus, expansion device 3 is configured to use the PCIe bus, and expansion device 2 is configured to use neither the SATA bus nor the PCIe bus. In this example, based on the usage of different buses by each expansion device, the implementation scheme of the bus pin connection method of each bus includes the contents shown in Table 2 below:

[0057] Table 2

[0058] In FIG4 , a grayscale filled rectangular box represents a physical expansion interface between a main device and each expansion device, and a solid circle represents a bus pin set for multiple buses. Multiple buses of the same type among the multiple buses of the main device can be three I2C buses, represented as I2C1, I2C2, and I2C3 buses. The first physical interface of the main device includes first pins set for the three I2C buses, represented as pins 11, 12, and 13, respectively. The second physical interface of the expansion device 1 includes second pins set for the three I2C buses, represented as pins 21, 22, and 23, respectively. The third physical interface of the expansion device 1 includes second pins set for the three I2C buses, represented as pins 21, 22, and 23, respectively. The fourth physical interface of the extension device 2 includes fourth pins respectively set for the three I2C buses, which are represented as pins 41, 42 and 43. The fifth physical interface of the extension device 2 includes fifth pins respectively set for the three I2C buses, which are represented as pins 51, 52 and 53. The sixth physical interface of the extension device 3 includes sixth pins respectively set for the three I2C buses, which are represented as pins 61, 62 and 63. The seventh physical interface of the extension device 3 includes seventh pins respectively set for the three I2C buses, which are represented as pins 71, 72 and 73. Between the main device and the expansion device 1, or between each expansion device, the pins of each bus are adapted in sequence, for example, pin 11 is connected to pin 21, pin 12 is connected to pin 22, pin 13 is connected to pin 23, pin 31 is connected to pin 41, pin 32 is connected to pin 42, pin 33 is connected to pin 43, pin 51 is connected to pin 61, pin 52 is connected to pin 62, and pin 53 is connected to pin 63.

[0059] Extension device 1, extension device 2, and extension device 3 may each include an electrically erasable and programmable read-only memory (EEPROM or E2PROM) chip, which can be used to store attribute information or other information of the corresponding extension device. In extension device 1, the EEPROM chip uses an I2C bus, with pin 21 connected to pin 10 of the EEPROM chip. For the unused I2C2 bus of extension device 1, pin 22 of the I2C2 bus is connected to pin 31 in a cross-connected manner, so that the signal of the I2C2 bus penetrates extension device 1 and is transparently transmitted to extension device 2. Similarly, for the unused I2C3 bus of extension device 1, pin 23 of the I2C3 bus is connected to pin 32 in a cross-connected manner, so that the signal of the I2C3 bus penetrates extension device 1 and is transparently transmitted to extension device 2. In expansion device 2, the EEPROM chip uses an I2C bus, and pin 41 is connected to pin 20 of the EEPROM chip. For the I2C2 bus not used by expansion device 2, pin 42 of the I2C2 bus is connected to pin 51 in a cross manner, so that the signal of the I2C2 bus passes through expansion device 2 and is transmitted transparently to expansion device 3. Similarly, for the I2C3 bus not used by expansion device 2, pin 43 of the I2C3 bus is connected to pin 52 in a cross manner, so that the signal of the I2C3 bus passes through expansion device 2 and is transmitted transparently to expansion device 3. In expansion device 3, the EEPROM chip uses an I2C bus, with pin 61 connected to pin 30 of the EEPROM chip. For the I2C2 bus not used by expansion device 3, pin 62 of the I2C2 bus is connected to pin 71 in a cross-connected manner, so that the signal of the I2C2 bus penetrates expansion device 3 and is transparently transmitted to other expansion devices (not shown in the figure). Similarly, for the I2C3 bus not used by expansion device 3, pin 63 of the I2C3 bus is connected to pin 72 in a cross-connected manner, so that the signal of the I2C3 bus penetrates expansion device 3 and is transparently transmitted to other expansion devices (not shown in the figure). Based on the above connections, the master device can obtain the attribute information of the corresponding expansion device from the EEPROM chips of expansion device 1, expansion device 2, and expansion device 3 through the I2C1 bus, I2C2 bus, and I2C3 bus respectively.

[0060] Similarly, multiple buses of the same type among the multiple buses of the master device may also be three presence signal buses, represented as presence 1, presence 2, and presence 3 buses. The first physical interface of the master device includes first pins respectively set for the three presence signal buses, represented as pin 14, pin 15, and pin 16. The second physical interface of the expansion device 1 includes second pins respectively set for the three presence signal buses, represented as pin 24, pin 25, and pin 26. The third physical interface of the expansion device 1 includes third pins respectively set for the three presence signal buses, represented as pin 34, pin 35, and pin 36. The fourth physical interface of expansion device 2 includes fourth pins for three presence signal buses, designated as pins 44, 45, and 46. The fifth physical interface of expansion device 2 includes fifth pins for three presence signal buses, designated as pins 54, 55, and 56. The sixth physical interface of expansion device 3 includes sixth pins for three presence signal buses, designated as pins 64, 65, and 66. The seventh physical interface of expansion device 3 includes seventh pins for three presence signal buses, designated as pins 74, 75, and 76. Between the host device and expansion device 1, or between each expansion device, the pins for each bus are sequentially adapted. For example, pin 14 is connected to pin 24, pin 15 is connected to pin 25, pin 16 is connected to pin 26, pin 34 is connected to pin 44, pin 35 is connected to pin 45, pin 36 is connected to pin 46, pin 54 is connected to pin 64, pin 55 is connected to pin 65, and pin 56 is connected to pin 66.

[0061] Extension device 1, extension device 2, and extension device 3 may each include a hardware component for generating a presence signal, such as a pull-down module for pulling down a high-level signal (e.g., 1) to a low-level signal (e.g., 0), i.e., a presence signal, when the extension device is in place. In extension device 1, the pull-down module uses a presence signal bus, such as the presence 1 bus, with pin 24 connected to pin 40 of the pull-down module. For presence signal buses not used by extension device 1, such as the presence 2 bus and the presence 3 bus, pin 25 of the presence 2 bus is connected to pin 34 in a cross-connected manner, so that the signal of the presence 2 bus passes through extension device 1. Similarly, for the presence 3 bus not used by extension device 1, pin 26 of the presence 3 bus is connected to pin 35 in a cross-connected manner, so that the signal of the presence 3 bus passes through extension device 1. In expansion device 2, the pull-down module uses an in-position bus, with pin 44 connected to pin 50 of the pull-down module. For the in-position 2 bus not used by expansion device 2, pin 45 of the in-position 2 bus is connected to pin 54 in a crossover manner, allowing the in-position 2 bus signal to pass through expansion device 2. Similarly, for the in-position 3 bus not used by expansion device 2, pin 46 of the in-position 3 bus is connected to pin 55 in a crossover manner, allowing the in-position 3 bus signal to pass through expansion device 2. In expansion device 3, the pull-down module uses an in-position bus, with pin 64 connected to pin 60 of the pull-down module. For the in-position 2 bus not used by expansion device 3, pin 65 of the in-position 2 bus is connected to pin 74 in a crossover manner, allowing the in-position 2 bus signal to pass through expansion device 3. Similarly, for the in-position 3 bus not used by expansion device 3, pin 66 of the in-position 3 bus is connected to pin 75 in a crossover manner, allowing the in-position 3 bus signal to pass through expansion device 3. Based on the above connection, the main device can receive presence signals from expansion device 1, expansion device 2, and expansion device 3 through the presence 1 bus, presence 2 bus, and presence 3 bus respectively to sense the presence status of the corresponding expansion device.

[0062] Similarly, the multiple buses of the main device may also include a PCIe bus and a SATA bus. The first physical interface of the main device includes first pins set for the PCIe bus and the SATA bus, respectively, represented as pin 17 and pin 18. The second physical interface of the extension device 1 includes second pins set for the PCIe bus and the SATA bus, respectively, represented as pin 27 and pin 28. The third physical interface of the extension device 1 includes third pins set for the PCIe bus and the SATA bus, respectively, represented as pin 37 and pin 38. The fourth physical interface of the extension device 2 includes fourth pins set for the PCIe bus and the SATA bus, respectively, represented as pin 47 and pin 48. The fifth physical interface of the extension device 2 includes fifth pins set for the PCIe bus and the SATA bus, respectively, represented as pin 57 and pin 58. The sixth physical interface of the extension device 3 includes sixth pins set for the PCIe bus and the SATA bus, respectively, represented as pin 67 and pin 68. The seventh physical interface of the extension device 3 includes seventh pins set for the PCIe bus and the SATA bus, respectively, represented as pin 77 and pin 78. Between the main device and the expansion device 1, or between each expansion device, the pins of each bus are adapted in sequence, for example, pin 17 is connected to pin 27, pin 18 is connected to pin 28, pin 37 is connected to pin 47, pin 38 is connected to pin 48, pin 57 is connected to pin 67, and pin 58 is connected to pin 68.

[0063] Neither expansion device 1 nor expansion device 2 uses the PCIe bus. In expansion device 1, pin 27 of the PCIe bus is connected in parallel to pin 37, and in expansion device 2, pin 47 of the PCIe bus is connected in parallel to pin 57. Expansion device 3 uses the PCIe bus. In expansion device 3, pin 67 of the PCIe bus is connected to pin 80 of the AI ​​chip in expansion device 3. Based on this connection, the PCIe bus signal passes through expansion devices 1 and 2 and is transparently transmitted to expansion device 3. Expansion device 1 includes memory, which uses a SATA bus. Pin 28 of the SATA bus is connected to pin 70 of the memory, and this SATA bus interrupts communication with other expansion devices. Although expansion devices 2 and 3 do not use the SATA bus, pin 48 of expansion device 2 is connected in parallel to pin 58, and pin 68 of expansion device 3 is connected in parallel to pin 78.

[0064] Based on this connection, even if the order of any two expansion devices among expansion devices 1, 2, and 3 is swapped, communication between the main device and each expansion device remains unchanged. Therefore, during installation, there's no need to understand the differences between the expansion devices, facilitating flexible design of the communication system architecture to meet the functional expansion requirements of changing services.

[0065] Example 2:

[0066] In an embodiment of the present application, the multiple buses of the main device may also include multiple service buses of the same type. As shown in Figure 5, the multiple service buses of the same type may be two SATA buses, represented as SATA1 and SATA2 buses. The first physical interface of the main device includes first pins set for the SATA1 and SATA2 buses, represented as pins 18 and 19 respectively. The second physical interface of the extension device 1 includes second pins set for the SATA1 and SATA2 buses, represented as pins 28 and 29 respectively. The third physical interface of the extension device 1 includes third pins set for the SATA1 and SATA2 buses, represented as pins 38 and 39 respectively. The fourth physical interface of the extension device 2 includes fourth pins set for the SATA1 and SATA2 buses, represented as pins 48 and 49 respectively. The fifth physical interface of the extension device 2 includes fifth pins set for the SATA1 and SATA2 buses, represented as pins 58 and 59 respectively. The sixth physical interface of the extension device 3 includes sixth pins set for the SATA1 and SATA2 buses, represented as pins 68 and 69 respectively. The seventh physical interface of the extension device 3 includes seventh pins set for the SATA1 and SATA2 buses, represented as pins 78 and 79 respectively. Between the main device and the expansion device 1, or between each expansion device, the pins of each bus are adapted in sequence, for example, pin 18 is connected to pin 28, pin 19 is connected to pin 29, pin 38 is connected to pin 48, pin 39 is connected to pin 49, pin 58 is connected to pin 68, and pin 59 is connected to pin 69.

[0067] Expansion device 1 includes a memory device that utilizes a SATA bus, such as the SATA1 bus. Pin 28 of the SATA1 bus is connected to pin 70 of the memory device, and the SATA1 bus interrupts communication with other expansion devices. Expansion device 1 does not utilize the SATA2 bus. In expansion device 1, pin 29 of the SATA2 bus is cross-connected to pin 38, allowing the SATA2 bus signal to pass through expansion device 1. Although expansion devices 2 and 3 do not utilize the SATA bus, in expansion device 2, pin 48 is still connected to pin 58 in parallel, and pin 49 is still connected to pin 59 in parallel. In expansion device 3, pin 68 is still connected to pin 78 in parallel, and pin 69 is still connected to pin 79 in parallel. The pin connections for the other buses are the same as those shown in FIG4 . For details, please refer to the description above in conjunction with FIG4 , and will not be repeated here.

[0068] Based on this connection, even if the order of any two expansion devices among expansion devices 1, 2, and 3 is swapped, communication between the main device and each expansion device remains unchanged. Therefore, during installation, there's no need to understand the differences between the expansion devices, facilitating flexible design of the communication system architecture to meet the functional expansion requirements of changing services.

[0069] Example 3:

[0070] In an embodiment of the present application, the multiple buses of the master device may also include multiple service buses of the same type. As shown in Figure 6, the multiple service buses of the same type may be three PCIe buses, represented as PCIe1, PCIe2 and PCIe3 buses. The first physical interface of the master device includes first pins respectively set for the three PCIe buses, represented as pins 17, 18 and 19. The second physical interface of the expansion device 1 includes second pins respectively set for the three PCIe buses, represented as pins 27, 28 and 29. The third physical interface of the expansion device 1 includes third pins respectively set for the three PCIe buses, represented as pins 27, 28 and 29. The fourth physical interface of expansion device 2 includes four pins for each of the three PCIe buses, designated as pins 47, 48, and 49. The fifth physical interface of expansion device 2 includes five pins for each of the three PCIe buses, designated as pins 57, 58, and 59. The sixth physical interface of expansion device 3 includes six pins for each of the three PCIe buses, designated as pins 67, 68, and 69. The seventh physical interface of expansion device 3 includes seven pins for each of the three PCIe buses, designated as pins 77, 78, and 79. Between the host device and expansion device 1, or between the expansion devices, the pins for each bus are sequentially adapted. For example, pin 17 is connected to pin 27, pin 18 is connected to pin 28, pin 19 is connected to pin 29, pin 37 is connected to pin 47, pin 38 is connected to pin 48, pin 39 is connected to pin 49, pin 57 is connected to pin 67, pin 58 is connected to pin 68, and pin 59 is connected to pin 69.

[0071] Expansion device 1 includes an AI chip and memory and uses two PCIe buses. For example, pin 27 of the PCIe1 bus connects to pin 90 of the AI ​​chip, and pin 28 of the PCIe2 bus connects to pin 70 of the memory. For the PCIe3 bus, which is not used by expansion device 1, pin 29 of the PCIe3 bus is cross-connected to pin 37, allowing PCIe3 bus signals to pass through expansion device 1. Expansion device 3 uses a single PCIe bus. In expansion device 3, pin 67 of the PCIe1 bus connects to pin 80 of the AI ​​chip. Expansion device 2 does not use the PCIe1, PCIe2, and PCIe3 buses. In expansion device 2, the PCIe1, PCIe2, and PCIe3 buses pass through expansion device 2 with their bus pins connected in parallel. For example, pin 47 of the PCIe1 bus connects in parallel to pin 57, pin 48 of the PCIe2 bus connects in parallel to pin 58, and pin 49 of the PCIe3 bus connects in parallel to pin 59. Expansion device 3 does not use the PCIe2 and PCIe3 buses. The PCIe2 and PCIe3 buses penetrate expansion device 2 in expansion device 3 in a manner where the bus pins are cross-connected. For example, pin 68 of the PCIe2 bus is connected in parallel to pin 77, and pin 69 of the PCIe3 bus is cross-connected to pin 78.

[0072] Based on this connection, even if the order of any two expansion devices among expansion devices 1, 2, and 3 is swapped, communication between the main device and each expansion device remains unchanged. Therefore, during installation, there's no need to understand the differences between the expansion devices, facilitating flexible design of the communication system architecture to meet the functional expansion requirements of changing services.

[0073] In an embodiment of the present application, the first bus can be a first management bus, and the second bus can be a second management bus, both of which are in-place signal buses. The expansion device 1 in Figures 4 to 6 is represented as the first expansion device, and the expansion device 2 is represented as the second expansion device. Then, the first expansion device uses the first management bus (for example, in-place 1 bus), and the master device obtains the in-place signal of the first expansion device through the first management bus. The second expansion device uses the second management bus (for example, in-place 2 bus), and the master device obtains the in-place signal of the second expansion device through the second management bus. Thus, the master device can sense the in-place status of the corresponding expansion device through each management bus. As shown in Figure 7, the master device can receive the in-place signal from the pull-down module of the expansion device through the in-place signal bus to sense the in-place status of the corresponding expansion device.

[0074] Similarly, the first management bus and the second management bus can both be I2C buses. In Figures 4-6, expansion device 1 is represented as the first expansion device, and expansion device 2 is represented as the second expansion device. The first expansion device uses the first management bus (e.g., I2C1 bus), and the master device obtains attribute information of the first expansion device via the first management bus. The second expansion device uses the second management bus (e.g., I2C2 bus), and the master device obtains attribute information of the second expansion device via the second management bus.

[0075] Exemplarily, the attribute information of the extension device may be stored in an EEPROM chip of the extension device. The attribute information of the extension device may be internal information of the EEPROM, including at least one of the following Table 3:

[0076] Table 3

[0077] Based on the connection method shown in Figures 4 to 6, the master device can obtain the attribute information of the first expansion device from the EEPROM chip of the first expansion device through the first management bus. The master device can obtain the attribute information of the second expansion device from the EEPROM chip of the second expansion device through the second management bus, as shown in Figure 7. Based on at least one of the contents in Table 3, the master device can know how to manage the expansion device. For example, based on the service bus information, the master device can know which service buses the expansion device needs to use, and know which service class buses to communicate with the hardware components (such as chips / memory, etc.) on the expansion device. Based on the service driver loading information, the master device can know whether it is necessary to dynamically load the required driver for the expansion device. Based on the extended service interface information, the master device can know the information of the various types of extended service interfaces possessed by the expansion device. Based on the manufacturer information and / or identification information, the master device can know the identity of the expansion device.

[0078] It should be understood that this is merely an example of the internal information of the EEPROM and is not intended to be limiting. In other embodiments, portions of Table 3 may be deleted, other attribute information may be added to Table 3, or some of the contents in Table 3 may be replaced with other contents as needed. This embodiment of the present application is not limited to this. In other examples, the attribute information of the expansion device may also be stored in other types of memory chips of the expansion device. This embodiment of the present application is not limited to this.

[0079] In other embodiments, expansion device 1 in Figures 4-6 can be represented as the first expansion device, expansion device 3 as the second expansion device, and expansion device 2 as the third expansion device. The first expansion device is connected to the second expansion device via the third expansion device. In this case, the bus pin connections within the third expansion device are configured based on the third expansion device's usage of each bus, so that signals from buses not used by the third expansion device pass through the third expansion device. For example, if a second bus of the same type (e.g., an I2C2 bus or an In-Bit 2 bus) is not used by the third expansion device, the bus pins of the second bus pass through the third expansion device by cross-connecting them. For a single bus of a particular type within the multiple buses, the third expansion device disconnects the bus from other expansion devices for the bus it uses; for the bus it does not use, the bus pins of the bus pass through the third expansion device by connecting them in parallel. Detailed implementation details can be found in the previous description of Figures 4-6 and will not be repeated here.

[0080] Based on the examples shown in Figures 4-6, the master device can transmit service-related signals or service data to multiple expansion devices based on the service bus. For example, as shown in Figure 7, service signals can be exchanged between the master device and the chip / memory of any expansion device to implement the extended function service.

[0081] Furthermore, the master device can implement unified management of different expansion devices based on the management bus, supporting ecosystem expansion. For example, taking the example of the master device and any expansion device using the I2C bus as the management bus, as shown in Figure 7, based on this I2C bus, in one example, the master device and any expansion device can exchange I / O signals as shown in Table 4 below to manage the corresponding hardware components on the expansion device side.

[0082] Table 4

[0083] Among them, the main device can send a power-on (Power_ON) signal to a certain expansion device. The I2CI / O chip in the expansion device sends the power-on signal to the power supply to control the power-on of the expansion device. After the expansion device is powered on, it can provide extended business functions for the main device.

[0084] Alternatively, the host device may send a universal asynchronous receiver / transmitter (UART)_Select signal (or redirection signal) to an expansion device, and the I2CI / O chip in the expansion device sends the UART_Select signal to the serial port switch.

[0085] Alternatively, the main device can send a system light (SYS_LED) signal to an expansion device, and the I2CI / O chip in the expansion device sends the system light signal to the corresponding system light to control the system light of the expansion device (such as a red and green dual-color indicator light).

[0086] Alternatively, the master device may also receive a 2nd 9555 or not signal sent by an I2C chip of an expansion device to learn whether the expansion device has a second 9555 (PCA9555).

[0087] Alternatively, the main device can also use the I2CI / O chip of the expansion device to interact with the chip or memory in the expansion device to customize the GPI / O signal, which is used to implement different management functions through the GPI / O signal, including but not limited to resetting the chip on the expansion device, selecting the electronic switch, querying the status of the chip / memory, etc.

[0088] It should be understood that this is only an example of an I / O signal based on a management bus using the I2C bus as an example. In other embodiments, other types of buses can also be used as management buses, and corresponding I / O signals can be exchanged between the main device and the expansion device based on the management bus to facilitate the main device to implement unified management of the expansion device. This will not be repeated here.

[0089] Therefore, through the above introduction, the embodiment of the present application, based on the connection method between the main device and each expansion device, and the connection method of the bus pins in each expansion device, enables the main device to adopt a "chain expansion" method, through a physical expansion interface that is opened in a bus manner to communicate with multiple expansion devices, and supports flexible adjustment of the installation position of each expansion device, flexibly performing chain expansion of the main device to meet the functional expansion requirements of business changes. At the same time, the main device adopts a unified management method, and flexibly implements control and management of different expansion devices by defining the functional interfaces and business attributes of the expansion devices.

[0090] In an optional embodiment, when implementing unified management of multiple expansion devices cascaded with the main device, the master device may further analyze whether there are service conflicts among the multiple expansion devices. If there are service conflicts among the multiple expansion devices, the master device may further instruct the expansion device involved to be removed from the multiple expansion devices. Exemplarily, the existence of service conflicts among the multiple expansion devices may include: the sum of the number of buses of the same type among the multiple buses of the master device is less than the number of buses of the same type required by the multiple expansion devices.

[0091] As an example, as shown in FIG8 , the service conflict analysis process may include the following steps:

[0092] As shown in FIG8 , the process of loading at least one expansion device by the master device may include the following steps:

[0093] S810: When the main device starts, it obtains a presence signal of at least one expansion device.

[0094] For example, the master device may scan at least one presence signal bus to obtain a presence signal from at least one expansion device. For example, if the presence signal bus used by a certain expansion device transmits a low-level signal, it indicates that the expansion device is in the presence state. If the presence signal bus used by the certain expansion device does not transmit a low-level signal or transmits a high-level signal, it indicates that the expansion device is not in the presence state.

[0095] S820: The master device reads the EEPROM information of the installed expansion device. The EEPROM information may include, but is not limited to, some or all of the information shown in Table 3. For example, it may include service bus information, service driver loading information, and extended service interface information. These information describe which service bus interfaces the expansion device uses, whether a service driver needs to be loaded, and which service interfaces the service chip extends.

[0096] S830: The master device determines whether there is a service conflict among the existing expansion devices based on the EEPROM information of the existing expansion devices. If there is a conflict, the process proceeds to S840. If not, the process proceeds to S850-S890.

[0097] In one example, the conflict between expansion devices may be a conflict event caused by the type or number of multiple buses supported by the first physical interface of the main device and the inequality of the demand information of the expansion devices, for example, the sum of the number of buses of the same type in the multiple buses of the main device is less than the number of buses of the same type required by multiple expansion devices. For example, if at least two expansion devices currently in place both need to use a PCIe bus, and the first physical interface of the main device only includes one PCIe bus, then at the same time only one expansion device that wants to use the PCIe bus can be powered on to expand business functions, and the other expansion device in place that has a conflict needs to be removed. The main device may instruct to remove the expansion device connected later based on the connection order of the two conflicting expansion devices and the main device. That is, in the case of a business conflict, for two or more expansion devices that support the same business function, only the number of expansion devices required by the main device is retained.

[0098] It should be understood that this is only an example of a conflict event in an embodiment of the present application. In other embodiments, other information can be used to analyze whether there is a conflict between different expansion devices, so that when a conflict occurs, the corresponding solution strategy can be implemented in a timely manner to ensure the service or function of the entire communication system.

[0099] S840: Implement a conflict resolution strategy to remove conflicting expansion devices from the multiple expansion devices.

[0100] For example, the master device can issue an alarm or system light prompt, requiring manual intervention to remove the conflicting expansion device from the chained expansion devices to complete the conflict repair. For example, the master device can output and control the system light signal of the corresponding expansion device to indicate to the administrator which expansion device needs to be removed.

[0101] S850: The master device powers on all expansion devices that are in place and do not conflict in sequence.

[0102] For example, the master device can send a power-on signal to all existing and conflict-free expansion devices in the order in which they are connected. Accordingly, the expansion device powers on after receiving the power-on signal from the master device and initializes each hardware component within the device.

[0103] S860: The main device determines whether the service driver program is loaded on different service buses of each expansion device according to the service driver loading information.

[0104] For example, if a PCIe bus driver needs to be dynamically loaded, the process proceeds to S870. If the PCIe bus driver does not need to be loaded, the process proceeds to S890. Alternatively, if a Gigabit Ethernet (GE) bus or a Fast Ethernet (FE) bus driver needs to be dynamically loaded, the process proceeds to S880. If the Ethernet bus driver does not need to be loaded, the process proceeds to S890.

[0105] S870: The master device dynamically loads the PCIe bus driver.

[0106] S880: The master device dynamically loads the Ethernet bus driver.

[0107] S890: End the expansion device loading process and complete the function expansion of the main device.

[0108] Therefore, through the method shown in Figure 8, when loading each expansion device on the main device, unified management of all expansion devices can be achieved based on the bit signal and / or attribute information of each expansion device, and conflict events can be resolved at the same time to ensure the performance of the entire communication system.

[0109] Based on the above embodiments, the present application further provides a communication device, which may be the main device described above, or any of the multiple expansion devices described above. The communication device may include multiple functional modules or chips for implementing chained cascade communication and functional service expansion with other devices. The multiple functional modules may be implemented based on software, hardware, or a combination of software and hardware, and the multiple functional modules may be arbitrarily combined or divided based on the specific implementation.

[0110] Based on the above embodiments, the present application further provides an electronic device, which includes at least one processor and at least one memory, wherein the at least one memory stores computer program instructions, and when the electronic device is running, the at least one processor performs the functions described in the embodiments of the present application. For example, the electronic device can be a master device, which can be used to exchange I / O signals with different expansion devices based on the connection methods shown in Figures 4-6 to achieve unified management of the corresponding expansion devices or achieve functional business expansion.

[0111] Based on the above embodiments, the present application further provides a computer program product comprising instructions, which, when executed on a computer, causes the computer to perform the functions described in the embodiments of the present application. For example, when the computer program product is executed on a master device, the master device may perform functions such as unified management of each expansion device, service expansion, and service conflict analysis.

[0112] Based on the above embodiments, the present application further provides a computer-readable storage medium having instructions stored therein that, when executed on a computer, cause the computer to perform the functions described in the embodiments of the present application. For example, the computer-readable storage medium may contain instructions that, when executed on a master device, cause the master device to perform unified management functions for each expansion device, service expansion functions, service conflict analysis functions, and the like.

[0113] Based on the above embodiments, the present application further provides a chip for reading computer programs stored in a memory to implement the various functions described in the embodiments of the present application. For example, the chip of the master device can be used to read attribute information from the EEPROM of an expansion device to implement unified management functions, service expansion functions, service conflict analysis functions, etc. for the expansion device.

[0114] Based on the above embodiments, the present application provides a chip system, which includes a processor for supporting a computer device to implement the various functions described in the embodiments of the present application. In one possible design, the chip system also includes a memory for storing the necessary programs and data for the computer device. The chip system can be composed of a chip or can include a chip and other discrete devices.

[0115] The above are only specific embodiments of the present application, but the scope of protection of this application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of this application. Therefore, the scope of protection of this application should be based on the scope of protection of the claims.

Claims

1. A communication system, characterized in that: The system comprises a main device and a plurality of expansion devices cascaded with the main device, wherein the plurality of expansion devices include a first expansion device and a second expansion device, wherein: The master device includes a first physical interface, the first physical interface is an input / output interface of a plurality of buses, the plurality of buses include a plurality of buses of the same type, and the plurality of buses of the same type include a first bus and a second bus; In the first expansion device, the first bus is a bus used by the first expansion device, the second bus is a bus not used by the first expansion device, and the second bus penetrates the first expansion device in a manner of cross-connection of bus pins.

2. The communication system according to claim 1, wherein: The first extension device is connected to the second extension device via a third extension device. In the third extension device, the second bus penetrates the third extension device in a manner of cross-connection of bus pins.

3. The communication system according to claim 1 or 2, characterized in that The multiple buses of the same type are management buses, the first bus is a first management bus, and the second bus is a second management bus.

4. The communication system according to claim 3, wherein: The master device obtains attribute information of the first expansion device through the first management bus, and the master device obtains attribute information of the second expansion device through the second management bus.

5. The communication system according to claim 4, wherein: The master device obtains attribute information of the first expansion device through the first management bus, including: The master device obtains the attribute information of the first extension device from an electrically erasable programmable read-only memory (EEPROM) chip of the first extension device through the first management bus.

6. The communication system according to claim 4 or 5, characterized in that The attribute information includes at least one of the following: service bus information; service driver loading information; extended service interface information; manufacturer information, and identification information of an extended device.

7. The communication system according to any one of claims 3 to 6, characterized in that: The management bus includes at least one of the following buses: an I2C bus; a presence signal bus.

8. The communication system according to any one of claims 1 to 7, characterized in that: The multiple buses also include a first service bus and a second service bus. In the first expansion device, for the first service bus used by itself, the connection between the first service bus and other expansion devices is interrupted; for the second service bus not used by itself, the second service bus penetrates the first expansion device in a manner of parallel connection of bus pins.

9. The communication system according to any one of claims 1 to 8, characterized in that: The multiple buses include one or more of the following service buses: an SPI bus; a PCIe bus; a SATA bus; or an Ethernet bus.

10. The communication system according to any one of claims 1 to 9, characterized in that: If there is a service conflict between the multiple extension devices, the main device is further configured to: An instruction is given to remove a conflicting extension device from the plurality of extension devices.

11. The communication system according to claim 10, wherein: The multiple extension devices have service conflicts, including: The sum of the number of buses of the same type in the plurality of buses is less than the number of buses of the same type required by the plurality of expansion devices.

12. The communication system according to any one of claims 1 to 11, characterized in that: The main device is a box-type device.

13. The communication system according to any one of claims 1 to 12, characterized in that: The plurality of expansion devices include any one of the following: Network modules or box devices with Power over Ethernet (POE) function; Hardware components or box devices with artificial intelligence (AI) computing capabilities; Ethernet-based electrical port module or box-type device.

14. A communication device, characterized in that: comprising a physical interface, the physical interface being an input / output interface of a plurality of buses, the plurality of buses comprising a plurality of buses of the same type, the plurality of buses of the same type comprising a first bus and a second bus; In the communication device, the first bus is a bus used by the communication device, the second bus is a bus not used by the communication device, and the second bus penetrates the communication device in a manner of cross-connection of bus pins.

15. The communication device according to claim 14, wherein: The multiple buses of the same type are management buses, the first bus is a first management bus, and the second bus is a second management bus. The communication device according to claim 15 , wherein: The communication device includes an electrically erasable programmable read-only memory (EEPROM) chip, the EEPROM chip stores attribute information of the communication device, and the communication device provides the attribute information to the host device through the first management bus.

17. The communication device according to claim 16, wherein: The attribute information includes at least one of the following: service bus information; service driver loading information; extended service interface information; manufacturer information, and identification information of an extended device.

18. The communication device according to any one of claims 15 to 17, characterized in that: The management bus includes at least one of the following buses: an I2C bus; a presence signal bus.

19. The communication device according to any one of claims 14 to 17, characterized in that: The multiple buses also include a first service bus and a second service bus. In the communication device, for the first service bus used by itself, the connection between the first service bus and other expansion devices is interrupted; for the second service bus not used by itself, the second service bus penetrates the communication device in a manner of parallel connection of bus pins.

20. The communication device according to any one of claims 14 to 19, characterized in that: The multiple buses include one or more of the following service buses: an SPI bus; a PCIe bus; a SATA bus; or an Ethernet bus.

21. The communication device according to any one of claims 14 to 20, characterized in that: The communication device includes any one of the following: Network modules or box devices with Power over Ethernet (POE) function; Hardware components or box devices with artificial intelligence (AI) computing capabilities; Ethernet-based electrical port module or box-type device.

Citation Information

Patent Citations

  • PCIe-based storage extension system and method

    CN103543961A

  • MCU peripheral access system and access method

    CN112882975A

  • FPGA (Field Programmable Gate Array) chip, unvarnished transmission method, logic test module and logic test method

    CN116414765A

  • Server and configuration method

    CN117687954A

  • Extension boards and method of extending boards

    US6416333B1