Semiconductor device and method for producing semiconductor device

Abstract

The purpose of the present invention is to provide a technology that enables prioritization of the bondability between a semiconductor element and a metal lead electrode and the management of said bonding over the bondability between an insulating substrate and a metal lead electrode and the management of said bonding. A semiconductor device according to the present invention comprises: an insulating substrate provided with a circuit pattern on an insulating layer; a semiconductor element bonded to the circuit pattern by using a first bonding member; and a metal lead electrode including a first portion bonded to the circuit pattern by using a second bonding member and a second portion bonded to the semiconductor element by using a third bonding member, wherein the melting point of the third bonding member is higher than the melting point of the second bonding member.

Description

Semiconductor device and manufacturing method thereof

[0001] The present disclosure relates to a semiconductor device and a method for manufacturing the semiconductor device.

[0002] Various technologies have been proposed for semiconductor devices. For example, Patent Document 1 proposes a semiconductor device configuration in which a portion of a metal lead electrode is joined to a semiconductor element with high-temperature solder, another portion of the metal lead electrode is joined to a wiring board with low-temperature solder, and the semiconductor element is joined to the wiring board via a heat sink.

[0003] In the manufacturing process of such a semiconductor device, when the low-temperature solder and the high-temperature solder are heated to melt and then cooled, the difference in melting points between the low-temperature solder and the high-temperature solder allows the high-temperature solder to solidify before the low-temperature solder solidifies, thereby satisfying the general specification requirement that the bondability and management of the bond between the semiconductor element and the metal lead electrodes should take priority over the bondability and management of the bond between the wiring substrate and the metal lead electrodes.

[0004] Japanese Patent Application Laid-Open No. 2001-110957

[0005] However, in the configuration of Patent Document 1, when the solder melts, the heat sink bonded to the semiconductor element also rises in temperature, and the heat storage due to the large heat capacity of the heat sink prevails over the heat dissipation of the heat sink. As a result, during the subsequent cooling, the temperature of the high-temperature solder close to the heat sink where the heat has accumulated is prevented from decreasing, and the low-temperature solder may solidify before the high-temperature solder solidifies.

[0006] In such cases, the distance between the semiconductor element and the metal lead electrodes increases due to the warping behavior of the wiring board until the temperature of the high-temperature solder drops to the solidification point, resulting in an insufficient bonding area between the semiconductor element and the metal lead electrodes, making it impossible to meet the requirements of the general specifications described above.

[0007] Therefore, the present disclosure has been made in consideration of the above-mentioned problems, and aims to provide a technology that enables the priority to be given to the bondability and management of the bond between a semiconductor element and a metal lead electrode over the bondability and management of the bond between an insulating substrate and a metal lead electrode.

[0008] The semiconductor device according to the present disclosure comprises an insulating substrate having a circuit pattern provided on an insulating layer, a semiconductor element bonded to the circuit pattern by a first bonding member, and a metal lead electrode including a first portion bonded to the circuit pattern by a second bonding member and a second portion bonded to the semiconductor element by a third bonding member, wherein the melting point of the third bonding member is higher than the melting point of the second bonding member.

[0009] According to the present disclosure, the semiconductor element is bonded to the circuit pattern by the first bonding member, and the melting point of the third bonding member is higher than the melting point of the second bonding member. With this configuration, it is possible to prioritize the bondability and management of the bond between the semiconductor element and the metal lead electrodes over the bondability and management of the bond between the insulating substrate and the metal lead electrodes.

[0010] The objects, features, aspects and advantages of the present disclosure will become more apparent from the following detailed description and the accompanying drawings.

[0011] It is a schematic cross-sectional view showing the configuration of a semiconductor device according to a first embodiment. It is a schematic cross-sectional view showing a manufacturing method of a semiconductor device according to a first embodiment. It is a schematic cross-sectional view showing the configuration of a semiconductor device according to a second embodiment. It is a schematic cross-sectional view showing the configuration of a semiconductor device according to a third embodiment.

[0012] Hereinafter, embodiments will be described with reference to the accompanying drawings. Features described in each of the following embodiments are exemplary, and not all features are necessarily required. In addition, in the following description, similar components in multiple embodiments are denoted by the same or similar reference numerals, and different components will be mainly described. In addition, in the following description, specific positions and directions such as "upper," "lower," "left," "right," "front," or "back" may not necessarily correspond to positions and directions in actual implementation.

[0013] 1 is a schematic cross-sectional view showing the configuration of a semiconductor device according to Embodiment 1. The semiconductor device in Fig. 1 includes an insulating substrate 1, a bonding member 2 serving as a first bonding member, a low-melting-point bonding member 3 serving as a second bonding member, a semiconductor element 4, a high-melting-point bonding member 5 serving as a third bonding member, individual metal lead electrodes 6, external terminals 7a and 7b, wires 8a and 8b, and a sealing resin 9.

[0014] The insulating substrate 1 includes an insulating layer 1a, a circuit pattern 1b provided on the upper surface of the insulating layer 1a, and a circuit pattern 1c provided on the lower surface of the insulating layer 1a. The insulating layer 1a is made of ceramic with excellent thermal conductivity, such as aluminum nitride or silicon nitride, or resin. The circuit patterns 1b and 1c are circuit wiring and are made of, for example, copper or an aluminum alloy.

[0015] The bonding member 2 is provided on the circuit pattern 1b. In the first embodiment, the bonding member 2 is, for example, a solder material containing tin (Sn) as a main component and various metal elements added thereto.

[0016] The low melting point joining member 3 is provided on a circuit pattern 1b different from the circuit pattern 1b on which the joining member 2 is provided. The low melting point joining member 3 is, for example, a solder material mainly made of tin to which various metal elements are added.

[0017] The semiconductor element 4 is bonded onto a circuit pattern 1b provided on the insulating layer 1a by a bonding member 2. In other words, no heat sink is provided between the semiconductor element 4 and the circuit pattern 1b.

[0018] The semiconductor element 4 may be made of ordinary silicon (Si), or may be made of a wide bandgap semiconductor such as silicon carbide (SiC), gallium nitride (GaN), diamond, etc., which has a wider bandgap than ordinary silicon. When the semiconductor element 4 is made of a wide bandgap semiconductor, stable operation under high temperatures and high voltages and faster switching speeds are possible.

[0019] The semiconductor element 4 includes at least one of a MOSFET (Metal Oxide Semiconductor Field Effect Transistor), an IGBT (Insulated Gate Bipolar Transistor), an RC-IGBT (Reverse Conducting-IGBT), an SBD (Schottky Barrier Diode), and a PND (PN junction diode). Note that in this specification, for example, "at least one of A, B, C, ..., and Z" means any one of all combinations of one or more types extracted from the group A, B, C, ..., and Z.

[0020] The high melting point bonding member 5 is provided on the semiconductor element 4. The high melting point bonding member 5 may be, for example, a solder material containing tin as the main component and various metal elements added thereto, or may be a sintered material made into a paste form of silver or copper, which has excellent conductivity.

[0021] In addition, as long as the melting point of the high melting point joining member 5 is higher than that of the low melting point joining member 3, the materials of the low melting point joining member 3 and the high melting point joining member 5 are not limited to those described above. In addition, in the first embodiment, the melting point of the joining member 2 may be unrelated to the melting points of the high melting point joining member 5 and the low melting point joining member 3.

[0022] The metal lead electrode 6 is mainly made of a copper material or the like having excellent conductivity. The metal lead electrode 6 includes a thick portion 6a, which is a first portion, and a thin portion 6b, which is a second portion thinner than the thick portion 6a. The thick portion 6a is joined to the circuit pattern 1b by a low-melting-point bonding material 3. The thin portion 6b is joined to the semiconductor element 4 by a high-melting-point bonding material 5. A through hole (not shown) extending in the vertical direction in FIG. 1 may be provided in the thin portion 6b of the metal lead electrode 6 facing the semiconductor element 4. The high-melting-point bonding material 5 may be filled in the through hole and spread over the metal lead electrode 6 over an area larger than the through hole.

[0023] To connect the semiconductor element 4 to a signal circuit that controls the semiconductor element 4, a wire 8a is connected between a portion of the semiconductor element 4 and the external terminal 7a, and a wire 8b is connected between a portion of the circuit pattern 1b and the external terminal 7b, respectively. Ultrasonic bonding is used, for example, to connect the wires 8a and 8b. The wires 8a and 8b are made of a material with excellent thermal and electrical conductivity, such as aluminum, copper, silver, or gold.

[0024] Although not shown, the circuit pattern 1c on the underside of the insulating layer 1a may be joined to a heat dissipation base plate (not shown) using a bonding material such as solder, or may be connected to a cooling fin or the like using thermal grease or the like. The sealing resin 9 seals the above components while leaving the heat dissipation surface (the underside of the circuit pattern 1c) exposed. The sealing resin 9 is made of, for example, epoxy resin or silicone gel. However, the material of the sealing resin 9 is not limited to the above, as long as it meets the desired physical properties such as elastic modulus, heat resistance, adhesiveness, and linear expansion coefficient.

[0025] <Manufacturing Method> Next, a method for manufacturing the semiconductor device according to the first preferred embodiment will be described.

[0026] <Step S1 (Mounting Process)> As shown in FIG. 2 , a semiconductor element 4 is mounted on a circuit pattern 1b via a bonding member 2. Then, a thick portion 6a of a metal lead electrode 6 is mounted on the circuit pattern 1b via a low-melting-point bonding member 3, and a thin portion 6b of the metal lead electrode 6 is mounted on the semiconductor element 4 via a high-melting-point bonding member 5. The bonding member 2, the low-melting-point bonding member 3, and the high-melting-point bonding member 5 may be, for example, a sheet solder or solder paste. When a sheet solder is used, a positioning jig made of carbon or the like having an opening for positioning the semiconductor element 4 may be mounted on the insulating substrate 1, followed by the mounting of the sheet solder (the bonding member 2, the low-melting-point bonding member 3, and the high-melting-point bonding member 5) and the mounting of the semiconductor element 4. When a viscous material such as solder paste is used, the bonding member 2, the low-melting-point bonding member 3, and the high-melting-point bonding member 5 may be applied using screen printing, dispensing, or the like.

[0027] <Step S2 (Bonding Process)> The bonding members 2, the low melting point bonding members 3, and the high melting point bonding members 5 are melted by heating them to a temperature higher than their melting points. For example, a reflow furnace or the like may be used for heating, but is not limited to this.

[0028] The circuit pattern 1c on the underside of the insulating substrate 1 is then cooled. The cooling method during the bonding process may involve spraying a low-temperature fluid, such as air or nitrogen, onto the circuit pattern 1c, or a contact cooling method in which a low-temperature cooling plate is brought into contact with the circuit pattern 1c. This solidifies the bonding material 2, the low-melting-point bonding material 3, and the high-melting-point bonding material 5, bonding the circuit pattern 1b to the semiconductor element 4, the circuit pattern 1b to the thick portion 6a, and the semiconductor element 4 to the thin portion 6b. In this embodiment, the melting point of the high-melting-point bonding material 5 is sufficiently higher than that of the low-melting-point bonding material 3. Therefore, although the high-melting-point bonding material 5 is farther from the cooled portion than the low-melting-point bonding material 3, it solidifies before the low-melting-point bonding material 3 solidifies.

[0029] <Step S3 (Wire Connection Process)> In order to connect the semiconductor element 4 to the signal circuit that controls the semiconductor element 4, a wire 8a and a wire 8b are used to connect a portion of the semiconductor element 4 to the external terminal 7a, and a portion of the circuit pattern 1b to the external terminal 7b, respectively.

[0030] <Step S4 (Sealing Process)> The structure obtained in step S3 is generally sealed with sealing resin 9. Although not shown, sealing resin 9 may be formed by pressurizing molten resin in a mold to form a resin mold, or by placing a pre-formed resin case on insulating substrate 1 and then pouring the molten resin directly into the resin case. The molten resin is hardened by heat treatment in a curing oven or the like to form sealing resin 9, thereby completing the semiconductor device. Note that, if necessary, molding such as bending the terminals or processing of sealing resin 9 may be performed, not shown. Furthermore, if necessary, the completed semiconductor device may be inspected for electrical characteristics, etc.

[0031] Summary of First Embodiment In a semiconductor device configured as described above, in general, to ensure heat dissipation, the area of ​​the circuit pattern 1c on the lower surface of the insulating substrate 1 is often made much larger than the area of ​​the circuit pattern 1b on the upper surface on which the semiconductor element 4 is mounted. For this reason, during the heating step and cooling step in the bonding process, the insulating substrate 1 warps back due to the difference in the amount of thermal expansion between the circuit patterns 1b and 1c.

[0032] In the prior art, a heat sink (not shown) is bonded between the semiconductor element 4 and the circuit pattern 1b. This heat sink is heated during the solder melting process, and the heat storage due to the large heat capacity of the heat sink prevails over the heat dissipation of the heat sink. Therefore, during subsequent cooling, the temperature of the high-melting-point bonding member 5, which is close to the heat sink and stores the stored heat, is hindered, and the low-melting-point bonding member 3 may solidify before the high-melting-point bonding member 5 solidifies. As a result, there is a problem that the general specification requirement that the bonding quality and management of the bonding between the semiconductor element 4 and the metal lead electrodes 6 should take priority over the bonding quality and management of the bonding between the insulating substrate 1 and the metal lead electrodes 6 cannot be met.

[0033] In contrast to this, in the present embodiment 1, the semiconductor element 4 is bonded onto the circuit pattern 1b by the bonding member 2. In other words, no heat sink is bonded between the semiconductor element 4 and the circuit pattern 1b. The melting point of the high melting point bonding member 5 between the semiconductor element 4 and the metal lead electrode 6 is higher than the melting point of the low melting point bonding member 3 between the circuit pattern 1b and the metal lead electrode 6.

[0034] Therefore, in the cooling step of the bonding process, the high melting point bonding member 5 can be solidified before the low melting point bonding member 3 is solidified, thereby suppressing a shortage of bonding area between the semiconductor element 4 and the metal lead electrode 6 due to warpage of the insulating substrate 1. As a result, the bonding property and management of the bonding between the semiconductor element 4 and the metal lead electrode 6 can be prioritized over the bonding property and management of the bonding between the insulating substrate 1 and the metal lead electrode 6.

[0035] 3 is a schematic cross-sectional view showing the configuration of a semiconductor device according to a second embodiment. While the joining members 2 according to the first embodiment include a solder material, the joining members 2 according to the second embodiment include a sintered material. The sintered material of the joining members 2 is, for example, a sintered material in which minute silver or copper particles are kneaded into a paste-like state with a viscous material having thixotropy. Other configurations of the second embodiment are the same as those of the first embodiment.

[0036] According to this configuration, the high melting point joining member 5 can be solidified before the low melting point joining member 3, as in the first embodiment, so that general specification requirements can be met. In addition, in the second embodiment, the joining member 2 contains a sintered material that generally has a lower thermal resistance than a solder material, so that a semiconductor device with a longer life than the first embodiment can be provided.

[0037] 4 is a schematic cross-sectional view showing the configuration of a semiconductor device according to a third embodiment. In the third embodiment, the melting point of the joining member 2 is the same as the melting point of the high-melting-point joining member 5. The melting point of the joining member 2 being the same as the melting point of the high-melting-point joining member 5 includes the melting point of the joining member 2 being the same as the melting point of the high-melting-point joining member 5 and the melting point of the joining member 2 being substantially the same as the melting point of the high-melting-point joining member 5. To achieve this, for example, the material of the joining member 2 may be the same as the material of the high-melting-point joining member 5. Other configurations of the third embodiment are the same as those of the first embodiment.

[0038] According to this configuration, as in the first embodiment, the high-melting-point joining member 5 can be solidified before the low-melting-point joining member 3, so that general specification requirements can be met. In addition, in the third embodiment, the melting point of the joining member 2 is the same as that of the high-melting-point joining member 5. Therefore, in the cooling step during the joining process, the joining member 2 and the high-melting-point joining member 5 can be solidified before the low-melting-point joining member 3 is solidified. As a result, it is possible to suppress a shortage of the joining area between the semiconductor element 4 and the metal lead electrode 6 due to the warpage behavior of the insulating substrate 1, as well as a shortage of the joining area between the semiconductor element 4 and the circuit pattern 1b due to the warpage behavior of the insulating substrate 1.

[0039] It should be noted that the embodiments and modifications may be freely combined, and the embodiments and modifications may be modified or omitted as appropriate.

[0040] The above description is illustrative in all respects and is not restrictive. It is understood that countless variations not illustrated can be envisioned.

[0041] REFERENCE SIGNS LIST 1 insulating substrate, 1a insulating layer, 1b circuit pattern, 2 bonding member, 3 low melting point bonding member, 4 semiconductor element, 5 high melting point bonding member, 6 metal lead electrode, 6a thick portion, 6b thin portion

Claims

1. A semiconductor device comprising: an insulating substrate having a circuit pattern formed on an insulating layer; a semiconductor element bonded to the circuit pattern by a first bonding member; and a metal lead electrode including a first portion bonded to the circuit pattern by a second bonding member and a second portion bonded to the semiconductor element by a third bonding member, wherein the melting point of the third bonding member is higher than the melting point of the second bonding member.

2. A semiconductor device according to claim 1, wherein the first joining member includes a solder material or a sintered material.

3. A semiconductor device according to claim 1 or 2, wherein the melting point of the first bonding member is the same as the melting point of the third bonding member.

4. A method for manufacturing a semiconductor device as set forth in any one of claims 1 to 3, comprising the steps of: mounting the semiconductor element on the circuit pattern via the first bonding member; mounting the first portion of the metal lead electrode on the circuit pattern via the second bonding member; and mounting the second portion of the metal lead electrode on the semiconductor element via the third bonding member; melting the first bonding member, the second bonding member, and the third bonding member; and cooling the underside of the insulating substrate to solidify the third bonding member before solidifying the second bonding member.

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