Method for manufacturing semiconductor device, semiconductor device, substrate processing device, and program

By forming a uniform insulating film layer on the substrate and semiconductor chip surfaces before underfilling, the issue of void formation is addressed, resulting in improved semiconductor device strength, heat dissipation, and electrical performance.

WO2025203358A1PCT designated stage Publication Date: 2025-10-02KOKUSAI DENKI KK
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Patent Information

Application Number
PCT/JP2024/012386
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-03-27
Publication Date
2025-10-02

AI Technical Summary

Technical Problem

Voids occur during the manufacturing process of semiconductor devices when underfill material is filled between a substrate and a semiconductor chip due to differences in wettability caused by multiple surface components, especially as the pitch becomes finer.

Method used

Forming a liner film with a uniform insulating film layer on the surfaces of the substrate and semiconductor chip before embedding the underfill material, ensuring a consistent material for the underfill to adhere to, thereby preventing void formation.

Benefits of technology

Suppresses the occurrence of voids, enhances the strength and heat dissipation of the semiconductor device, and improves electrical characteristics by maintaining consistent wettability and reducing electrical resistance.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention provides a technology with which it is possible to suppress the generation of voids at the time of filling an underfill material into a space between a substrate and a semiconductor chip. The present invention comprises: a step for forming a liner film, which has at least one insulating film, on at least a first surface of a substrate, a second surface of the semiconductor chip, and surfaces of microbumps, the substrate and the semiconductor chip being bonded to each other by means of the microbumps that are formed on the first surface, which is the bonding surface side to be bonded to the semiconductor chip, and on the second surface, which is the bonding surface side to be bonded to the substrate; and a step for forming an underfill film on the liner film that is positioned between the substrate and the semiconductor chip bonded to each other by means of the microbumps.
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Description

Semiconductor device manufacturing method, semiconductor device, substrate processing apparatus, and program

[0001] The present disclosure relates to a semiconductor device manufacturing method, a semiconductor device, a substrate processing apparatus, and a program.

[0002] 2. Description of the Related Art One step in the manufacturing process of a semiconductor device is to supply a processing gas to a substrate in a processing chamber to form a film on the substrate (see, for example, Patent Document 1).

[0003] International Publication No. 2022 / 064586

[0004] Voids may occur during one step in the manufacturing process of a semiconductor device, in which an underfill material is filled between a substrate and a semiconductor chip.

[0005] The present disclosure provides a technique that can suppress the occurrence of voids when an underfill material is embedded between a substrate and a semiconductor chip.

[0006] According to one aspect of the present disclosure, there is provided a technology comprising: a step of forming a liner film having at least one insulating film layer on at least the first surface, the second surface and the surface of the microbumps of a substrate and a semiconductor chip joined by microbumps formed on a first surface of the substrate on the joining surface side with the semiconductor chip and a second surface of the semiconductor chip on the joining surface side with the substrate; and a step of forming an underfill film on the liner film between the substrate and the semiconductor chip joined by the microbumps.

[0007] According to the present disclosure, it is possible to suppress the occurrence of voids when filling an underfill material between a substrate and a semiconductor chip.

[0008] FIGS. 1A to 1C are conceptual diagrams illustrating a step in a manufacturing process of a semiconductor device according to an embodiment of the present disclosure. FIG. 2 is a schematic diagram illustrating a substrate processing apparatus used in a liner film formation process according to an embodiment of the present disclosure. FIG. 3 is a block diagram illustrating a control configuration of a substrate processing apparatus used in a liner film formation process according to an embodiment of the present disclosure. FIG. 4 is a flowchart illustrating an example of a liner film formation process according to an embodiment of the present disclosure. FIGS. 5A and 5B are conceptual diagrams illustrating a step in a manufacturing process of a semiconductor device according to a second embodiment of the present disclosure. FIGS. 6A and 6B are conceptual diagrams illustrating a step in a manufacturing process of a semiconductor device according to a third embodiment of the present disclosure. FIGS. 7A to 7C are conceptual diagrams illustrating a step in a manufacturing process of a semiconductor device according to a fifth embodiment of the present disclosure.

[0009] One embodiment of the present disclosure will be described below, mainly with reference to FIGS. 1 to 7 . The drawings used in the following description are all schematic, and the dimensional relationships, ratios, etc. of the elements shown in the drawings do not necessarily correspond to the actual ones. Furthermore, the dimensional relationships, ratios, etc. of the elements between the multiple drawings do not necessarily correspond to the actual ones. Furthermore, substantially identical elements between multiple drawings are denoted by the same reference numerals, and each element is described in the drawing in which it first appears, and its description is omitted in subsequent drawings unless otherwise necessary. Furthermore, the present disclosure is not limited to the following embodiments, and can be implemented with appropriate modifications within the scope of the present disclosure.

[0010] (1) Semiconductor device manufacturing process

[0011] First, one step in the manufacturing process of a semiconductor device 101 according to one aspect of the present disclosure will be described in detail with reference to FIGS.

[0012] (Liner Film Formation Process, Step S1) As shown in FIG. 1A, the substrate 10 and the semiconductor chip 12 are bonded by microbumps 14 formed on the surface of the substrate 10 (hereinafter also referred to as the first surface) on which the semiconductor chip 12 is bonded, and the surface of the semiconductor chip 12 (hereinafter also referred to as the second surface) on which the semiconductor chip 12 is bonded to the substrate 10. At least one insulating film 16 is conformally formed as a liner film on at least the first and second surfaces of the substrate 10 and the surface of the microbumps 14, as shown in FIG. 1B. Although not shown, the surfaces of the substrate 10 and the semiconductor chip 12 each have multiple types of films, such as insulating films and metal films, formed thereon, and further have elements and the like installed thereon, resulting in different surface materials. The microbumps 14 are, for example, tin (Sn)-containing alloys, silver (Ag)-containing alloys, AgSn alloys, etc. Here, the surface of the substrate 10 on which the semiconductor chip 12 is bonded is also referred to as the first surface. The first surface includes at least the surface of the substrate, but is not limited to this, and may include at least any surface of multiple types of films and elements, such as insulating films and metal films, that exist on the surface of the substrate. The surface of the semiconductor chip 12 that is bonded to the substrate 10 is also called the second surface. The second surface includes at least the surface of the semiconductor chip 12, but is not limited to this, and may include at least any surface of multiple types of films and elements, such as insulating films and metal films, that exist on the surface of the semiconductor chip 12.

[0013] Specifically, for example, using a substrate processing apparatus 100 described below, an insulating film 16 is formed by ALD (Atomic Layer Deposition) or CVD (Chemical Vapor Deposition) on at least the first and second surfaces of the substrate 1 and semiconductor chip 12 bonded by the microbumps 14 and on the surfaces of the microbumps 14 by a substrate processing process described below. The thickness of the insulating film 16 formed in this process is 50 nm or less. The insulating film 16 formed in this process is a film that can be formed on an insulating film, a metal film, or the like on at least the surfaces of the substrate 10 and the semiconductor chip 12. At this time, the insulating film 16 is formed on at least the first surface of the substrate 10 on the bonding surface side with the semiconductor chip 12 and the second surface of the semiconductor chip 12 on the bonding surface side with the substrate 10, which are exposed surfaces to be filled with an underfill material.

[0014] 1C, an underfill material is embedded in the insulating film 16 between the substrate 10 and the semiconductor chip 12, which are joined by the microbumps 14, to form an underfill film 18 (also referred to as filling with an underfill film). The underfill material is, for example, a resin. For example, an epoxy resin is used as the resin.

[0015] As a result of the above, a semiconductor device 101 is formed in which an underfill film 18 is formed on a liner film having an insulating film 16 on the first surface, second surface and surface of the microbumps 14 between the substrate 10 and the semiconductor chip 12 joined by the microbumps 14.

[0016] Here, when an underfill material is embedded between the substrate 10 and the semiconductor chip 12 while they are bonded with the microbumps 14, voids resulting in poor embedding may occur. This is because the presence of multiple components on the first surface of the substrate 10, the second surface of the semiconductor chip 12, and the surface of the microbumps 14, i.e., the exposed surface where the underfill material is embedded, creates differences in the wettability of the underfill material. This becomes more pronounced as the pitch between the substrate 10 and the semiconductor chip 12 where the underfill material is embedded becomes finer. In the present disclosure, before embedding the underfill material, an insulating film 16 is formed as a liner film on the exposed surface where the underfill material is embedded. This ensures that only one type of material, the insulating film 16, is exposed on the surface where the underfill material is embedded, thereby preventing differences in wettability between the surfaces of the substrate 10, the semiconductor chip 12, and the microbumps 14 and suppressing the occurrence of voids when embedding the underfill material. As a result, the strength, heat dissipation, etc. of the semiconductor device 101 can be increased, and an increase in electrical resistance can be suppressed, thereby improving the durability, electrical characteristics, etc. of the semiconductor device 101.

[0017] In addition, before the liner film formation process of step S1 described above, a process may be performed in which the semiconductor chip 12 is bonded to the substrate 10 using microbumps 14 formed on each of the first surface of the substrate 10 on the bonding side with the semiconductor chip 12 and the second surface of the semiconductor chip 12 on the bonding side with the substrate.

[0018] (2) Configuration of Substrate Processing Apparatus Fig. 2 is a configuration diagram showing an example of a substrate processing apparatus 100 used in the liner film formation process of step S1 described above. Note that the substrate processing apparatus 100 processes the substrate 10 to which the semiconductor chip 12 is bonded by the microbumps 14, as shown in Fig. 1(A) described above. Therefore, in the following, the substrate 10 means the substrate 10 to which the semiconductor chip 12 is bonded by the microbumps 14.

[0019] The substrate processing apparatus 100 includes a container 202. Within the container 202, there are formed a processing space 205 in which the substrate 10 is processed, and a transfer space 206 through which the substrate 10 passes when being transferred to the processing space 205. The container 202 is composed of an upper container 202a and a lower container 202b. A partition plate 208 is provided between the upper container 202a and the lower container 202b. The structure that constitutes the processing space 205 is called a processing chamber 201.

[0020] A substrate loading / unloading port 148 adjacent to a gate valve 149 is provided on the side of the lower vessel 202b, and the substrate 10 is transferred to and from a transfer chamber (not shown) via the substrate loading / unloading port 148. A plurality of lift pins 207 are provided on the bottom of the lower vessel 202b. Furthermore, the lower vessel 202b is grounded.

[0021] A substrate support part 210 that supports the substrate 10 is disposed in the processing space 205. The substrate support part 210 mainly includes a substrate mounting surface 211 on which the substrate 10 is placed, a substrate mounting table 212 having the substrate mounting surface 211 on its surface, and a heater 213 as a heating part provided within the substrate mounting table 212. The substrate mounting table 212 is provided with through holes 214, through which the lift pins 207 pass, at positions corresponding to the lift pins 207.

[0022] The substrate mounting table 212 is supported by a shaft 217. The shaft 217 passes through the bottom of the container 202 and is connected to an elevating mechanism 218 outside the container 202.

[0023] The substrate mounting table 212 is configured to be able to raise and lower the substrate 10 mounted on the substrate mounting surface 211 by operating the lifting mechanism 218 to raise and lower the shaft 217 and the substrate mounting table 212. The lower end of the shaft 217 is surrounded by a bellows 219, which keeps the processing space 205 airtight.

[0024] When transporting the substrate 10, the substrate mounting table 212 is lowered to a position where the substrate mounting surface 211 faces the substrate loading / unloading port 148, and when processing the substrate 10, it is raised until the substrate 10 is at a processing position within the processing space 205, as shown in Figure 2.

[0025] A shower head 230 serving as a gas dispersion mechanism is provided above (upstream of) the processing space 205. A through-hole 231a is provided in a lid 231 of the shower head 230. The through-hole 231a communicates with a common gas supply pipe 242 (described later). A buffer chamber 232a having a buffer space 232 therein is provided within the shower head 230. Gas is supplied to the processing space 205 via the buffer space 232.

[0026] A current plate 270 is provided in the buffer space 232. The current plate 270 has a conical shape that widens in diameter from the gas inlet 241 toward the radial direction of the substrate 10. The lower end of the current plate 270 is configured to be located closer to the outer periphery than the edge of the substrate 10. The current plate 270 is configured to efficiently move the supplied gas in the direction of the dispersion plate 234, which will be described later.

[0027] The upper vessel 202a has a flange, and a support block 233 is placed on and fixed to the flange. A dispersion plate 234 having a plurality of gas supply holes is placed on and fixed to the support block 233. Furthermore, the lid 231 is fixed to the top surface of the support block 233.

[0028] Next, a description will be given of the gas supply system 240 serving as a gas supply unit. A first gas supply pipe 243a, a second gas supply pipe 244a, a third gas supply pipe 245a, and a fourth gas supply pipe 248a are connected to a common gas supply pipe 242.

[0029] The first gas supply pipe 243a is provided with, in order from the upstream direction, a first gas source 243b, a mass flow controller (MFC) 243c which is a flow rate controller (flow rate control part), and a valve 243d which is an on-off valve.

[0030] The first gas source 243b is a supply source of a source gas, which is one of process gases.

[0031] The first gas supply system 243 (also referred to as a source gas supply system or a silicon-containing gas supply system) mainly includes the first gas supply pipe 243a, the MFC 243c, and the valve 243d. The first gas supply system 243 may include a first gas source 243b.

[0032] The second gas supply pipe 244a is provided with a second gas source 244b, an MFC 244c, and a valve 244d in this order from the upstream direction.

[0033] The second gas source 244b supplies a reactive gas that reacts with the source gas. The reactive gas is one of the process gases.

[0034] The second gas supply pipe 244a, the MFC 244c, and the valve 244d mainly constitute a second gas supply system 244 (also referred to as a reactive gas supply system, an oxidizing gas supply system, or an oxygen-containing gas supply system). The second gas supply system 244 may also include a second gas source 244b.

[0035] The third gas supply pipe 245a is provided with a third gas source 245b, an MFC 245c, and a valve 245d in this order from the upstream direction.

[0036] The third gas source 245b is a supply source of a reducing gas, which is one of the process gases.

[0037] The third gas supply pipe 245a, the MFC 245c, and the valve 245d mainly constitute a third gas supply system 245 (also referred to as a reducing gas supply system). The third gas supply system 245 may include a third gas source 245b.

[0038] The fourth gas supply pipe 248a is provided with a fourth gas source 248b, an MFC 248c, and a valve 248d, in this order from the upstream direction.

[0039] The fourth gas source 248b is a source of inert gas.

[0040] The fourth gas supply pipe 248a, the MFC 248c, and the valve 248d mainly constitute a fourth gas supply system 248 (also referred to as an inert gas supply system). The fourth gas supply system 248 may include a fourth gas source 248b.

[0041] The inert gas supplied from the fourth gas source 248b acts as a purge gas for purging gas remaining in the vessel 202 and the shower head 230 in the substrate processing step.

[0042] The processing space 205 is connected to an exhaust pipe 262 via an exhaust buffer structure 261. The exhaust buffer structure 261 is provided circumferentially so as to surround the outer periphery of the substrate 10. In this embodiment, it is disposed between the partition plate 208 and the upper chamber 202a.

[0043] The exhaust pipe 262 is connected to the upper chamber 202a above the exhaust buffer structure 261 so as to communicate with the processing space 205 via the exhaust buffer structure 261. An APC (Auto Pressure Controller) 266, which is a pressure controller that controls the pressure inside the processing space 205 to a predetermined level, is provided in the exhaust pipe 262. The APC 266 has a valve element (not shown) whose opening is adjustable, and adjusts the conductance of the exhaust pipe 262 in response to an instruction from a controller 400 (described later).

[0044] A valve 267 is provided on the exhaust pipe 262 upstream of the APC 266. Furthermore, a vacuum pump 269 is provided downstream of the exhaust pipe 262. The vacuum pump 269 exhausts the atmosphere in the processing space 205 through the exhaust pipe 262. The exhaust pipe 262, the valve 267, and the APC 266 are collectively referred to as an exhaust system. The exhaust system may include the vacuum pump 269.

[0045] (3) Control Configuration Next, the controller 400 serving as a control section (control means) for controlling the operation of each section of the substrate processing apparatus 100 will be described.

[0046] 3 shows an outline of the controller 400. The controller 400 is configured as a computer including a CPU (Central Processing Unit) 401, a RAM (Random Access Memory) 402, a storage device 403 as a storage unit, and an I / O port 404. The RAM 402, the storage device 403, and the I / O port 404 are configured to be able to exchange data with the CPU 401 via an internal bus 405.

[0047] The controller 400 is configured so that an input / output device 281 configured as, for example, a keyboard, and an external storage device 282 can be connected thereto.

[0048] The display device 284 displays data detected by each monitor unit. In this embodiment, the display device 284 is described as a separate component from the input / output device 281, but this is not limiting. For example, if the input / output device also functions as a display screen such as a touch panel, the input / output device 281 and the display device 284 may be combined into a single component.

[0049] The storage device 403 is composed of, for example, a flash memory, an HDD (Hard Disk Drive), etc. Process recipes, which describe procedures and conditions for substrate processing (described later), as well as recipe programs and tables serving as control programs for controlling the operation of the substrate processing apparatus to implement the process recipes, are readably stored in the storage device 403. The recipe programs are combinations of procedures in the substrate processing steps (described later) that are executed by the controller 400 to obtain predetermined results, and function as a program. Hereinafter, the recipe programs, control programs, etc. are collectively referred to simply as programs. In this specification, the term "program" may refer to a process recipe alone, a control program alone, or both. The RAM 402 is configured as a memory area (work area) in which programs, data, etc. read by the CPU 401 are temporarily stored.

[0050] The I / O port 404 is connected to each component of the substrate processing apparatus 100, such as the gate valve 149, the lifting mechanism 218, the APC 266, the vacuum pump 269, the MFCs 243c, 244c, 245c, and 248c, the valves 243d, 244d, 245d, 248d, and 267, and the heater 213.

[0051] The CPU 401 is configured to read and execute a control program from the storage device 403, and also to read a recipe program from the storage device 403 in response to input of an operation command from the input / output device 281. The CPU 401 is configured to be able to control the opening and closing operation of the gate valve 149, the lifting and lowering operation of the lifting mechanism 218, the opening and closing operation of the APC 266, the on / off control of the vacuum pump 269, the flow rate adjustment operation of the MFCs 243c, 244c, 245c, and 248c, the opening and closing operation of the valves 243d, 244d, 245d, 248d, and 267, the temperature control of the heater 213, and the like, in accordance with the contents of the read recipe program.

[0052] The controller 400 according to this embodiment can be configured by installing the program into a computer using an external storage device 282 (e.g., a magnetic disk such as a hard disk, an optical disk such as a DVD, a magneto-optical disk such as an MO, or a semiconductor memory such as a USB memory) storing the program. The means for supplying the program to the computer is not limited to supplying the program via the external storage device 282. For example, the program may be supplied via a communication means such as the Internet or a dedicated line, without going through the external storage device 282. The storage device 403 and the external storage device 282 are configured as computer-readable recording media on which the program is recorded. Hereinafter, these are collectively referred to as recording media. In this specification, the term "recording medium" may refer to the storage device 403 alone, the external storage device 282 alone, or both.

[0053] (4) Substrate Processing Step Next, as one step in the semiconductor manufacturing process, the step of forming the insulating film 16 in the liner film forming step of step S1 using the substrate processing apparatus 100 described above will be described in detail with reference to FIG. 4. In the following description, the operation of each component of the substrate processing apparatus 100 is controlled by a controller 400. In the following description, the substrate 10 also refers to the substrate 10 to which the semiconductor chip 12 is bonded by the microbumps 14.

[0054] In this specification, the term "substrate" may mean "the substrate itself" or "a laminate (assembly) of the substrate and a predetermined layer, film, etc. formed on its surface" (i.e., the substrate may include the predetermined layer, film, etc. formed on the surface). In addition, in this specification, the term "surface of the substrate" may mean "the surface (exposed surface) of the substrate itself" or "the surface of the predetermined layer, film, etc. formed on the substrate, i.e., the outermost surface of the substrate as a laminate."

[0055] Therefore, in this specification, when it is stated that "a predetermined gas is supplied to a substrate," it may mean that "a predetermined gas is supplied directly to the surface (exposed surface) of the substrate itself," or that "a predetermined gas is supplied to a layer, film, etc. formed on the substrate, i.e., to the outermost surface of the substrate as a laminate." Furthermore, in this specification, when it is stated that "a predetermined layer (or film) is formed on a substrate," it may mean that "a predetermined layer (or film) is formed directly on the surface (exposed surface) of the substrate itself," or that "a predetermined layer (or film) is formed on a layer, film, etc. formed on the substrate, i.e., on the outermost surface of the substrate as a laminate."

[0056] In this specification, the use of the word "wafer" is the same as the use of the word "substrate," and in that case, the "substrate" in the above explanation can be replaced with "wafer."

[0057] (Substrate Loading and Placing Process) The substrate mounting table 212 is lowered to the transfer position, whereby the lift pins 207 are inserted into the through-holes 214 of the substrate mounting table 212. As a result, the lift pins 207 protrude a predetermined height from the surface of the substrate mounting table 212. Next, the gate valve 149 is opened, and the substrate 10 is loaded into the processing chamber using the substrate transfer machine, and the substrate 10 is transferred onto the lift pins 207. As a result, the substrate 10 is supported in a horizontal position on the lift pins 207 protruding from the surface of the substrate mounting table 212.

[0058] After the substrate 10 is carried into the container 202, the substrate transfer machine is retracted to the outside of the container 202, and the gate valve 149 is closed to seal the inside of the container 202. Thereafter, the substrate placement table 212 is raised, and the substrate 10 is placed on the substrate placement surface 211 provided on the substrate placement table 212.

[0059] When the substrate 10 is loaded into the container 202, it is preferable to supply an inert gas from the fourth gas supply system 248 into the container 202 while evacuating the container 202 using an exhaust system. That is, it is preferable to operate the vacuum pump 269, open the APC 266 to evacuate the container 202, and then open at least the valve 248d of the fourth gas supply system 248 to supply the inert gas into the container 202. Furthermore, the vacuum pump 269 is kept in operation at all times from at least the substrate loading / mounting step until the substrate unloading step described below is completed.

[0060] (Film Forming Step, S10) [Source Gas Supply, S101] When the substrate mounting table 212 is moved to the substrate processing position, the atmosphere is exhausted from the processing chamber 201 via the exhaust pipe 262, and the pressure inside the processing chamber 201 is adjusted.

[0061] While adjusting the pressure to a predetermined value, when the temperature of the substrate 10 reaches a predetermined temperature, for example, 200° C. or less, the valve 243 d is opened, and the supply of the source gas into the processing space 205 is started via the common gas supply pipe 242 and the shower head 230. At this time, the MFC 243 c is adjusted so that the flow rate of the source gas becomes a predetermined flow rate. At this time, the atmosphere is exhausted via the exhaust pipe 262. The supplied source gas forms a first layer on the surface of the substrate 10. After a predetermined time has elapsed since the start of the supply of the source gas, the valve 243 d is closed, and the supply of the source gas is stopped.

[0062] Next, the valve 248 d is opened to supply an inert gas into the processing space 205 via the common gas supply pipe 242 and the shower head 230 , thereby purging the processing space 205 .

[0063] Here, the source gas is, for example, a Si-containing gas containing silicon (Si). Specifically, the Si-containing gas is, for example, tetraethoxysilane (Si(OC 2H 5 ) 4 TEOS) gas, monosilane (SiH 4 ) gas, dichlorosilane (SiH 2 Cl 2 :DCS) gas, hexachlorodisilane (Si 2 Cl 6 As the Si-containing gas, one or more of these gases can be used.

[0064] For example, a Si-containing gas is supplied to the substrate 10 , whereby a Si-containing layer is formed as a first layer on the surface of the substrate 10 , that is, on at least the first surface, the second surface, and the surfaces of the microbumps 14 .

[0065] In addition, the inert gas may be, for example, nitrogen (N 2 Inert gases that can be used include rare gases such as argon (Ar) gas, helium (He) gas, neon (Ne) gas, and xenon (Xe) gas. One or more of these gases can be used as the inert gas. This also applies to the steps described below.

[0066] [Reactive Gas Supply, S102] Next, the valve 244d is opened to start supplying the reactive gas into the processing space 205 via the common gas supply pipe 242 and the shower head 230. At this time, the MFC 244c is adjusted so that the flow rate of the reactive gas becomes a predetermined flow rate. The supplied reactive gas reacts with the first layer on the substrate 10, and a second layer is formed on the substrate 10.

[0067] After the second layer is formed on the substrate 10, the valve 244d is closed to stop the supply of the reaction gas into the processing chamber.

[0068] Next, the valve 248 d is opened to supply an inert gas into the processing space 205 via the common gas supply pipe 242 and the shower head 230 , thereby purging the processing space 205 .

[0069] Here, the reactive gas is, for example, an O-containing gas (also called an oxidizing gas) containing oxygen (O). 2 ) gas, ozone (O 3 ) Gas, O 2Gas + Hydrogen (H 2 ) gas, water vapor (H 2 O gas), hydrogen peroxide (H 2 O 2 ) gas, nitrous oxide (N 2 O) gas, nitric oxide (NO) gas, nitrogen dioxide (NO 2 ) gas, carbon monoxide (CO) gas, carbon dioxide (CO 2 ) gas, etc. As the O-containing gas, one or more of these may be used.

[0070] For example, an O-containing gas is supplied to the substrate 10, whereby the Si-containing layer on the substrate 10 is oxidized, and a silicon oxide layer (SiO layer) is formed on the substrate 10. That is, the SiO layer is formed on the surfaces of the substrate 10, the semiconductor chip 12, and the microbumps 14.

[0071] [Performance Predetermined Number of Times] By performing the cycle of steps S101 and S102 described above a predetermined number of times (n times, where n is an integer of 1 or 2 or more), a liner film, such as a silicon oxide film (SiO film), having an insulating film 16 of a desired thickness is formed on the surface of the substrate 10, i.e., at least on the first surface, the second surface, and the surfaces of the microbumps 14. The thickness of the insulating film 16 formed in this process is, for example, 50 nm or less.

[0072] In the above-described film formation process in step S10, an SiO film is formed as the insulating film 16. However, the present invention is not limited to this. A nitrogen (N)-containing gas (also called nitriding gas) supply system may be further provided to form the insulating film 16 such as a silicon oxynitride film (SiON film).

[0073] In addition, in the film formation process of step S10 described above, an example has been given in which the source gas and the reactive gas are cyclically supplied, but the source gas and the reactive gas may be supplied simultaneously, or the insulating film 16 may be formed by supplying the source gas without using the reactive gas.

[0074] (Reduction step, S11) Next, the valve 245d is opened to start supplying a reducing gas into the processing space 205 via the common gas supply pipe 242 and the shower head 230. At this time, the MFC 245c is adjusted so that the flow rate of the reducing gas becomes a predetermined flow rate. At this time, the atmosphere is exhausted via the exhaust pipe 262. The supplied reducing gas exposes the substrate 10 on which the insulating film 16 is formed to the reducing atmosphere. After a predetermined time has elapsed since the start of the supply of the reducing gas, the valve 245d is closed to stop the supply of the reducing gas.

[0075] Next, the valve 248 d is opened to supply an inert gas into the processing space 205 via the common gas supply pipe 242 and the shower head 230 , thereby purging the processing space 205 .

[0076] Here, the reducing gas is, for example, a H-containing gas containing hydrogen (H). 2 ) gas, etc. are used.

[0077] (Performed a Predetermined Number of Times, S12) The cycle of steps S10 and S11 is performed a predetermined number of times (m times, where m is an integer of 1 or 2 or more), at least once. This makes it possible to form the insulating film 16 as a liner film on at least the first and second surfaces of the substrate 10 and semiconductor chip 12 joined by the microbumps 14 and on the surfaces of the microbumps 14, while suppressing oxidation of the microbumps 14.

[0078] As described above, an insulating film 16 is formed as a liner film on at least the first surface, the second surface and the surface of the microbumps 14 of the substrate 10 and the semiconductor chip 12 joined by the microbumps 14 by the ALD method or the CVD method.

[0079] (Substrate Unloading Process) The substrate mounting table 212 is lowered, and the substrate 10 is supported on the lift pins 207 protruding from the surface of the substrate mounting table 212. Thereafter, the gate valve 149 is opened, and the substrate 10 is unloaded from the container 202 using the substrate transfer machine.

[0080] (5) Other Aspects Next, a detailed description will be given of other aspects of the manufacturing process of the above-described semiconductor device 101. In the following aspects, only the points that are different from the above-described aspects will be described in detail.

[0081] 5A and 5B are diagrams showing the manufacturing process of the semiconductor device 102 in the second embodiment. In the second embodiment, the insulating film 16 is formed in step S1 described above, and then the following steps are performed. The following description will focus on the differences, and the same configuration as the above embodiment will be omitted.

[0082] 5A, a metal film 21 is formed on at least the first and second surfaces of the substrate 10 and semiconductor chip 12 bonded together by the microbumps 14, and on the insulating film 16 formed on the surfaces of the microbumps 14. The metal film 21 is formed, for example, by providing a metal-containing source gas supply system containing a metal element in the substrate processing apparatus 100 described above and supplying a metal-containing source gas. That is, the insulating film 16 and the metal film 21 are conformally formed in this order as a liner film. At this time, the metal film 21 is formed on at least the first surface, which is the surface of the substrate 10 that is bonded to the semiconductor chip 12, the second surface, which is the surface of the semiconductor chip 12 that is bonded to the substrate 10, and the exposed surfaces of the microbumps 14 that are to be filled with an underfill material.

[0083] (Underfill film formation process, S22) Next, as shown in FIG. 5(B), an underfill material is embedded on the metal film 21 between the substrate 10 and the semiconductor chip 12 joined by the microbumps 14 to form an underfill film 18.

[0084] As a result of the above, a semiconductor device 102 is formed in which an underfill film 18 is formed on a liner film having an insulating film 16 and a metal film 21 between the substrate 10 and the semiconductor chip 12 joined by the microbumps 14.

[0085] This embodiment also provides the same effects as the above-described embodiment. That is, because the exposed surface for embedding the underfill material is only one type, the metal film 21, it is possible to prevent differences in surface wettability when embedding the underfill material, thereby suppressing the occurrence of voids. Furthermore, in this embodiment, by forming the metal film 21 with high thermal emissivity on the insulating film 16 on the surfaces of the substrate 10 and the semiconductor chip 12, between the insulating film 16 and the underfill film 18, heat accumulation during operation of the semiconductor device 102 is suppressed, enabling high-voltage operation and improving operating speed.

[0086] 6A and 6B are diagrams showing a manufacturing process of the semiconductor device 103 according to a third embodiment. In the third embodiment, after the insulating film 16 is formed in step S1 described above, the following steps are performed.

[0087] (Organic Group-Containing Insulating Film Forming Step, S31) As shown in FIG. 6A , an organic group-containing insulating film 26 containing an alkyl group is formed on the insulating film 16 formed on at least the first and second surfaces and the surfaces of the microbumps 14 of the substrate 10 and semiconductor chip 12 bonded together by the microbumps 14. The organic group-containing insulating film 26 is formed, for example, by providing the above-described substrate processing apparatus 100 with an organic group-containing source gas supply system containing an organic group-containing source material containing an alkyl group and supplying an organic group-containing source gas. That is, the insulating film 16 and the organic group-containing insulating film 26 are conformally formed in this order as liner films. That is, the film in contact with the uppermost underfill film 18 of the liner film is the organic group-containing insulating film 26. At this time, the organic group-containing insulating film 26 is formed on at least the surface of the substrate 10 that is bonded to the semiconductor chip 12, the surface of the semiconductor chip 12 that is bonded to the substrate 10, and the exposed surfaces of the microbumps 14 where the underfill material will be embedded.

[0088] (Underfill film formation process, S32) Next, as shown in FIG. 6(B), an underfill material is embedded on the organic group-containing insulating film 26 between the substrate 10 and the semiconductor chip 12 joined by the microbumps 14 to form an underfill film 18.

[0089] As a result of the above, a semiconductor device 103 is formed in which an underfill film 18 is formed on a liner film having an insulating film 16 and an organic group-containing insulating film 26 between the substrate 10 and the semiconductor chip 12 joined by microbumps 14.

[0090] This embodiment also provides the same effects as the above-described embodiment. That is, because the exposed surface into which the underfill material is embedded is only one type, the organic group-containing insulating film 26, it is possible to prevent differences in surface wettability when the underfill material is embedded, and it is possible to suppress the occurrence of voids. Furthermore, in this embodiment, by further forming the organic group-containing insulating film 26, which has high water repellency and high wettability, on the exposed surface into which the underfill material is embedded, it is possible to further suppress the occurrence of voids when the underfill material is embedded.

[0091] [Fourth Aspect] The metal film forming step S21 in the second aspect described above is performed between the step of forming the insulating film 16 in step S1 in the third aspect described above and the step of forming the organic group-containing insulating film 26 in step S31. That is, the insulating film 16, the metal film 21, and the organic group-containing insulating film 26 are conformally formed in this order as the liner film. That is, the film in contact with the underfill film 18, which is the uppermost layer of the liner film, is the organic group-containing insulating film 26.

[0092] As a result of the above, a semiconductor device 104 is formed in which an underfill film 18 is formed on a liner film having an insulating film 16, a metal film 21, and an organic group-containing insulating film 26 between a substrate 10 and a semiconductor chip 12 joined by microbumps 14.

[0093] This embodiment also provides the same effects as the above-described embodiment. That is, because the exposed surface on which the underfill material is embedded is only one type, the organic group-containing insulating film 26, differences in surface wettability can be prevented when the underfill material is embedded, thereby suppressing the occurrence of voids. Furthermore, in this embodiment, by forming the organic group-containing insulating film 26, which has high water repellency and high wettability, on the exposed surface on which the underfill material is embedded, the occurrence of voids when the underfill material is embedded can be further suppressed. Furthermore, by providing the metal film 21 between the insulating film 16 and the organic group-containing insulating film 26, heat accumulation during operation of the semiconductor device 104 is suppressed, enabling high-voltage operation and improving operating speed.

[0094] [Fifth Aspect] FIGS. 7A to 7C are diagrams showing the manufacturing process of a semiconductor device 105 according to a fifth aspect.

[0095] (Insulating film forming step, S51) As shown in Fig. 7(A), on at least the first and second surfaces of the substrate 10 and semiconductor chip 12 bonded by the microbumps 14, a film including an insulating film 36 as a bottom layer that inhibits deposition on the microbumps 14 is formed as a liner film as shown in Fig. 7(B). The thickness of the insulating film 36 formed in this step is, for example, 50 nm or less. In other words, the insulating film 36 is not formed on the surface of the microbumps 14, but is selectively formed at least on the first surface of the substrate 10 on the bonding side with the semiconductor chip 12 and the second surface of the semiconductor chip 12 on the bonding side with the substrate 10.

[0096] (Underfill film formation process, S52) Next, as shown in FIG. 7(C), an underfill material is embedded on the insulating film 36 between the substrate 10 and the semiconductor chip 12 joined by the microbumps 14 to form an underfill film 18.

[0097] As a result of the above, a semiconductor device 105 is formed in which the underfill film 18 is formed on the liner film having the insulating film 36 between the substrate 10 and the semiconductor chip 12 joined by the microbumps 14 .

[0098] This embodiment also achieves the same effects as the above-described embodiment. That is, because the exposed surface for filling with the underfill material is only the insulating film 36, differences in surface wettability can be prevented when filling with the underfill material, thereby suppressing the occurrence of voids. Furthermore, this embodiment also provides a larger space for filling with the underfill material, making filling easier, compared to when filling with the underfill material on a conformally formed insulating film 16. In this embodiment, the insulating film 36 is selectively formed on the surface of the substrate 10 that is bonded to the semiconductor chip 12 and the surface of the semiconductor chip 12 that is bonded to the substrate 10. This results in a lower aspect ratio of the space to be filled with the underfill material compared to when the insulating film 16 is conformally formed between the substrate 10 and the semiconductor chip 12.

[0099] As described above, the underfill film 18 is formed on a liner film having at least one layer of insulating film 16 (or insulating film 36) between the substrate 10 and semiconductor chip 12 joined by the microbumps 14. Because the exposed surface under which the underfill material is embedded is a single type of film, differences in the wettability of the underfill material between materials can be prevented, and the occurrence of voids when embedding the underfill material can be suppressed. Furthermore, by forming the liner film in multiple layers, it is possible to combine film types that are excellent in adhesion to the substrate 10, semiconductor chip 12, or microbumps 14, pressure resistance, and wettability of the underfill material.

[0100] [Other Aspects] Although each aspect has been specifically described above, the present invention is not limited to the above-described aspects, and various modifications are possible without departing from the spirit of the present invention.

[0101] That is, in each of the above-described embodiments, an example has been described in which a liner film having at least one insulating film is formed, but the present disclosure is not particularly limited to the type of film or the combination of film types.

[0102] In the above-described embodiment, an example of film processing using a single-wafer substrate processing apparatus that processes one or several substrates at a time has been described. The present disclosure is not limited to the above-described embodiment and can be suitably applied, for example, to film processing using a batch-type substrate processing apparatus that processes several substrates at a time. In the above-described embodiment, an example of film processing using a substrate processing apparatus having a cold-wall processing furnace has been described. The present disclosure is not limited to the above-described embodiment and can be suitably applied to film processing using a substrate processing apparatus having a hot-wall processing furnace.

[0103] When using these substrate processing apparatuses, each process can be performed using the same process procedures and conditions as in the above-mentioned and other embodiments, and the same effects as in the above-mentioned and other embodiments can be obtained.

[0104] Furthermore, it is preferable that recipes used for each process are individually prepared according to the process content and stored in the storage device 403 via an electric communication line or the external storage device 282. Then, when starting each process, it is preferable that the CPU 401 appropriately selects an appropriate recipe according to the process content from among the multiple recipes stored in the storage device 403. This makes it possible to reproducibly form films of various film types, composition ratios, film qualities, and film thicknesses using a single substrate processing apparatus. It also reduces the burden on the operator, and enables each process to be started quickly while avoiding operational errors.

[0105] The above-mentioned recipes do not necessarily have to be newly created, but may be prepared by modifying an existing recipe already installed in the substrate processing apparatus. When modifying a recipe, the modified recipe may be installed in the substrate processing apparatus via an electric communication line or a recording medium on which the modified recipe is recorded. Alternatively, an existing recipe already installed in the substrate processing apparatus may be directly modified by operating the input / output device 281 provided in the existing substrate processing apparatus.

[0106] The above-described embodiments can be used in combination as appropriate. The processing procedures and processing conditions in this case can be the same as those of the above-described embodiments, for example.

[0107] 10 Substrate 12 Semiconductor chip 14 Microbumps 16, 36 Insulating film 101, 102, 103, 104, 105 Semiconductor device

Claims

1. A method for manufacturing a semiconductor device, comprising the steps of: forming a liner film having at least one insulating film layer on at least the first surface, the second surface, and the surface of the microbumps of a substrate and a semiconductor chip joined together by microbumps formed on a first surface of the substrate that faces the semiconductor chip and a second surface of the semiconductor chip that faces the substrate; and forming an underfill film on the liner film between the substrate and the semiconductor chip that are joined together by the microbumps.

2. The method for manufacturing a semiconductor device according to claim 1, wherein said at least one insulating film layer is formed by ALD or CVD.

3. The method for manufacturing a semiconductor device according to claim 1, wherein said liner film includes a metal film formed on said at least one insulating film.

4. The method for manufacturing a semiconductor device according to claim 1, wherein said liner film includes an insulating film that inhibits deposition on said microbumps.

5. The method for manufacturing a semiconductor device according to claim 1, wherein the liner film that contacts the underfill film is an organic group-containing insulating film.

6. The method for manufacturing a semiconductor device according to claim 5, wherein said organic group-containing insulating film contains an alkyl group.

7. The method for manufacturing a semiconductor device according to claim 1, wherein the liner film is formed by performing the steps of: forming the insulating film; and exposing the insulating film to a reducing atmosphere at least once.

8. A semiconductor device in which an underfill film is formed on a liner film having at least one insulating film layer formed on the first surface, the second surface, and the surface of the microbumps between the substrate and the semiconductor chip, which are joined by microbumps formed on each of the first surface of the substrate that is joined to the semiconductor chip and the second surface of the semiconductor chip that is joined to the substrate.

9. A substrate processing apparatus for a process of bonding a semiconductor chip to a substrate by microbumps formed on a first surface of the substrate on the bonding side with the semiconductor chip and on a second surface of the semiconductor chip on the bonding side with the substrate; a process of forming a liner film having at least one insulating film layer by supplying a raw material gas to the first surface, the second surface, and the surfaces of the microbumps; and a process of forming an underfill film on the liner film between the substrate and the semiconductor chip bonded by the microbumps, the substrate processing apparatus comprising: a substrate support unit that supports the substrate to which the semiconductor chip is bonded by the microbumps formed on the first surface and the second surface; a gas supply unit that supplies a raw material gas to the substrate support unit; and a control unit that can control the gas supply unit to form at least one insulating film layer on the first surface, the second surface, and the surfaces of the microbumps.

10. The substrate processing apparatus according to claim 9, wherein the gas supply unit further has a supply system for supplying a metal-containing source gas, and the control unit controls so that, after the at least one insulating film has been formed, a process for forming a metal film can be performed by supplying the metal-containing source gas.

11. The substrate processing apparatus according to claim 9, wherein the control unit is capable of controlling the gas supply unit to execute a process of forming an insulating film in which the lowest layer of the at least one insulating film is prevented from depositing on the microbumps.

12. The substrate processing apparatus according to claim 9, wherein the gas supply unit further has a supply system for supplying an organic group-containing precursor gas, and the control unit is capable of controlling the gas supply unit to execute a process for forming the organic group-containing insulating film by supplying the organic group-containing precursor gas so that the film in contact with the underfill film among the at least one insulating film becomes an organic group-containing insulating film.

13. The substrate processing apparatus according to claim 9, wherein the gas supply unit further has a supply system that supplies a reducing gas, and the control unit is capable of controlling the gas supply unit to perform the process of forming the liner film by performing at least one or more of the process of forming the insulating film and the process of exposing the insulating film to a reducing atmosphere.

14. A program for causing a semiconductor device manufacturing device to execute, by a computer, the steps of: joining a semiconductor chip to a substrate using microbumps formed on a first surface of the substrate on the bonding side with the semiconductor chip and on a second surface of the semiconductor chip on the bonding side with the substrate; forming a liner film including at least one insulating film by supplying a raw material gas to the first surface, the second surface, and the surface of the microbumps; and forming an underfill film on the liner film, among the steps of forming the insulating film.

15. The program according to claim 14, which causes a semiconductor device manufacturing device to execute, by a computer, a procedure for forming the liner film including a metal film after forming at least one layer of the insulating film.

16. The program according to claim 14, which causes a semiconductor device manufacturing device to execute, by a computer, the steps of forming the liner film including an insulating film that inhibits deposition on the microbumps.

17. The program according to claim 14, which causes a semiconductor device manufacturing device to execute a procedure for forming the liner film by a computer so that the film in contact with the underfill film is an organic group-containing insulating film.

18. The program according to claim 14, which causes a semiconductor device manufacturing device to execute a procedure of forming the liner film by performing the procedure of forming the insulating film and the procedure of exposing the insulating film to a reducing atmosphere at least once.

Citation Information

Patent Citations

  • Electronic circuit device and electronic equipment

    JP2009158868A

  • Method of manufacturing semiconductor device

    JP2012004329A

  • Electronic device, and manufacturing method of electronic device

    JP2018160588A

  • Semiconductor device and manufacturing method therefor

    WO2011158468A1