Power semiconductor device and method for manufacturing power semiconductor device

Abstract

A semiconductor device (100, 100A, 100B, 100C, 100D, 100E) comprises: an insulating substrate (10); at least one semiconductor element (20); a printed circuit board (30); and a connecting material (41). The insulating substrate has a first surface and a first electrode (12) disposed on the first surface. Each of the at least one semiconductor element is disposed on the first electrode, and has a second surface as well as a second electrode (21) and a third electrode (22) that are disposed on the second surface. The third electrode has a potential differing from that of the second electrode. The printed circuit board has: a circuit that drives the at least one semiconductor element; an input pattern (36a) and an output pattern (36c) that are disposed inside the printed circuit board; an input terminal (37a) and an output terminal (37c) that protrude from the printed circuit board; a third surface that faces the first surface and the second surface; and a plurality of third electrodes (31) that are disposed on the third surface.

Description

Power semiconductor device and method of manufacturing the same

[0001] The present disclosure relates to a power semiconductor device and a method for manufacturing a power semiconductor device.

[0002] Japanese Patent Laid-Open Publication No. 2005-26524 (Patent Document 1) describes a semiconductor device. In the semiconductor device described in Patent Document 1, multiple semiconductor elements arranged on a first insulating substrate are connected to each other by a circuit pattern on a second insulating substrate. In the semiconductor device described in Patent Document 1, external connection terminals are connected to the circuit pattern on the first insulating substrate.

[0003] Furthermore, Japanese Patent Laid-Open Publication No. 2009-224534 (Patent Document 2) describes a semiconductor device. In the semiconductor device described in Patent Document 2, a control circuit board is disposed above a semiconductor element mounted on an insulating substrate. The control circuit board has a signal IC and a control circuit. In the semiconductor device described in Patent Document 2, anisotropic conductive rubber is used to connect the electrodes of the control circuit board and the semiconductor element.

[0004] JP 2005-26524 A JP 2009-224534 A

[0005] The semiconductor device described in Patent Document 1 has room for improvement in terms of its thickness. Furthermore, the semiconductor device described in Patent Document 1 requires a mechanism, bonding material, and bonding process for connecting the external connection terminals because the external connection terminals are connected to the circuit pattern of the first insulating substrate. In the semiconductor device described in Patent Document 2, the connection between the semiconductor element and the control circuit board is ensured by contact with the anisotropic conductive rubber, so electrical resistance is prone to fluctuate depending on the contact state. Furthermore, because the anisotropic conductive rubber lacks adhesive strength, it is necessary to sandwich the anisotropic conductive rubber between the insulating substrate and the control circuit board. In this case, to ensure conductivity of the anisotropic conductive rubber, it is necessary to apply force to correct any warping of the insulating substrate or the control circuit board, but such force can crack the insulating substrate or the control circuit board.

[0006] The present disclosure has been made in consideration of the above-mentioned problems of the conventional technology. More specifically, the present disclosure provides a semiconductor device that has excellent electrical connection reliability, can be miniaturized, and requires fewer manufacturing steps.

[0007] The semiconductor device according to the present disclosure includes an insulating substrate, at least one semiconductor element, a printed circuit board, and a connecting material. The insulating substrate has a first surface and a first electrode disposed on the first surface. Each of the at least one semiconductor element is disposed on the first electrode and has a second surface and a second electrode disposed on the second surface. The printed circuit board has a circuit for driving the at least one semiconductor element, input and output patterns disposed inside the printed circuit board, input and output terminals protruding from the printed circuit board, a third surface facing the first and second surfaces, and a plurality of third electrodes disposed on the third surface. The input pattern has a portion facing the output pattern. The connecting material connects the plurality of third electrodes to the first electrode and the second electrode.

[0008] According to the present disclosure, it is possible to obtain a semiconductor device that has excellent electrical connection reliability, can be miniaturized, and requires fewer manufacturing steps.

[0009] 1 is a plan view of the semiconductor device 100; a schematic cross-sectional view of the semiconductor device 100; an example showing how current flows in the semiconductor device 100; another example showing how current flows in the semiconductor device 100; a schematic first plan view of the insulating substrate 10; a schematic second plan view of the insulating substrate 10; an example of a power conversion device 200 using the semiconductor device 100; a manufacturing process diagram of the semiconductor device 100; a first cross-sectional view illustrating a printed circuit board connection step S3; a second cross-sectional view illustrating a printed circuit board connection step S3; a first explanatory view illustrating an external connection method of the semiconductor device 100; a second explanatory view illustrating an external connection method of the semiconductor device 100; a third explanatory view illustrating an external connection method of the semiconductor device 100; a fourth explanatory view illustrating an external connection method of the semiconductor device 100; a partial cross-sectional view of the semiconductor device 100 according to Modification 1; a first explanatory view of the printed circuit board connection step S3 in the semiconductor device 100 according to Modification 1; and a second explanatory view of the printed circuit board connection step S3 in the semiconductor device 100 according to Modification 1. 1 is a partial cross-sectional view of a semiconductor device 100 according to Modification 2. FIG. 2 is a partial cross-sectional view of a semiconductor device 100 according to Modification 3. FIG. 3 is a partial bottom view of a printed circuit board 30 used in the semiconductor device 100 according to Modification 3. FIG. 4 is a partial bottom view of a printed circuit board 30 used in the semiconductor device 100 according to Modification 3, in which the positions and number of holes 38 are changed. FIG. 5 is a partial cross-sectional view of a semiconductor device 100 according to Modification 4. FIG. 6 is a partial bottom view of a printed circuit board 30 used in the semiconductor device 100 according to Modification 5. FIG. 7 is a cross-sectional view of a semiconductor device 100A. FIG. 8 is a cross-sectional view of a semiconductor device 100A according to a modification. FIG. 9 is a cross-sectional view of a semiconductor device 100B. FIG. 10 is a first explanatory view showing a method of attaching a protrusion 43. FIG. 11 is a second explanatory view showing a method of attaching a protrusion 43. FIG. 11 is a cross-sectional view illustrating a printed circuit board connecting step S3 in a manufacturing method of the semiconductor device 100B. FIG. 12 is a cross-sectional view of a printed circuit board 30 used in the semiconductor device 100C. FIG. 13 is a cross-sectional view illustrating a printed circuit board connecting step S3 in a manufacturing method of the semiconductor device 100C. FIG. 14 is a manufacturing process diagram of the semiconductor device 100C. FIG. 15 is a plan view of an insulating substrate 10 used in the semiconductor device 100D. FIG. 16 is a cross-sectional view of the semiconductor device 100D. FIG. 10 is a plan view of an insulating substrate 10 used in a semiconductor device 100D according to a first modification.1 is a plan view of an insulating substrate 10 used in a semiconductor device 100D according to Modification 2. FIG. 2 is a schematic cross-sectional view of a semiconductor device 100E. FIG. 3 is a schematic first plan view of a semiconductor device 100E. FIG. 4 is a schematic second plan view of a semiconductor device 100E. FIG. 5 is a schematic plan view of a semiconductor device 100E1. FIG. 6 is a schematic plan view of a semiconductor device 100E2. FIG. 7 is a manufacturing process diagram of the semiconductor device 100E2.

[0010] The details of the embodiments of the present disclosure will be described with reference to the drawings. In the following drawings, the same or corresponding parts are designated by the same reference numerals, and redundant descriptions will not be repeated.

[0011] First Embodiment A power semiconductor device according to the first embodiment will be described. The power semiconductor device according to the first embodiment is designated as a semiconductor device 100.

[0012] FIG. 1 is a plan view of a semiconductor device 100. FIG. 2A is a schematic cross-sectional view of the semiconductor device 100. The left-right direction in FIG. 2A is the X direction, the direction perpendicular to the paper surface in FIG. 2A is the Y direction, and the up-down direction in FIG. 2A is the Z direction. FIG. 3A is a schematic first plan view of an insulating substrate 10. FIG. 3B is a schematic second plan view of the insulating substrate 10. As shown in FIGS. 1, 2A, 3A, and 3B, the semiconductor device 100 includes an insulating substrate 10, at least one semiconductor element 20, a printed circuit board 30, resin 40, a connecting material 41, and a sealing resin 50. In the illustrated example, the number of semiconductor elements 20 is four, but the number of semiconductor elements 20 is not limited thereto. The semiconductor device 100 is used in electronic devices such as inverters, converters, and servo amplifiers.

[0013] The insulating substrate 10 has a rectangular shape in plan view (when viewed along the Z direction). The longitudinal direction of the insulating substrate 10 in plan view is along the X direction.

[0014] The insulating substrate 10 is configured such that a front electrode 12 and a back electrode 13, which are pattern electrodes, are bonded to the upper and lower surfaces of an insulating layer 11. The insulating layer 11 is made of a material such as aluminum nitride (AlN), alumina (Al ２ O ３ ), silicon nitride (Si３ N ４ The insulating layer 11 may be an organic component layer whose main component is a resin such as polyimide or epoxy.

[0015] The surface electrode 12 is disposed on the upper surface of the insulating substrate 10. The surface electrode 12 includes an electrode 12a, an electrode 12b, and an electrode 12c. The electrodes 12a, 12b, and 12c are electrically insulated from one another. The back electrode 13 is disposed on the lower surface of the insulating substrate 10. The pattern electrodes (the surface electrode 12 and the back electrode 13) are made of a material such as copper (Cu), aluminum (Al), or nickel. The pattern electrodes may be formed of a single metal material or may be plated with gold (Au), silver (Ag), or the like.

[0016] The thickness of the insulating layer 11 and the pattern electrodes are designed taking into consideration the heat dissipation, insulation, and bonding reliability of the power module. The thickness of the insulating layer 11 is, for example, 0.001 mm or more and 3 mm or less. The thickness of the pattern electrodes is 0.001 mm or more and 5 mm or less. In this embodiment, aluminum nitride having a thickness of 0.05 mm is used as the insulating layer 11, and copper having a thickness of 0.1 mm is used as the pattern electrodes. However, it goes without saying that the effects of the semiconductor device 100 can be obtained even if the thickness of the insulating layer 11 and the pattern electrodes are different from those described above. The thickness of the front electrode 12 and the back electrode 13 may be the same or different. It is known that the insulating substrate 10 warps when a semiconductor element 20 is mounted on it. To address this warping, the thicknesses and electrode patterns of the front electrode 12 and the back electrode 13 may be different.

[0017] The type of the semiconductor element 20 is not particularly limited, but may be a metal oxide semiconductor field effect transistor (MOSFET), an insulated gate bipolar transistor (IGBT), a diode, or the like. The shape of the semiconductor element 20 in a plan view is, for example, a rectangle with a side length of, for example, 1 mm or more and 20 mm or less. The material of the semiconductor element 20 may be, for example, silicon (Si), silicon carbide (SiC), gallium nitride (GaN), diamond, or other so-called wide bandgap semiconductor materials having a wider bandgap than silicon. A semiconductor element 20 using a wide bandgap semiconductor material can achieve faster switching and lower on-resistance than a semiconductor element 20 using silicon. Because a semiconductor element 20 using a wide bandgap semiconductor material exhibits higher performance than a semiconductor element 20 using silicon, the size of the semiconductor element 20 can be made smaller than a semiconductor element 20 using silicon, and therefore the size of the semiconductor device 100 can also be made smaller.

[0018] The semiconductor element 20 has an electrode 21 and an electrode 22 on its upper surface. The electrode 21 is, for example, a source electrode. The electrode 22 is, for example, a gate electrode. A main circuit current flows through the electrode 21 (source electrode), while a weak signal current for driving the semiconductor element 20 flows through the electrode 22 (gate electrode). Therefore, the area of ​​the electrode 22 is smaller than the area of ​​the electrode 21. The size of the electrode 21 is, for example, 1 mm square or more and 10 mm square or less. The size of the electrode 22 is, for example, 0.1 mm square or more and 2 mm square or less. The electrodes 21 and 22 are at different potentials.

[0019] The semiconductor element 20 is disposed on the surface electrode 12 via a bonding material 23. This bonds the underside of the semiconductor element 20 to the surface electrode 12. The bonding material 23 may be any of a variety of materials, including solder primarily composed of tin (Sn), sintered metal materials primarily composed of gold, silver, and copper, intermetallic compounds made by alloying copper and tin, and conductive adhesives made by mixing particles of silver, nickel, or the like into resin. The bonding material 23 may be supplied in a variety of forms, including paste, sheet, and powder. It goes without saying that the effects of the semiconductor device 100 can be achieved regardless of the form in which the bonding material 23 is supplied. In this embodiment, a silicon carbide MOSFET serving as the semiconductor element 20 is bonded to the surface electrode 12 using 0.1 mm-thick solder as the bonding material 23. It goes without saying that the effects of the semiconductor device 100 can be achieved even when other types of semiconductor elements and bonding materials are used.

[0020] The semiconductor elements 20 arranged on the electrode 12a may be referred to as semiconductor elements 20A and 20C, and the semiconductor elements 20 arranged on the electrode 12b may be referred to as semiconductor elements 20B and 20D.

[0021] The printed circuit board 30 is disposed above the insulating substrate 10 and the semiconductor element 20. The printed circuit board 30 is, for example, a single-layer or multi-layer printed circuit board. The type of the printed circuit board 30 is, for example, a paper phenolic board, a paper epoxy board, a glass epoxy board, a ceramic board, a composite board, or the like. The printed circuit board 30 has a plurality of electrodes 31 on its underside. Of the plurality of electrodes 31, the one connected to electrode 12a or electrode 12b is referred to as electrode 31a. Of the plurality of electrodes 31, the one connected to electrode 21 is referred to as electrode 31b. Of the plurality of electrodes 31, the one connected to electrode 22 is referred to as electrode 31c. Of the plurality of electrodes 31, the one connected to electrode 12c is referred to as electrode 31d.

[0022] Electrodes 31a, 31b, and 31c are all provided on the printed circuit board 30 and therefore exist on the same plane. On the other hand, electrodes 21 and 22 on the semiconductor element 20 are located higher than electrodes 12a, 12b, and 12c on the insulating substrate 10 by an amount corresponding to the thickness of the bonding material 23 and the thickness of the semiconductor element 20. In other words, a gap T1 between electrode 31 (electrodes 31a, 31b, and 31c) and surface electrode 12 (electrodes 12a, 12b, and 12c) is larger than a gap T2 between electrode 31 (electrodes 31a, 31b, and 31c) and electrode 21 (electrode 22).

[0023] Since electrode 31 is an electrode formed on printed circuit board 30, it is easy to increase the size of electrode 31. On the other hand, it is difficult to increase the size of electrode 22 due to restrictions on the size of semiconductor element 20, restrictions on the surface potential pattern, and the like, and electrode 22 tends to be the smallest inside semiconductor device 100. Therefore, it is preferable that the area of ​​electrode 31b is larger than the area of ​​electrode 21, and the area of ​​electrode 31c is larger than the area of ​​electrode 22, so that the electrodes of printed circuit board 30 and the electrodes of semiconductor element 20 can be easily aligned.

[0024] The printed circuit board 30 has a plurality of lands on its top surface. A driving IC 32 and a control resistor 33 are connected to the lands with a bonding material 34. The bonding material 34 is, for example, solder, but may be other materials (e.g., sintered metal material, intermetallic compound, conductive adhesive, etc.). The driving IC 32 is preferably disposed vertically above the semiconductor element 20 in order to reduce wiring resistance. Even if the driving IC 32 is not disposed vertically above the semiconductor element 20, the wiring length in the semiconductor device 100 can be shorter than in a typical power module in which connections are made with aluminum wires.

[0025] The printed circuit board 30 includes a drive circuit 35. The drive circuit 35 is a circuit section for generating signals directly input to the semiconductor element 20. The drive circuit 35 includes a drive IC 32 and a control resistor 33. In addition to the drive IC 32 and the control resistor 33, the drive circuit 35 also includes peripheral elements, gate resistors, diodes, connectors, etc. The peripheral elements are capacitors and pull-up / pull-down resistors for stabilizing the power supply of the drive IC 32. The gate resistors and diodes are part of the main circuit and are arranged in close proximity to the semiconductor element 20 to characterize the on / off state of the gate of the semiconductor element 20. The connectors are electrical connections for supplying power and signals to the drive IC 32. The drive circuit 35 incorporates an insulating section, such as a pulse transformer or a photocoupler, for insulating the high-voltage system potential, which is the potential of the main circuit, from the low-voltage system potential, which is the potential of the control section for controlling the main circuit. Note that the drive IC 32 may also include an insulating section such as a photocoupler. The high-voltage system potential and the low-voltage system potential are insulated for safety. In this way, the drive circuit 35 is a circuit section that serves as an interface between two potentials, the high voltage system and the low voltage system.

[0026] The printed circuit board 30 may further include a control circuit and a power supply circuit. The control circuit is a circuit section that determines the signal to be sent to the drive IC 32 in response to signals from various sensors such as a current sensor, a voltage sensor, a temperature sensor, and a rotation sensor. The control circuit includes a microcontroller, peripheral elements of the microcontroller, a connector, etc. The connector serves as an electrical connection section with the drive circuit 35. The control circuit may include a protection circuit that shuts down the operation of the main circuit based on signals from the various sensors. The printed circuit board 30 may also include a communication IC or a peripheral circuit for the communication IC for communicating with the outside. The control circuit is a low-voltage system.

[0027] The power supply circuit is a circuit section for generating power for the driver IC 32, power for driving the gates of the semiconductor element 20, and power for the microcontroller. The power supply circuit includes a power supply IC and peripheral elements of the power supply IC. The number of power supply circuits may be one or more. Considering the functions of the electrical circuit, typical power modules often contain only semiconductor elements, while some power modules incorporate control circuits in addition to the semiconductor elements. On the other hand, power supply modules rarely include a power supply circuit. The semiconductor device 100 is configured to include not only the semiconductor element 20 but also a driver circuit 35 and a power supply for the driver circuit 35. More specifically, the semiconductor device 100 includes a driver IC 32, a PN snubber circuit, a protection circuit, and a current sensor circuit. Needless to say, the effects of the semiconductor device 100 can be achieved even when other components are incorporated into the power module or when only a few components are incorporated into the power module. For simplicity, FIG. 2A omits illustrations other than the driver IC 32 and control resistor 33.

[0028] The printed circuit board 30 has a wiring pattern for connecting the semiconductor element 20 connected to the electrodes 31 and the components mounted on the lands. The electrodes 31, lands, and wiring pattern are made of, for example, copper or a copper alloy. The electrodes 31 and lands may be plated with a noble metal such as tin, gold, or silver to improve bonding strength.

[0029] The printed circuit board 30 has an input / output pattern. The input / output pattern is arranged inside the printed circuit board 30. The input / output pattern has an input pattern 36a, an intermediate pattern 36b, and an output pattern 36c. The input pattern 36a is electrically connected to an electrode 31a connected to the electrode 12a. The intermediate pattern 36b is electrically connected to an electrode 31b connected to the electrode 21 of the semiconductor element 20A (semiconductor element 20C) and an electrode 31a connected to the electrode 12b. The output pattern 36c is electrically connected to an electrode 31b and an electrode 31c connected to the electrode 21 of the semiconductor element 20B (semiconductor element 20D).

[0030] The input pattern 36a and the output pattern 36c are arranged opposite each other within the printed circuit board 30. The intermediate pattern 36b may be arranged opposite the input pattern 36a and the output pattern 36c within the printed circuit board 30. That is, the input and output patterns overlap each other like parallel plates within the printed circuit board 30. It is sufficient that the input and output patterns overlap at least partially. Electrical insulation between the input and output patterns is ensured by the prepreg of the printed circuit board 30. In this embodiment, the thickness of the insulating layer between the input and output patterns is 0.35 mm. However, the thickness of the insulating layer is determined by the magnitude of the current and the insulating performance, and it goes without saying that other thicknesses may be used. The printed circuit board 30 allows for a high degree of freedom in pattern design, making pattern design easy. In this embodiment, the width of the input pattern 36a and the width of the output pattern 36c are equal to each other, and more than 80 percent of the area of ​​the input pattern 36a overlaps with the output pattern 36c in a planar view.

[0031] The input / output patterns are formed, for example, from copper or a copper alloy. The thickness of the input / output patterns is, for example, 105 μm or more. Currents of 100 A or more may flow through the input / output patterns. If the thickness of the input / output patterns is small when a large current flows, the amount of heat generated increases, which may exceed the glass transition temperature of the resin material used in the printed circuit board 30, thereby reducing connection reliability. In this embodiment, by setting the thickness of the input / output patterns to 500 μm, the amount of heat generated is reduced to less than one-tenth of that of a typical printed circuit board (approximately 35 μm thick). Note that a similar reduction in heat generation can also be achieved by stacking multiple thin input / output patterns. However, in this case, current distribution occurs, resulting in temperature differences between each layer. Therefore, considerations must be taken into account when using the pattern, such as the need to tightly connect each layer to suppress such current distribution.

[0032] The printed circuit board 30 has an input terminal 37a, an intermediate terminal 37b, an output terminal 37c, and a signal terminal 37d. The input terminal 37a is electrically connected to the input pattern 36a. The intermediate terminal 37b is electrically connected to the intermediate pattern 36b. The output terminal 37c is electrically connected to the output pattern 36c. The input terminal 37a, the intermediate terminal 37b, and the output terminal 37c are terminals through which a main current flows. The signal terminal 37d is a terminal through which a signal for driving the driver IC 32 is input from outside.

[0033] The input terminal 37a, the intermediate terminal 37b, the output terminal 37c, and the signal terminal 37d protrude from the resin portion 30a of the printed circuit board 30. The input terminal 37a, the intermediate terminal 37b, the output terminal 37c, and the signal terminal 37d are used for external connection of the semiconductor device 100. The input terminal 37a, the intermediate terminal 37b, the output terminal 37c, and the signal terminal 37d are formed, for example, by removing the resin portion 30a of the printed circuit board 30 after the printed circuit board 30 is fabricated. The input terminal 37a, the intermediate terminal 37b, the output terminal 37c, and the signal terminal 37d may be caused to protrude from the resin portion 30a of the printed circuit board 30 by mounting a copper plate on the upper or lower surface of the printed circuit board 30.

[0034] The drive circuit 35 has a primary side potential where the control circuit and the reference potential are at the same potential, and a secondary side potential that is insulated from the primary side potential and is considered to be at the same potential as the main circuit. The insulation between the primary side potential and the secondary side potential may be achieved by a transformer or a photocoupler, or may be achieved inside the drive IC 32. However, in applications where insulation between the primary side potential and the secondary side potential is not required, the primary side reference potential and the secondary side reference potential may be at the same potential.

[0035] The printed circuit board 30 may have at least one shield layer as an inner layer. The shield layer is a layer configured with a solid pattern whose entire surface is connected to the same potential except for areas that cannot be electrically connected, such as through holes, vias, and inlays that connect layers. The potential of the shield layer (solid pattern) is preferably the same as the primary side potential of the drive circuit 35, for example.

[0036] The resin 40 is disposed on the upper surface of the semiconductor element 20 and the surface electrodes 12. The upper surface of the resin 40 is in contact with the printed circuit board 30. The lower surface of the resin 40 is in contact with the upper surface (surface electrodes 12) of the insulating substrate 10 or the upper surface of the semiconductor element 20. A through hole extending along the Z direction is formed in the resin 40. A connecting material 41 is disposed in this through hole. From another perspective, the connecting material 41 is surrounded by the resin 40. The opening area of ​​this through hole may be constant regardless of its position in the Z direction. In other words, the shape of this through hole may be straight. A straight shape is the most common shape for this through hole. The straight shape of this through hole makes the resin 40 easy to process, and various types of materials can be used for the resin 40.

[0037] The connecting material 41 connects the electrode 31a to the electrode 12a or the electrode 12b, connects the electrode 31b to the electrode 21, connects the electrode 31c to the electrode 22, and connects the electrode 31d to the electrode 12c. In this embodiment, the connecting material 41 is a bonding material 42. As with the bonding material 23, various materials such as solder, a sinterable metal material, an intermetallic compound, or a conductive adhesive are used for the bonding material 42.

[0038] Electrode 31 is connected to electrode 21 and surface electrode 12 by connecting material 41. FIG. 2B is an example showing how current flows in semiconductor device 100. In an example where semiconductor device 100 operates as an upper arm, as shown in FIG. 2B, current supplied from input terminal 37a passes through input pattern 36a and flows to semiconductor elements 20A and 20C via electrode 31a, connecting material 41, and electrode 12a. The current flowing through semiconductor elements 20A and 20C then flows from intermediate pattern 36b to the outside of semiconductor device 100 via electrode 21, connecting material 41, and electrode 31b (see arrows in FIG. 2B). FIG. 2C is another example showing how current flows in semiconductor device 100. In one example in which semiconductor device 100 operates as a lower arm, for example, as shown in Fig. 2C , current flows from intermediate terminal 37b through electrode 31a, connecting material 41, and electrode 12b to semiconductor elements 20B and 20D. The current that has flowed through semiconductor elements 20B and 20D flows through electrode 21, connecting material 41, and electrode 31b to output pattern 36c, and then flows from output terminal 37c to the outside of semiconductor device 100 (see the arrows in Fig. 2C ).

[0039] Because current flows as described above, semiconductor elements 20A and 20C are connected in parallel and function as a single element by performing the same switching operation. This also applies to semiconductor elements 20B and 20D. The parallel connection reduces the current flowing through each semiconductor element 20, thereby reducing heat generation. Furthermore, as shown in FIGS. 2B and 2C, the overlapping portions of input pattern 36a and output pattern 36c function as parallel plates, making it difficult for magnetic flux to enter between input pattern 36a and output pattern 36c. As a result, inductance is reduced.

[0040] The inductance reduction effect is stronger the narrower the gap between the input pattern 36a and the output pattern 36c and the greater the overlap between the input pattern 36a and the output pattern 36c. When parallel plates are constructed using a lead frame or the like, a gap must be secured between the parallel plates to allow resin to be filled between them, which reduces the inductance reduction effect. In other words, when parallel plates are constructed using a lead frame or the like, there is a trade-off between the inductance reduction effect and the ease of filling the resin. On the other hand, in the printed circuit board 30, the insulation between the input and output patterns (between the input pattern 36a and the output pattern 36c) is ensured by the prepreg of the printed circuit board 30, so the input pattern 36a and the output pattern 36c can be arranged closely together, i.e., inductance can be reduced, without the trade-off with the ease of filling the resin.

[0041] The parallel plates described above do not have to be contained solely within the printed circuit board 30. In other words, even if the direction of the current flowing through the insulating substrate 10 is opposite to the direction of the current flowing through the printed circuit board 30, the inductance reduction effect can be obtained.

[0042] The input pattern 36a is connected to the insulating substrate 10 (electrode 12a) at the joint 12aa, and the intermediate pattern 36b is connected to the insulating substrate 10 (electrode 12b) at the joint 12ba. Therefore, the input pattern 36a and the intermediate pattern 36b are cooled via a cooler 60 connected to the back electrode 13 by a bonding material 61. The output pattern 36c does not need to be connected to the insulating substrate 10 and is prone to temperature rise. However, by connecting the output pattern 36c to the insulating substrate 10 (electrode 12c) at the joint 12ca, the output pattern 36c is also cooled via the cooler 60. Because the input / output patterns are cooled efficiently in this manner, the thickness of the input / output patterns can be reduced, thereby reducing the cost and weight of the semiconductor device 100. The number of joints 12ca is not particularly limited. Furthermore, because the input / output patterns can be cooled by thickening the terminals, it is not necessary to connect the input / output pattern (output pattern 36c) to the insulating substrate 10 (electrode 12c).

[0043] The resin 40 ensures a gap between the insulating substrate 10 (surface electrode 12) and the printed circuit board 30 and a gap between the semiconductor element 20 and the printed circuit board 30. The resin 40 prevents short circuits between the connecting materials 41 that connect different electrodes. The resin 40 provides insulation between locations where a high potential difference occurs (for example, between the printed circuit board 30 and the semiconductor element 20, or between the printed circuit board 30 and the insulating substrate 10). The resin 40 also relieves thermal stress applied to the connecting materials 41 when the semiconductor device 100 is operating. The thickness, shape, application position, etc. of the resin 40 are determined appropriately taking into account the required pressure resistance, etc.

[0044] The resin 40 may be any of various resins, such as PTFE (polytetrafluoroethylene), PI (polyimide), and PPS (polyphenylenesulfide). Other resins may also be used as the resin 40 as long as they provide similar effects. The resin 40 may be provided directly above the semiconductor element 20 by forming through holes in the resin 40 processed into a sheet that corresponds to the electrodes 21 and 22. Alternatively, the resin 40 may be provided by applying a liquid resin 40 to the edges of the electrodes of the semiconductor element 20 and allowing it to harden, or by molding the resin 40 into a desired shape by injection molding, transfer molding, or the like and providing it between the insulating substrate 10 and the printed circuit board 30 and between the semiconductor element 20 and the printed circuit board 30. When a curable resin, such as epoxy resin, is used as the resin 40, the resin 40 may be provided in a semi-cured state on the semiconductor element 20, and then the bonding material 42 may be provided and heated, thereby simultaneously heating the resin 40 and bonding with the bonding material 42.

[0045] In this embodiment, through holes were formed in a 1 mm thick sheet of PTFE to form the resin 40. In this case, the diameter of the through holes above the electrode 21 was 5 mm, and the diameter of the through holes above the electrode 22 was 1 mm. In addition, the upper and lower surfaces of the sheet of PTFE were subjected to adhesive processing to prevent movement from the semiconductor element 20 and the insulating substrate 10. That is, adhesive layers 40a (see FIGS. 6 and 7) were formed on the upper and lower surfaces of the resin 40. The adhesive processing may be performed by supplying an adhesive or by using double-sided tape.

[0046] The sealing resin 50 serves to seal the semiconductor device 100. More specifically, the sealing resin 50 surrounds and seals the insulating substrate 10, the semiconductor element 20, the printed circuit board 30, and the resin 40. This provides the semiconductor device 100 with moisture resistance, anti-fouling properties, a thermal stress relief function, and insulation properties. However, the input terminal 37a, the intermediate terminal 37b, and the output terminal 37c protrude from the sealing resin 50. Furthermore, the back surface electrode 13 may be exposed from the sealing resin 50.

[0047] The sealing resin 50 is formed by, for example, transfer molding. The sealing resin 50 may also be formed by a method other than transfer molding, for example, compression molding. Depending on the application of the semiconductor device 100, the semiconductor device 100 may not have the sealing resin 50.

[0048] The components of the sealing resin 50 are preferably different from the components of the resin 40. The sealing resin 50 may contain an inorganic filler in order to reduce the linear expansion coefficient of the sealing resin 50 and the amount of shrinkage during hardening. In this embodiment, the inorganic filler is, for example, silica (SiO ２) The linear expansion coefficient of epoxy resin is approximately 20 ppm / K to 40 ppm / K, while the linear expansion coefficient of the ceramic used for the insulating layer 11, such as aluminum nitride, is 4.5 ppm / K. Therefore, due to thermal stress caused by the difference in the linear expansion coefficients of the sealing resin 50 and the insulating layer 11, peeling may occur between the sealing resin 50 and the insulating layer 11. By including an inorganic filler in the sealing resin 50, the linear expansion coefficient of the sealing resin 50 is reduced, and the thermal stress is also reduced, making it possible to suppress peeling between the sealing resin 50 and the insulating layer 11.

[0049] On the other hand, adding an inorganic filler to the sealing resin 50 increases the elastic modulus (Young's modulus) of the sealing resin 50, which may increase thermal stress. To address this situation, it is preferable to make the Young's modulus of the resin 40 smaller than that of the sealing resin 50. By having a soft resin 40 interposed between the sealing resin 50 and the connecting material 41, thermal stress caused by displacement of the sealing resin 50 due to temperature changes is less likely to be transmitted to the connecting material 41.

[0050] The semiconductor device 100 may have a cooler 60. The cooler 60 is connected to the back electrode 13 by a bonding material 61. As with the bonding material 23, various materials such as solder, a sintered metal material, an intermetallic compound, or a conductive adhesive may be used for the bonding material 61. The cooler 60 may be connected using a fixing tool such as a spring, or may be connected via a thermally conductive sheet, grease, or the like.

[0051] 4 shows an example of a power conversion device 200 using the semiconductor device 100. As shown in FIG. 4, the power conversion device 200 has an inverter circuit 210. The inverter circuit 210 is mounted on, for example, an electric vehicle. The inverter circuit 210 has terminals 210a and 210b. The positive side of an on-board battery 220 is connected to terminal 210a, and the negative side of the on-board battery 220 is connected to terminal 210b. In addition, an input capacitor 230 that smooths the on-board battery 220 is connected to the input stage of the power conversion unit, i.e., between terminals 210b and 210b.

[0052] The inverter circuit 210 has three pairs of semiconductor elements 211 and 212 connected in series. These three pairs form a three-phase AC full-bridge circuit, constituting one three-phase AC. Because the power conversion device 200 has two inverter circuits 210, it has a dual three-phase AC configuration, making it a dual three-phase power conversion device. The semiconductor element 211 is an upper arm semiconductor element connected to the terminal 210a side, i.e., the positive side of the on-board battery 220. The semiconductor element 212 is a lower arm semiconductor element connected to the terminal 210b side, i.e., the negative side of the on-board battery 220.

[0053] The inverter circuit 210 is connected to the rotating electric machine 240 via AC wiring connected between the semiconductor elements 211 and 212. The inverter circuit 210 converts DC current from the on-board battery 220 into AC current by switching the semiconductor elements 211 and 212, and drives the rotating electric machine 240 through the AC wiring. Furthermore, AC current generated in the rotating electric machine 240 by regenerative braking or the like is supplied to the inverter circuit 210 via the AC wiring, converted into DC current in the inverter circuit 210, smoothed by the input capacitor 230, and stored in the on-board battery 220.

[0054] The power conversion device 200 includes a drive circuit 250, a control circuit 260, and a power supply circuit 270. The drive circuit 250 and the control circuit 260 output appropriate signals for switching the semiconductor elements 211 and 212, and perform control so that the target drive frequency and torque of the rotating electric machine 240 are obtained. Furthermore, when the drive circuit 250 and the control circuit 260 detect damage to the rotating electric machine 240 or an abnormal current, they perform control so as to stop the drive and power supply of the inverter circuit 210 in a safe manner. These controls are performed based on the current value detected by a current sensor and the signal voltage converted from the current value. The power supply circuit 270 generates power for the drive circuit 250 and the control circuit 260.

[0055] The semiconductor device 100 includes a semiconductor element 211, a semiconductor element 212, and a drive circuit 250. More specifically, the semiconductor element 211 is made up of semiconductor elements 20A and 20C, the semiconductor element 212 is made up of semiconductor elements 20B and 20D, and the drive circuit 250 is made up of a drive circuit 35. The semiconductor element 211 and terminal 210a are connected via an input terminal 37a, the semiconductor element 212 and terminal 210b are connected via an output terminal 37c, and the semiconductor elements 211 and 212 are connected to the AC wiring via an intermediate terminal 37b. The semiconductor device 100 may further include a control circuit 260 and a power supply circuit 270.

[0056] As described above, in the semiconductor device 100, the semiconductor element 20 is mounted on the insulating substrate 10 using the bonding material 23. Furthermore, in the semiconductor device 100, the electrodes 31 on the underside of the printed circuit board 30 are connected to the surface electrodes 12 of the insulating substrate 10 or the electrodes (electrodes 21, 22) of the semiconductor element 20 using the bonding material 42, and the drive control circuits including the drive IC 32 and the power supply circuit for driving the drive control circuit are mounted on the lands on the upper surface of the printed circuit board 30 using the bonding material 34. Furthermore, in the semiconductor device 100, these components are completely sealed with the sealing resin 50. The insulating substrate 10 is connected to the cooler 60 using the bonding material 61.

[0057] In this way, in the semiconductor device 100, the semiconductor element 20 and the printed circuit board 30, which is a control circuit board having the input terminal 37a, intermediate terminal 37b, and output terminal 37c as power terminals, are arranged in close proximity to each other without being connected by wires, thereby enabling the power module to be miniaturized. Furthermore, because the driving IC 32 is arranged above and near the semiconductor element 20, the wiring length is shortened, thereby reducing the inductance caused by the wiring length. Furthermore, because the input terminal 37a, intermediate terminal 37b, and output terminal 37c of the printed circuit board 30 serve as power terminals, unlike when the power terminals are located on the insulating substrate 10, holes can be drilled in the power terminals, allowing for the selection of low-cost connection methods such as screw fastening. This also allows for the selection of connection methods with fewer components, such as laser welding. In the semiconductor device 100, the electrode (electrode 31) of the printed circuit board 30 is connected to the electrode (surface electrode 12) of the insulating substrate 10 or the electrode (electrode 21, electrode 22) of the semiconductor element 20 by the bonding material 42, so a more stable electrical connection can be achieved compared to when these connections are made by contact, and since a mechanism for clamping and holding the insulating substrate 10 and the printed circuit board 30 is not required, the structure can be simplified and costs can be reduced.

[0058] (Method of Manufacturing the Semiconductor Device 100) A method of manufacturing the semiconductor device 100 will be described below.

[0059] 5 is a manufacturing process diagram of the semiconductor device 100. As shown in Fig. 5, the manufacturing method of the semiconductor device 100 includes a semiconductor element connecting step S1, a circuit component connecting step S2, a printed circuit board connecting step S3, a sealing step S4, and a cooler connecting step S5.

[0060] In the semiconductor element connecting step S1, the semiconductor element 20 is connected onto the surface electrodes 12 (electrodes 12a, electrodes 12b) using a bonding material 23. In the circuit component connecting step S2, a driving IC 32, a control resistor 33, and other circuit components are connected onto the lands of the printed circuit board 30 using a bonding material 34. After the semiconductor element connecting step S1 and the circuit component connecting step S2, a printed circuit board connecting step S3 is performed.

[0061] In the printed circuit board connecting step S3, the printed circuit board 30 that has undergone the circuit component connecting step S2 is connected to the insulating substrate 10 that has undergone the semiconductor element connecting step S1 using a connecting material 41 (bonding material 42). FIG. 6 is a first cross-sectional view illustrating the printed circuit board connecting step S3. FIG. 7 is a second cross-sectional view illustrating the printed circuit board connecting step S3. As shown in FIG. 6, in the printed circuit board connecting step S3, first, the resin 40 is placed on the semiconductor element 20 and the surface electrodes 12. As shown in FIG. 7, in the printed circuit board connecting step S3, second, the bonding material 42 is supplied into the through holes of the resin 40. The bonding material 42 is generally supplied using a dispenser. The bonding material 42 may also be supplied by methods such as screen printing or transfer printing. Note that this step can be omitted by using resin 40 that has already been filled with the bonding material 42. In the printed circuit board connecting step S3, third, heating is performed to connect the multiple electrodes 31 to the electrodes 21, 22, and surface electrodes 12. After the printed circuit board connecting step S3, a sealing step S4 is performed.

[0062] In the sealing step S4, the insulating substrate 10, the semiconductor element 20, the printed circuit board 30, and the resin 40 are sealed with a sealing resin 50. After the sealing step S4, a cooler connecting step S5 is performed. In the cooler connecting step S5, a cooler 60 is connected to the back electrode 13 using a bonding material 61.

[0063] When solder is used for the bonding materials 23, 34, 42, and 61, the process temperature in each step is important. For example, when the cooler 60 is connected using the bonding material 61 in the cooler connection step S5, the process temperature must be set so that the bonding materials 23, 34, and 42 do not melt. This is because if the bonding materials 23, 34, and 42 melt inside the sealing resin 50, the volume expansion of the bonding materials 23, 34, and 42 due to melting may cause the sealing resin 50 to crack.

[0064] When connecting the insulating substrate 10 and the printed circuit board 30 in the printed circuit board connecting step S3, it is preferable that the bonding materials 23 and 34 do not melt in order to prevent the semiconductor element 20, the driver IC 32, the control resistor 33, and other circuit components from moving and becoming detached. Furthermore, when connecting the insulating substrate 10 and the printed circuit board 30 in the printed circuit board connecting step S3, pressure may be applied to the insulating substrate 10 and the printed circuit board 30 to reduce warping. If the bonding materials 23 and 34 melt at this time, there is a risk that the bonding materials 23 and 34 will be expelled from the joint.

[0065] Considering these factors, the process temperature in each step is determined by the melting point of each bonding material, and it is preferable that the relationship of melting point of bonding material 61 < melting point of bonding material 42 ≦ melting point of bonding material 23 (bonding material 34) is satisfied. If a conductive adhesive or a sintered metal material is used for any of bonding materials 23, 34, 42, and 61, this relationship does not need to be satisfied. This is because the heat resistance temperature of the conductive adhesive or sintered metal material increases after the bonding process is completed, eliminating the concern of remelting in subsequent steps. In this embodiment, a sintered metal material (process temperature: 300°C) is used for bonding material 23, a high-temperature lead-free solder (process temperature: 250°C) is used for bonding material 34, a conductive adhesive (process temperature: 220°C) is used for bonding material 42, and a low-temperature lead-free solder (process temperature: 200°C) is used for bonding material 61.

[0066] (Connection Between Semiconductor Device 100 and External Device) Connection between the semiconductor device 100 and external device 300 will be described below.

[0067] 8 is a first explanatory diagram showing a method for externally connecting the semiconductor device 100. As shown in FIG. 8, the external device 300 has terminals 310. The external device 300 is, for example, a capacitor, a rotating electrical machine, or the like. When connecting the terminals 310 to the terminals of the semiconductor device 100 (input terminal 37a, intermediate terminal 37b, output terminal 37c), these terminals are bent at right angles to secure a chuck portion 400 of a TIG (Tungsten Inert Gas) welding machine.

[0068] 9 is a second explanatory diagram showing a method for externally connecting the semiconductor device 100. As shown in FIG. 9, the terminals 310 and the terminals of the semiconductor device 100 (input terminal 37a, intermediate terminal 37b, output terminal 37c) may be extended parallel to each other and overlapped, and laser light may be irradiated from above the overlapping portion of these terminals. This melts the overlapping portion of these terminals, ensuring electrical continuity. By providing the terminal 310 with a leaf spring structure, welding can be performed without using a jig or the like.

[0069] FIG. 10 is a third explanatory diagram showing a method for externally connecting the semiconductor device 100. As shown in FIG. 10, the terminals of the semiconductor device 100 (input terminal 37a, intermediate terminal 37b, output terminal 37c) may have holes 37e formed therein. FIG. 11 is a fourth explanatory diagram showing a method for externally connecting the semiconductor device 100. As shown in FIG. 11, a hole 310a is also formed in the terminal 310. The terminal 310 and the terminals of the semiconductor device 100 (input terminal 37a, intermediate terminal 37b, output terminal 37c) are overlapped so that the holes 310a and 37e overlap, and these terminals are fastened together with screws 311. This connection method does not require special equipment, allowing for low-cost manufacturing. Furthermore, it allows for reconnection (work repair) in the event of a manufacturing error. The holes 37e can be used to align the printed circuit board 30 with the insulating substrate 10 in the printed circuit board connection process S3.

[0070] As described above, in the semiconductor device 100, the input / output current paths are carried by the printed circuit board 30, which takes heat dissipation into consideration, rather than the insulating substrate 10, and this improves the flexibility of connection to the outside, and enables low-cost connections by eliminating unnecessary wiring components.

[0071] 12 is a partial cross-sectional view of a semiconductor device 100 according to a first modification. As shown in FIG. 12, the through-hole in the resin 40 has a stepped shape in which the upper and lower portions have different diameters (the upper diameter is larger than the lower diameter). When the through-hole in the resin 40 has a stepped shape, it is more difficult to process the resin 40 than when the through-hole in the resin 40 has a straight shape. However, this is advantageous for alignment because the bonding material 42 can be supplied in accordance with the size of the electrode 21 (electrode 22) and the connection area with the electrode 31 can be increased.

[0072] 13 is a first explanatory view of the printed circuit board connecting step S3 for the semiconductor device 100 according to Modification 1. FIG. 14 is a second explanatory view of the printed circuit board connecting step S3 for the semiconductor device 100 according to Modification 1. As shown in FIG. 13 , in the printed circuit board connecting step S3, first, a paste-like bonding material 42 is supplied into the through holes of the resin 40 by dispensing, screen printing, transfer, or the like. At this time, the paste-like bonding material 42 is supplied to a thickness approximately the same as the thickness of the resin 40, and preferably to a thickness greater than the thickness of the resin 40.

[0073] 14 , in the printed circuit board connecting step S3, secondly, the printed circuit board 30 is placed on the upper surface of the resin 40, and the printed circuit board 30 comes into contact with the paste-like bonding material 42, thereby crushing the paste-like bonding material 42. At this time, the stepped portion of the through hole in the resin 40 can receive the crushed paste-like bonding material 42. Therefore, the risk of the paste-like bonding material 42 leaking out from between the electrode 31 and the resin 40 can be reduced.

[0074] 15 is a partial cross-sectional view of a semiconductor device 100 according to Modification 2. As shown in FIG. 15, the through holes in the resin 40 may be tapered (a shape in which the opening area increases from the bottom surface of the resin 40 toward the top surface of the resin 40). In this case, it is possible to enjoy both the benefits of forming straight through holes in the resin 40 and the benefits of forming stepped through holes in the resin 40. That is, it is relatively easy to process the through holes in the resin 40, and short circuits between the electrodes 31 due to the bonding material 42 are prevented.

[0075] (Modifications 3, 4, and 5) FIG. 16 is a partial cross-sectional view of a semiconductor device 100 according to Modification 3. FIG. 17A is a partial bottom view of a printed circuit board 30 used in the semiconductor device 100 according to Modification 3. As shown in FIGS. 16 and 17A , holes 38 are formed inside the electrodes 31 (electrodes 31b and 31c) connected to the electrodes 21 and 22, between adjacent electrodes 31, or around the electrodes 31, and above the resin 40. Note that if the semiconductor device 100 does not include the resin 40, the holes 38 may be located around the electrodes 31 and above the connecting material 41. The holes 38 penetrate the printed circuit board 30. In this case, when bonding material 42 is supplied in excess to one through-hole and overflows the resin 40, it escapes to the holes 38, thereby preventing the bonding material 42 from connecting with the bonding material 42 supplied to other through-holes in the resin 40 and causing a short circuit. Furthermore, gas may be generated from the bonding material 42 during bonding depending on the type of bonding material 42. For example, this gas may be generated from the solvent components of the solder material or paste material, flux, etc. By forming the holes 38, this gas is discharged to the outside through the holes 38, thereby obtaining a good bonded portion with few voids.

[0076] 17B is a partial bottom view of the printed circuit board 30 used in the semiconductor device 100 according to Modification 3, in which the positions and number of holes 38 are changed. As shown in FIG. 17B , it is desirable to provide at least two holes 38 between the electrodes 31 b and 31 c or between two adjacent electrodes 31 b. In this case, the bonding material 42 that protrudes from each electrode enters the holes 38, thereby reducing the probability of a short circuit occurring between the electrodes even if a large amount of bonding material 42 is supplied.

[0077] FIG. 18 is a partial cross-sectional view of the semiconductor device 100 according to Modification 4. As shown in FIG. 18, the hole 38 does not have to penetrate the printed circuit board 30. It goes without saying that the same effect can be obtained in this case as well. FIG. 19 is a partial bottom view of the printed circuit board 30 used in the semiconductor device 100 according to Modification 5. As shown in FIG. 19, the hole 38 does not have to be circular, and may be, for example, an elongated hole. It goes without saying that the same effect can be obtained in this case as well. The hole 38 may be used as a via or through-hole connecting layers of the printed circuit board 30. Furthermore, the inside of the hole 38 may be plated to provide electrical conductivity, or the hole 38 may not have any electrical function. The effect obtained remains the same whether or not the hole 38 has an electrical function.

[0078] Second Embodiment A power semiconductor device according to the second embodiment will be described. The power semiconductor device according to the second embodiment is designated as semiconductor device 100A. Here, differences from semiconductor device 100 will be mainly described, and overlapping descriptions will not be repeated.

[0079] FIG. 20 is a cross-sectional view of the semiconductor device 100A. As shown in FIG. 20, the semiconductor device 100A has a case 70. The case 70 is disposed on the upper surface of the insulating substrate 10 (the upper surface of the insulating layer 11). A sealing resin 71 is poured into the interior of the case 70. The case 70 is made of a material such as LCP (liquid crystal polymer), PPS, or the like. The case 70 is manufactured by, for example, injection molding. The case 70 may also be manufactured by cutting or using a 3D printer. Due to the small size of the semiconductor device 100A, the height of the case 70 is limited to approximately 1 mm to 2 mm higher than the circuit components mounted on the printed circuit board 30. Because the sealing resin 71 can be sealed up to the edges of the case 70, the circuit components mounted on the printed circuit board 30 are provided with moisture resistance, anti-fouling properties, thermal stress relief, insulation, and other benefits.

[0080] The sealing resin 71 may be an epoxy resin, a silicone gel, or the like. The sealing resin 71 is poured into the case 70 by potting. Therefore, in the semiconductor device 100A, stress applied to the inside of the semiconductor device 100A during the sealing process can be reduced compared to a process in which sealing is performed by applying pressure, such as transfer molding, and damage to the bonding material 42 and the electronic components included in the semiconductor device 100A can be suppressed.

[0081] The degree of moisture resistance, antifouling, and insulation required for the semiconductor device 100A is a design requirement. FIG. 21 is a cross-sectional view of a semiconductor device 100A according to a modified example. As shown in FIG. 21 , if it is not necessary to seal the circuitry driving the semiconductor element 20 mounted on the printed circuit board 30, the height of the case 70 may be set equal to or less than the height of the printed circuit board 30 to reduce the size of the semiconductor device 100A. In this case, by forming a protrusion at the tip of the case 70, the protrusion can be inserted into a hole formed in the printed circuit board 30 to position the printed circuit board 30 relative to the insulating substrate 10, thereby preventing misalignment of the electrodes during bonding. The above-mentioned holes may be formed in the input terminal 37a, intermediate terminal 37b, or output terminal 37c. Forming holes in the terminals of the printed circuit board 30 has the advantage of not reducing the mounting area on the surface of the printed circuit board 30.

[0082] Third Embodiment A power semiconductor device according to a third embodiment will be described. The power semiconductor device according to the second embodiment is designated as semiconductor device 100B. Here, differences from semiconductor device 100 will be mainly described, and overlapping descriptions will not be repeated.

[0083] 22 is a cross-sectional view of the semiconductor device 100B. As shown in FIG. 22, the semiconductor device 100B has a bonding material 42 and a protrusion 43 as a connecting material 41. The protrusion 43 is provided on the surface of the electrode 31. The protrusion 43 is connected to the electrode (electrode 21, electrode 22) of the semiconductor element 20 or the surface electrode 12 (electrode 12a, electrode 12b, electrode 12c) by the bonding material 42. The protrusion 43 ensures a gap between the printed circuit board 30 and the semiconductor element 20 and the insulating substrate 10, allowing the sealing resin 50 to fill this gap without leaving voids. Note that resin 40 may be disposed around the bonding material 42.

[0084] The protrusions 43 are made of copper, for example. The protrusions 43 may also be made of aluminum, nickel, or the like. The protrusions 43 may be plated with gold or silver. The diameter and height of the protrusions 43 are appropriately determined in consideration of the composition of the sealing resin 50, and are not particularly limited. The height of the protrusions 43 is, for example, 0.1 mm or more and 3 mm or less. The height of the protrusions 43 may be small when the viscosity of the sealing resin 50 is low, and large when the viscosity of the sealing resin 50 is high.

[0085] FIG. 23 is a first explanatory diagram showing a method for attaching the protrusion 43. FIG. 24 is a second explanatory diagram showing a method for attaching the protrusion 43. As shown in FIG. 23 , in attaching the protrusion 43, first, a hole is drilled in the surface of the electrode 31. This hole may be straight or tapered. This hole may penetrate the printed circuit board 30. As shown in FIG. 24 , in attaching the protrusion 43, second, a pillar is inserted into the hole formed in the electrode 31. The relationship between the diameter of the pillar and the diameter of the hole is an arbitrary design requirement, but generally, the diameter of the pillar is larger than the diameter of the hole, and the protrusion 43 is created by press-fitting the pillar into the hole. Note that a conductive adhesive or the like may be used to fix the pillar after inserting it into the hole.

[0086] 25 is a cross-sectional view illustrating the printed circuit board connection step S3 in the manufacturing method of the semiconductor device 100B. As shown in FIG. 25 , when bonding the printed circuit board 30 to the insulating substrate 10 and the semiconductor element 20, it is preferable to apply pressure to the printed circuit board 30 from above toward the insulating substrate 10. If the protrusions 43 come into contact with the semiconductor element 20, the semiconductor element 20 may be damaged. Therefore, it is preferable to vary the length of the protrusions 43 for each electrode 31 so that the protrusions 43 on electrode 31a or electrode 31d contact the surface electrodes 12 (electrodes 12a, 12b, and 12c) but the protrusions 43 on electrode 31b or electrode 31c do not contact the electrodes (electrodes 21 and 22) of the semiconductor element 20.

[0087] The length of the protrusion 43 connected to the electrode 21 or 22 is defined as SG. The thickness of the semiconductor element 20 is defined as A, and the thickness of the bonding material 23 is defined as H. The length of the protrusion 43 connected to the surface electrode 12 is defined as IG. These values ​​preferably satisfy the relationship H+T+SG<IG.

[0088] In this embodiment, the protrusions 43 are formed from copper pillars, which are inserted into holes in the electrodes 31 and then fixed with conductive adhesive. In this embodiment, H = 0.1 mm and A = 0.3 mm. That is, the difference between the gap between the upper surface of the semiconductor element 20 and the lower surface of the printed circuit board 30 and the gap between the upper surface (surface electrode 12) of the insulating substrate 10 and the lower surface of the printed circuit board 30 is 0.4 mm. In order to ensure a gap of 0.5 mm or more between the upper surface of the semiconductor element 20 and the lower surface of the printed circuit board 30 in consideration of the fluidity of the sealing resin 50, IG is set to 1.0 mm and SG is set to 0.5 mm. This creates a gap of 0.1 mm between the protrusions 43 and the electrodes 21 and 22, and the protrusions 43 do not come into contact with the electrodes 21 and 22, preventing damage to the semiconductor element 20.

[0089] Since the protrusions 43 are made of bulk material, they have better thermal and electrical conductivity than conductive adhesives or solders. Furthermore, the amount of bonding material 42 used for connection can be reduced, which reduces the cost of the bonding material 42 and reduces the risk of the bonding material 42 joining together and causing a short circuit between electrodes.

[0090] Fourth Embodiment A power semiconductor device according to a fourth embodiment will be described. The power semiconductor device according to the second embodiment will be referred to as semiconductor device 100C. Here, differences from semiconductor device 100 will be mainly described, and overlapping descriptions will not be repeated.

[0091] FIG. 26 is a cross-sectional view of a printed circuit board 30 used in the semiconductor device 100C. As shown in FIG. 26, in the semiconductor device 100C, a plurality of holes 39 are formed on the upper surface of the printed circuit board 30. The holes 39 are formed directly above the electrodes 31, and the electrodes 31 are exposed through the holes 39. The holes 39 may also penetrate the electrodes 31. The diameter of the holes 39 is appropriately set in consideration of the spot diameter during laser irradiation. However, since components such as a drive circuit 35 and a control circuit are mounted on the printed circuit board 30, it is preferable that the diameter be as small as possible. In this embodiment, for example, a laser L with a spot diameter of 0.1 mm is used, and the diameter of the holes 39 is set to 0.3 mm in consideration of positional deviation during irradiation.

[0092] The holes 39 may be formed by aligning and overlapping patterns or prepregs in which holes have been pre-punched by machining or the like, or by performing additional processing such as laser processing after the printed circuit board 30 is produced. In the semiconductor device 100C, the holes 39 formed in the printed circuit board 30 can mitigate expansion of the printed circuit board 30 when the temperature rises. Furthermore, the sealing resin 50 entering the holes 39 improves adhesion between the sealing resin 50 and the printed circuit board 30. Furthermore, if the holes 39 penetrate the printed circuit board 30, gas generated from the bonding material 42 can be discharged through the holes 39, similar to the holes 38, thereby forming a joint with fewer voids.

[0093] 27 is a cross-sectional view illustrating the printed circuit board connection step S3 in the manufacturing method of the semiconductor device 100C. As shown in FIG. 27, in the printed circuit board connection step S3 in the manufacturing method of the semiconductor device 100C, a laser L is irradiated through the hole 39 with the printed circuit board 30 placed on the resin 40. This locally heats the bonding material 42, and bonding is performed. This makes it possible to reduce the thermal influence on other bonding portions, and also makes it possible to perform bonding with reduced warping of the insulating substrate 10 and the printed circuit board 30 due to temperature rise. The types of laser L include fiber laser, disk laser, semiconductor laser, CO ２ It goes without saying that any laser can be used, and the same effect can be obtained as long as the hole 39 is formed.

[0094] 28 is a manufacturing process diagram of the semiconductor device 100C. As shown in FIG. 28, in the manufacturing method of the semiconductor device 100C, after the semiconductor element connecting step S1 is performed, the printed circuit board connecting step S3 is performed as described above. This is followed by the circuit component connecting step S2. In the circuit component connecting step S2, the driving IC 32, control resistor 33, and other components may be bonded by locally heating the bonding material 34 with a laser. This makes it possible to bond the driving IC 32, control resistor 33, and other components while suppressing warping of the entire semiconductor device 100C.

[0095] Fifth Embodiment A power semiconductor device according to a fifth embodiment will be described. The power semiconductor device according to the second embodiment will be referred to as semiconductor device 100D. Here, differences from semiconductor device 100 will be mainly described, and overlapping descriptions will not be repeated.

[0096] Fig. 29 is a plan view of the insulating substrate 10 used in the semiconductor device 100D. Fig. 30 is a cross-sectional view of the semiconductor device 100D. As shown in Figs. 29 and 30, the semiconductor elements 20A and 20C are connected in parallel, and the semiconductor elements 20B and 20D are connected in parallel. The electrode 22 of the semiconductor element 20A and the electrode 22 of the semiconductor element 20C are connected to one electrode 31c. The electrode 22 of the semiconductor element 20B and the electrode 22 of the semiconductor element 20D are connected to another electrode 31c. The electrode 31c is connected to the driving IC 32 by one wiring.

[0097] As described above, semiconductor elements 20A and 20C constituting the upper arm semiconductor elements (semiconductor elements 20B and 20D constituting the lower arm semiconductor elements) are connected in parallel. If there is a difference between the wiring length from the driver IC 32 to one of the parallel-connected semiconductor elements 20 and the wiring length from the driver IC 32 to the other of the parallel-connected semiconductor elements 20, a difference in the transmission of the drive signal may occur, potentially resulting in a current imbalance in one of the parallel-connected semiconductor elements 20. If such an imbalance occurs, a margin design that takes the imbalance into account is required, for example, the semiconductor element 20 must be enlarged. Note that in a typical power module, there is a problem of different wiring lengths between one and the other of the parallel-connected semiconductor elements due to differences in the mounting positions of the parallel-connected semiconductor elements, the associated wire bonding lengths, and the routing of the wiring patterns.

[0098] In the semiconductor device 100C, one electrode 22 of the semiconductor elements 20 connected in parallel and the other electrode 22 of the semiconductor elements 20 connected in parallel are connected to one electrode 31c, so the difference between the wiring length from the driving IC 32 to one electrode 22 of the semiconductor elements 20 connected in parallel and the wiring length from the driving IC 32 to the other electrode 22 of the semiconductor elements 20 connected in parallel is small, thereby suppressing current imbalance between the semiconductor elements 20 and ultimately making it possible to miniaturize the semiconductor elements 20.

[0099] The connection point between one electrode 22 and electrode 31c of the semiconductor elements 20 connected in parallel is arranged in a position that is line-symmetric or point-symmetric with the connection point between the other electrode 22 and electrode 31c of the semiconductor elements 20 connected in parallel, for example, with respect to the connection point between electrode 31c and one wiring connected to drive IC 32. This further reduces the difference between the wiring length from drive IC 32 to one electrode 22 of the semiconductor elements 20 connected in parallel and the wiring length from drive IC 32 to the other semiconductor element 20 connected in parallel, further suppressing current imbalance between the semiconductor elements 20 and ultimately enabling further miniaturization of the semiconductor elements 20.

[0100] FIG. 31 is a plan view of the insulating substrate 10 used in the semiconductor device 100D according to Modification 1. FIG. 32 is a plan view of the insulating substrate 10 used in the semiconductor device 100D according to Modification 2. As shown in FIGS. 31 and 32 , the number of semiconductor elements 20 does not have to be two, but may be three (see FIG. 31 ) or four (see FIG. 32 ), and is an optional design requirement. When three semiconductor elements 20 are connected in parallel, the wiring connected to the driving IC 32 is connected to the center of the electrode 31c, and the electrodes 22 of each of the three semiconductor elements 20 are positioned at positions rotated 120° about the center of the electrode 31c. This ensures that the wiring lengths from the driving IC 32 to each of the three semiconductor elements 20 are the same. When four semiconductor elements 20 are connected in parallel, a similar effect can be achieved by arranging the electrodes 22 of each of the four semiconductor elements 20 line-symmetrically about the center of the electrode 31c. When the number of parallel semiconductor elements 20 is five or more, the arrangement of the semiconductor elements 20 can be determined in a similar manner.

[0101] In the semiconductor device 100D, the driving IC 32 does not necessarily have to be disposed directly above the semiconductor element 20. If the wiring from the driving IC 32 is routed within the printed circuit board 30 and the point where it is connected to the electrode 31c is disposed directly above the semiconductor element 20, that is, at the midpoint between the semiconductor elements 20, it is possible to eliminate the difference in wiring length to the multiple semiconductor elements 20.

[0102] Sixth Embodiment A power semiconductor device according to a sixth embodiment will be described. The semiconductor device according to the sixth embodiment is designated as semiconductor device 100E. Here, differences from semiconductor device 100 will be mainly described, and overlapping descriptions will not be repeated.

[0103] 33 is a schematic cross-sectional view of a semiconductor device 100E. In the semiconductor device 100E, as shown in FIG. 33, a resin 40 is arranged so as to straddle a plurality of semiconductor elements 20. The resin 40 has through holes formed therein so as to coincide with the electrodes 21 and 22 of each of the plurality of semiconductor elements 20. A connecting material 41 (a bonding material 42) is filled in the through holes, and the electrodes 31b and 31c of the printed circuit board 30 are electrically connected to the electrodes 21 and 22, respectively.

[0104] Fig. 34 is a schematic first plan view of semiconductor device 100E. As shown in Fig. 34, in semiconductor device 100E, resin 40 is provided with through-holes so that bonding material 42 can be supplied to electrodes 21 and 22. In addition, when surface electrode 12 (electrode 12a in Fig. 34) of insulating substrate 10 is disposed between two adjacent semiconductor elements 20, resin 40 is further provided with through-holes that expose surface electrode 12 in a top view.

[0105] FIG. 35 is a schematic second plan view of the semiconductor device 100E. As shown in FIG. 35, the through holes formed in the resin 40 are filled with a bonding material 42. The bonding material 42 is also supplied onto the electrodes 12a, 12b, and 12c of the insulating substrate 10. The printed circuit board 30 is then mounted and heated to bond the printed circuit board 30. The semiconductor device 100E allows the resin 40 to be supplied in a single process, thereby reducing the number of steps. Furthermore, by selecting a material with a low Young's modulus for the resin 40, the resin 40 serves as a buffer layer that can absorb warping of the insulating substrate 10 and variations in the bonding thickness of the bonding material 23 that bonds the insulating substrate 10 and the semiconductor element 20.

[0106] 36 is a schematic plan view of the semiconductor device 100E1. As shown in FIG. 36, in the semiconductor device 100E1 according to the first modification, a resin 40 may be disposed so as to cover not only the semiconductor element 20 but also the electrodes 12a, 12b, and 12c of the insulating substrate 10. The resin 40 has through holes that expose the electrodes 21, 22, 12a, 12b, and 12c and are filled with a bonding material 42. In this case, there is no need to pour the sealing resin 50 into the space between the insulating substrate 10 and the printed circuit board 30, simplifying the molding process in the subsequent process.

[0107] FIG. 37 is a schematic plan view of a semiconductor device 100E2. As shown in FIG. 37 , in the semiconductor device 100E2 according to Modification 2, a resin 40 is disposed so as to cover not only the semiconductor element 20 but also the electrodes 12a, 12b, and 12c of the insulating substrate 10. The resin 40 exposes the electrodes 21, 22, 12a, 12b, and 12c, and through-holes are provided in the resin 40 to be filled with a bonding material 42. Furthermore, in the semiconductor device 100E2, the resin 40 is applied all at once onto the insulating substrate 10, thereby limiting the area over which the bonding material 42 spreads and preventing short-circuiting between electrodes at different potentials. Furthermore, in the semiconductor device 100E2, the thickness of the resin 40 is greater than the sum of the thicknesses of the bonding material 23 and the semiconductor element 20, and the resin 40 serves as a spacer to adjust the gap between the insulating substrate 10 and the printed circuit board 30.

[0108] FIG. 38 is a manufacturing process diagram of the semiconductor device 100E2. The semiconductor device 100E2 can be manufactured by the manufacturing method shown in FIG. 38 as well as the manufacturing method shown in FIG. 5 . More specifically, first, a resin supplying step S6 is performed to supply resin 40 onto the insulating substrate 10. Then, similar to the manufacturing method of the semiconductor device 100, the semiconductor element connecting step S1, the circuit component connecting step S2, the printed circuit board connecting step S3, the sealing step S4, and the cooler connecting step S5 are performed to obtain the semiconductor device 100E2. According to this method, for example, when solder is used as the bonding material 23, the resin 40 can prevent the semiconductor element 20 from shifting in position, facilitating connection to the printed circuit board 30. Even when the bonding material 23 is a sintered material, the resin 40 suppresses variations in the position of the semiconductor element 20.

[0109] The embodiments disclosed herein should be considered to be illustrative in all respects and not restrictive. The scope of this application is defined by the claims, not the above description, and is intended to include all modifications within the meaning and scope of the claims.

[0110] 10 insulating substrate, 11 insulating layer, 12 surface electrode, 12a, 12b, 12c electrode, 12aa, 12ba, 12ca joint portion, 13 back electrode, 20 semiconductor element, 20A, 20B, 20C, 20D semiconductor element, 21 electrode, 22 electrode, 23 joint material, 30 printed circuit board, 30a resin portion, 31, 31a, 31b, 31c, 31d electrode, 32 driving IC, 33 control resistor, 34 joint material, 35 driving circuit, 36a input pattern, 36b intermediate pattern, 36c output pattern, 37a input terminal, 37b intermediate terminal, 37c output terminal, 37d signal terminal, 37e hole, 38 hole, 39 hole, 40 resin, 40a adhesive layer, 41 connecting material, 42 joint material, 43 1. Protrusion, 50 Sealing resin, 60 Cooler, 61 Bonding material, 70 Case, 71 Sealing resin, 100 Semiconductor device, 100A Semiconductor device, 100B, 100C, 100D Semiconductor device, 100E, 100E1, 100E2 Semiconductor device, 200 Power conversion device, 210 Inverter circuit, 210a Terminal, 210b Terminal, 211, 212 Semiconductor element, 220 On-board battery, 230 Input capacitor, 240 Rotating electric machine, 250 Drive circuit, 260 Control circuit, 270 Power supply circuit, 300 External device, 310 Terminal, 310a Hole, 311 Screw, 400 Chuck portion, S1 Semiconductor element connection step, S2 Circuit component connection step, S3 Printed circuit board connection step, S4 Sealing step, S5 Cooler connection step, S6 Resin supply step, T1, T2 gap.

Claims

1. A power semiconductor device comprising: an insulating substrate; at least one semiconductor element; a printed circuit board; and a connecting material, wherein the insulating substrate has a first surface and a first electrode disposed on the first surface, each of the at least one semiconductor element being disposed on the first electrode and having a second surface and a second electrode and a third electrode disposed on the second surface, the third electrode being at a different potential from the second electrode, the printed circuit board having a circuit for driving the at least one semiconductor element, input and output patterns disposed inside the printed circuit board, input terminals and output terminals protruding from the printed circuit board, a third surface facing the first and second surfaces, and a plurality of fourth electrodes disposed on the third surface, the input pattern having a portion facing the output pattern, and the connecting material connecting the plurality of fourth electrodes to the first electrode, the second electrode, and the third electrode.

2. The power semiconductor device according to claim 1, wherein the height of the first electrode when the fourth electrode is used as a reference is different from the height of the second electrode and the height of the third electrode when the third electrode is used as a reference.

3. The power semiconductor device according to claim 1 or 2, wherein at least one hole is formed in the printed circuit board, and the at least one hole is positioned inside each of the plurality of fourth electrodes or between two adjacent ones of the plurality of fourth electrodes.

4. The power semiconductor device according to claim 1 or 2, wherein at least one hole is formed in the printed circuit board, and the at least one hole is arranged around each of the plurality of fourth electrodes and above the connecting material.

5. The power semiconductor device according to claim 1 or 2, wherein the inner wall of the hole formed in the printed circuit board has a metal portion.

6. The power semiconductor device according to claim 1 or claim 2, further comprising a first resin, the first resin covering the periphery of the connecting material arranged on the first electrode, the second electrode, and the third electrode, the first resin being present between the second electrode and the third electrode, the thickness of the first resin on the first electrode being different from the thickness of the first resin on the second electrode and the thickness of the first resin on the third electrode, and at least one hole being formed in the printed circuit board, the at least one hole being arranged around each of the plurality of fourth electrodes and above the first resin.

7. A power semiconductor device according to claim 1 or claim 2, further comprising: a first resin; and a sealing resin, wherein the first resin covers the periphery of the connecting material arranged on the first electrode, the second electrode, and the third electrode; the sealing resin covers the insulating substrate, the at least one semiconductor element, the printed circuit board, and the first resin; and the composition of the sealing resin is different from the composition of the first resin.

8. The power semiconductor device according to claim 7, wherein the Young's modulus of said first resin is lower than the Young's modulus of said sealing resin.

9. The power semiconductor device according to claim 7, wherein the first resin has a fourth surface in contact with the third surface, a fifth surface opposite the fourth surface and in contact with the second surface, and openings in which the connecting material is disposed and which are open in the fourth surface and the fifth surface, and the opening area of ​​the opening in the fourth surface is equal to or greater than the opening area of ​​the opening in the fifth surface.

10. The power semiconductor device according to claim 7, wherein the at least one semiconductor element is a plurality of semiconductor elements, and the first resin covers the second electrode and the third electrode of each of the plurality of semiconductor elements, and portions of the first resin located on each of the plurality of semiconductor elements are connected to each other.

11. The power semiconductor device according to claim 7, wherein the at least one semiconductor element is a plurality of semiconductor elements, the first resin covers the second electrode and the third electrode of each of the plurality of semiconductor elements and also covers the first electrode, and the portion located on each of the plurality of semiconductor elements and the portion located on the first electrode are connected to each other.

12. A power semiconductor device according to any one of claims 1 to 11, wherein the insulating substrate further has a fifth electrode disposed on the first surface and insulated from the first electrode, and the output pattern is connected to the fifth electrode at at least one point via the connecting material.

13. A power semiconductor device according to any one of claims 1 to 12, wherein the area of ​​one of the plurality of fourth electrodes connected to the second electrode via the connecting material is larger than the area of ​​the second electrode.

14. A power semiconductor device as described in claim 1 or claim 2, wherein the connecting material connecting the second electrode and one of the plurality of fourth electrodes has a first protrusion electrically connected to one of the plurality of fourth electrodes and a bonding material, and the first protrusion is bonded to the second electrode via the bonding material.

15. The power semiconductor device according to claim 14, wherein the connecting material connecting the first electrode and another one of the plurality of fourth electrodes has a second protrusion electrically connected to the other one of the plurality of fourth electrodes, and a tip of the second protrusion is in contact with the first electrode.

16. A power semiconductor device according to any one of claims 1 to 15, wherein at least one of the plurality of fourth electrodes is a signal electrode, the second electrode includes a gate electrode, the at least one semiconductor element includes a plurality of semiconductor elements connected in parallel at the same potential at least on a circuit diagram, the signal electrode is connected to the gate electrodes of the plurality of semiconductor elements via the connecting material, and in a plan view seen from above the printed circuit board, the signal electrode is connected to the circuit at the center of a plurality of locations where the gate electrodes of the plurality of semiconductor elements are connected.

17. A method for manufacturing a power semiconductor device, comprising: a step of preparing an insulating substrate; and a step of preparing a printed circuit board, wherein the insulating substrate has a first surface and a first electrode disposed on the first surface, at least one semiconductor element is disposed on the first electrode, each of the at least one semiconductor element being disposed on the first electrode and having a second surface and a second electrode and a third electrode disposed on the second surface, the third electrode being at a different potential from the second electrode, the printed circuit board having a circuit for driving the at least one semiconductor element, input and output patterns disposed inside the printed circuit board, input terminals and output terminals protruding from the printed circuit board, a third surface, and a plurality of fourth electrodes disposed on the third surface, the input pattern having a portion facing the output pattern, and further comprising a step of supplying a first resin onto the first electrode and between the second electrode and the third electrode, a step of supplying a bonding material to an opening in the first resin, a step of mounting the printed circuit board on the first resin, and a step of heating.

18. A method for manufacturing a power semiconductor device, comprising: a step of preparing an insulating substrate; and a step of preparing a printed circuit board, wherein the insulating substrate has a first surface and a first electrode disposed on the first surface, at least one semiconductor element is disposed on the first electrode, each of the at least one semiconductor element being disposed on the first electrode and having a second surface and a second electrode disposed on the second surface, the printed circuit board having a circuit for driving the at least one semiconductor element, input and output patterns disposed inside the printed circuit board, input terminals and output terminals protruding from the printed circuit board, a third surface, and a plurality of fourth electrodes disposed on the third surface, the input pattern having a portion facing the output pattern, and further comprising a step of forming a protrusion on each of the plurality of fourth electrodes, a step of supplying a bonding material onto the first electrode and the second electrode, and a step of heating the protrusion while pressing it against the first electrode.

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