Chip component mounting method, and chip component mounting device

The chip component mounting method and device address the challenge of maintaining high precision parallelism by using a height reference rod to adjust the holding surface alignment, ensuring accurate chip placement on substrates.

WO2025204568A1PCT designated stage Publication Date: 2025-10-02TORAY ENG CO LTD
View PDF 4 Cites 0 Cited by

Patent Information

Application Number
PCT/JP2025/007679
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-03-25
Filing Date
2025-03-04
Publication Date
2025-10-02

AI Technical Summary

Technical Problem

Conventional chip component mounting devices struggle to maintain high precision parallelism of the holding surface relative to the substrate stage due to minute irregularities on the substrate surface, leading to misalignment and poor terminal connections.

Method used

A chip component mounting method and device that adjusts the parallelism of the holding surface using a height reference rod, allowing precise alignment by pressing the holding surface against a horizontal reference bar, rather than directly against the substrate stage, and employs a control unit to iteratively adjust and measure parallelism until it meets tolerance criteria.

Benefits of technology

The method and device enable high-precision adjustment of the holding surface parallelism relative to the substrate stage, reducing misalignment and improving mounting accuracy.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure JP2025007679_02102025_PF_FP_ABST
    Figure JP2025007679_02102025_PF_FP_ABST
Patent Text Reader

Abstract

Provided are a chip component mounting device and a chip component mounting method capable of highly accurately adjusting the parallelism of a holding surface of an attachment with respect to a substrate stage. Specifically, the chip component mounting method includes a parallelism adjustment step (step S05) for adjusting the parallelism of a holding surface 43a, and a parallelism measurement step (step S06) for measuring the parallelism of the holding surface 43a. In the parallelism measurement step, the measurement of the parallelism of the holding surface 43a is executed through calculation based on the relationship between: a plurality of positions of the holding surface 43a in the up-down direction measured when the holding surface 43a is pushed against a height reference rod 3 from above each time the position of the height reference rod 3 is horizontally shifted; and the positions of the height reference rod 3 in the corresponding measurements. In the parallelism adjustment step, the adjustment of the parallelism of the holding surface 43a is executed by lowering a bonding head 42 in a state in which the height reference rod 3 is shifted to a horizontal position coordinate (prescribed position) and pushing the holding surface 43a against the height reference rod 3.
Need to check novelty before this filing date? Find Prior Art

Description

Chip component mounting method and chip component mounting device

[0001] The present invention relates to a chip component mounting method for mounting chip components at predetermined locations on a main surface of a substrate, and a chip component mounting apparatus for carrying out the mounting method.

[0002] Conventionally, mounting devices that mount chip components at predetermined locations on the main surface of a substrate have been known (see, for example, Patent Document 1). The mounting device includes, for example, a substrate stage on which a substrate is placed and held in a horizontal position, a bonding head that is movable above the substrate stage, and an attachment that is detachably fixed to the surface (underside) of the bonding head that faces the substrate stage. The substrate is placed and held on the substrate stage with the predetermined location facing upward, while a chip component is supplied and held on the surface of the attachment that faces the substrate stage (hereinafter referred to as the "holding surface" where appropriate). The mounting device then lowers the bonding head to press the chip component against the substrate, thereby mounting the chip component at the predetermined location on the main surface of the substrate.

[0003] In the field of manufacturing semiconductor devices and electronic components, micron-level accuracy is generally required when mounting chip components such as semiconductor chips at predetermined locations on the main surface of a substrate such as a wiring board, and this required accuracy has been increasing in recent years. Therefore, the parallelism of the holding surface of the attachment relative to the substrate stage must be maintained with high precision. Failure to do so can lead to chip misalignment and poor terminal connections when mounting chip components on the substrate, making it difficult to mount the chip components with high precision. For this reason, conventional mounting devices are configured to maintain the parallelism of the holding surface of the attachment relative to the substrate stage with high precision by periodically or irregularly measuring the parallelism of the holding surface and adjusting it as appropriate.

[0004] For example, Figure 9(a) is an enlarged front view showing the state near attachment 143 when adjusting the parallelism of holding surface 143a of attachment 143 in conventional mounting device 101. As shown in this figure, bonding head 142, which detachably fixes attachment 143, is supported by a lifting mechanism (not shown) via spherical air bearing 141, which has fixed part 141a with spherical recess 141a1 and movable part 141b with spherical protrusion 141b1 that fits along recess 141a1. When compressed air is supplied to spherical air bearing 141, movable part 141b becomes capable of swinging three-dimensionally relative to fixed part 141a, and movable part 141b is fixed to fixed part 141a by sucking in compressed air from inside the bearing.

[0005] If the measurement of the parallelism of holding surface 143a of attachment 143 relative to substrate stage 102 shows that the parallelism exceeds the allowable value, spherical air bearing 141 is set to a state where movable part 143b can swing relative to fixed part 141a, and bonding head 142 is lowered to press holding surface 143a of attachment 143 against upper surface 102a of substrate stage 102, and then spherical air bearing 141 is set to a state where movable part 141b is fixed to fixed part 141a. As a result, the inclination of holding surface 143a of attachment 143 follows the inclination of upper surface 102a of substrate stage 102, and the parallelism of holding surface 143a of attachment 143 relative to substrate stage 102 is adjusted.

[0006] Patent No. 7219991

[0007] Incidentally, Figure 9(b) is an enlarged schematic diagram showing the state of each attachment 143 and bonding head 142 when the holding surface 143a of the attachment 143 is pressed against different positions on the substrate stage 102. As shown in this figure, the upper surface 102a of the actual substrate stage 102 has minute irregularities on the order of microns, which is the required precision mentioned above, and therefore the inclination of the holding surface 143a of the attachment 143 changes depending on the position on the substrate stage 102 where it is pressed.

[0008] For example, when the holding surface 143a of the attachment 143 is pressed against the substrate stage 102 at a first position P1, the holding surface 143a is inclined upward in one direction (to the left in FIG. 9B ) following the pattern of the upper surface 102a of the substrate stage 102 at the first position P1. When the holding surface 143a of the attachment 143 is pressed against the substrate stage 102 at a second position P2, the holding surface 143a is inclined upward in the other direction (to the right in FIG. 9B ) following the pattern of the upper surface 102a of the substrate stage 102 at the second position P2. When the holding surface 143a of the attachment 143 is pressed against the substrate stage 102 at a third position P3, the holding surface 143a is inclined substantially horizontally following the pattern of the upper surface of the substrate stage 102 at the third position P3.

[0009] Therefore, in a method of adjusting the parallelism of the holding surface 143a of the attachment 143 by pressing the holding surface 143a of the attachment 143 against the substrate stage 102, as in the conventional mounting device 101 described above, the parallelism of the holding surface 143a varies depending on the position on the substrate stage 102 where the holding surface 143a of the attachment 143 is pressed, and therefore it can be difficult to adjust the parallelism of the holding surface 143a of the attachment 143 relative to the substrate stage 102 with high precision.

[0010] The present invention has been made in consideration of the current problems described above, and aims to provide a chip component mounting method and chip component mounting device that implements the mounting method, in which chip components are supplied and held on the holding surface of an attachment that is detachably fixed to a bonding head, and the bonding head is lowered to mount the chip components on a substrate placed on a substrate stage, and in which the parallelism of the attachment's holding surface relative to the substrate stage can be adjusted with high precision.

[0011] The problem to be solved by the present invention is as described above, and the means for solving this problem will now be described.

[0012] That is, a chip component mounting method according to a first aspect of the present invention is a chip component mounting method in which a chip component is supplied to and held on a holding surface of an attachment detachably fixed to a bonding head, and the bonding head is lowered to mount the chip component on a substrate placed on a substrate stage, the chip component mounting method comprising a parallelism adjustment step of adjusting the parallelism of the holding surface of the attachment with respect to an upper surface of the substrate stage, the parallelism adjustment step including a parallelism adjustment step of adjusting the parallelism of the holding surface, a parallelism measurement step of measuring the parallelism of the holding surface adjusted in the parallelism adjustment step, and a step of measuring the parallelism of the holding surface measured in the parallelism measurement step to be within a tolerance range. and a parallelism determination step of determining whether the holding surface is parallel or not, wherein in the parallelism measurement step, the measurement of the parallelism of the holding surface is performed by lowering the bonding head each time the position of the height reference bar is shifted horizontally, measuring the vertical position of the holding surface when the holding surface is pressed against the height reference bar, and calculating the relationship between the measured multiple vertical positions of the holding surface and the position of the height reference bar at each measurement, and in the parallelism adjustment step, the adjustment of the parallelism of the holding surface is performed by lowering the bonding head with the height reference bar shifted to a predetermined position horizontally, and pressing the holding surface against the height reference bar.A chip component mounting apparatus according to aspect 1 of the present invention is an apparatus for mounting chip components, which supplies and holds chip components on a holding surface of an attachment detachably fixed to a bonding head, and mounts the chip components on a substrate placed on a substrate stage by lowering the bonding head, and is equipped with a control unit that performs a parallelism adjustment process that controls the operation of the mounting apparatus to adjust the parallelism of the holding surface of the attachment with respect to the upper surface of the substrate stage, and a height reference rod that can be displaced in the horizontal direction, and the parallelism adjustment process includes a parallelism adjustment step that adjusts the parallelism of the holding surface, a parallelism measurement step that measures the parallelism of the holding surface adjusted by the parallelism adjustment step, and a height reference rod that measures the parallelism of the holding surface measured by the parallelism measurement step. and a parallelism determination step of determining whether the parallelism of the surfaces is within an allowable range, wherein in the parallelism measurement step, the control unit lowers the bonding head each time the position of the height reference bar is shifted horizontally, and measures the vertical position of the holding surface when the holding surface is pressed against the height reference bar, and performs measurement of the parallelism of the holding surface by calculating based on the relationship between the measured multiple vertical positions of the holding surface and the position of the height reference bar at each measurement, and in the parallelism adjustment step, lowers the bonding head with the height reference bar shifted to a predetermined horizontal position, and adjusts the parallelism of the holding surface by pressing the holding surface against the height reference bar. Thus, in the chip component mounting method and chip component mounting device according to aspect 1 of the present invention, when adjusting the parallelism of the holding surface of the attachment relative to the substrate stage, the parallelism adjustment step is performed using the height reference rod used when performing the parallelism measurement step, and in this parallelism adjustment step, the bonding head is lowered with the height reference rod shifted to a predetermined horizontal position, and the holding surface of the attachment is pressed against the height reference rod to adjust the parallelism of the holding surface.Therefore, according to the chip component mounting method and chip component mounting device of aspect 1 of the present invention, the parallelism of the holding surface of the attachment relative to the substrate stage can be adjusted with high precision without being affected by minute irregularities on the substrate stage, compared to the conventional method of adjusting the parallelism of the holding surface by directly pressing the holding surface of the attachment against the substrate stage.

[0013] A chip component mounting method according to a second aspect of the present invention is characterized in that, in the chip component mounting method according to the first aspect, if the parallelism of the holding surfaces in the parallelism determination step is within the tolerance range, the parallelism adjustment step is terminated, and if the parallelism of the holding surfaces is not within the tolerance range, a shift direction and shift amount for the position of the height reference bar are calculated so that the parallelism of the holding surfaces approaches the tolerance range, and the parallelism adjustment step is executed again. Also, a chip component mounting apparatus according to the second aspect of the present invention is characterized in that, in the chip component mounting apparatus according to the second aspect, the control unit in the parallelism determination step is characterized in that, if the parallelism of the holding surfaces is within the tolerance range, the control unit terminates the parallelism adjustment step, and if the parallelism of the holding surfaces is not within the tolerance range, a shift direction and shift amount for the position of the height reference bar are calculated so that the parallelism of the holding surfaces approaches the tolerance range, and the parallelism adjustment step is executed again. With this configuration, the parallelism adjustment step, parallelism measurement step, and parallelism determination step can be repeated in sequence while feeding back the results determined by the parallelism determination step, thereby reliably converging the parallelism of the attachment's holding surface toward the allowable value, and the parallelism of the attachment's holding surface relative to the substrate stage can be adjusted more reliably and with higher precision.

[0014] Furthermore, a chip component mounting method according to aspect 3 of the present invention is characterized in that, in the chip component mounting method according to aspect 1 or 2 above, the parallelism adjustment process further comprises an initial parallelism measurement step of measuring the current parallelism of the holding surface immediately after the start of the parallelism adjustment process without executing the parallelism adjustment step, and an initial parallelism determination step of determining whether the parallelism of the holding surface measured in the initial parallelism measurement step is within half of the tolerance, and if the parallelism of the holding surface is within half of the tolerance in the initial parallelism determination step, the parallelism adjustment process is terminated, and if the parallelism of the holding surface is not within half of the tolerance, the parallelism adjustment step is executed with the height reference rod moved to a reference position coaxial with the bonding head. Furthermore, a chip component mounting apparatus according to a third aspect of the present invention is a chip component mounting apparatus according to the first or second aspect above, wherein the parallelism adjustment process further comprises an initial parallelism measurement step of measuring the current parallelism of the holding surface immediately after the start of the parallelism adjustment process without executing the parallelism adjustment step, and an initial parallelism determination step of determining whether the parallelism of the holding surface measured by the initial parallelism measurement step is within half of the tolerance, and wherein the control unit terminates the parallelism adjustment process if the parallelism of the holding surface is within half of the tolerance in the initial parallelism determination step, and if the parallelism of the holding surface is not within half of the tolerance, performs the parallelism adjustment step with the height reference rod moved to a reference position coaxial with the bonding head. By performing such an initial parallelism measurement step and initial parallelism determination step, if the parallelism of the holding surface of the attachment relative to the substrate stage is already within the allowable range, it is possible to eliminate the time loss of sequentially repeating the parallelism adjustment step, parallelism measurement step, and parallelism determination step, and it is possible to adjust the parallelism of the holding surface of the attachment relative to the substrate stage more efficiently and with higher precision.Furthermore, by setting the judgment standard in the initial parallelism judgment step to 1 / 2 of the allowable value, for example, when a parallelism adjustment process is performed to adjust the parallelism of the holding surface of an attachment, it is possible to prevent the parallelism of the holding surface from always being completed in a state where it is tilted to the maximum extent within the allowable value, which would prevent the parallelism from converging to the desired parallelism.

[0015] Furthermore, a chip component mounting method according to aspect 4 of the present invention is characterized in that, in the chip component mounting method according to any of aspects 1 to 3 above, if, in the parallelism determination step, the parallelism of the holding surface is within the tolerance range, the position of the height reference rod in the parallelism adjustment step executed immediately before is stored as the optimum position, and each time the parallelism adjustment process is executed again, this optimum position is updated to the position of the height reference rod when the parallelism of the holding surface is closer to the desired parallelism, the number of times the parallelism adjustment step, the parallelism measurement step, and the parallelism determination step can be repeatedly executed is preset, and if, in the parallelism determination step which is the last execution, the parallelism of the holding surface is not within the tolerance range, the parallelism adjustment step is executed again with the height reference rod shifted to the optimum position. Furthermore, a chip component mounting apparatus according to a fourth aspect of the present invention is a chip component mounting apparatus according to any one of the first to third aspects, wherein, in the parallelism determination step, if the parallelism of the holding surface is within the tolerance range, the control unit stores the position of the height reference rod in the parallelism adjustment step executed immediately before as an optimal position, and each time the parallelism adjustment process is executed again, the optimal position is updated to the position of the height reference rod when the parallelism of the holding surface is closer to the desired parallelism, the number of times the parallelism adjustment step, the parallelism measurement step, and the parallelism determination step can be repeatedly executed is preset, and the control unit is characterized in that, in the parallelism determination step which is the last execution, if the parallelism of the holding surface is not within the tolerance range, the control unit executes the parallelism adjustment step again with the height reference rod shifted to the optimal position.In this way, in the chip component mounting method and chip component mounting apparatus according to aspect 4 of the present invention, each time the parallelism adjustment step for adjusting the parallelism of the attachment holding surface is performed, the position of the height reference rod when the parallelism of the holding surface approaches the desired parallelism is successively updated and stored as an optimal position, and if the parallelism of the attachment holding surface does not converge within the tolerance range even after the parallelism adjustment step, parallelism measurement step, and parallelism determination step are repeated a predetermined number of times, the height reference rod is shifted to the optimal position and the parallelism adjustment step is performed to adjust the parallelism of the holding surface. Therefore, the chip component mounting method and chip component mounting apparatus according to aspect 4 of the present invention can prevent the parallelism adjustment step from ending without the parallelism of the attachment holding surface converging within the tolerance range, and can more reliably adjust the parallelism of the holding surface with high precision.

[0016] The present invention has the following advantages: According to the chip component mounting method and chip component mounting device of the present invention, the parallelism of the holding surface of the attachment relative to the substrate stage can be adjusted with high precision.

[0017] FIG. 1 is a front view showing the overall configuration of a chip component mounting apparatus according to an embodiment of the present invention. FIG. 1 is an enlarged front view illustrating the relationship between a bonding head and an attachment and a height reference bar, for explaining a parallelism adjustment step. FIG. 2 is an enlarged front view illustrating the relationship between a bonding head and an attachment and a height reference bar, for explaining a parallelism measurement step. FIG. 3 is an enlarged front view illustrating the relationship between a bonding head and an attachment and a height reference bar, for explaining a method of mounting a chip component on a substrate having a cavity (recess), where (a) is an enlarged front view showing the state near the attachment when mounting a chip component in the cavity of the substrate, and (b) is an enlarged front view showing the state of a chip component mounted in a cavity whose bottom surface is inclined with respect to the top surface of the substrate. FIG. 4 is a schematic diagram showing the movable direction of the attachment. FIG. 5 is a flowchart showing the overall flow of a parallelism adjustment process. FIG. 6 is a flowchart showing the operation procedure for setting the position coordinates of the height reference bar in the parallelism determination step, showing the operation procedures when the measurement counter value is "0" and when the measurement counter value is equal to the set counter value. 1 is a diagram showing the operation procedure when setting the position coordinates of the height reference rod in the parallelism determination step, and is a flowchart showing each operation procedure when the measurement counter value has not reached the set counter value and when the measurement counter value exceeds the set counter value. 2 is a diagram for explaining the parallelism adjustment process performed by a conventional mounting device, in which (a) is an enlarged front view showing the state near the attachment when adjusting the parallelism of the holding surface of the attachment, and (b) is an enlarged schematic view showing the state of each attachment and bonding head when the holding surface of the attachment is pressed against different positions on the substrate stage.

[0018] Next, an embodiment of the present invention will be described with reference to Figures 1 to 8. For convenience, in the following description, the front-rear direction, left-right direction, and up-down direction of the mounting device 1 will be defined by the directions of the arrows shown in Figures 1 to 5.

[0019] [Overall Configuration of Chip Component W Mounting Apparatus 1] First, the overall configuration of a chip component W mounting apparatus 1 (hereinafter simply referred to as "mounting apparatus 1") embodying the present invention will be described with reference to FIGS. 1 to 5. FIG.

[0020] The mounting device 1 in this embodiment is a device that mounts chip components W, such as semiconductor chips, at predetermined positions on a substrate L, such as a wiring board, and is configured to be suitable for face-up mounting, in which the electrode surfaces of the chip components W and the electrode surfaces of the substrate L are oriented in the same direction. However, the mounting device 1 is not limited to face-up mounting, and can also be adapted to face-down mounting, in which the electrode surfaces of the chip components W and the electrode surfaces of the substrate L are opposed to each other.

[0021] 4(a), a plurality of cavities (recesses) La, La... (only one is shown in FIG. 4(a)) are provided in a matrix on the main surface of the substrate L on which the chip components W are mounted, the cavities La, La... corresponding to the planar shape of each chip component W. The substrate L is placed on a substrate stage 2 (see FIG. 1) described below with the plurality of cavities La, La... facing upward, and is held by the substrate stage 2.

[0022] Meanwhile, a die attach film F as an adhesive is previously attached to one side surface of the chip component W. The chip component W is supplied to the lower surface (holding surface 43 a) of an attachment 43 (described later) with the die attach film F facing downward, and is detachably held by the attachment 43.

[0023] Then, the bonding head 42 described later is lowered and the attachment 43 fixed to the bonding head 42 is pressed from above toward the desired cavity La on the substrate L, whereby the chip component W is mounted at a predetermined position on the substrate L (i.e., within the desired cavity La).

[0024] The configuration of the chip component W is not limited to a semiconductor chip, and may be, for example, an electronic chip consisting of other electronic components simply having wiring. Furthermore, the method of fixing the chip component W to the substrate L is not limited to the method using the die attach film F, and other thermocompression bonding methods may be used, for example. Furthermore, the configuration of the substrate L is not limited to this embodiment, and may be, for example, a flat plate-shaped substrate without a cavity La.

[0025] Incidentally, when the holding surface 43a of the attachment 43 is pressed against the upper surface 2a of the substrate stage 2 as in the conventional method and the parallelism of the holding surface 43a of the attachment 43 relative to the substrate stage 2 is adjusted, the parallelism of the holding surface 43a of the attachment 43 relative to the upper surface Lb of the substrate L placed on the substrate stage 2 is maintained with high precision, but it is unclear whether the parallelism of the holding surface 43a relative to the bottom surface La1 of each cavity La is maintained with high precision.

[0026] Therefore, as shown in Figure 4 (b), for example, if the bottom surface La1 of the cavity La is inclined with respect to the top surface Lb of the substrate L, the chip component W will be mounted in the cavity La while maintaining high precision parallelism with respect to the top surface Lb of the substrate L, and a gap will occur between the bottom surface La1 of the cavity La and the chip component W, which may cause so-called chip misalignment or voids to occur at the bonding interface.

[0027] On the other hand, in order to solve this problem, one possible method is to adjust the parallelism of the holding surface 43a of the attachment 43 with respect to the bottom surface La1 of the cavity La by directly pressing the holding surface 43a of the attachment 43 against the bottom surface La1. However, since the bottom surface La1 of the cavity La is generally smaller than the holding surface 43a of the attachment 43, it is difficult to insert the attachment 43 into the cavity La and press the holding surface 43a of the attachment 43 against the bottom surface La1 of the cavity La.

[0028] In this embodiment, as will be described later, when adjusting the parallelism of the holding surface 43a of the attachment 43 relative to the substrate stage 2, this is done by pressing the holding surface 43a of the attachment 43 against the abutment portion 3a of the height reference rod 3 (see Figure 1) used when measuring the parallelism of the holding surface 43a.Therefore, as described above, there is no need to press the holding surface 43a of the attachment 43 directly against the bottom surface La1 of the cavity La, and the parallelism of the holding surface 43a of the attachment 43 relative to the bottom surface La1 of each cavity La can be maintained with high precision.

[0029] As shown in Figure 1, the mounting device 1 is provided with a mounting section A1 where the mounting work of chip components W is performed, and an adjustment section A2 where the parallelism adjustment process Z01 (see Figure 6) described below is performed.The mounting device 1 mainly comprises a substrate stage 2 arranged in the mounting section A1, a height reference bar 3 arranged in the adjustment section A2, a mounting head 4 arranged above the substrate stage 2 and the height reference bar 3 and capable of moving back and forth between the mounting section A1 and the adjustment section A2, and a control device 5 which controls the operation of the entire mounting device 1.

[0030] The substrate stage 2 holds the substrate L, on which the chip components W are mounted, in a horizontal position. The substrate stage 2 has an upper surface 2a on which the substrate L can be placed, and a suction mechanism (not shown) is provided on the upper surface 2a. A heater (not shown) is also provided inside the substrate stage 2.

[0031] The substrate stage 2 places the substrate L on the upper surface 2 a in a horizontal position with the cavities La, La, ... facing upward, and the suction mechanism removably holds the substrate L. The substrate stage 2 is also heated by the heater, thereby raising the temperature of the substrate L held on the upper surface 2 a.

[0032] The substrate stage 2 is provided with a drive mechanism (not shown) that enables the substrate stage 2 to move at high speed in horizontal directions (in this embodiment, in the front-back and left-right directions).

[0033] When performing the mounting work of the chip component W, the substrate stage 2 is moved horizontally by the above-mentioned drive mechanism so that the desired cavity La in the substrate L is positioned directly below the mounting head 3 (more specifically, the attachment 43 described later).

[0034] The height reference bar 3 adjusts the parallelism of the holding surface 43a of the attachment 43 with respect to the upper surface 2a of the substrate stage 2, and measures the parallelism of the adjusted holding surface 43a. The height reference bar 3 is made of, for example, a member extending in the vertical direction, and at its upper end, a contact portion 3a is provided that protrudes upward and has a flat surface (upper surface) that is extremely small compared to the external size of the chip component W.

[0035] The configuration of the height reference bar 3 is not limited to that of this embodiment, and may be, for example, a measuring bar that simply extends in the vertical direction, or the contact point of a dial gauge.

[0036] The height reference bar 3 is provided with a drive mechanism (not shown) that enables the height reference bar 3 to move in the horizontal direction (in the front-back and left-right directions in this embodiment).

[0037] Then, by using the drive mechanism to appropriately shift (move) the position of the height reference bar 3 in the horizontal direction, the holding surface 43a of the attachment 43 is brought into contact with the upper surface of the abutment portion 3a, thereby adjusting the parallelism of the holding surface 43a to a desired degree. Furthermore, each time the drive mechanism moves the position of the height reference bar 3 to a plurality of predetermined positions, the holding surface 43a of the attachment 43 is brought into contact with the upper surface of the abutment portion 3a, thereby measuring the parallelism of the holding surface 43a.

[0038] Details of the adjustment step (parallelism adjustment step) when using the height reference rod 3 to adjust the parallelism of the holding surface 43a of the attachment 43, and the measurement step (parallelism measurement step) when measuring the parallelism of the holding surface 43a of the attachment 43 will be described later.

[0039] Mounting head 4 has, arranged in this order from top to bottom, a spherical air bearing 41, a bonding head 42, and an attachment 43. Mounting head 4 also has a drive mechanism (not shown), which allows spherical air bearing 41, bonding head 42, and attachment 43 to move back and forth together horizontally in one direction (in this embodiment, the left-right direction) and also move together vertically (can be raised and lowered).

[0040] Spherical air bearing 41 has a fixed portion 41a located at the top and a movable portion 41b located below fixed portion 41a.

[0041] A spherical recess 41a1 is formed on the lower surface of the fixed portion 41a. A spherical protrusion 41b1 is formed on the upper surface of the movable portion 41b, conforming to the recess 41a1. The fixed portion 41a and the movable portion 41b are connected to each other with a slight gap (gap) between them, with the protrusion 41b1 fitted into the recess 41a1. In other words, the movable portion 41b is connected to the fixed portion 41a1 via the protrusion 41b1 so as to be able to swing three-dimensionally along the recess 41a1.

[0042] When compressed air is supplied to the gap, the spherical air bearing 41 enters a state in which the movable part 41b can oscillate three-dimensionally relative to the fixed part 41a (hereinafter referred to as the "free state" where appropriate), and when the compressed air in the gap is sucked in, the spherical air bearing 41 enters a state in which the three-dimensional oscillating movement of the movable part 41b relative to the fixed part 41a is inhibited (i.e., a state in which the position of the movable part 41b relative to the fixed part 41a is fixed; hereinafter referred to as the "locked state" where appropriate).

[0043] The configurations of the fixed portion 41a and the movable portion 41b are not limited to this embodiment, and for example, a spherical convex portion may be provided on the lower surface of the fixed portion 41a, and a spherical concave portion may be provided on the upper surface of the movable portion 41b.

[0044] The bonding head 42 is provided on the lower surface of the movable portion 41b so as to protrude downward, and a heater (not shown) is provided at the lower end of the bonding head 42.

[0045] The lower surface of the heater is formed flat and constitutes the lower end surface 42a of the bonding head 42. A suction mechanism (not shown) is provided on the lower end surface 42a.

[0046] The bonding head 42 then detachably fixes the attachment 43 to the lower end surface 42a by the suction mechanism. The bonding head 42 also heats the attachment 43 by the heater, thereby increasing the temperature of the chip component W held by the attachment 43.

[0047] The attachment 43 is used as a jig for holding the chip component W on the lower end surface 42a of the bonding head 42. A variety of attachments 43 are prepared in advance according to the type of chip component W, and are replaced each time a change in the type of chip component W to be mounted by the mounting device 1 is made.

[0048] The attachment 43 is generally made of a flat plate-like member having an outer size larger than that of the target chip component W, and one of its main surfaces is a holding surface 43a, on which the chip component W is held.

[0049] Specifically, the attachment 43 is detachably fixed with its holding surface 43a facing downward to the lower end surface 42a of the bonding head 42. A suction mechanism (not shown) is provided on the holding surface 43a of the attachment 43.

[0050] Then, the chip component W is supplied to the holding surface 43a of the attachment 43 by a supply device (not shown) with the die attach film F (see Figure 4 (a)) facing downward, and the attachment 43 holds the chip component W supplied by the suction mechanism on the holding surface 43a.

[0051] The control device 5 is an example of a control unit according to the present invention. As described above, the control device 5 controls the operation of the entire mounting device 1, and controls the operation of the mounting device 1 when performing the mounting work of chip components W in the mounting section A1, and also controls the operation of the mounting device 1 when performing the parallelism adjustment process Z01, which will be described later, in the adjustment section A2.

[0052] The control device 5 includes an arithmetic processing unit 51 configured by a CPU (Central Processing Unit), and a memory unit 52 configured by a ROM (Read Only Memory), RAM (Random Access Memory), HDD (Hard Disk Drive), etc., and the memory unit 52 pre-stores a program for executing the mounting work of the chip components W, a program for executing the parallelism adjustment process Z01, etc.

[0053] The control device 5 may be provided with an input means such as a touch panel, and an output means such as a monitor.

[0054] Then, in the mounting section A1, the control device 5 controls the operations of the substrate stage 2, the mounting head 4, etc., thereby performing the mounting work of the chip components W by the mounting device 1. Also, in the adjustment section A2, the control device 5 controls the operations of the height reference bar 3, the mounting head 4, etc., according to an operation procedure described below, thereby performing the parallelism adjustment step Z01 by the mounting device 1.

[0055] In the mounting device 1 configured as described above, the parallelism adjustment process Z01 is performed periodically or irregularly to appropriately adjust the parallelism of the holding surface 43a of the attachment 43 relative to the upper surface 2a of the substrate stage 2, thereby maintaining the parallelism of the holding surface 43a with high precision.

[0056] Here, as described above, the parallelism adjustment process Z01 is performed with the mounting head 4 moved to a predetermined position in the adjustment section A2, and is mainly carried out by sequentially repeating a parallelism adjustment step for adjusting the parallelism of the holding surface 43a of the attachment 43, a parallelism measurement step for measuring the parallelism of the holding surface 43a adjusted by the parallelism adjustment step, and a parallelism determination step for determining whether the parallelism of the holding surface 43a measured by the parallelism measurement step is within the range of the allowable value.

[0057] In the above-mentioned parallelism adjustment step, as shown in Figure 2, the height reference rod 3 is appropriately shifted (moved) and held at a predetermined horizontal position, and then the spherical air bearing 41 is set free and the mounting head 4 (more specifically, the bonding head 42) is lowered, and the holding surface 43a of the attachment 43 fixed to the bonding head 42 is pressed against the abutment portion 3a of the height reference rod 3, thereby arbitrarily changing the inclination angle of the holding surface 43a (i.e., the parallelism of the holding surface 43a of the attachment 43 with respect to the upper surface 2a of the substrate stage 2).

[0058] Then, the spherical air bearing 41 is locked, the inclination angle of the holding surface 43a of the attachment 43 is fixed, and then the mounting head 4 is raised and returned to a predetermined upper limit position, thereby adjusting the parallelism of the holding surface 43a of the attachment 43 relative to the upper surface 2a of the substrate stage 2.

[0059] In the above-mentioned parallelism measurement step, as shown in Figures 3(a) and (b), each time the position of the height reference rod 3 is shifted (moved) horizontally toward a plurality of predetermined locations (for example, the first predetermined position P11 in Figure 3(a) and the second predetermined position P12 in Figure 3(b)), the mounting head 4 (more specifically, the bonding head 42) with the spherical air bearing 41 in a locked state is lowered, and the holding surface 43a of the attachment 43 fixed to the bonding head 42 is pressed against the abutment portion 3a of the height reference rod 3, and the vertical position of the holding surface 43a at this time is measured.

[0060] Then, based on the relationship between the measured multiple vertical positions on the holding surface 43a and the position of the height reference rod 3 at each measurement, the control device 5 performs calculations to calculate the parallelism of the holding surface 43a of the attachment 43 relative to the upper surface 2a of the substrate stage 2.

[0061] In the parallelism determination step, the control device 5 performs a comparison calculation between the parallelism of the holding surface 43a of the attachment 43 obtained in the parallelism measurement step and a preset tolerance value for the parallelism, thereby determining whether the parallelism of the holding surface 43a is good or bad.

[0062] The specific content of the parallelism determination step will be described later.

[0063] As shown in FIG. 5, the memory unit 52 of the control device 5 (see FIG. 1) stores in advance data relating to horizontal coordinate axes (X-axis and Y-axis) for displaying the position of the attachment 43 on the holding surface 43a, and data relating to a vertical coordinate axis (Z-axis) for displaying the tilt direction and tilt amount of the holding surface 43a.

[0064] Then, the control device 5 determines the parallelism of the holding surface 43a of the attachment 43 based on the above data, and executes the parallelism adjusting step, parallelism measuring step, and parallelism determining step described above.

[0065] [Operation Procedure of Mounting Apparatus 1 When Performing Parallelism Adjusting Step Z01] Next, the operation procedure of the mounting apparatus 1 when performing the parallelism adjusting step Z01 will be described with reference to FIG.

[0066] First, a tolerance (N) for the parallelism of the holding surface 43a of the attachment 43 with respect to the upper surface 2a of the substrate stage 2 is preset in the storage unit 52 of the control device 5 (see FIG. 1). The control device 5 is also provided with a function for counting the number of times the parallelism of the holding surface 43a is measured (i.e., the number of times the parallelism measurement operation described above has been performed).

[0067] Then, when the parallelism adjustment process Z01 is started, the control device 5 resets the measurement counter value (d) indicating the number of measurements (d = 0) (step S01), and then immediately executes the parallelism measurement step described above to measure the parallelism (n) of the holding surface 43a of the attachment 43 (step S02).

[0068] Here, the parallelism measurement step in step S02 is an example of an initial parallelism measurement step according to the present invention, and is a step in which the parallelism of the holding surface 43a of the current attachment 43 is measured immediately after the start of the parallelism adjustment process Z01, without performing the above-mentioned parallelism adjustment step.

[0069] After completing step S02, the control device 5 executes the parallelism determination step described above and determines whether the parallelism (n) of the holding surface 43a of the attachment 43 obtained in step S02 is the desired parallelism (step S03).

[0070] Here, the parallelism determination step in step S03 is an example of an initial parallelism determination step according to the present invention, and is a step for determining whether the parallelism (n) of the holding surface 43a of the attachment 43 measured in step S02 is within the range of 1 / 2 of the allowable value (N) (n≦N / 2).

[0071] If the result of the determination in step S03 is that the parallelism (n) of the holding surface 43a of the attachment 43 is within the range of 1 / 2 of the allowable value (N) (YES determination), the parallelism adjusting step Z01 ends.

[0072] On the other hand, if the result of the judgment in step S03 above is that the parallelism (n) of the holding surface 43a of the attachment 43 is not within the range of 1 / 2 of the allowable value (N) (NO judgment), the control device 5 sets the position coordinates to which the height reference bar 3 is moved as the reference coordinates.

[0073] Here, the above-mentioned "reference coordinates" are the position of the height reference rod 3 which is coaxial with the bonding head 42, and are set at the origin (X=0, Y=0) on the horizontal coordinate axes (X-axis and Y-axis) mentioned above.

[0074] Then, as will be described later, the control device 5 executes a parallelism adjustment step in a state in which the height reference bar 3 has been moved to the reference position (see step S05, which will be described later).

[0075] Thus, in this embodiment, the parallelism adjustment process Z01 includes an initial parallelism measurement step (step S02) for measuring the parallelism (n) of the holding surface 43a of the current attachment 43 immediately after the start of the parallelism adjustment process Z01 without performing the parallelism adjustment step, and an initial parallelism determination step (step S03) for determining whether the parallelism (n) of the holding surface 43a measured by the initial parallelism measurement step (step S02) is within the range of 1 / 2 of the allowable value (N) (n≦N / 2).

[0076] Then, in the initial parallelism determination step (step S03), if the parallelism (n) of the holding surface 43a of the attachment 43 is within half the allowable value (N), the parallelism adjustment process Z01 is terminated, and if the parallelism (n) of the holding surface 43a of the attachment 43 is not within half the allowable value, the height reference rod 3 is moved to a reference position coaxial with the bonding head 42, and the parallelism adjustment step (step S05) is executed.

[0077] By performing such an initial parallelism measurement step (step S02) and an initial parallelism determination step (step S03), if the parallelism (n) of the holding surface 43a of the attachment 43 relative to the substrate stage 2 is already within the range of the allowable value (N), it is possible to eliminate the time loss of sequentially repeating the parallelism adjustment step (step S05), parallelism measurement step (step S06), and parallelism determination step (step S07) described below, and it is possible to adjust the parallelism (n) of the holding surface 43a of the attachment 43 relative to the substrate stage 2 more efficiently and with higher precision.

[0078] Furthermore, by setting the judgment standard in the initial parallelism judgment step (step S03) to 1 / 2 of the allowable value (N), for example, when performing the parallelism adjustment process Z01 to adjust the parallelism (n) of the holding surface 43a of the attachment 43, it is possible to prevent the parallelism (n) of the holding surface 43a from always being completed in a state where it is maximally inclined within the allowable value (N) (n = N), which would prevent the parallelism (n) from converging to the desired parallelism.

[0079] After step S03 ends with a NO judgment, the control device 5 increments the measurement counter value (d) (d = +1) (step S04), then executes the parallelism adjustment step described above, moves the height reference bar 3 to the position set in step S03 (the reference position described above), and adjusts the parallelism (n) of the holding surface 43a of the attachment 43 (step S05).

[0080] When step S05 is completed, the control device 5 executes the parallelism measurement step described above, and measures the parallelism (n) of the holding surface 43a of the attachment 43 again (step S06).

[0081] After step S06 is completed, the control device 5 executes the parallelism determination step described above to determine whether the parallelism (n) of the holding surface 43a of the attachment 43 obtained in step S06 is a desired parallelism (step S07). Note that, unlike step S03, step S07 determines whether the parallelism (n) of the holding surface 43a of the attachment 43 obtained in step S06 is within the range of the allowable value (N) (n≦N).

[0082] If the result of the determination in step S07 is that the parallelism (n) of the holding surface 43a of the attachment 43 is within the range of the allowable value (N) (YES determination), the parallelism adjusting step Z01 ends.

[0083] On the other hand, if the result of the determination in step S07 is that the parallelism (n) of the holding surface 43a of the attachment 43 is not within the range of the allowable value (N) (NO determination), the control device 5 sets position coordinates to move the height reference bar 3. Specifically, the control device 5 calculates the shift direction and shift amount for the position of the height reference bar 3 so that the parallelism (n) of the holding surface 43a of the attachment 43 approaches the allowable value (N), and sets the position coordinates based on the calculation results.

[0084] Then, the control device 5 executes step S04 again to increment the measurement counter value (d) (d = +1), and then executes the parallelism adjustment step again (step S05) with the height reference bar 3 shifted to the position coordinate set in step S07, and then repeats the series of operations in steps S06 and S07 described above.

[0085] Thus, in this embodiment, if the parallelism (n) of the holding surface 43a of the attachment 43 is within the range of the tolerance (N) in the parallelism determination step (step S07), the parallelism adjustment process Z01 is terminated, and if the parallelism (n) of the holding surface 43a of the attachment 43 is not within the range of the tolerance (N), the shift direction and shift amount for the position of the height reference bar 3 are calculated so that the parallelism (n) of the holding surface 43a approaches the tolerance (N), and the parallelism adjustment step (step S05) is executed again with the height reference bar 3 shifted to the calculated position (position coordinates).

[0086] With this configuration, the parallelism adjustment step (step S05), the parallelism measurement step (step S06), and the parallelism determination step (step S07) are repeated in sequence while feeding back the results determined in the parallelism determination step (step S07), thereby making it possible to reliably converge the parallelism (n) of the holding surface 43a of the attachment 43 toward the allowable value (N), and thus making it possible to more reliably adjust the parallelism (n) of the holding surface 43a of the attachment 43 relative to the substrate stage 2 with high precision.

[0087] Incidentally, a set counter value (D) is preset in the memory unit 52 of the control device 5 as the maximum number of times that the parallelism adjustment step (step S05), the parallelism measurement step (step S06), and the parallelism determination step (step S07) can be repeatedly executed. Then, in the initial parallelism determination step (step S03) and the parallelism determination step (step S07), the control device 5 executes a comparison operation between the measurement counter value (d) and the set counter value (D), and sets the position coordinates of the height reference bar 3 based on the calculation result. If the measurement counter value (d) exceeds the set counter value (D), the control device 5 immediately terminates the parallelism adjustment process Z01.

[0088] Furthermore, in the parallelism determination step (step S07), if the parallelism (n) of the holding surface 43a of the attachment 43 is within the range of the allowable value (N), the control device 5 stores the position of the height reference bar 3 on the horizontal coordinate axes (X-axis and Y-axis) in the immediately preceding step S05 as the "optimal position" in the memory unit 52, and each time step S05 is executed again, this optimal position is updated to the position of the height reference bar 3 when the parallelism (n) of the holding surface 43a is closer to the desired parallelism.

[0089] Details of the operation procedures for setting the position coordinates of the height reference bar 3 in the initial parallelism determination step (step S03) and the parallelism determination step (step S07) will be described later.

[0090] [Operation procedure of the mounting device 1 when setting the position coordinates of the height reference rod 3] Next, the operation procedure of the mounting device 1 when setting the position coordinates of the height reference rod 3 in the aforementioned initial parallelism determination step (step S03) and parallelism determination step (step S07) will be explained using Figures 7 and 8.

[0091] 7, the control device 5 first determines whether the current measurement counter value (d) is the value immediately after reset (d=0) (step S11). That is, the control device 5 determines whether this determination step is the initial parallelism determination step (step S03) or the parallelism determination step (step S07).

[0092] Then, if the result of the judgment in the above step S11 is that the current measurement counter value (d) is the value immediately after reset (YES judgment), that is, if it is judged that the judgment step in this step is the initial parallelism judgment step (step S03), the control device 5 sets the position coordinate to which the height reference bar 3 is moved to the aforementioned ``reference coordinate'' (step S12), and terminates this operation procedure.

[0093] On the other hand, if the result of the judgment in the above step S11 is that the current measurement counter value (d) is not the value immediately after reset (NO judgment), that is, if it is judged that the judgment step in this step is the parallelism judgment step (step S07), the control device 5 judges whether the current measurement counter value (d) is equal to the above-mentioned set counter value (D) (d = D) (step S13).

[0094] If the result of the judgment in step S13 above is that the current measurement counter value (d) is equal to the set counter value (D) (YES judgment), the control device 5 sets the position coordinate to which the height reference bar 3 is moved to the aforementioned "optimal position" (step S14), and terminates this operation procedure.

[0095] In other words, in this embodiment, step S13 judges that the judgment step in this step is the parallelism judgment step (step S07), which is the last number of times that the parallelism adjustment step (step S05), parallelism measurement step (step S06), and parallelism judgment step (step S07) can be repeatedly executed (YES judgment), and if the parallelism (n) of the holding surface 43a of the attachment 43 is not within the range of the allowable value (N), the control device 5 is configured to shift the height reference bar 3 to the optimal position and execute the parallelism adjustment step (step S05) again.

[0096] As described above, in this embodiment, each time the parallelism adjustment process Z01 for adjusting the parallelism (n) of the holding surface 43a of the attachment 43 is performed, the position of the height reference rod 3 when the parallelism (n) of the holding surface 43a approaches the desired parallelism is successively updated and stored as the optimal position, and if the parallelism (n) of the holding surface 43a of the attachment 43 does not converge within the range of the allowable value (N) even after repeating the parallelism adjustment step (step S05), parallelism measurement step (step S06), and parallelism determination step (step S07) a predetermined number of times, the parallelism adjustment step (step S05) is performed with the height reference rod 3 shifted to the optimal position, and the parallelism (n) of the holding surface 43a is adjusted.

[0097] Therefore, according to this embodiment, it is possible to prevent the parallelism adjustment process Z01 from ending without the parallelism (n) of the holding surface 43a of the attachment 43 converging within the range of the allowable value (N), and the parallelism (n) of the holding surface 43a can be adjusted more reliably and with higher precision.

[0098] On the other hand, if the result of the judgment in step S13 above is that the current measurement counter value (d) is not equal to the set counter value (D) (NO judgment), the control device 5 judges whether the current measurement counter value (d) exceeds the set counter value (D) (d > D), as shown in Figure 8 (step S15).

[0099] If the result of the judgment in step S15 above is that the current measurement counter value (d) does not exceed the set counter value (D) (NO judgment), as described above, the control device 5 calculates the shift direction and shift amount for the position of the height reference bar 3 so that the parallelism (n) of the holding surface 43a of the attachment 43 approaches the allowable value (N), and after setting the optimal position coordinates based on the calculation results (step S16), terminates this operation procedure.

[0100] On the other hand, if the result of the judgment in the above step S15 is that the current measurement counter value (d) exceeds the set counter value (D) (YES judgment), the control device 5 judges whether the parallelism (n) of the holding surface 43a of the attachment 43 obtained by the parallelism measurement step executed immediately before (step S06; see Figure 6) is within the range of the allowable value (N) (n≦N) (step S17).

[0101] Then, if the result of the judgment in step S17 above is that the parallelism (n) of the holding surface 43a of the attachment 43 is within the range of the allowable value (N) (YES judgment), the control device 5 terminates this operation procedure without setting the position coordinates of the height reference bar 3.

[0102] On the other hand, if the result of the judgment in step S17 above is that the parallelism (n) of the holding surface 43a of the attachment 43 exceeds the range of the allowable value (N) (NO judgment), the control device 5 displays an error without setting the position coordinates of the height reference bar 3 (step S18), and terminates this operation procedure.

[0103] As described above, the mounting method for chip components W in this embodiment is a method for mounting chip components W in which the chip components W are supplied to and held on the holding surface 43a of the attachment 43 detachably fixed to the bonding head 42, and the bonding head 42 is lowered to mount the chip components W on the substrate L placed on the substrate stage 2, and includes a parallelism adjustment process Z01 for adjusting the parallelism (n) of the holding surface 43a of the attachment 43 with respect to the upper surface 2a of the substrate stage 2.

[0104] Here, the parallelism adjustment process Z01 includes a parallelism adjustment step (step S05) for adjusting the parallelism (n) of the holding surface 43a, a parallelism measurement step (step S06) for measuring the parallelism (n) of the holding surface 43a adjusted by the parallelism adjustment step (step S05), and a parallelism determination step (step S07) for determining whether the parallelism (n) of the holding surface 43a measured by the parallelism measurement step (step S06) is within the range of the allowable value (N) (n≦N).

[0105] In the parallelism measurement step (step S06), the parallelism (n) of the holding surface 43a is measured by lowering the bonding head 42 each time the position of the height reference bar 3 is shifted horizontally, measuring the vertical position of the holding surface 43a when the holding surface 43a is pressed against the height reference bar 3, and calculating the parallelism (n) based on the relationship between the measured vertical positions of the holding surface 43a and the position of the height reference bar 3 at each measurement. In the parallelism adjustment step (step S05), the parallelism (n) of the holding surface 43a is adjusted by lowering the bonding head 42 with the height reference bar 3 shifted to a horizontal position coordinate (predetermined position), and pressing the holding surface 43a against the height reference bar 3.

[0106] On the other hand, the mounting device for chip components W in this embodiment is a chip component mounting device that supplies and holds chip components W on the holding surface 43a of an attachment 43 that is detachably fixed to a bonding head 42, and mounts the chip components W on a substrate L placed on a substrate stage 2 by lowering the bonding head 42, and is equipped with a control device (control unit) 5 that performs a parallelism adjustment process Z01 that adjusts the parallelism (d) of the holding surface 43a of the attachment 43 with respect to the upper surface 2a of the substrate stage 2 by controlling the operation of the mounting device 1, and a height reference bar 3 that can be displaced horizontally.

[0107] Here, the parallelism adjustment process Z01 includes a parallelism adjustment step (step S05) for adjusting the parallelism (n) of the holding surface 43a, a parallelism measurement step (step S06) for measuring the parallelism (n) of the holding surface 43a adjusted by the parallelism adjustment step (step S05), and a parallelism determination step (step S07) for determining whether the parallelism (n) of the holding surface 43a measured by the parallelism measurement step (step S06) is within the range of the allowable value (N) (n≦N).

[0108] Then, in a parallelism measurement step (step S06), the control device 5 lowers the bonding head 42 each time the position of the height reference bar 3 is shifted horizontally, measures the vertical position of the holding surface 43a when the holding surface 43a is pressed against the height reference bar 3, and performs calculations based on the relationship between the measured vertical positions of the holding surface 43a and the position of the height reference bar 3 at each measurement, thereby measuring the parallelism (n) of the holding surface 43a. Furthermore, in a parallelism adjustment step (step S05), the control device 5 lowers the bonding head 42 with the height reference bar 3 shifted to a horizontal position coordinate (predetermined position), and presses the holding surface 43a against the height reference bar 3, thereby adjusting the parallelism (n) of the holding surface 43a.

[0109] As described above, in the chip component W mounting method and chip component W mounting device 1 of this embodiment, when adjusting the parallelism (n) of the holding surface 43a of the attachment 43 relative to the substrate stage 2, the parallelism adjustment step (step S05) is performed using the height reference rod 3 used when performing the parallelism measurement step (step S06). In this parallelism adjustment step (step S05), the bonding head 42 is lowered with the height reference rod 3 shifted to a predetermined horizontal coordinate (predetermined position), and the holding surface 43a of the attachment 43 is pressed against the height reference rod 3, thereby adjusting the parallelism of the holding surface 43a.

[0110] Therefore, according to the mounting method for chip components W and the mounting device 1 for chip components W in this embodiment, the parallelism (n) of the holding surface 43a of the attachment 43 relative to the substrate stage 2 can be adjusted with high precision without being affected by minute irregularities on the substrate stage 2, compared to the conventional method of adjusting the parallelism (n) of the holding surface 43a of the attachment 43 by directly pressing the holding surface 43a of the attachment 43 against the substrate stage 2.

[0111] The above describes one embodiment of the present invention, but the present invention is not limited to such an embodiment, which is merely an example, and it goes without saying that the present invention can be embodied in various other forms without departing from the gist of the present invention. The scope of the present invention is indicated by the claims, and further includes the meaning of equivalents set forth in the claims, and all modifications within the scope of the claims.

[0112] For example, in this embodiment, the mounting head 4 is configured to be able to move back and forth horizontally and in one direction (left and right) between the mounting section A1 and the adjustment section A2, and the mounting head 4 is moved to each section to perform the mounting work of the chip components W and the parallelism adjustment process Z01, respectively. However, this is not limited to this, and the mounting head 4 may be configured to be unable to move back and forth horizontally and in one direction (left and right), and the substrate stage 2 and height reference bar 3 may be moved appropriately to a position directly below the mounting head 4 to perform the mounting work of the chip components W and the parallelism adjustment process Z01, respectively.

[0113] REFERENCE SIGNS LIST 1 Mounting device 2 Substrate stage 2a Upper surface 3 Height reference bar 42 Bonding head 43 Attachment 43a Holding surface 5 Control device (control unit) L Substrate S02 Initial parallelism measurement step S03 Initial parallelism determination step S05 Parallelism adjustment step S06 Parallelism measurement step S07 Parallelism determination step W Chip component Z01 Parallelism adjustment step

Claims

1. A chip component mounting method comprising: supplying and holding a chip component on a holding surface of an attachment detachably fixed to a bonding head; and lowering the bonding head to mount the chip component on a substrate placed on a substrate stage, the method comprising: a parallelism adjustment step of adjusting the parallelism of the holding surface of the attachment with respect to an upper surface of the substrate stage, the parallelism adjustment step comprising: a parallelism adjustment step of adjusting the parallelism of the holding surface; a parallelism measurement step of measuring the parallelism of the holding surface adjusted in the parallelism adjustment step; and a parallelism determination step of determining whether the parallelism of the holding surface measured in the parallelism measurement step is within an allowable range, wherein in the parallelism measurement step, the measurement of the parallelism of the holding surface is performed by lowering the bonding head each time the position of a height reference bar is shifted horizontally, measuring the vertical position of the holding surface when the holding surface is pressed against the height reference bar, and performing calculations based on the relationship between the measured multiple vertical positions of the holding surface and the position of the height reference bar at each measurement, and wherein in the parallelism adjustment step, a bonding head that is lowered while a height reference bar is shifted to a predetermined horizontal position, and the holding surface is pressed against the height reference bar.

2. The chip component mounting method of claim 1, characterized in that in the parallelism determination step, if the parallelism of the holding surface is within the tolerance range, the parallelism adjustment process is terminated, and if the parallelism of the holding surface is not within the tolerance range, the direction and amount of shift for the position of the height reference rod are calculated so that the parallelism of the holding surface approaches the tolerance, and the parallelism adjustment step is executed again with the height reference rod shifted to the calculated position.

3. The method for mounting chip components according to claim 1 or 2, characterized in that the parallelism adjustment process further comprises an initial parallelism measurement step of measuring the current parallelism of the holding surface immediately after the start of the parallelism adjustment process without executing the parallelism adjustment step, and an initial parallelism determination step of determining whether the parallelism of the holding surface measured in the initial parallelism measurement step is within half of the allowable value, wherein if the parallelism of the holding surface is within half of the allowable value in the initial parallelism determination step, the parallelism adjustment process is terminated, and if the parallelism of the holding surface is not within half of the allowable value, the parallelism adjustment step is executed with the height reference rod moved to a reference position coaxial with the bonding head.

4. A chip component mounting method as set forth in claim 1 or claim 2, characterized in that in said parallelism determination step, if the parallelism of said holding surfaces is within said tolerance range, the position of said height reference rod in said parallelism adjustment step executed immediately before is stored as an optimum position, and said optimum position is updated each time said parallelism adjustment process is executed again to the position of said height reference rod when the parallelism of said holding surfaces is closer to the desired parallelism, and the number of times that said parallelism adjustment step, said parallelism measurement step, and said parallelism determination step can be repeatedly executed is set in advance, and if the parallelism of said holding surfaces is not within said tolerance range in said parallelism determination step which is the last time it is executed, said parallelism adjustment step is executed again with said height reference rod shifted to said optimum position.

5. A chip component mounting device that supplies and holds chip components on the holding surface of an attachment detachably fixed to a bonding head, and mounts the chip components on a substrate placed on a substrate stage by lowering the bonding head, comprising: a control unit that controls the operation of the mounting device to perform a parallelism adjustment process that adjusts the parallelism of the holding surface of the attachment with respect to the upper surface of the substrate stage; and a height reference bar that can be displaced in the horizontal direction, wherein the parallelism adjustment process comprises: a parallelism adjustment step that adjusts the parallelism of the holding surface; a parallelism measurement step that measures the parallelism of the holding surface adjusted in the parallelism adjustment step; and a parallelism determination step that determines whether the parallelism of the holding surface measured in the parallelism measurement step is within an allowable range, and wherein the control unit, in the parallelism measurement step, lowers the bonding head each time the position of the height reference bar is shifted horizontally, and measures the vertical position of the holding surface when pressed against the height reference bar. and measuring the parallelism of the holding surface by measuring the vertical positions of the holding surface one by one and calculating based on the relationship between the measured vertical positions of the holding surface and the position of a height reference bar at each measurement; and in the parallelism adjusting step, lowering the bonding head with the height reference bar shifted to a predetermined position in the horizontal direction and pressing the holding surface against the height reference bar, thereby adjusting the parallelism of the holding surface.

6. The chip component mounting device according to claim 5, wherein said control section, in said parallelism determination step, if the parallelism of said holding surface is within said tolerance range, terminates said parallelism adjustment process, and if the parallelism of said holding surface is not within said tolerance range, calculates a shift direction and amount for the position of said height reference rod so that the parallelism of said holding surface approaches said tolerance value, and executes said parallelism adjustment step again with said height reference rod shifted to the calculated position.

7. The chip component mounting device according to claim 5 or 6, characterized in that the parallelism adjustment process further comprises an initial parallelism measurement step of measuring the current parallelism of the holding surface immediately after the start of the parallelism adjustment process without executing the parallelism adjustment step, and an initial parallelism determination step of determining whether the parallelism of the holding surface measured in the initial parallelism measurement step is within half of the allowable value, and the control unit terminates the parallelism adjustment process if the parallelism of the holding surface is within half of the allowable value in the initial parallelism determination step, and executes the parallelism adjustment step with the height reference rod moved to a reference position coaxial with the bonding head if the parallelism of the holding surface is not within half of the allowable value.

8. The chip component mounting device according to claim 5 or 6, characterized in that, in the parallelism determination step, if the parallelism of the holding surface is within the tolerance range, the control unit stores the position of the height reference rod in the parallelism adjustment step executed immediately before as an optimum position, and each time the parallelism adjustment process is executed again, updates the optimum position to the position of the height reference rod when the parallelism of the holding surface is closer to the desired parallelism, the number of times the parallelism adjustment step, the parallelism measurement step, and the parallelism determination step can be repeatedly executed is set in advance, and if the parallelism of the holding surface is not within the tolerance range in the parallelism determination step which is the last execution, the control unit executes the parallelism adjustment step again with the height reference rod shifted to the optimum position.

Citation Information

Patent Citations

  • Bonding device and bonding

    JP1997219425A

  • Mounting device and measuring method

    JP2014017328A

  • Mounting device and measurement method

    WO2016024364A1

  • Device and method for manufacturing semiconductor device

    WO2021241095A1