Differential power amplifier and power amplification module

Abstract

This differential power amplifier includes a first amplifier and a second amplifier constituting a first differential amplifier, a third amplifier and a fourth amplifier constituting a second differential amplifier, a first inductor and a first capacitor electrically connected between the output of the first amplifier and the output of the second amplifier, a second inductor and a second capacitor electrically connected between the output of the third amplifier and the output of the fourth amplifier, a third inductor magnetically coupled to the first inductor, a fourth inductor magnetically coupled to the second inductor, and a first switch connected between one end of the third inductor and one end of the fourth inductor.

Description

Differential power amplifier and power amplifier module

[0001] The present disclosure relates to a differential power amplifier and a power amplification module.

[0002] The following Patent Document 1 describes a differential amplifier in which multiple differential signals output from multiple amplifier pairs are applied to multiple inductors, respectively, and an output signal in which the multiple differential signals are superimposed is output from one output inductor that is magnetically coupled to the multiple inductors.

[0003] JP 2010-141673 A

[0004] The differential amplifier described in Patent Document 1 is based on the premise that all of the multiple amplifier pairs are operated, and there is no description of switching of output power.

[0005] The present disclosure has been made in view of the above, and aims to enable switching of output power.

[0006] A differential power amplifier according to one aspect of the present disclosure includes a first amplifier and a second amplifier constituting a first differential amplifier, a third amplifier and a fourth amplifier constituting a second differential amplifier, a first inductor and a first capacitance electrically connected between an output of the first amplifier and an output of the second amplifier, respectively, a second inductor and a second capacitance electrically connected between an output of the third amplifier and an output of the fourth amplifier, respectively, a third inductor magnetically coupled to the first inductor, a fourth inductor magnetically coupled to the second inductor, and a first switch connected between one end of the third inductor and one end of the fourth inductor.

[0007] A differential power amplifier according to one aspect of the present disclosure includes a first amplifier and a second amplifier constituting a first differential amplifier, a third amplifier and a fourth amplifier constituting a second differential amplifier, a first inductor and a first capacitance electrically connected between an output of the first amplifier and an output of the second amplifier, respectively, a second inductor and a second capacitance electrically connected between an output of the third amplifier and an output of the fourth amplifier, respectively, a third inductor magnetically coupled to the first inductor, a fourth inductor magnetically coupled to the second inductor, and a first switch having one end electrically connected to one end of the third inductor and the other end electrically connected to the same potential as the other end of the third inductor.

[0008] A power amplification module according to one aspect of the present disclosure includes the differential power amplifier according to the present disclosure and a third switch electrically connected to the second output terminal.

[0009] According to the present disclosure, it is possible to switch the output power of a differential power amplifier.

[0010] Fig. 1 is a diagram showing the circuit configuration of a power amplifier module according to a first embodiment. Fig. 2 is a diagram showing the circuit configuration of a power amplifier module according to a second embodiment. Fig. 3 is a diagram showing the circuit configuration of a power amplifier module according to a third embodiment. Fig. 4 is a diagram showing the circuit configuration of a power amplifier module according to a fourth embodiment. Fig. 5 is a diagram showing the circuit configuration of a power amplifier module according to a fifth embodiment. Fig. 6 is a diagram showing the circuit configuration of a power amplifier module according to a sixth embodiment.

[0011] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. However, the present invention is not limited to these embodiments. Each embodiment is an example, and it goes without saying that partial substitution or combination of the configurations shown in different embodiments is possible. From the second embodiment onwards, a description of matters common to the first embodiment will be omitted, and only the differences will be described. In particular, similar effects resulting from similar configurations will not be mentioned in each embodiment.

[0012] 1 is a diagram showing the circuit configuration of a power amplifier module according to a first embodiment. A power amplifier module M1 includes bias circuits 1 to 4, a control circuit 5, and a differential power amplifier 100.

[0013] A first-phase radio frequency input signal RFIN+, which is a first-phase signal among the differential input signals, is input to terminals 111 and 112 of differential power amplifier 100. Furthermore, a second-phase radio frequency input signal RFIN−, which is a second-phase signal among the differential input signals, is input to terminals 113 and 114 of differential power amplifier 100. Differential power amplifier 100 amplifies first-phase radio frequency input signal RFIN+ and second-phase radio frequency input signal RFIN−, and outputs a single-ended radio frequency output signal RFOUT from terminal 180.

[0014] The terminal 180 corresponds to an example of an "output terminal" in the present disclosure.

[0015] In the embodiment, the first phase is a positive phase (positive polarity) and the second phase is a negative phase (negative polarity), but the present disclosure is not limited to this. The first phase may be a negative phase and the second phase may be a positive phase.

[0016] Differential power amplifier 100 includes amplifier 120 , amplifier 130 , amplifier 140 , amplifier 150 , capacitor 161 , capacitor 162 , inductor 171 , inductor 172 , inductor 173 , inductor 174 , and switch 176 .

[0017] The amplifier 120 corresponds to an example of a "first amplifier" in the present disclosure. The amplifier 130 corresponds to an example of a "second amplifier" in the present disclosure. The amplifier 140 corresponds to an example of a "third amplifier" in the present disclosure. The amplifier 150 corresponds to an example of a "fourth amplifier" in the present disclosure.

[0018] The amplifiers 120 and 130 correspond to an example of a "first differential amplifier" in the present disclosure. The amplifiers 140 and 150 correspond to an example of a "second differential amplifier" in the present disclosure.

[0019] The capacitor 161 corresponds to an example of a "first capacitance" in the present disclosure. The capacitor 162 corresponds to an example of a "second capacitance" in the present disclosure.

[0020] Inductor 171 corresponds to an example of a "first inductor" in the present disclosure. Inductor 173 corresponds to an example of a "second inductor" in the present disclosure. Inductor 172 corresponds to an example of a "third inductor" in the present disclosure. Inductor 174 corresponds to an example of a "fourth inductor" in the present disclosure.

[0021] In the embodiment, the inductors 171 to 174 have the same inductance value, but the present disclosure is not limited to this. The inductors 171 to 174 may have different inductance values.

[0022] The switch 176 corresponds to an example of a "first switch" in the present disclosure.

[0023] The differential power amplifier 100 has a first mode (hereinafter sometimes referred to as a "high power mode") in which all of the amplifiers from 120 to 150 are in an amplifying operation and output a relatively large amount of power. The differential power amplifier 100 also has a second mode (hereinafter sometimes referred to as a "low power mode") in which only the amplifiers 120 and 130 are in an amplifying operation and the amplifiers 140 and 150 are not in an amplifying operation and output a relatively small amount of power. The output power in the second mode is illustrated as half the output power in the first mode, but the present disclosure is not limited to this.

[0024] The amplifier 120 includes a transistor 122. The amplifier 130 includes a transistor 132. The amplifier 140 includes a transistor 142. The amplifier 150 includes a transistor 152.

[0025] In this disclosure, each transistor is a bipolar transistor, but the present disclosure is not limited to this. An example of a bipolar transistor is a heterojunction bipolar transistor (HBT), but the present disclosure is not limited to this. The transistor may be, for example, a field effect transistor (FET). The transistor may be a multi-finger transistor in which multiple unit transistors are electrically connected in parallel. A unit transistor refers to the minimum configuration that constitutes a transistor.

[0026] When each transistor is a FET, the source corresponds to the emitter of the bipolar transistor, the gate corresponds to the base of the bipolar transistor, and the drain corresponds to the collector of the bipolar transistor.

[0027] In the embodiment, the sizes (number of fingers) of the transistors 122 to 152 are the same, but the present disclosure is not limited to this. The sizes of the transistors 122 to 152 may be different.

[0028] Bias circuit 1 outputs a base bias current to the base of transistor 142 in response to a control signal S1 output from the control circuit 5. Bias circuit 2 outputs a base bias current to the base of transistor 122 in response to a control signal S2 output from the control circuit 5. Bias circuit 3 outputs a base bias current to the base of transistor 132 in response to a control signal S3 output from the control circuit 5. Bias circuit 4 outputs a base bias current to the base of transistor 152 in response to a control signal S4 output from the control circuit 5.

[0029] The switch 176 is controlled to be in an on state or an off state in response to a control signal S 11 output from the control circuit 5 .

[0030] The emitter of the transistor 122 is electrically connected to a reference potential. The reference potential is, for example, a ground potential, but the present disclosure is not limited to this. The first-phase radio frequency input signal RFIN+ is input to the base of the transistor 122 via the terminal 112, and a base bias current is input from the bias circuit 2.

[0031] The collector of the transistor 122 is electrically connected to one end of the inductor 171. The midpoint of the inductor 171 is electrically connected to a terminal 182. The power supply voltage Vcc is input to the midpoint of the inductor 171 via the terminal 182. The power supply voltage Vcc is input to the collector of the transistor 122 via the terminal 182, the midpoint of the inductor 171, and one end of the inductor 171. The transistor 122 amplifies the first phase high frequency input signal RFIN+ input to the base, and outputs the amplified first phase high frequency signal RF1 from the collector.

[0032] The terminal 182 corresponds to an example of a "first power supply terminal" in the present disclosure.

[0033] The emitter of the transistor 132 is electrically connected to the reference potential. The second phase high frequency input signal RFIN− is input to the base of the transistor 132 via the terminal 113, and the base bias current is input from the bias circuit 3.

[0034] The collector of the transistor 132 is electrically connected to the other end of the inductor 171. The power supply voltage Vcc is input to the collector of the transistor 132 via the terminal 182, the midpoint of the inductor 171, and the other end of the inductor 171. The transistor 132 amplifies the second-phase high-frequency input signal RFIN− input to the base, and outputs the amplified second-phase high-frequency signal RF2 from the collector.

[0035] One end of the capacitor 161 is electrically connected to the collector of the transistor 122. The other end of the capacitor 161 is electrically connected to the collector of the transistor 132.

[0036] Capacitor 161 serves to match impedance between the collector of transistor 122 and the collector of transistor 132 .

[0037] In the inductor 171, the first-phase high-frequency signal RF1 output from the collector of the transistor 122 and the second-phase high-frequency signal RF2 output from the collector of the transistor 132 are superimposed (combined).

[0038] The emitter of the transistor 142 is electrically connected to the reference potential. The first-phase radio frequency input signal RFIN+ is input to the base of the transistor 142 via the terminal 111, and a base bias current is input from the bias circuit 1.

[0039] The collector of the transistor 142 is electrically connected to one end of the inductor 173. The midpoint of the inductor 173 is electrically connected to a terminal 183. The power supply voltage Vcc is input to the midpoint of the inductor 173 via the terminal 183. The power supply voltage Vcc is input to the collector of the transistor 142 via the terminal 183, the midpoint of the inductor 173, and one end of the inductor 173. The transistor 142 amplifies the first phase high frequency input signal RFIN+ input to the base, and outputs the amplified first phase high frequency signal RF3 from the collector.

[0040] The terminal 183 corresponds to an example of a "second power supply terminal" in the present disclosure.

[0041] The power supply voltage input to the terminal 182 and the power supply voltage input to the terminal 183 may be the same or different.

[0042] The emitter of the transistor 152 is electrically connected to the reference potential. The second phase high frequency input signal RFIN− is input to the base of the transistor 152 via the terminal 114, and the base bias current is input from the bias circuit 4.

[0043] The collector of transistor 152 is electrically connected to the other end of inductor 173. The power supply voltage Vcc is input to the collector of transistor 152 via terminal 183, the midpoint of inductor 173, and the other end of inductor 173. Transistor 152 amplifies the second-phase high-frequency input signal RFIN− input to its base, and outputs the amplified second-phase high-frequency signal RF4 from its collector.

[0044] One end of the capacitor 162 is electrically connected to the collector of the transistor 142. The other end of the capacitor 162 is electrically connected to the collector of the transistor 152.

[0045] Capacitor 162 provides impedance matching between the collector of transistor 142 and the collector of transistor 152 .

[0046] In the inductor 173, the first phase high frequency signal RF3 output from the collector of the transistor 142 and the second phase high frequency signal RF4 output from the collector of the transistor 152 are superimposed (combined).

[0047] One end of the inductor 172 is electrically connected to the terminal 180. The other end of the inductor 172 is grounded in terms of DC or AC. For example, the other end of the inductor 172 is electrically connected to a reference potential, but the present disclosure is not limited thereto.

[0048] The inductors 171 and 172 are magnetically coupled as indicated by the dotted line 301. Therefore, the high frequency signal generated in the inductor 171 is propagated to the inductor 172 via the magnetic field coupling and is output from the terminal 180.

[0049] One end of the switch 176 is electrically connected to one end of the inductor 172 and the terminal 180. The other end of the switch 176 is electrically connected to one end of the inductor 174. The other end of the inductor 174 is grounded in terms of DC or AC. For example, the other end of the inductor 174 is electrically connected to a reference potential, but the present disclosure is not limited to this example.

[0050] The inductors 173 and 174 are magnetically coupled as indicated by the dotted line 302. Therefore, the high frequency signal generated in the inductor 173 propagates to the inductor 174 via the magnetic field coupling.

[0051] (First Mode Operation of Differential Amplifier) ​​When the differential power amplifier 100 operates in the first mode, the control circuit 5 controls all of the bias circuits 1 to 4 to output base bias currents, thereby causing all of the amplifiers 120 to 150 to perform amplification operations.

[0052] When the differential power amplifier 100 operates in the first mode, the control circuit 5 controls the switch 176 to the on state.

[0053] When the switch 176 is in an on state, one end of the inductor 174 is electrically connected to one end of the inductor 172 and the terminal 180. That is, the inductors 172 and 174 are connected in parallel.

[0054] Therefore, the radio frequency output signal RFOUT output from the terminal 180 is a signal obtained by adding the currents of the radio frequency signal output from one end of the inductor 172 and the radio frequency signal output from one end of the inductor 174 .

[0055] (Second Mode Operation of Differential Amplifier) ​​When the differential power amplifier 100 operates in the second mode, the control circuit 5 controls the bias circuits 2 and 3 to output base bias currents, thereby causing the amplifiers 120 and 130 to perform amplification operations.

[0056] Furthermore, when the differential power amplifier 100 operates in the second mode, the control circuit 5 controls the bias circuits 1 and 4 so as not to output base bias currents, thereby preventing the amplifiers 140 and 150 from performing amplification operations.

[0057] When the differential power amplifier 100 operates in the second mode, the control circuit 5 controls the switch 176 to the off state.

[0058] When the switch 176 is in the off state, one end of the inductor 174 is electrically disconnected from one end of the inductor 172 and the terminal 180 .

[0059] Therefore, the high frequency output signal RFOUT output from the terminal 180 is the high frequency signal output from one end of the inductor 172 .

[0060] (Effects) [1] Consider the case where the switch 176 does not exist and one end of the inductor 174 is always electrically connected to one end of the inductor 172 and the terminal 180.

[0061] When the differential power amplifier 100 operates in the second mode, the amplifier 140 and the amplifier 150 do not perform an amplification operation.

[0062] In this case, when the differential power amplifier 100 is viewed from the terminal 180 side (the load side), the parallel resonant circuit formed by the capacitor 162 and the inductor 173 appears to be electromagnetically connected to the terminal 180 via the magnetic field coupling between the inductor 174 and the inductor 173 (see dotted line 302).

[0063] The resonant frequency of the parallel resonant circuit (capacitor 162 and inductor 173) is approximately the same as the frequency of the high frequency signals (first phase high frequency input signal RFIN+, second phase high frequency input signal RFIN-, high frequency output signal RFOUT).

[0064] Therefore, in the differential power amplifier 100, power loss occurs due to the parallel resonant circuit (capacitor 162 and inductor 173), resulting in a decrease in efficiency.

[0065] On the other hand, in this embodiment, when the differential power amplifier 100 operates in the second mode, the control circuit 5 controls the switch 176 to the off state.

[0066] As a result, one end of the inductor 174 is electrically isolated from one end of the inductor 172 and the terminal 180 .

[0067] In this case, when the differential power amplifier 100 is viewed from the terminal 180 side (the load side), the above-mentioned parallel resonant circuit (capacitor 162 and inductor 173) appears not to be electromagnetically connected to the terminal 180.

[0068] Therefore, the differential power amplifier 100 can suppress the power loss due to the parallel resonant circuit (the capacitor 162 and the inductor 173) and can suppress the decrease in efficiency.

[0069] In this way, the differential power amplifier 100 can achieve a first mode with a relatively large output power and a second mode with a relatively small output power while suppressing power loss and reducing efficiency.

[0070] [2] The power supply voltage Vcc is supplied to the midpoint of inductor 171 via terminal 182. The power supply voltage Vcc is supplied to the midpoint of inductor 173 via terminal 183. In other words, terminal 182 supplies the power supply voltage Vcc to amplifiers 120 and 130, and terminal 183 supplies the power supply voltage Vcc to amplifiers 140 and 150, and these terminals are separate.

[0071] Therefore, compared to the case where there is one terminal for supplying the power supply voltage Vcc from the amplifier 120 to the amplifier 150, the current value per power supply terminal can be reduced.

[0072] 2 is a diagram showing the circuit configuration of a power amplifier module according to a second embodiment. A power amplifier module M1A includes bias circuits 1 to 4, a control circuit 5A, and a differential power amplifier 100A.

[0073] The differential power amplifier 100A further includes a capacitance circuit 200A in comparison with the differential power amplifier 100 (see FIG. 1). The differential power amplifier 100A is controlled by a control circuit 5A instead of the control circuit 5.

[0074] The capacitance circuit 200A includes a variable capacitor 191 and a variable capacitor 192 .

[0075] The variable capacitor 191 corresponds to an example of a "first variable capacitance" in the present disclosure. The variable capacitor 192 corresponds to an example of a "second variable capacitance" in the present disclosure.

[0076] One end of the variable capacitor 191 is electrically connected to one end of the inductor 172. The other end of the variable capacitor 191 is electrically connected to the reference potential. The capacitance of the variable capacitor 191 varies in response to a control signal S12 output from the control circuit 5A.

[0077] The capacitance of the variable capacitor 191 may be variable continuously (analogically) or may be variable discretely (for example, capable of taking two capacitance values, three capacitance values, etc.).

[0078] One end of the variable capacitor 192 is electrically connected to one end of the inductor 172. The other end of the variable capacitor 192 is electrically connected to the terminal 180. The capacitance of the variable capacitor 192 varies in response to a control signal S13 output from the control circuit 5A.

[0079] The capacitance of the variable capacitor 192 may be variable continuously (analogically) or discretely (for example, it may take two capacitance values, three capacitance values, etc.).

[0080] (Effects) [Effects of the variable capacitor 191] When the differential power amplifier 100A operates in the first mode, when the differential power amplifier 100A is viewed from the terminal 180 side (load side), the inductors 172 and 174 appear to be connected in parallel. For example, if the inductance value of each of the inductors 172 and 174 is L, the inductors 172 and 174 are equivalent to a single inductor with an inductance value of L / 2. In other words, when the differential power amplifier 100A is viewed from the terminal 180 side (load side), the inductance value appears to be L / 2.

[0081] On the other hand, when the differential power amplifier 100A operates in the second mode, when the differential power amplifier 100A is viewed from the terminal 180 side (load side), only the inductor 172 is visible. Therefore, when the differential power amplifier 100A is viewed from the terminal 180 side (load side), the inductance value appears to be L.

[0082] That is, when the differential power amplifier 100A is viewed from the terminal 180 side (load side), the inductance value appears to be different between the first mode and the second mode.

[0083] Therefore, the control circuit 5A varies the capacitance of the variable capacitor 191 depending on whether the first mode or the second mode is used.

[0084] When the differential power amplifier 100A operates in the first mode, the variable capacitor 191 forms a parallel resonant circuit with the inductor 172 and the inductor 174 .

[0085] For example, when the differential power amplifier 100A operates in the first mode, the control circuit 5A may set the capacitance of the variable capacitor 191 to be relatively large because the inductance value of the differential power amplifier 100A appears relatively small (inductance value L / 2) when viewed from the terminal 180 side (load side). However, the present disclosure is not limited to this.

[0086] When the differential power amplifier 100A operates in the second mode, the variable capacitor 191 and the inductor 172 form a parallel resonant circuit.

[0087] For example, when the differential power amplifier 100A operates in the second mode, the control circuit 5A makes the capacitance of the variable capacitor 191 relatively small because the inductance value (inductance value L) appears relatively large when the differential power amplifier 100A is viewed from the terminal 180 side (load side). However, the present disclosure is not limited to this.

[0088] When the differential power amplifier 100A operates in the first mode, the variable capacitor 191 forms an output matching circuit together with the inductor 172 and the inductor 174. When the differential power amplifier 100A operates in the second mode, the variable capacitor 191 forms an output matching circuit together with the inductor 172.

[0089] This allows the variable capacitor 191 to adjust the output impedance of the differential power amplifier 100A as viewed from the side (load side) of the terminal 180. For example, the variable capacitor 191 can keep the output impedance constant when the differential power amplifier 100 operates in the first mode and when it operates in the second mode.

[0090] [Effects of Variable Capacitor 192] First, the variable capacitor 192 serves as a DC blocking capacitor that cuts the DC component of the high frequency output signal RFOUT.

[0091] Second, the variable capacitor 192 allows fine tuning of the output impedance of the differential power amplifier 100A.

[0092] For example, when the variable capacitor 191 is variable discretely (for example, can take two capacitance values, can take three capacitance values, etc.), and the output impedance of the differential power amplifier 100A cannot be fully adjusted by changing the capacitance value of the variable capacitor 191 alone, the variable capacitor 192 can fine-tune the output impedance.

[0093] 3 is a diagram showing the circuit configuration of a power amplifier module according to a third embodiment. A power amplifier module M1B includes bias circuits 1 to 4, a control circuit 5B, and a differential power amplifier 100B.

[0094] The differential power amplifier 100B further includes a capacitance circuit 200B in comparison with the differential power amplifier 100 (see FIG. 1). The differential power amplifier 100B is controlled by a control circuit 5B instead of the control circuit 5.

[0095] The capacitance circuit 200B includes a capacitor 193 , a capacitor 194 , a capacitor 195 , a capacitor 196 , and a switch 197 .

[0096] Capacitor 193 corresponds to an example of a "third capacitance" in the present disclosure. Capacitor 194 corresponds to an example of a "fourth capacitance" in the present disclosure. Capacitor 195 corresponds to an example of a "fifth capacitance" in the present disclosure. Capacitor 196 corresponds to an example of a "sixth capacitance" in the present disclosure.

[0097] The switch 197 corresponds to an example of a "second switch" in the present disclosure.

[0098] One end of the capacitor 193 is electrically connected to one end of the inductor 172. The other end of the capacitor 193 is electrically connected to the reference potential.

[0099] One end of the capacitor 194 is electrically connected to one end of the inductor 174. The other end of the capacitor 194 is electrically connected to the reference potential.

[0100] One end of the capacitor 195 is electrically connected to one end of the inductor 172. The other end of the capacitor 195 is electrically connected to the terminal 180.

[0101] One end of the switch 197 is electrically connected to one end of the inductor 172. The other end of the switch 197 is electrically connected to one end of the capacitor 196. The other end of the capacitor 196 is electrically connected to the terminal 180.

[0102] The switch 197 is controlled to be in an on state or an off state in response to a control signal S14 output from the control circuit 5B.

[0103] (Effects) [Effects of Capacitor 193 and Capacitor 194] When the differential power amplifier 100B operates in the first mode, the switch 176 is on, and therefore the capacitors 193 and 194 are connected in parallel. If the capacitance of the capacitor 193 is C1 and the capacitance of the capacitor 194 is C2, then the capacitors 193 and 194 are equivalent to a single capacitor with a capacitance of (C1 + C2). Note that the capacitances C1 and C2 may be the same or different.

[0104] Therefore, when the differential power amplifier 100B operates in the first mode, when the differential power amplifier 100B is viewed from the terminal 180 side (the load side), the parallel-connected inductor 172 and inductor 174 and the parallel-connected capacitor 193 and capacitor 194 appear to be connected in parallel.

[0105] That is, when the differential power amplifier 100B operates in the first mode, the capacitors 193 and 194 form an output matching circuit together with the inductors 172 and 174 .

[0106] On the other hand, when the differential power amplifier 100B operates in the second mode, the switch 176 is in the OFF state, and therefore the inductor 174 and the capacitor 194 are electrically disconnected from one end of the inductor 172 .

[0107] Therefore, when the differential power amplifier 100B operates in the second mode, when the differential power amplifier 100B is viewed from the terminal 180 side (load side), the inductor 172 and the capacitor 193 appear to be connected in parallel.

[0108] That is, when the differential power amplifier 100B operates in the second mode, the capacitor 193 and the inductor 172 form an output matching circuit.

[0109] This allows the capacitors 193 and 194 to adjust the output impedance of the differential power amplifier 100B when viewed from the side (load side) of the terminal 180. For example, the capacitors 193 and 194 can keep the output impedance constant when the differential power amplifier 100B operates in the first mode and when it operates in the second mode.

[0110] In other words, the capacitors 193 and 194 have the same effect as the variable capacitor 191 (see FIG. 2) of the second embodiment.

[0111] [Effect of Capacitor 195] The capacitor 195 functions as a DC blocking capacitor that cuts the DC component of the high frequency output signal RFOUT.

[0112] [Effect of Capacitor 196] The capacitor 196 can finely adjust the output impedance of the differential power amplifier 100B.

[0113] For example, when the differential power amplifier 100B operates in the first mode, the control circuit 5B may control the switch 197 to the off state, thereby electrically isolating the capacitor 196 from one end of the capacitor 195.

[0114] Alternatively, when the differential power amplifier 100B operates in the first mode, the control circuit 5B may control the switch 197 to the on state, thereby making the capacitors 195 and 196 equivalent to one capacitor connected in parallel.

[0115] Furthermore, for example, when the differential power amplifier 100B operates in the second mode, the control circuit 5B may control the switch 197 to the on state, thereby making the capacitors 195 and 196 equivalent to one capacitor connected in parallel.

[0116] Alternatively, when the differential power amplifier 100B operates in the second mode, the control circuit 5B may control the switch 197 to the off state, thereby electrically isolating the capacitor 196 from one end of the capacitor 195.

[0117] This allows the capacitor 196 to finely adjust the output impedance when the capacitors 193 and 194 alone are not sufficient to adjust the output impedance of the differential power amplifier 100B.

[0118] In other words, the capacitors 195 and 196 have the same effect as the variable capacitor 192 (see FIG. 2) of the second embodiment.

[0119] In the third embodiment, a capacitor (not shown) can be connected in parallel to the switch 197 and the capacitor 196. Furthermore, a switch can be connected in series to the capacitor.

[0120] 4 is a diagram showing the circuit configuration of a power amplifier module according to a fourth embodiment. A power amplifier module M1C includes bias circuits 1 to 4, a control circuit 5C, and a differential power amplifier 100C.

[0121] In the first mode of the differential power amplifier 100C, all of the amplifiers from 120 to 150 perform amplification. In the second mode of the differential power amplifier 100C, only the amplifiers 140 and 150 perform amplification, and the amplifiers 120 and 130 do not perform amplification.

[0122] The differential power amplifier 100C is controlled by a control circuit 5C instead of the control circuit 5.

[0123] The differential power amplifier 100C includes circuit components similar to those of the differential power amplifier 100. However, the differential power amplifier 100C differs from the differential power amplifier 100 in the connection relationship of the inductor 172, the inductor 174, and the switch 176.

[0124] One end of the inductor 172 is electrically connected to the other end of the inductor 174. One end of the inductor 174 is electrically connected to a terminal 180.

[0125] One end of the switch 176 is electrically connected to the other end of the inductor 174 and one end of the inductor 172. The other end of the switch 176 is grounded in terms of DC or AC.

[0126] That is, the other end of the inductor 172 and the other end of the switch 176 are at the same potential.

[0127] The switch 176 is controlled to be in an on state or an off state in response to a control signal S15 output from the control circuit 5C.

[0128] (First Mode Operation of Differential Amplifier) ​​When the differential power amplifier 100C operates in the first mode, the control circuit 5C controls all of the bias circuits 1 to 4 to output base bias currents, thereby causing all of the amplifiers 120 to 150 to perform amplification operations.

[0129] When the differential power amplifier 100C operates in the first mode, the control circuit 5C controls the switch 176 to the off state.

[0130] When switch 176 is in the off state, inductor 172 and inductor 174 are connected in series.

[0131] Therefore, the high frequency output signal RFOUT output from the terminal 180 is a signal obtained by adding the voltages of the high frequency signal output from the inductor 172 and the high frequency signal output from the inductor 174 .

[0132] (Second Mode Operation of Differential Amplifier) ​​When the differential power amplifier 100C operates in the second mode, the control circuit 5C controls the bias circuits 1 and 4 to output base bias currents, thereby causing the amplifiers 140 and 150 to perform amplification operations.

[0133] Furthermore, when the differential power amplifier 100C operates in the second mode, the control circuit 5C controls the bias circuits 2 and 3 so as not to output base bias currents to them. As a result, the amplifiers 120 and 130 do not perform amplification operations.

[0134] When the differential power amplifier 100C operates in the second mode, the control circuit 5C controls the switch 176 to the on state.

[0135] When the switch 176 is in an on state, the other end of the inductor 174 is grounded in terms of DC or AC.

[0136] Furthermore, when the switch 176 is in an on state, both ends of the inductor 172 are short-circuited by the switch 176. In other words, the impedance of the inductor 172 as viewed from the terminal 180 is in a high impedance state.

[0137] Therefore, the high frequency output signal RFOUT output from the terminal 180 is the high frequency signal output from one end of the inductor 174 .

[0138] (Effect) Consider the case where the switch 176 does not exist and one end of the inductor 172 is always electrically connected to the other end of the inductor 174.

[0139] When the differential power amplifier 100C operates in the second mode, the amplifier 140 and the amplifier 150 do not perform amplification.

[0140] In this case, when the differential power amplifier 100C is viewed from the terminal 180 side (load side), the parallel resonant circuit formed by the capacitor 161 and the inductor 171 appears to be electromagnetically connected to the terminal 180 via the magnetic field coupling (see dotted line 301) between the inductors 171 and 172.

[0141] The resonant frequency of the parallel resonant circuit (capacitor 161 and inductor 171) is approximately the same as the frequency of the high frequency signals (first phase high frequency input signal RFIN+, second phase high frequency input signal RFIN-, high frequency output signal RFOUT).

[0142] Therefore, in the differential power amplifier 100C, power loss occurs due to the parallel resonant circuit (capacitor 161 and inductor 171), resulting in a decrease in efficiency.

[0143] On the other hand, in this embodiment, when the differential power amplifier 100C operates in the second mode, the control circuit 5C controls the switch 176 to the on state.

[0144] As a result, both ends of the inductor 172 are short-circuited by the switch 176. That is, the inductor 172 is in a high impedance state. Therefore, one end of the inductor 172 is equivalent to being electrically disconnected from the other end of the inductor 174.

[0145] In this case, when the differential power amplifier 100C is viewed from the terminal 180 side (the load side), the above-mentioned parallel resonant circuit (capacitor 161 and inductor 171) appears not to be electromagnetically connected to the terminal 180.

[0146] Therefore, the differential power amplifier 100C can suppress power loss due to the parallel resonant circuit (the capacitor 161 and the inductor 171) and can suppress a decrease in efficiency.

[0147] In this way, the differential power amplifier 100C can achieve a first mode with a relatively large output power and a second mode with a relatively small output power while suppressing power loss and reducing efficiency.

[0148] (Modification of the Fourth Embodiment) The differential power amplifier 100C of the fourth embodiment may include a capacitance circuit 200A (see FIG. 2) or a capacitance circuit 200B (see FIG. 3) between one end of the inductor 174 and the terminal 180.

[0149] This allows the differential power amplifier 100C to adjust the output impedance when viewed from the side (load side) of the terminal 180. For example, the differential power amplifier 100C can maintain a constant output impedance when operating in the first mode and when operating in the second mode.

[0150] 5 is a diagram showing the circuit configuration of a power amplifier module according to a fifth embodiment. A power amplifier module M1D includes bias circuits 1 to 4, a control circuit 5D, and a differential power amplifier 100D.

[0151] Compared to the differential power amplifier 100 (see FIG. 1), the differential power amplifier 100D includes terminals 180a and 180b instead of the terminal 180.

[0152] The terminal 180a corresponds to an example of a "first output terminal" in the present disclosure, and the terminal 180b corresponds to an example of a "second output terminal" in the present disclosure.

[0153] The terminal 180 a is electrically connected to one end of the inductor 172 and one end of the switch 176 .

[0154] The terminal 180 b is electrically connected to one end of the inductor 174 and the other end of the switch 176 .

[0155] The differential power amplifier 100D is controlled by a control circuit 5D instead of the control circuit 5.

[0156] In the first mode of the differential power amplifier 100D, all of the amplifiers from 120 to 150 perform amplification. In the second mode of the differential power amplifier 100D, only the amplifiers 140 and 150 perform amplification, and the amplifiers 120 and 130 do not perform amplification.

[0157] The terminal 180b is electrically connected to an input terminal 221 of the switch 220. The switch 220 is controlled by a control signal S16 input from the control circuit 5D.

[0158] In response to the control signal S16, the switch 220 does not electrically connect the input terminal 221 to any of the plurality of output terminals 222a, 222b, . . . , 222n (switch-off state).

[0159] Furthermore, the switch 220 electrically connects the input terminal 221 to any one of the plurality of output terminals 222a, 222b, . . . , 222n in response to the control signal S16 (switch-on state).

[0160] (First Mode Operation of Differential Amplifier) ​​When the differential power amplifier 100D operates in the first mode, the control circuit 5D controls all of the bias circuits 1 to 4 to output base bias currents, thereby causing all of the amplifiers 120 to 150 to perform amplification operations.

[0161] When the differential power amplifier 100D operates in the first mode, the control circuit 5D controls the switch 176 to the on state.

[0162] When the differential power amplifier 100D operates in the first mode, the control circuit 5D controls the switch 220 to the off state.

[0163] When the switch 176 is in an on state, one end of the inductor 174 is electrically connected to one end of the inductor 172 and the terminal 180a. That is, the inductors 172 and 174 are connected in parallel.

[0164] Therefore, the high frequency output signal RFOUT1 output from the terminal 180a is a signal obtained by adding the currents of the high frequency signal output from one end of the inductor 172 and the high frequency signal output from one end of the inductor 174 together.

[0165] (Second Mode Operation of Differential Amplifier) ​​When the differential power amplifier 100D operates in the second mode, the control circuit 5D controls the bias circuits 1 and 4 to output base bias currents, thereby causing the amplifiers 140 and 150 to perform amplification operations.

[0166] Furthermore, when the differential power amplifier 100D operates in the second mode, the control circuit 5D controls the bias circuits 2 and 3 so as not to output base bias currents to them. As a result, the amplifiers 120 and 130 do not perform amplification operations.

[0167] When the differential power amplifier 100D operates in the second mode, the control circuit 5D controls the switch 176 to the off state.

[0168] When the differential power amplifier 100D operates in the second mode, the control circuit 5D controls the switch 220 to the on state, thereby electrically connecting the input terminal 221 to any one of the plurality of output terminals 222a, 222b, ..., 222n.

[0169] When the switch 176 is in the off state, one end of the inductor 174 is electrically disconnected from one end of the inductor 172 and the terminal 180a.

[0170] Therefore, the high frequency output signal RFOUT2 output from the terminal 180b is the high frequency signal output from one end of the inductor 174.

[0171] (Effects) [1] Consider the case where the switch 176 does not exist and one end of the inductor 174 is always electrically connected to one end of the inductor 172 and the terminal 180a.

[0172] When the differential power amplifier 100D operates in the second mode, the amplifier 120 and the amplifier 130 do not perform amplification.

[0173] In this case, when the differential power amplifier 100D is viewed from the side of terminal 180b (the side of switch 220), the parallel resonant circuit formed by capacitor 161 and inductor 171 appears to be electromagnetically connected to terminal 180b via the magnetic field coupling (see dotted line 301) between inductors 171 and 172.

[0174] The resonant frequency of the above parallel resonant circuit (capacitor 161 and inductor 171) is approximately the same as the frequency of the high-frequency signals (first-phase high-frequency input signal RFIN+, second-phase high-frequency input signal RFIN-, high-frequency output signal RFOUT1, and high-frequency output signal RFOUT2).

[0175] Therefore, in the differential power amplifier 100D, power loss occurs due to the parallel resonant circuit (capacitor 161 and inductor 171), resulting in a decrease in efficiency.

[0176] On the other hand, in this embodiment, when the differential power amplifier 100D operates in the second mode, the control circuit 5D controls the switch 176 to the off state.

[0177] As a result, one end of the inductor 174 is electrically isolated from one end of the inductor 172 and the terminal 180a.

[0178] In this case, when the differential power amplifier 100D is viewed from the terminal 180b side (the switch 220 side), the above-mentioned parallel resonant circuit (capacitor 161 and inductor 171) appears not to be electromagnetically connected to the terminal 180b.

[0179] Therefore, the differential power amplifier 100D can suppress power loss due to the parallel resonant circuit (the capacitor 161 and the inductor 171) and can suppress a decrease in efficiency.

[0180] In this way, the differential power amplifier 100D can achieve a first mode with a relatively large output power and a second mode with a relatively small output power while suppressing power loss and reducing efficiency.

[0181] [2] When operating in the first mode, the differential power amplifier 100D outputs a radio frequency output signal RFOUT1 from the terminal 180a.

[0182] Furthermore, when operating in the second mode, the differential power amplifier 100D outputs a high frequency output signal RFOUT2 from the terminal 180b.

[0183] Therefore, the differential power amplifier 100D can make the signal paths of the radio frequency output signals RFOUT1 and RFOUT2 different when operating in the first mode and when operating in the second mode.

[0184] The relative magnitude of the power of the radio frequency output signal RFOUT1 output from the terminal 180a and the power of the radio frequency output signal RFOUT2 output from the terminal 180b is not particularly limited. For example, the power of the radio frequency output signal RFOUT1 output from the terminal 180a can be made relatively greater than the power of the radio frequency output signal RFOUT2 output from the terminal 180b.

[0185] 6 is a diagram showing the circuit configuration of a power amplifier module according to a sixth embodiment. A power amplifier module M1E includes bias circuits 1 to 4, a control circuit 5D, and a differential power amplifier 100E.

[0186] The differential power amplifier 100E further includes a capacitance circuit 200E in comparison with the differential power amplifier 100D (see FIG. 5).

[0187] Compared to the capacitance circuit 200B (see FIG. 3), the capacitance circuit 200E includes a capacitor 198 instead of the capacitor 196 and the switch 197.

[0188] The capacitor 198 corresponds to an example of the "seventh capacitance" of the present disclosure.

[0189] The other end of the capacitor 195 is electrically connected to the terminal 180a.

[0190] One end of the capacitor 198 is electrically connected to one end of the inductor 174 and one end of the capacitor 194. The other end of the capacitor 198 is electrically connected to the terminal 180b.

[0191] The capacitor 198 functions as a DC blocking capacitor that cuts the DC component of the high frequency output signal RFOUT2.

[0192] In the first mode, the differential power amplifier 100E performs an amplifying operation with all of the amplifiers from 120 to 150. In the second mode, the differential power amplifier 100E performs an amplifying operation with only the amplifiers 140 and 150 performing an amplifying operation, and the amplifiers 120 and 130 do not perform an amplifying operation.

[0193] (Effect) When the differential power amplifier 100E operates in the first mode, when the differential power amplifier 100E is viewed from the terminal 180a side (load side), the parallel-connected inductors 172 and 174 and the parallel-connected capacitors 193 and 194 appear to be connected in parallel.

[0194] That is, when the differential power amplifier 100E operates in the first mode, the capacitors 193 and 194 form an output matching circuit together with the inductors 172 and 174.

[0195] On the other hand, when the differential power amplifier 100E operates in the second mode, the switch 176 is in the OFF state, and therefore the inductor 172 and the capacitor 193 are electrically disconnected from one end of the inductor 174 .

[0196] Therefore, when the differential power amplifier 100E operates in the second mode, when the differential power amplifier 100E is viewed from the terminal 180b side (the switch 220 side), the inductor 174 and the capacitor 194 appear to be connected in parallel.

[0197] That is, when the differential power amplifier 100E operates in the second mode, the capacitor 194 and the inductor 174 form an output matching circuit.

[0198] This allows the capacitors 193 and 194 to adjust the output impedance when the differential power amplifier 100E is viewed from the terminal 180a side and when the differential power amplifier 100E is viewed from the terminal 180b side. For example, the capacitors 193 and 194 can maintain a constant output impedance when the differential power amplifier 100E operates in the first mode and when it operates in the second mode.

[0199] Alternatively, since the signal path of the high-frequency output signal RFOUT1 when the differential power amplifier 100E operates in the first mode is different from the signal path of the high-frequency output signal RFOUT2 when the differential power amplifier 100E operates in the second mode, the output impedances of the capacitors 193 and 194 can be made different.

[0200] <Configuration Example of the Present Disclosure> The present disclosure may also have the following configuration.

[0201] (1) A differential power amplifier comprising: a first amplifier and a second amplifier constituting a first differential amplifier; a third amplifier and a fourth amplifier constituting a second differential amplifier; a first inductor and a first capacitance electrically connected between an output of the first amplifier and an output of the second amplifier, respectively; a second inductor and a second capacitance electrically connected between an output of the third amplifier and an output of the fourth amplifier, respectively; a third inductor magnetically coupled to the first inductor; a fourth inductor magnetically coupled to the second inductor; and a first switch connected between one end of the third inductor and one end of the fourth inductor.

[0202] (2) The differential power amplifier according to (1), wherein a midpoint of the first inductor is electrically connected to a first power supply terminal, and a midpoint of the second inductor is electrically connected to a second power supply terminal.

[0203] (3) The differential power amplifier according to (1) or (2) above, further comprising: a first variable capacitance having one end electrically connected to one end of the third inductor and the other end electrically connected to a reference potential; and a second variable capacitance having one end electrically connected to one end of the third inductor and the other end electrically connected to an output terminal.

[0204] (4) The differential power amplifier according to (1) or (2), further comprising: a third capacitance having one end electrically connected to one end of the third inductor and the other end electrically connected to a reference potential; a fourth capacitance having one end electrically connected to one end of the fourth inductor and the other end electrically connected to a reference potential; a fifth capacitance having one end electrically connected to one end of the third inductor and the other end electrically connected to a signal output terminal; and a second switch and a sixth capacitance electrically connected in series between one end of the third inductor and the signal output terminal.

[0205] (5) The differential power amplifier according to (1) or (2) above, comprising: a first output terminal electrically connected to one end of the third inductor and one end of the first switch; and a second output terminal electrically connected to one end of the fourth inductor and the other end of the first switch, wherein in a first mode in which both the first differential amplifier and the second differential amplifier perform an amplifying operation, the first switch is controlled to an ON state; and in a second mode in which the second differential amplifier performs an amplifying operation and the first differential amplifier does not perform an amplifying operation, the first switch is controlled to an OFF state.

[0206] (6) The differential power amplifier according to (5), further comprising: a third capacitance having one end electrically connected to one end of the third inductor and the other end electrically connected to a reference potential; a fourth capacitance having one end electrically connected to one end of the fourth inductor and the other end electrically connected to a reference potential; a fifth capacitance having one end electrically connected to one end of the third inductor and the other end electrically connected to the first output terminal; and a seventh capacitance having one end electrically connected to one end of the fourth inductor and the other end electrically connected to the second output terminal.

[0207] (7) A power amplifier module comprising: the differential power amplifier according to (5) or (6) above; and a third switch electrically connected to the second output terminal.

[0208] (8) A differential power amplifier comprising: a first amplifier and a second amplifier constituting a first differential amplifier; a third amplifier and a fourth amplifier constituting a second differential amplifier; a first inductor and a first capacitance electrically connected between an output of the first amplifier and an output of the second amplifier, respectively; a second inductor and a second capacitance electrically connected between an output of the third amplifier and an output of the fourth amplifier, respectively; a third inductor magnetically coupled to the first inductor; a fourth inductor magnetically coupled to the second inductor; and a first switch having one end electrically connected to one end of the third inductor and the other end electrically connected to the same potential as the other end of the third inductor.

[0209] The above-described embodiment is intended to facilitate understanding of the present invention, and is not intended to limit the present invention. The present invention may be modified or improved without departing from the spirit and scope of the present invention, and equivalents thereof are also included in the present invention.

[0210] M1, M1A, M1B, M1C, M1D, M1E Power amplifier module 1, 2, 3, 4 Bias circuit 5, 5A, 5B, 5C, 5D Control circuit 100, 100A, 100B, 100C, 100D, 100E Differential power amplifier 120, 130, 140, 150 Amplifier 122, 132, 142, 152 Transistor 161, 162, 193, 194, 195, 196, 198 Capacitor 171, 172, 173, 174 Inductor 176, 197, 220 Switch 191, 192 Variable capacitor 200A, 200B, 200E Capacitance circuit

Claims

1. A differential power amplifier comprising: a first amplifier and a second amplifier constituting a first differential amplifier; a third amplifier and a fourth amplifier constituting a second differential amplifier; a first inductor and a first capacitance electrically connected between an output of the first amplifier and an output of the second amplifier, respectively; a second inductor and a second capacitance electrically connected between an output of the third amplifier and an output of the fourth amplifier, respectively; a third inductor magnetically coupled to the first inductor; a fourth inductor magnetically coupled to the second inductor; and a first switch connected between one end of the third inductor and one end of the fourth inductor.

2. A differential power amplifier according to claim 1, wherein the midpoint of the first inductor is electrically connected to a first power supply terminal, and the midpoint of the second inductor is electrically connected to a second power supply terminal.

3. A differential power amplifier according to claim 1 or 2, further comprising: a first variable capacitance having one end electrically connected to one end of the third inductor and the other end electrically connected to a reference potential; and a second variable capacitance having one end electrically connected to one end of the third inductor and the other end electrically connected to an output terminal.

4. A differential power amplifier according to claim 1 or 2, further comprising: a third capacitor having one end electrically connected to one end of the third inductor and the other end electrically connected to a reference potential; a fourth capacitor having one end electrically connected to one end of the fourth inductor and the other end electrically connected to a reference potential; a fifth capacitor having one end electrically connected to one end of the third inductor and the other end electrically connected to a signal output terminal; and a second switch and a sixth capacitor electrically connected in series between one end of the third inductor and the signal output terminal.

5. A differential power amplifier according to claim 1 or 2, comprising: a first output terminal electrically connected to one end of the third inductor and one end of the first switch; and a second output terminal electrically connected to one end of the fourth inductor and the other end of the first switch, wherein in a first mode in which both the first differential amplifier and the second differential amplifier perform an amplifying operation, the first switch is controlled to an ON state; and in a second mode in which the second differential amplifier performs an amplifying operation and the first differential amplifier does not perform an amplifying operation, the first switch is controlled to an OFF state.

6. A differential power amplifier according to claim 5, further comprising: a third capacitor having one end electrically connected to one end of the third inductor and the other end electrically connected to a reference potential; a fourth capacitor having one end electrically connected to one end of the fourth inductor and the other end electrically connected to a reference potential; a fifth capacitor having one end electrically connected to one end of the third inductor and the other end electrically connected to the first output terminal; and a seventh capacitor having one end electrically connected to one end of the fourth inductor and the other end electrically connected to the second output terminal.

7. A power amplifier module comprising: the differential power amplifier according to claim 5 or 6; and a third switch electrically connected to the second output terminal.

8. A differential power amplifier comprising: a first amplifier and a second amplifier constituting a first differential amplifier; a third amplifier and a fourth amplifier constituting a second differential amplifier; a first inductor and a first capacitance electrically connected between an output of the first amplifier and an output of the second amplifier, respectively; a second inductor and a second capacitance electrically connected between an output of the third amplifier and an output of the fourth amplifier, respectively; a third inductor magnetically coupled to the first inductor; a fourth inductor magnetically coupled to the second inductor; and a first switch having one end electrically connected to one end of the third inductor and the other end electrically connected to the same potential as the other end of the third inductor.

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