Silicon wafer texturing method, method for manufacturing solar cell, and solar cell

Abstract

The present application relates to the field of manufacturing of solar cells, and discloses a silicon wafer texturing method, a method for manufacturing a solar cell, and a solar cell. The silicon wafer texturing method provided by the present application comprises: pretreating a silicon wafer; texturing a first surface and a second surface of the pretreated silicon wafer; carrying out oxidation treatment with ozone or oxidation treatment with an oxidizing solution on the textured silicon wafer, so as to form a silicon oxide mask layer on the textured surface(s) of the first surface and / or the second surface of the silicon wafer; and removing the silicon oxide mask layer, and enabling one of the first surface and the second surface of the silicon wafer to have a textured structure and the other one to be a polished surface. The present application can solve the problems of high costs and long process time in existing single-sided texturing, thereby reducing texturing costs and shortening texturing time.

Description

Silicon wafer texturing method, solar cell manufacturing method and solar cell Technical Field

[0001] The present application belongs to the technical field of solar cell preparation, and specifically relates to a silicon wafer texturing method, a solar cell preparation method, and a solar cell. Background Art

[0002] Existing solar cells, such as heterojunction solar cells, use the technology of front-side texturing and back-side polishing, that is, single-sided polished cells, which helps to further improve the conversion efficiency and give full play to the functions of the front and back of the cell. For example, the front is more concerned with light absorption, and the back is more concerned with conductivity. Therefore, in order to further improve the conversion efficiency of solar cells, single-sided texturing technology has become a new demand in this field in recent years. Compared with the conventional double-sided texturing cell structure, the characteristic of single-sided texturing is that the light-receiving side is a pyramid-shaped texturing surface, and the back is a polished surface.

[0003] The existing single-sided texturing method for heterojunction solar cells usually uses a double-sided conventional texturing silicon wafer, then deposits a mask layer on the front side, and then corrodes and polishes the pyramids on the back side of the silicon wafer that are not coated with the mask layer to form a flat surface. The mask layer on the front side is then removed to obtain a single-sided texturing silicon wafer with a pyramid textured surface on the front side and a polished flat surface on the back side. However, the existing single-sided texturing method still has certain shortcomings. For example, in the single-sided texturing process, the mask layer is prepared by deposition methods such as PECVD or high-temperature diffusion, which has the disadvantages of high cost and is not conducive to industrial promotion; or the mask layer is prepared by coating a glue liquid such as silica gel liquid, which has the disadvantages of easily introducing organic matter, increasing the difficulty of cleaning, and being not conducive to product yield.

[0004] Therefore, there is an urgent need to find effective technical solutions to solve or alleviate one or more of the above problems.

[0005] Summary of the Invention

[0006] In view of the above-mentioned problems, the present invention aims to solve at least one of the technical problems in the related art to a certain extent. To this end, the present invention provides a method for texturing a silicon wafer, a method for preparing a solar cell, and a solar cell, which are mainly used to alleviate the high cost and long process time of current single-sided texturing, thereby reducing texturing costs and shortening texturing time.

[0007] In order to solve the above technical problems, this application is implemented as follows:

[0008] According to one aspect of the present application, an embodiment of the present application provides a method for texturing a silicon wafer, the method comprising:

[0009] Pre-processing of silicon wafers;

[0010] Texturing the first surface and the second surface of the pretreated silicon wafer;

[0011] Performing ozone oxidation treatment or oxidative solution oxidation treatment on the textured silicon wafer to form a silicon oxide mask layer on the textured surface of the first surface and / or the second surface of the silicon wafer;

[0012] The silicon oxide mask layer is removed, and one of the first surface and the second surface of the silicon wafer is made to have a suede structure, and the other is made to be a polished surface.

[0013] In addition, the silicon wafer texturing method according to the present application may also have the following additional technical features:

[0014] In some feasible embodiments, the ozone oxidation treatment specifically includes: irradiating the silicon wafer with an ultraviolet light source so that O2 is converted into O3 under the irradiation of the ultraviolet light source, and forming the silicon oxide mask layer on the first surface of the silicon wafer; optionally, the wavelength of the ultraviolet light source is ≤182nm, the temperature of the treatment using the ultraviolet light source is 20℃~300℃, and the treatment time is 5s~500s.

[0015] In some feasible embodiments, the oxidizing solution oxidation treatment specifically includes: using an oxidizing solution to oxidize the silicon wafer under a first temperature and a first time condition to form the silicon oxide mask layer on the first surface and the second surface of the silicon wafer respectively.

[0016] In some feasible embodiments, the oxidizing solution includes a mixture of alkali and hydrogen peroxide, the mass concentration of the alkali is 0.3% to 3%, the mass concentration of the hydrogen peroxide and / or ozone is 0.5% to 15%, the first temperature is 55° C. to 80° C., and the first time is 20s to 600s; the alkali includes at least one of potassium hydroxide, sodium hydroxide or ammonia water.

[0017] In some feasible embodiments, the oxidizing solution includes a mixture of hydrochloric acid and ozone, the mass concentration of the hydrochloric acid is 0.01% to 3%, the concentration of the ozone is 10ppm to 100ppm, the first temperature is 10°C to 65°C, and the first time is 20s to 600s.

[0018] In some feasible embodiments, the ozone oxidation treatment specifically includes: using an ozone generator to generate O3 to form the silicon oxide mask layer on the first surface and the second surface of the silicon wafer respectively; optionally, the concentration of the ozone is 10 to 400 g / Nm 3 The processing temperature is 10℃~60℃, and the processing time is 20s~600s.

[0019] In some feasible implementations, the thickness of the silicon oxide mask layer is 0.5 nm to 5 nm.

[0020] In some feasible implementations, the pre-treatment of the silicon wafer specifically includes: removing PSG on the surface of the silicon wafer; removing the mechanical damage layer on the surface of the silicon wafer; and pre-cleaning the silicon wafer.

[0021] Optionally, the operating conditions for removing PSG from the surface of the silicon wafer include: using an acidic solution for treatment at a temperature of 20° C. to 50° C. for 20s to 600s; the acidic solution includes a hydrofluoric acid solution and / or a hydrochloric acid solution.

[0022] Optionally, the operating conditions for removing the mechanical damage layer on the surface of the silicon wafer include: using an alkaline solution, treating at a temperature of 55° C. to 80° C. for 20s to 600s; the alkaline solution includes sodium hydroxide solution and / or potassium hydroxide solution.

[0023] Optionally, the operating conditions for pre-cleaning the silicon wafer include: using a mixture of alkali and hydrogen peroxide, treating at a temperature of 55°C to 80°C for 20s to 600s; the alkali includes sodium hydroxide and / or potassium hydroxide; the mass concentration of the alkali is 0.3% to 3%, and the mass concentration of the hydrogen peroxide is 0.5% to 5%.

[0024] In some feasible embodiments, the texturing specifically includes: using a texturing solution to corrode the first surface and the second surface of the silicon wafer, so that the first surface and the second surface of the silicon wafer form a pyramid-shaped texturing structure; the texturing solution includes an alkali and a texturing additive; optionally, the alkali includes sodium hydroxide and / or potassium hydroxide; the mass concentration of the alkali is 0.3% to 5%, and the mass concentration of the texturing additive is 0.5% to 3%; optionally, the temperature of the texturing is 55°C to 85°C, and the time is 20s to 600s.

[0025] In some feasible implementations, after the texturing and before the ozone oxidation treatment, the method further includes: post-cleaning the silicon wafer; chemically polishing the silicon wafer; and pickling the silicon wafer.

[0026] Optionally, the post-cleaning operating conditions include: using a mixture of alkali and hydrogen peroxide for treatment at a temperature of 55°C to 80°C for 20s to 600s; the alkali includes sodium hydroxide and / or potassium hydroxide; the mass concentration of the alkali is 0.3% to 3%, and the mass concentration of the hydrogen peroxide is 0.5% to 5%.

[0027] Optionally, the operating conditions of the chemical polishing include: using a mixture of hydrofluoric acid, hydrochloric acid and ozone, treating for 20s to 600s at a temperature of 5°C to 60°C; the mass concentration of the hydrofluoric acid is 0.05% to 0.5%, the mass concentration of the hydrochloric acid is 0.01% to 2%, and the concentration of the ozone is 10 to 80ppm.

[0028] Optionally, the pickling operation conditions include: using an HF solution with a mass concentration of 0.2% to 20%, treating at a temperature of 20° C. to 50° C. for 20s to 600s.

[0029] In some feasible embodiments, after forming the silicon oxide mask layer, the method further includes: polishing the second surface of the silicon wafer to form a polished surface on the second surface of the silicon wafer; post-cleaning the silicon wafer; chemically polishing the silicon wafer; and removing the silicon oxide mask layer on the first surface of the silicon wafer.

[0030] Optionally, the operating conditions of the polishing treatment include: using a mixture of alkali and alkali polishing additives, treating at a temperature of 55°C to 80°C for 20s to 600s; the alkali includes sodium hydroxide and / or potassium hydroxide; the mass concentration of the alkali is 0.3% to 5%, and the mass concentration of the alkali polishing additive is 0.5% to 3%.

[0031] Optionally, the operating conditions for removing the silicon oxide mask layer on the first surface of the silicon wafer include: using an acidic solution for treatment at a temperature of 20°C to 50°C for 20s to 600s; the acidic solution includes a hydrofluoric acid solution and / or a hydrochloric acid solution, and the mass concentration of the acid is 0.2% to 20%.

[0032] In some feasible embodiments, after the silicon oxide mask layer is formed, the method further includes: removing the silicon oxide mask layer on the second surface of the silicon wafer; polishing the second surface of the silicon wafer to form a polished surface on the second surface of the silicon wafer; post-cleaning the silicon wafer; chemically polishing the silicon wafer; and removing the silicon oxide mask layer on the first surface of the silicon wafer.

[0033] Optionally, the operating conditions for removing the silicon oxide mask layer on the second surface of the silicon wafer include: using a DHF solution with a mass concentration of 0.2% to 20% at a temperature of 20° C. to 50° C. for 20s to 600s.

[0034] According to another aspect of the present application, an embodiment of the present application provides a method for preparing a solar cell, comprising the following steps:

[0035] Performing single-side texturing treatment using the silicon wafer texturing method;

[0036] A first intrinsic layer and a second intrinsic passivation layer are formed on the first surface and the second surface of the silicon wafer, respectively; a first doped layer and a second doped layer are formed on the first intrinsic layer and the second intrinsic layer, respectively, and the doping types of the first doped layer and the second doped layer are opposite; a first transparent conductive layer and a second transparent conductive layer are formed on the first doped layer and the second doped layer, respectively; and a first electrode and a second electrode are formed on the first transparent conductive layer and the second transparent conductive layer, respectively.

[0037] According to another aspect of the present application, an embodiment of the present application provides a solar cell, which is manufactured using the above-mentioned method for manufacturing a solar cell, and includes:

[0038] A silicon wafer, comprising a first surface and a second surface disposed opposite to each other;

[0039] A first intrinsic layer, a first doped layer, a first transparent conductive layer and a first electrode are sequentially arranged on the first surface;

[0040] A second intrinsic layer, a second doping layer, a second transparent conductive layer and a second electrode are sequentially arranged on the second surface.

[0041] The implementation of the technical solution of the present invention has at least the following beneficial effects:

[0042] In an embodiment of the present application, a silicon wafer texturing method is provided, which uses ozone oxidation or oxidizing solution oxidation to form a silicon oxide mask layer on the textured surface of the first surface and / or second surface of the silicon wafer. Compared with the existing method of preparing the mask layer by PECVD or high-temperature diffusion or coating glue, the ozone oxidation or oxidizing solution oxidation method used in the present application does not require expensive or complex equipment and can be carried out under non-vacuum conditions, which can reduce equipment costs or process costs. In addition, the method of the present application is not easy to introduce organic pollution, and the prepared silicon oxide mask layer can be easily removed in the subsequent conventional process. The process is simple, which helps to shorten the process time, improve production efficiency, and also improve product yield. It has the characteristics of low cost, high efficiency, simple and easy process implementation, stable yield, etc., and has good industrial application prospects. In addition, the prepared single-sided textured silicon wafer helps to improve the conversion efficiency of solar cells.

[0043] Additional aspects and advantages of the present application will be given in part in the description below, and in part will become obvious from the description below, or will be learned through practice of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] FIG1 is a schematic flow chart of a silicon wafer texturing method provided in some exemplary embodiments of the present application;

[0045] FIG2 is a schematic diagram showing a comparison of a conventional suede surface and a polished surface provided by some exemplary embodiments of the present application. DETAILED DESCRIPTION

[0046] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0047] In the related art, the single-sided texturing method of heterojunction solar cells usually adopts a double-sided conventional texturing silicon wafer, and uses deposition equipment such as PECVD (or CVD, PVD) or high-temperature diffusion to deposit silicon oxide, silicon nitride or silicon oxynitride on the surface of the silicon wafer as a mask layer, or uses a method of coating glue to prepare the mask layer; then the back polishing, removal of the mask layer and other steps are performed, and finally a single-sided texturing silicon wafer with a pyramid velvet surface on the front and a polished plane on the back is obtained. However, the use of PECVD, CVD, PVD and other equipment or high-temperature diffusion to prepare the mask layer needs to be carried out under vacuum, and the equipment cost is high. There are disadvantages of high cost and disadvantages that are not conducive to cost reduction and efficiency improvement. The method of preparing the mask layer by coating glue has a greater organic risk of the glue, and the difficulty of cleaning in the subsequent process increases, which is not conducive to cost reduction and efficiency improvement, nor is it conducive to yield.

[0048] In view of this, the technical solutions of the embodiments of the present application provide a method for texturing a silicon wafer, a method for preparing a solar cell, and a solar cell. The technical solutions of the embodiments of the present application, which prepare a silicon oxide mask layer through oxidation treatment, can effectively alleviate the aforementioned problems of mask layer preparation methods such as PECVD deposition, high-temperature diffusion, and coating with glue. They have the advantages of low cost, high efficiency, simple and easy process implementation, and stable yield, which is conducive to improving battery efficiency. A description of the specific technical solutions is provided below.

[0049] As shown in Figures 1 to 2, in some embodiments, a silicon wafer texturing method is provided, which can be applied in the field of solar cell preparation to reduce texturing costs, improve production efficiency, improve silicon wafer quality, stabilize product yield, and thus help improve battery conversion efficiency.

[0050] Specifically, the silicon wafer texturing method includes:

[0051] A silicon wafer is provided, which includes two oppositely arranged surfaces along the thickness direction, namely a first surface and a second surface, and the silicon wafer is pretreated. By pretreating the silicon wafer, impurities or contaminants on the surface of the silicon wafer can be removed, thereby improving the cleanliness of the silicon wafer surface, or metal impurities inside the silicon wafer can be removed, thereby improving the quality of the silicon wafer and facilitating the operation of subsequent processes such as texturing.

[0052] The first surface and the second surface of the pre-treated silicon wafer are textured; that is, the first surface and the second surface of the silicon wafer are double-sided textured so that both the first surface and the second surface of the silicon wafer form a textured structure; by forming a textured structure on the surface of the silicon wafer, it is beneficial to enhance the light trap effect, reduce the reflectivity of the silicon wafer, and at the same time reduce the carrier recombination center and improve the minority carrier lifetime.

[0053] The silicon wafer after texturing is subjected to ozone oxidation treatment or oxidizing solution oxidation treatment to form a silicon oxide mask layer on the texture surface of the first surface and / or the second surface of the silicon wafer; that is, through ozone oxidation treatment or oxidizing solution oxidation treatment, a mask layer can be formed on either the first surface or the second surface of the silicon wafer, and the mask layer is a silicon oxide mask layer; or a mask layer can be formed on both the first surface and the second surface of the silicon wafer, and the mask layer is a silicon oxide mask layer.

[0054] The silicon oxide mask layer is removed, and one of the first and second surfaces of the silicon wafer has a textured surface, while the other is a polished surface. For example, a single-sided textured silicon wafer can be obtained, where the first surface has a textured surface and the second surface is a polished surface, or a single-sided textured silicon wafer can be obtained, where the second surface has a textured surface and the first surface is a polished surface.

[0055] It should be noted that the silicon wafer texturing method of this embodiment is not limited to the specific type of silicon wafer. For example, it can be a single crystal silicon substrate, a polycrystalline silicon substrate, or a quasi-single crystal silicon substrate. The silicon wafer can be an N-type silicon wafer or a P-type silicon wafer. For the sake of brevity, the following detailed description of the method of the present invention is mainly based on an N-type silicon wafer. However, it should be understood that the same or similar principles apply when using a P-type silicon wafer, and will not be further described here.

[0056] The silicon wafer includes two opposing surfaces along its thickness, namely, a first surface and a second surface, also known as the front and back surfaces. The front surface of the silicon wafer is the surface facing the sun (i.e., the surface exposed to sunlight), and the back surface of the silicon wafer is the surface facing away from the sun. For example, the first surface of the silicon wafer may be the front surface, i.e., the light-receiving surface (e.g., the N-type doped surface); the second surface of the silicon wafer may be the back surface, i.e., the surface facing away from the sun (e.g., the P-type doped surface).

[0057] According to the technical solution of the silicon wafer texturing method provided in this embodiment, after the texturing treatment, a silicon oxide mask layer is formed on the textured surface of the first surface and / or the second surface of the silicon wafer by using ozone oxidation or oxidizing solution oxidation. Compared with the existing method of preparing the mask layer by PECVD or high-temperature diffusion or coating glue, the method of preparing the mask layer by ozone oxidation or oxidizing solution oxidation adopted in this application does not require expensive or complex equipment and can be carried out under non-vacuum conditions, which can reduce equipment cost or process cost. In addition, the method of this application is not easy to introduce organic pollution. The prepared silicon oxide mask layer can be easily removed in the subsequent conventional process. The process is simple, which helps to shorten the process time, improve production efficiency, and improve product yield, which is conducive to reducing costs and increasing efficiency. It has the characteristics of low cost, high efficiency, simple and easy process implementation, stable yield, etc., and has good industrial application prospects. In addition, the prepared single-sided textured silicon wafer helps to improve the conversion efficiency of solar cells.

[0058] The present invention will be further described in detail below with reference to specific embodiments.

[0059] Example 1

[0060] The silicon wafer texturing method comprises the following steps:

[0061] S100, provide a silicon wafer, and pre-treat the silicon wafer. The silicon wafer includes two side surfaces arranged opposite to each other along the thickness direction, namely a first surface and a second surface, wherein the first surface can be a light-receiving surface (front side), and the second surface can be a backlight surface (back side). Of course, in other embodiments, the first surface can also be a backlight surface; the second surface can be a light-receiving surface, which will not be further explained here. Optionally, the silicon wafer can be an N-type single crystal silicon wafer. By pre-treating the silicon wafer, it can be used to remove impurities or contaminants on the surface of the silicon wafer, improve the cleanliness of the silicon wafer surface, or can be used to remove metal impurities inside the silicon wafer, improve the quality of the silicon wafer, and facilitate the operation of subsequent processes such as texturing. Specifically, step S100 specifically includes:

[0062] S110. Remove PSG on the surface of the silicon wafer. PSG refers to phosphosilicate glass or phosphorus-containing silicon dioxide, that is, remove the phosphosilicate glass on the surface of the silicon wafer.

[0063] The manufacturing process for silicon wafers is complex. Typically, during the phosphorus diffusion process, a layer of SiO2 containing phosphorus, known as phosphosilicate glass (PSG), forms on the wafer surface. This layer increases electron recombination in the emitter region, shortening minority carrier lifetime. Furthermore, it is susceptible to moisture in the air, resulting in reduced current and power attenuation. Phosphosilicate glass can also easily cause color shifts in subsequent coating processes, necessitating removal of the PSG from the wafer surface.

[0064] In some embodiments, the operating conditions for removing PSG from the surface of a silicon wafer include: using an acidic solution for treatment at a temperature of 20°C to 50°C for 20 seconds to 600 seconds. For example, the silicon wafer can be placed in the acidic solution and the phosphorus silicate glass on the surface of the silicon wafer can be removed at the above temperature and time. The treatment temperature can be 20°C, 25°C, 30°C, 35°C, 40°C, 45°C, or 50°C, but is not limited to the values ​​listed above. Other values ​​not listed within this numerical range are also applicable. The treatment time can be 20 seconds, 30 seconds, 40 seconds, 50 seconds, 60 seconds, 100 seconds, 120 seconds, 180 seconds, 200 seconds, 240 seconds, 300 seconds, 360 seconds, 400 seconds, 420 seconds, 480 seconds, 500 seconds, 550 seconds, or 600 seconds, but is not limited to the values ​​listed above. Other values ​​not listed within this numerical range are also applicable.

[0065] Optionally, the acidic solution comprises a mixture of one or both of a hydrofluoric acid (HF) solution and a hydrochloric acid (HCl) solution. Preferably, the acidic solution is an HF solution, i.e., an HF diluent. The mass concentration (mass fraction) of the HF solution is 0.2% to 10%, i.e., 0.2wt% to 10wt%, preferably 0.5% to 5%, wherein the mass concentration of the HF solution can be 0.2%, 0.5%, 1%, 1.5%, 2%, 3%, 4%, 5%, 6%, 7%, 8%, 9%, 10%, etc., but is not limited to the listed values, and other values ​​not listed within the numerical range are also applicable.

[0066] In this way, under the above-mentioned treatment temperature, time and acidic solution, the effect of removing the phosphosilicate glass on the surface of the silicon wafer can be better, which is conducive to improving the removal effect and further improving the quality of the silicon wafer.

[0067] S120, removing the mechanical damage layer (cutting damage layer) on the surface of the silicon wafer. This step may also be referred to as SDE.

[0068] The above-mentioned silicon wafer may be a cut silicon wafer. Since a damaged layer may be generated when the silicon wafer is cut, the presence of the damaged layer may hinder the effect of subsequent processes. In this embodiment, the silicon wafer is alkaline washed, that is, the silicon wafer is cleaned with an alkaline solution. This can effectively remove the damaged layer on the surface of the silicon wafer during cutting, or remove some impurities on the surface of the silicon wafer, while ensuring the cleanliness of the silicon wafer surface and preventing back diffusion during subsequent processing to cause silicon wafer contamination.

[0069] In some embodiments, the operating conditions for removing the mechanical damage layer on the surface of the silicon wafer include: using an alkaline solution for treatment at a temperature of 55°C to 80°C for 20s to 600s; for example, the silicon wafer can be placed in a cleaning agent and cleaned at the above temperature and time, and the cleaning agent is an alkaline solution. The treatment temperature can be 55°C, 60°C, 65°C, 70°C, 75°C, or 80°C, but is not limited to the listed values. Other values ​​not listed within this numerical range are also applicable. The treatment time can be 20s, 30s, 40s, 50s, 60s, 100s, 120s, 180s, 200s, 240s, 300s, 360s, 400s, 420s, 480s, 500s, 550s, or 600s, but is not limited to the listed values. Other values ​​not listed within this numerical range are also applicable.

[0070] Optionally, the alkaline solution includes a sodium hydroxide (NaOH) solution and / or a potassium hydroxide (KOH) solution. For example, the alkaline solution may be a NaOH solution, a KOH solution, or a mixture of a NaOH solution and a KOH solution. Of course, in other embodiments, other alkaline solutions that can react with impurities in the silicon wafer may also be used, and these are not listed here.

[0071] Preferably, the alkaline solution is a KOH solution, i.e., a KOH dilution solution. The mass concentration (mass fraction) of the KOH solution is 3% to 20%, i.e., 3wt% to 10wt%, preferably 5% to 10%. The mass concentration of the KOH solution can be 3%, 4%, 5%, 6%, 8%, 10%, 12%, 14%, 15%, 16%, 17%, 18%, 20%, etc., but is not limited to the values ​​listed above. Other values ​​not listed within this numerical range are also applicable.

[0072] In this way, under the above-mentioned treatment temperature, time and acidic solution, the alkaline cleaning effect of the silicon wafer is better, and the cutting damage layer on the surface of the silicon wafer can be effectively removed, which is conducive to improving the removal effect and thus improving the quality of the silicon wafer.

[0073] S130, pre-cleaning the silicon wafer, this step may also be referred to as PRE.

[0074] By pre-cleaning the surface of the silicon wafer, impurities on the surface of the silicon wafer can be removed, so that the surface of the silicon wafer forms an oxidized surface, which is beneficial to the uniformity of texturing.

[0075] In some embodiments, the pre-cleaning conditions for the silicon wafer include: using a mixture of alkali and hydrogen peroxide (H2O2) at a temperature of 55°C to 80°C for 20 seconds to 600 seconds. For example, the silicon wafer can be placed in a cleaning agent and cleaned at the above temperature and time, wherein the cleaning agent is a mixture of alkali and hydrogen peroxide. The treatment temperature can be 55°C, 60°C, 65°C, 70°C, 75°C, or 80°C, but is not limited to the values ​​listed above. Other values ​​not listed within this numerical range are also applicable. The treatment time can be 20 seconds, 30 seconds, 40 seconds, 50 seconds, 60 seconds, 100 seconds, 120 seconds, 180 seconds, 200 seconds, 240 seconds, 300 seconds, 360 seconds, 400 seconds, 420 seconds, 480 seconds, 500 seconds, 550 seconds, or 600 seconds, but is not limited to the values ​​listed above. Other values ​​not listed within this numerical range are also applicable.

[0076] Optionally, the base includes NaOH and / or KOH. For example, the base can be NaOH, or can be KOH, or can be a mixture of NaOH and KOH. Preferably, the base is KOH.

[0077] Optionally, in the mixed solution, the mass concentration of the base such as KOH is 0.3% to 3%, for example, it can be 0.3%, 0.4%, 0.5%, 0.6%, 0.8%, 1%, 1.5%, 1.8%, 2%, 2.5%, 2.8% or 3%; the mass concentration of hydrogen peroxide is 0.5% to 5%, for example, it can be 0.5%, 0.8%, 1%, 1.5%, 2%, 2.5%, 3%, 3.5%, 4%, 4.5%, 5% and the like, but is not limited to the above-mentioned values, and other values ​​not listed within this numerical range are also applicable.

[0078] In this way, under the above-mentioned treatment temperature, time and mixed solution, impurities or pollutants on the surface of the silicon wafer can be effectively removed, which is beneficial to improving the pre-cleaning effect and further improving the quality of the silicon wafer.

[0079] S200 , texturing the first surface and the second surface of the silicon wafer pre-treated in step S100 .

[0080] In some embodiments, texturing specifically includes: using a texturing solution to corrode (etch) the first surface and the second surface of the silicon wafer, so that the first surface and the second surface of the silicon wafer form a pyramid-shaped textured structure.

[0081] By performing double-sided texturing on a silicon wafer, a first textured structure can be formed on a first surface, such as the front surface, and a second textured structure can be formed on a second surface, such as the back surface; both the first textured structure and the second textured structure have a pyramid structure. Generally, a pyramid-type textured structure has a pyramid structure.

[0082] In this way, the light-receiving surface can be provided with a uniform textured light-trapping structure. For example, the light-trapping structure can be a pyramid-shaped textured structure formed by alkaline etching. That is, the front surface of the single-crystal silicon wafer has an anti-reflective textured surface, and the anti-reflective textured surface is pyramid-shaped. Of course, in other embodiments, the textured structure can also take other structural forms, and this embodiment is not limited thereto.

[0083] It should be noted that the specific operating methods and process conditions for the aforementioned texturing treatment can be selected and adjusted by those skilled in the art based on practical circumstances. As an example, a texturing treatment is performed using an alkaline texturing method using texturing cleaning equipment, with the silicon wafer placed in an alkaline texturing solution. The texturing solution includes an alkali and a texturing additive; the texturing additive can control the etching effect of the alkaline solution on the texturing surface. The specific type of texturing additive can be conventional in the art, and this embodiment does not limit this and will not be described in detail here.

[0084] Optionally, the base includes NaOH and / or KOH. For example, the base can be NaOH, or can be KOH, or can be a mixture of NaOH and KOH. Preferably, the base is KOH.

[0085] Optionally, in the texturing solution, the mass concentration of alkali such as KOH is 0.3% to 5%, for example, it can be 0.3%, 0.4%, 0.5%, 0.6%, 0.8%, 1%, 1.5%, 1.8%, 2%, 2.5%, 2.8%, 3%, 4%, 4.5% or 5%; the mass concentration of the texturing additive is 0.5% to 3%, for example, it can be 0.5%, 0.8%, 1%, 1.5%, 2%, 2.5%, 3%, etc., but is not limited to the above-mentioned values, and other values ​​not listed within this numerical range are also applicable.

[0086] In some embodiments, the texturing temperature is 55°C to 85°C, and the temperature can be 55°C, 60°C, 65°C, 70°C, 75°C, 80°C or 85°C, etc., but is not limited to the listed values, and other values ​​not listed in the numerical range are also applicable. The texturing time is 20s to 600s, and the time can be 20s, 30s, 40s, 50s, 60s, 100s, 120s, 180s, 200s, 240s, 300s, 360s, 400s, 420s, 480s, 500s, 550s or 600s, etc., but is not limited to the listed values, and other values ​​not listed in the numerical range are also applicable.

[0087] S300, post-processing the silicon wafer after the texturing process in step S200. Specifically, step S300 includes:

[0088] S310, post-cleaning the silicon wafer after the texturing treatment in step S200, which may also be referred to as Post.

[0089] Post-cleaning of the silicon wafer can be used to remove residues left over from the above-mentioned treatment process, such as residues of alkaline polishing additives.

[0090] In some embodiments, the post-cleaning conditions for the silicon wafer include: using a mixture of alkali and hydrogen peroxide (H2O2) at a temperature of 55°C to 80°C for 20 seconds to 600 seconds. For example, the silicon wafer can be placed in a cleaning agent, which is a mixture of alkali and hydrogen peroxide, and cleaned at the above temperature and time. The treatment temperature can be 55°C, 60°C, 65°C, 70°C, 75°C, or 80°C, but is not limited to the listed values. Other values ​​not listed within this numerical range are also applicable. The treatment time can be 20 seconds, 30 seconds, 40 seconds, 50 seconds, 60 seconds, 100 seconds, 120 seconds, 180 seconds, 200 seconds, 240 seconds, 300 seconds, 360 seconds, 400 seconds, 420 seconds, 480 seconds, 500 seconds, 550 seconds, or 600 seconds, but is not limited to the listed values. Other values ​​not listed within this numerical range are also applicable.

[0091] Optionally, the base includes NaOH and / or KOH. For example, the base can be NaOH, or can be KOH, or can be a mixture of NaOH and KOH. Preferably, the base is KOH.

[0092] Optionally, in the mixed solution, the mass concentration of the base such as KOH is 0.3% to 3%, for example, it can be 0.3%, 0.4%, 0.5%, 0.6%, 0.8%, 1%, 1.5%, 1.8%, 2%, 2.5%, 2.8% or 3%; the mass concentration of hydrogen peroxide is 0.5% to 5%, for example, it can be 0.5%, 0.8%, 1%, 1.5%, 2%, 2.5%, 3%, 3.5%, 4%, 4.5%, 5% and the like, but is not limited to the above-mentioned values, and other values ​​not listed within this numerical range are also applicable.

[0093] In this way, under the above-mentioned treatment temperature, time and mixed solution, the residual alkali polishing additive can be effectively removed, the effect of post-cleaning the silicon wafer can be better, and the post-cleaning effect is conducive to improving.

[0094] S320 , chemically polishing the silicon wafer cleaned after step S310 , which may also be referred to as CP.

[0095] This chemical polishing, or CP step, can be used to micro-modify the textured surface of the silicon wafer and round off the pyramid corners, facilitating subsequent CVD coating processes.

[0096] In some embodiments, the chemical polishing operating conditions include: using a mixture of hydrofluoric acid (HF), hydrochloric acid (HCl), and ozone (O3) at a temperature of 5°C to 60°C for 20 seconds to 600 seconds; wherein the treatment temperature can be 5°C, 10°C, 15°C, 20°C, 25°C, 30°C, 35°C, 40°C, 50°C, or 60°C, etc., but is not limited to the listed values, and other values ​​not listed in the numerical range are also applicable. The treatment time can be 20 seconds, 30 seconds, 40 seconds, 50 seconds, 60 seconds, 100 seconds, 120 seconds, 180 seconds, 200 seconds, 240 seconds, 300 seconds, 360 seconds, 400 seconds, 420 seconds, 480 seconds, 500 seconds, 550 seconds, or 600 seconds, etc., but is not limited to the listed values, and other values ​​not listed in the numerical range are also applicable.

[0097] Optionally, the mass concentration of hydrofluoric acid is 0.05% to 0.5%, for example, it can be 0.05%, 0.08%, 0.1%, 0.15%, 0.2%, 0.25%, 0.3%, 0.35%, 0.4%, 0.45% or 0.5%, etc., but is not limited to the above-mentioned values, and other unlisted values ​​within this numerical range are also applicable.

[0098] Optionally, the mass concentration of hydrochloric acid is 0.01% to 2%, for example, it can be 0.01%, 0.02%, 0.05%, 0.08%, 0.1%, 0.15%, 0.2%, 0.5%, 1%, 1.5% or 2%, etc., but is not limited to the above-mentioned values, and other unlisted values ​​within this numerical range are also applicable.

[0099] Optionally, the ozone concentration is 10 to 80 ppm; for example, it can be 10 ppm, 20 ppm, 30 ppm, 40 ppm, 50 ppm, 60 ppm, 70 ppm, 80 ppm, etc., but is not limited to the above-listed values, and other unlisted values ​​within the numerical range are also applicable.

[0100] S330 , pickling the silicon wafer after chemical polishing in step S320 , which may also be referred to as DHF.

[0101] The acid wash, also known as the DHF step, can be used to remove the oxide layer on the surface of the silicon wafer by cleaning the silicon wafer with an acidic solution. In addition, the metal ions can be dissolved in the acidic solution to remove the residual metal and other impurity ions in the silicon wafer.

[0102] In some embodiments, the pickling operating conditions include: using an HF solution with a mass concentration of 0.2% to 20% at a temperature of 20° C. to 50° C. for 20 seconds to 600 seconds. The mass concentration of HF is 0.2% to 20%, and can be, for example, 0.2%, 0.5%, 1%, 2%, 3%, 4%, 5%, 6%, 7%, 8%, 10%, 12%, 15%, 20%, etc., but is not limited to the above values, and other values ​​not listed within this range are also applicable. The processing temperature can be 20°C, 25°C, 30°C, 35°C, 40°C, 45°C or 50°C, etc.; the processing time can be 20s, 30s, 40s, 50s, 60s, 100s, 120s, 180s, 200s, 240s, 300s, 360s, 400s, 420s, 480s, 500s, 550s or 600s, etc., but is not limited to the listed values, and other values ​​not listed within the numerical range are also applicable.

[0103] In this way, the pickling of the silicon wafer can be more complete, which is beneficial to improving the pickling effect and further improving the quality of the solar cell.

[0104] S400: Single-side masking is performed on the silicon wafer after post-processing in step S300. In this embodiment, ozone oxidation treatment is performed on the silicon wafer after texturing to form a silicon oxide mask layer on the textured surface of the first surface of the silicon wafer.

[0105] In some embodiments, the method of forming the silicon oxide mask layer specifically includes: irradiating the silicon wafer with an ultraviolet light source to convert O2 into O3 under the irradiation of the ultraviolet light source, thereby forming the silicon oxide mask layer on the first surface of the silicon wafer.

[0106] In this embodiment, a silicon oxide (SiO2) mask layer is prepared using ultraviolet (UV) technology. A high-energy UV light source excites oxygen atoms in the air, generating O3 plasma, which oxidizes the surface of the silicon wafer, forming a dense SiO2 layer that effectively resists conventional alkaline polishing processes and serves as a mask layer. This method operates under non-vacuum conditions, resulting in low equipment costs and reduced production costs. Furthermore, the SiO2 mask layer is easily removed during subsequent conventional manufacturing processes, is less susceptible to contamination, and offers a high product yield, making it suitable for mass production.

[0107] In some embodiments, when the mask layer is prepared by UV method, the wavelength of the ultraviolet light source is ≤182nm. The ultraviolet light source with a wavelength of ≤182nm is used to irradiate the upper surface of the silicon wafer from the front side to form a dense oxide film SiO2 layer on the front velvet surface.

[0108] Optionally, the temperature of the ultraviolet light treatment is 20° C. to 300° C., and the treatment time is 5 seconds to 500 seconds. For example, the treatment temperature may be 20° C., 30° C., 50° C., 80° C., 100° C., 150° C., 200° C., 250° C., or 300° C., and the treatment time may be 5 seconds, 10 seconds, 30 seconds, 45 seconds, 60 seconds, 100 seconds, 120 seconds, 180 seconds, 200 seconds, 240 seconds, 300 seconds, 360 seconds, 400 seconds, 420 seconds, 480 seconds, 500 seconds, etc., but the values ​​listed are not limited thereto, and other values ​​not listed within the numerical range are also applicable.

[0109] Thus, the prepared silicon oxide mask layer can protect the velvet surface, that is, it can mask and protect the velvet structure of the light-receiving surface, thereby preventing alkali such as KOH from corroding the front side of the silicon wafer.

[0110] In some embodiments, the thickness of the silicon oxide mask layer is 0.5 nm to 5 nm. Further, the thickness of the silicon oxide mask layer is 1 nm to 3 nm. For example, the thickness of the silicon oxide mask layer can be 0.5 nm, 1 nm, 1.5 nm, 1.8 nm, 2 nm, 2.2 nm, 2.5 nm, 3 nm, 4 nm, 5 nm, etc., but is not limited to the listed values. Other values ​​not listed within this range are also applicable.

[0111] The thickness of the silicon oxide mask layer prepared in the embodiment of the present invention can be 0.5nm to 5nm, preferably around 2nm. Since the mask layer prepared has a high density, that is, a dense oxide layer can be formed by using short-wave UV, it can effectively resist alkali corrosion at a thinner thickness. Therefore, compared with the mask layer prepared by the conventional method in the prior art, the thickness of the mask layer is reduced, the cost is reduced, and at the same time, the protective mask effect of resisting alkali corrosion can be guaranteed.

[0112] S500 , polishing the silicon wafer to form a single-side polished surface, and then removing the silicon oxide mask layer to form a silicon wafer with a single-side velvet surface and a single-side polished surface.

[0113] Through step S500, the second surface of the silicon wafer, such as the back surface, is polished, and the silicon oxide mask layer on the first surface of the silicon wafer is removed, thereby obtaining a single-sided textured silicon wafer with a pyramid textured surface on the front side and a polished surface on the back side. Specifically, step S500 includes:

[0114] S510 , performing a polishing (alkali polishing) treatment on the second surface, such as the back surface, of the silicon wafer after single-sided masking in step S400 , so that the second surface of the silicon wafer forms a polished surface.

[0115] In some embodiments, the operating conditions of the polishing treatment include: using a mixture of alkali and alkali polishing additives, treating at a temperature of 55°C to 80°C for 20s to 600s; the temperature can be 55°C, 60°C, 65°C, 70°C, 75°C or 80°C, etc., and the time can be 20s, 30s, 40s, 50s, 60s, 100s, 120s, 180s, 200s, 240s, 300s, 360s, 400s, 420s, 480s, 500s, 550s or 600s, etc., but is not limited to the listed values, and other values ​​not listed within the numerical range are also applicable.

[0116] Optionally, the base includes NaOH and / or KOH. For example, the base can be NaOH, or KOH, or a mixture of NaOH and KOH. Preferably, the base is KOH. This embodiment does not limit the specific type of alkali polishing additive, and conventional alkali polishing additives in the art can be used, which will not be described in detail here.

[0117] Optionally, in the mixed liquid, the mass concentration of the alkali such as KOH is 0.3% to 5%, for example, it can be 0.3%, 0.4%, 0.5%, 0.6%, 0.8%, 1%, 1.5%, 1.8%, 2%, 2.5%, 2.8%, 3%, 4%, 4.5% or 5%; the mass concentration of the alkali polishing additive is 0.5% to 3%, for example, it can be 0.5%, 0.8%, 1%, 1.5%, 2%, 2.5%, 3%, etc., but is not limited to the above-mentioned values, and other values ​​not listed within this numerical range are also applicable.

[0118] In this way, under the above-mentioned processing temperature, time and mixed liquid conditions, the velvet surface on the back side of the silicon wafer that is not protected by the silicon oxide mask layer can be effectively removed, so that the back side of the silicon wafer forms a polished surface.

[0119] S520 , performing post-cleaning on the silicon wafer after the polishing process in step S510 , which may also be referred to as Post.

[0120] Post-cleaning of the silicon wafer can be used to remove residues left over from the above-mentioned treatment process, such as residues of alkaline polishing additives.

[0121] The specific operation mode of the post-cleaning of step S520 may be the same as or similar to the specific operation mode of the post-cleaning of step S310. Therefore, step S520 may refer to the operation mode of the aforementioned step S310 and will not be described in detail here.

[0122] S530 , chemically polishing the silicon wafer after the cleaning process in step S520 , which may also be referred to as CP.

[0123] This chemical polishing, or CP step, can be used to micro-modify the textured surface of the silicon wafer and round off the pyramid corners, facilitating subsequent CVD coating processes.

[0124] The specific operation of the chemical polishing in step S530 may be the same as or similar to the specific operation of the chemical polishing in step S320. Therefore, the operation of step S530 may refer to the operation of the aforementioned step S320 and will not be repeated here.

[0125] S540 , removing the silicon oxide mask layer on the first surface of the silicon wafer. This step may also be referred to as DHF.

[0126] The mask layer removal step, also known as the DHF step, can be used to remove the silicon oxide mask layer on the surface of the silicon wafer by cleaning the silicon wafer with an acidic solution.

[0127] In some embodiments, the operating conditions for removing the silicon oxide mask layer on the first surface of the silicon wafer include: using an acidic solution, treating at a temperature of 20°C to 50°C for 20s to 600s; for example, the treatment temperature can be 20°C, 25°C, 30°C, 35°C, 40°C, 45°C or 50°C, etc.; the treatment time can be 20s, 30s, 40s, 50s, 60s, 100s, 120s, 180s, 200s, 240s, 300s, 360s, 400s, 420s, 480s, 500s, 550s or 600s, etc., but are not limited to the listed values, and other values ​​not listed within the numerical range are also applicable.

[0128] Optionally, the acidic solution includes a hydrofluoric acid solution and / or a hydrochloric acid solution. Preferably, the acidic solution is an HF solution, or the acidic solution is a mixture of HF and HCl. The mass concentration of the acid, such as the HF solution, is 0.2% to 20%, preferably 0.2% to 10%, for example, 0.2%, 0.5%, 1%, 2%, 3%, 4%, 5%, 6%, 7%, 8%, 10%, 12%, 15%, 20%, etc., but is not limited to the above-listed values. Other values ​​not listed within this numerical range are also applicable.

[0129] Example 2

[0130] The silicon wafer texturing method comprises the following steps:

[0131] S100: Provide a silicon wafer and pre-process the silicon wafer. Specifically, step S100 includes:

[0132] S110, removing PSG on the surface of the silicon wafer.

[0133] S120, removing the mechanical damage layer (cutting damage layer) on the surface of the silicon wafer. This step may also be referred to as SDE.

[0134] S130, pre-cleaning the silicon wafer, this step may also be referred to as PRE.

[0135] S200 , texturing the first surface and the second surface of the silicon wafer pre-treated in step S100 .

[0136] Step S100 and step S200 in the second embodiment may be the same as those in the first embodiment, and will not be described in detail here.

[0137] S300, post-processing the silicon wafer after the texturing treatment in step S200, and at the same time, performing double-sided masking on the silicon wafer, that is, performing oxidation treatment on the silicon wafer with an oxidizing solution to form the silicon oxide mask layer on the first surface and the second surface of the silicon wafer respectively.

[0138] In this embodiment, an oxidizing solution is used to oxidize a silicon wafer at a first temperature and for a first time to form silicon oxide mask layers on the first and second surfaces of the silicon wafer, respectively. Step S300 in this embodiment serves a dual purpose: forming a silicon oxide mask layer on the velvet surfaces on the front and back surfaces of the silicon wafer, while also performing post-cleaning operations, such as removing residual alkaline polishing additives. Therefore, using the mask preparation method of this embodiment, step S300 described in Example 1 can be omitted, further simplifying the process, improving production efficiency, and further reducing equipment costs.

[0139] The aforementioned oxidizing solution (such as H2O2 or O3) forms a thick SiO2 layer on the silicon wafer surface, which resists the alkaline initial polishing process and, in turn, resists alkaline corrosion. After single-sided masking, the alkaline polishing process is then performed to achieve differentiated textured surfaces on the front and back surfaces. This embodiment simplifies the manufacturing process and offers the added advantage of low equipment costs.

[0140] In some embodiments, the oxidizing solution comprises a mixture of an alkali and hydrogen peroxide, wherein the alkali comprises at least one of potassium hydroxide, sodium hydroxide, or ammonia. For example, the oxidizing solution may be a mixture of KOH and H2O2; or, the oxidizing solution may be a mixture of NaOH and H2O2; or, the oxidizing solution may be a mixture of NH4OH and H2O2. Preferably, in this embodiment, the oxidizing solution is a mixture of KOH and H2O2. The mass concentration of the alkali such as potassium hydroxide is 0.3% to 3%, for example, 0.3%, 0.5%, 0.8%, 1%, 1.5%, 2%, 2.5% or 3%, and the mass concentration of hydrogen peroxide is 0.5% to 15%, for example, 0.5%, 0.8%, 1%, 2%, 3%, 4%, 5%, 6%, 7%, 8%, 9%, 10%, 12%, 14% or 15%, but is not limited to the above-mentioned values, and other values ​​not listed within this numerical range are equally applicable.

[0141] When a mixed solution containing an alkali such as KOH and H2O2 is used for treatment, the above-mentioned first temperature is 55°C to 80°C, for example, the temperature can be 55°C, 60°C, 65°C, 70°C, 75°C or 80°C, etc., and the above-mentioned first time is 20s to 600s, and the time can be 20s, 30s, 40s, 50s, 60s, 100s, 120s, 180s, 200s, 240s, 300s, 360s, 400s, 420s, 480s, 500s, 550s or 600s, etc., but is not limited to the listed values, and other values ​​not listed within the numerical range are also applicable.

[0142] In other embodiments, the oxidizing solution includes a mixture of hydrochloric acid and ozone, wherein the mass concentration of hydrochloric acid is 0.01% to 3%, for example, it can be 0.01%, 0.05%, 0.1%, 0.5%, 0.8%, 1%, 1.5%, 2%, 2.5% or 3%, and the concentration of ozone is 10ppm to 100ppm, for example, it can be 10ppm, 20ppm, 30ppm, 40ppm, 50ppm, 60ppm, 70ppm, 80ppm, 90ppm, 100ppm, etc., but is not limited to the above-mentioned values, and other values ​​not listed within this numerical range are also applicable.

[0143] When a mixed solution containing HCl and O3 is used for treatment, the first temperature is 10°C to 65°C, for example, the temperature can be 10°C, 15°C, 20°C, 25°C, 30°C, 40°C, 50°C, 60°C or 65°C, etc. The first time is 20s to 600s, and the time can be 20s, 30s, 40s, 50s, 60s, 100s, 120s, 180s, 200s, 240s, 300s, 360s, 400s, 420s, 480s, 500s, 550s or 600s, etc., but is not limited to the listed values, and other values ​​not listed within the numerical range are also applicable.

[0144] Thus, through the above-mentioned step S300, the above-mentioned oxidizing solution is used for treatment, which can not only form a silicon oxide mask layer on the velvet surface of the first surface and the second surface of the silicon wafer, but also play a role in post-cleaning, such as removing the residual alkali polishing additives, improving the quality of the silicon wafer, simplifying the process and reducing costs.

[0145] S400, removing the silicon oxide mask layer from the silicon wafer after the double-sided masking process in step S300, and polishing the wafer to form a single-sided velvet surface (single-sided polished surface). Specifically, step S400 includes:

[0146] S410: Removing the silicon oxide mask layer on the second surface of the silicon wafer. Since this embodiment adopts a double-sided mask method, it is necessary to first remove the mask layer on the second surface and then perform a polishing process on the second surface.

[0147] In some embodiments, the operating conditions for removing the silicon oxide mask layer on the second surface of the silicon wafer include: using a chain machine, using a DHF (diluted high frequency) solution with a mass concentration of 0.2% to 20%, and treating at a temperature of 20° C. to 50° C. for 20 seconds to 600 seconds, thereby removing the mask layer on the second surface of the silicon wafer. For example, the treatment temperature can be 20° C., 25° C., 30° C., 35° C., 40° C., 45° C., or 50° C.; and the treatment time can be 20 seconds, 30 seconds, 40 seconds, 50 seconds, 60 seconds, 100 seconds, 120 seconds, 180 seconds, 200 seconds, 240 seconds, 300 seconds, 360 seconds, 400 seconds, 420 seconds, 480 seconds, 500 seconds, 550 seconds, or 600 seconds, but are not limited to the listed values. Other values ​​not listed in this numerical range are also applicable. The mass concentration of the DHF solution is 0.2% to 20%, for example, 0.2%, 0.5%, 1%, 2%, 3%, 4%, 5%, 6%, 7%, 8%, 10%, 12%, 15%, 20%, etc., but is not limited to the above-mentioned values, and other values ​​not listed within this numerical range are also applicable.

[0148] S420 , performing polishing (alkali polishing) on ​​the second surface, such as the back surface, of the silicon wafer processed in step S410 , so that the second surface of the silicon wafer forms a polished surface.

[0149] S430 , performing post-cleaning on the silicon wafer after the polishing process in step S420 , which may also be referred to as Post.

[0150] S440 , chemically polishing the silicon wafer after the cleaning process in step S430 , which may also be referred to as CP.

[0151] S450 , removing the silicon oxide mask layer on the first surface of the silicon wafer. This step may also be referred to as DHF.

[0152] The specific operation methods of steps S420 to S450 in the second embodiment can refer to steps S510 to S540 in the first embodiment, and will not be repeated here.

[0153] Example 3

[0154] The silicon wafer texturing method comprises the following steps:

[0155] S100: Provide a silicon wafer and pre-process the silicon wafer. Specifically, step S100 includes:

[0156] S110, removing PSG on the surface of the silicon wafer.

[0157] S120, removing the mechanical damage layer (cutting damage layer) on the surface of the silicon wafer. This step may also be referred to as SDE.

[0158] S130, pre-cleaning the silicon wafer, this step may also be referred to as PRE.

[0159] S200 , texturing the first surface and the second surface of the silicon wafer pre-treated in step S100 .

[0160] S300, post-processing the silicon wafer after the texturing process in step S200. Specifically, step S300 includes:

[0161] S310, post-cleaning the silicon wafer after the texturing treatment in step S200, which may also be referred to as Post.

[0162] S320 , chemically polishing the silicon wafer cleaned after step S310 , which may also be referred to as CP.

[0163] S330 , pickling the silicon wafer after chemical polishing in step S320 , which may also be referred to as DHF.

[0164] Steps S100 to S300 in the third embodiment may be the same as those in the first embodiment and will not be described in detail here.

[0165] S400, double-sided masking is performed on the silicon wafer after post-processing in step S300. In this embodiment, ozone oxidation treatment is performed on the silicon wafer after texturing to form silicon oxide mask layers on both the textured surfaces of the first surface and the second surface of the silicon wafer.

[0166] In some embodiments, an ozone generator is used to generate O 3 to form silicon oxide mask layers on the first surface and the second surface of the silicon wafer, respectively.

[0167] In this embodiment, dry O₃ oxidation of the silicon wafer surface is used to form a SiO₂ mask layer. An ozone generator ionizes O₂ in a high-pressure vacuum to generate O₃ gas. This O₃ gas is then introduced into a tank, where the silicon wafer surface is oxidized to form a SiO₂ mask layer. Furthermore, the mask can be removed from one side through a subsequent process similar to the method described in Example 2, enabling the production of single-sided cells. Because this method only uses conventional O₂, production and operating costs are very low, offering the advantages of stable yield and low costs.

[0168] In some embodiments, the concentration of ozone is 10-400 g / Nm 3The treatment temperature is 10°C to 60°C, and the treatment time is 20s to 600s, thereby forming a dense SiO2 mask layer on the first and second surfaces of the silicon wafer, which can be used to resist alkali corrosion. The treatment temperature can be 10°C, 20°C, 30°C, 40°C, 50°C or 60°C, and the treatment time can be 20s, 30s, 40s, 50s, 60s, 100s, 120s, 180s, 200s, 240s, 300s, 360s, 400s, 420s, 480s, 500s, 550s or 600s, but is not limited to the listed values. Other values ​​not listed within the numerical range are also applicable. The ozone concentration can be 10g / Nm 3 , 20g / Nm 3 、50g / Nm 3 、100g / Nm 3 、150g / Nm 3 、200g / Nm 3 、250g / Nm 3 、300g / Nm 3 、350g / Nm 3 、400g / Nm 3 etc., but are not limited to the listed values, and other unlisted values ​​within the numerical range are also applicable.

[0169] S500: Remove the silicon oxide mask layer to form a silicon wafer with a single-sided velvet surface (single-sided polished surface). Specifically, step S500 includes:

[0170] S510: Removing the silicon oxide mask layer on the second surface of the silicon wafer. Since this embodiment adopts a double-sided mask method, it is necessary to first remove the mask layer on the second surface and then perform a polishing process on the second surface.

[0171] S520 , performing polishing (alkali polishing) on ​​the second surface, such as the back surface, of the silicon wafer processed in step S510 , so that the second surface of the silicon wafer forms a polished surface.

[0172] S530 , performing post-cleaning on the silicon wafer after the polishing process in step S520 , which may also be referred to as Post.

[0173] S540 , chemically polishing the silicon wafer after the cleaning process in step S530 , which may also be referred to as CP.

[0174] S550 , removing the silicon oxide mask layer on the first surface of the silicon wafer. This step may also be referred to as DHF.

[0175] The specific operation methods of steps S510 to S550 in the third embodiment can refer to steps S410 to S450 in the second embodiment, and will not be repeated here.

[0176] Example 4

[0177] Based on the same inventive concept, the present invention also provides a method for preparing a solar cell, comprising the following steps:

[0178] Performing single-side texturing treatment using the silicon wafer texturing method described in any one of Examples 1 to 3;

[0179] forming a first intrinsic layer and a second intrinsic passivation layer on the first surface and the second surface of the silicon wafer, respectively;

[0180] forming a first doping layer and a second doping layer on the first intrinsic layer and the second intrinsic layer, respectively, wherein the first doping layer and the second doping layer have opposite doping types;

[0181] forming a first transparent conductive layer and a second transparent conductive layer on the first doped layer and the second doped layer, respectively;

[0182] A first electrode and a second electrode are formed on the first transparent conductive layer and the second transparent conductive layer, respectively.

[0183] In the production of solar cells, this embodiment adopts the single-sided texturing method provided in the embodiment of the present application for texturing treatment, especially the oxidation treatment method provided in the present application for preparing the silicon oxide mask layer, which can reduce costs, reduce process time, ensure yield, and help improve the conversion efficiency of solar cells.

[0184] It should be understood that the method for preparing solar cells in this embodiment and the aforementioned silicon wafer texturing method are based on the same inventive concept, and therefore have at least all the features and advantages of the silicon wafer texturing method for preparing solar cells, which will not be repeated here.

[0185] According to this embodiment, in the method for preparing solar cells, the silicon wafer texturing method provided in this embodiment can be performed first, and then CVD (or PECVD), PVD, screen printing and other processes can be performed in sequence to prepare solar cells.

[0186] It should be pointed out here that in the method of preparing solar cells, the specific post-texture processing (such as CVD, PVD, screen printing) and other processes, that is, the specific methods of preparing the intrinsic layer, doping layer, transparent conductive layer and metal electrode can refer to the existing technology and adopt conventional manufacturing process flow or operation method. This embodiment does not limit this and will not be described in detail here.

[0187] This embodiment further provides a solar cell, comprising:

[0188] A silicon wafer, the silicon wafer comprising a first surface and a second surface disposed opposite to each other;

[0189] A first intrinsic layer, a first doped layer, a first transparent conductive layer and a first electrode are sequentially arranged on the first surface;

[0190] A second intrinsic layer, a second doped layer, a second transparent conductive layer and a second electrode are sequentially arranged on the second surface.

[0191] Effect Examples

[0192] In order to verify the effect of the silicon wafer texturing method provided by the embodiment of the present invention, the present invention also conducted some comparative experiments, wherein the comparative experiments adopted the existing operating method.

[0193] Example 1

[0194] The method for preparing a solar cell comprises: performing single-sided texturing on a silicon wafer, and then subsequently preparing a double-sided intrinsic passivation layer, a doping layer, a transparent conductive layer and a metal electrode.

[0195] Among them, the single-sided texturing treatment of the silicon wafer specifically includes:

[0196] S110, removing PSG: using a 5 wt % HF solution and reacting at room temperature for 2 minutes to remove PSG on the surface of the silicon wafer.

[0197] S120, SDE: Use 5 wt% KOH solution and react at 80° C. for 2 minutes to remove the damaged layer on the surface of the silicon wafer.

[0198] S130, PRE: A mixture of 1 wt% KOH and 5 wt% H2O2 is reacted at 65°C for 4 minutes to oxidize the surface of the silicon wafer, which is beneficial to the uniformity of texturing.

[0199] S200, TEX: A mixture of 1.5 wt% KOH and 0.5 wt% of a texturing additive is reacted at 80° C. for 8 minutes to form a double-sided pyramid structure, that is, a double-sided suede structure.

[0200] S310, POST: A mixture of 1 wt% KOH and 5 wt% H2O2 is reacted at 65°C for 4 minutes to remove residual additives on the surface of the silicon wafer.

[0201] S320, CP: A mixture of 0.2wt% HF, 0.03wt% HCL and 40ppm ozone was used and reacted at 20°C for 2 minutes to achieve the purpose of rounding the pyramid, which is beneficial to the coverage of the subsequent CVD process.

[0202] S330, DHF: Use 5wt% HF solution to react at room temperature for 4 minutes to remove the oxide layer on the surface of the silicon wafer.

[0203] S400, single-sided mask: Use an 182nm UV lamp to irradiate the first velvet surface of the silicon wafer at 200°C for 60 seconds to form an oxide layer, namely a silicon oxide mask layer, on the first velvet surface.

[0204] S510, alkali polishing: using a mixture of 5wt% KOH and 0.7wt% alkali polishing additives, reacting at 65°C for 4 minutes to remove the second suede surface and make it a polished surface. The suede structure of the first suede surface is retained because of the presence of the mask layer.

[0205] S520, POST: A mixture of 1 wt% KOH and 5 wt% H2O2 is reacted at 65°C for 4 minutes to remove residual additives on the surface of the silicon wafer.

[0206] S530, CP: A mixture of 0.2wt% HF, 0.03wt% HCL, and 40ppm ozone was reacted at 20°C for 2 minutes to achieve the purpose of rounding the pyramids, which is beneficial to the coverage of the subsequent CVD process.

[0207] S540, DHF: Use 5wt% HF solution to react at room temperature for 4 minutes to remove the silicon oxide mask layer on the surface of the silicon wafer.

[0208] Example 2

[0209] The method for preparing a solar cell comprises: performing single-sided texturing on a silicon wafer, and then subsequently preparing a double-sided intrinsic passivation layer, a doping layer, a transparent conductive layer and a metal electrode.

[0210] Among them, the single-sided texturing treatment of the silicon wafer specifically includes:

[0211] S110, removing PSG: using a 5 wt % HF solution and reacting at room temperature for 2 minutes to remove PSG on the surface of the silicon wafer.

[0212] S120, SDE: Use 5 wt% KOH solution and react at 80° C. for 2 minutes to remove the damaged layer on the surface of the silicon wafer.

[0213] S130, PRE: A mixture of 1 wt% KOH and 5 wt% H2O2 is reacted at 65°C for 4 minutes to oxidize the surface of the silicon wafer, which is beneficial to the uniformity of texturing.

[0214] S200, TEX: A mixture of 1.5 wt% KOH and 0.5 wt% of a texturing additive is reacted at 80° C. for 8 minutes to form a double-sided pyramid structure (i.e., a velvet surface).

[0215] S300, double-sided masking: using a mixture of 0.05 wt% HCL and 40 ppm ozone at 20° C. for 4 minutes to remove residual additives on the surface of the silicon wafer and simultaneously form an oxide layer (ie, mask layer) on both sides.

[0216] S410, single-side mask removal: using a chain water float method, using 10wt% HF solution, reacting at room temperature for 4 minutes, so that the mask layer on the second velvet surface contacted by the acid solution is corroded away, while the first velvet surface is not contacted by the liquid, thus retaining the mask layer.

[0217] S420, alkali polishing: Use a mixture of 5wt% KOH and 0.7wt% alkali polishing additive to react at 65°C for 4 minutes to remove the second suede surface and make it a polished surface. The suede structure of the first suede surface is retained because of the presence of the mask layer.

[0218] S430, POST: A mixture of 1 wt% KOH and 5 wt% H2O2 is reacted at 65°C for 4 minutes to remove residual additives on the surface of the silicon wafer.

[0219] S440, CP: A mixture of 0.2wt% HF, 0.03wt% HCL, and 40ppm ozone was reacted at 20°C for 2 minutes to achieve the purpose of rounding the pyramids, which is beneficial to the coverage of the subsequent CVD process.

[0220] S450, DHF: Use 5wt% HF solution to react at room temperature for 4 minutes to remove the oxide layer on the surface of the silicon wafer.

[0221] Example 3

[0222] The method for preparing a solar cell comprises: performing single-sided texturing on a silicon wafer, and then subsequently preparing a double-sided intrinsic passivation layer, a doping layer, a transparent conductive layer and a metal electrode.

[0223] Among them, the single-sided texturing treatment of the silicon wafer specifically includes:

[0224] S110, removing PSG: using a 5 wt % HF solution and reacting at room temperature for 2 minutes to remove PSG on the surface of the silicon wafer.

[0225] S120, SDE: Use 5 wt% KOH solution and react at 80° C. for 2 minutes to remove the damaged layer on the surface of the silicon wafer.

[0226] S130, PRE: A mixture of 1 wt% KOH and 5 wt% H2O2 is reacted at 65°C for 4 minutes to oxidize the surface of the silicon wafer, which is beneficial to the uniformity of texturing.

[0227] S200, TEX: A mixture of 1.5 wt% KOH and 0.5 wt% of a texturing additive is reacted at 80° C. for 8 minutes to form a double-sided pyramid structure (i.e., a velvet surface).

[0228] S310, POST: A mixture of 1 wt% KOH and 5 wt% H2O2 is reacted at 65°C for 4 minutes to remove residual additives on the surface of the silicon wafer.

[0229] S320, CP: A mixture of 0.2wt% HF, 0.03wt% HCL and 40ppm ozone was used and reacted at 20°C for 2 minutes to achieve the purpose of rounding the pyramid, which is beneficial to the coverage of the subsequent CVD process.

[0230] S310, DHF: Use 5 wt% HF solution to react at room temperature for 4 minutes to remove the oxide layer on the surface of the silicon wafer.

[0231] S400, double-sided mask: Ozone generator is used to generate O3 gas to oxidize the silicon wafer surface, with an ozone concentration of 300g / Nm 3 , temperature 60℃, process time 400s, a thicker oxide layer (i.e., mask layer) is formed on the surface of the silicon wafer.

[0232] S510, single-side mask removal: using a chain water float method, using 10wt% HF solution, reacting at room temperature for 4 minutes, so that the mask layer on the second velvet surface contacted by the acid solution is corroded away, while the first velvet surface is not contacted by the liquid, thus retaining the mask layer.

[0233] S520, alkali polishing: Use a mixture of 5wt% KOH and 0.7wt% alkali polishing additives to react at 65°C for 4 minutes to remove the second suede surface and make it a polished surface. The suede structure of the first suede surface is retained because of the presence of the mask layer.

[0234] S530, POST: A mixture of 1 wt% KOH and 5 wt% H2O2 is reacted at 65°C for 4 minutes to remove residual additives on the surface of the silicon wafer.

[0235] S540, CP: A mixture of 0.2wt% HF, 0.03wt% HCL, and 40ppm ozone was reacted at 20°C for 2 minutes to achieve the purpose of rounding the pyramids, which is beneficial to the coverage of the subsequent CVD process.

[0236] S550, DHF: Use 5wt% HF solution to react at room temperature for 4 minutes to remove the oxide layer on the surface of the silicon wafer.

[0237] Comparative Example 1

[0238] The method for preparing a solar cell comprises: firstly performing double-sided texturing on a silicon wafer, and then subsequently preparing a double-sided intrinsic passivation layer, a doping layer, a transparent conductive layer and a metal electrode.

[0239] Compared with Example 1, Comparative Example 1 adopts the double-sided texturing treatment method in the prior art.

[0240] Comparative Example 2

[0241] The method for preparing a solar cell comprises: firstly performing single-side texturing treatment on a silicon wafer, and then subsequently preparing a double-side intrinsic passivation layer, a doping layer, a transparent conductive layer and a metal electrode.

[0242] Compared with Example 1, Comparative Example 2 adopts the prior art method of PECVD deposition to prepare the SiNx mask layer.

[0243] The performance tests of the batteries prepared in Examples 1-3 and Comparative Examples 1-2 were carried out, and the results are shown in Table 1 below.

[0244] Table 1

[0245] In addition, Table 2 below shows a comparison of process temperature, mask thickness, mask removal difficulty, and cost when preparing a mask layer using different methods.

[0246] Table 2

[0247] Parts not described in detail in the specification of the present invention are well known to those skilled in the art.

[0248] In the description of the present invention, the terms "first" and "second" are used for descriptive purposes only and should not be understood to indicate or imply relative importance or implicitly specify the number of the technical features indicated. Therefore, a feature specified as "first" or "second" may explicitly or implicitly include at least one of such features. In the description of the present invention, "plurality" means at least two, for example, two, three, etc., unless otherwise specifically defined.

[0249] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present invention.

Claims

1. A silicon wafer texturing method, characterized in that: The method comprises: Pre-processing of silicon wafers; Texturing the first surface and the second surface of the pretreated silicon wafer; Performing ozone oxidation treatment or oxidative solution oxidation treatment on the textured silicon wafer to form a silicon oxide mask layer on the textured surface of the first surface and / or the second surface of the silicon wafer; The silicon oxide mask layer is removed, and one of the first surface and the second surface of the silicon wafer is made to have a suede structure, and the other is made to be a polished surface.

2. The silicon wafer texturing method according to claim 1, characterized in that: The ozone oxidation treatment specifically includes: Irradiating the silicon wafer with an ultraviolet light source so that O2 is converted into O3 under the irradiation of the ultraviolet light source, thereby forming the silicon oxide mask layer on the first surface of the silicon wafer; Optionally, the wavelength of the ultraviolet light source is ≤182 nm, the temperature for treatment using the ultraviolet light source is 20° C. to 300° C., and the treatment time is 5 s to 500 s.

3. The silicon wafer texturing method according to claim 1, characterized in that: The oxidizing solution oxidation treatment specifically includes: Using an oxidizing solution, at a first temperature and for a first time, the silicon wafer is oxidized to form the silicon oxide mask layer on the first surface and the second surface of the silicon wafer respectively; Optionally, the oxidizing solution comprises a mixture of alkali and hydrogen peroxide, the mass concentration of the alkali is 0.3% to 3%, the mass concentration of the hydrogen peroxide is 0.5% to 15%, the first temperature is 55° C. to 80° C., and the first time is 20s to 600s; the alkali comprises at least one of potassium hydroxide, sodium hydroxide, or ammonia water; Optionally, the oxidizing solution includes a mixture of hydrochloric acid and ozone, the mass concentration of the hydrochloric acid is 0.01% to 3%, the concentration of the ozone is 10ppm to 100ppm, the first temperature is 10°C to 65°C, and the first time is 20s to 600s.

4. The silicon wafer texturing method according to claim 1, characterized in that: The ozone oxidation treatment specifically includes: Using an ozone generator to generate O3 to form the silicon oxide mask layer on the first surface and the second surface of the silicon wafer respectively; Optionally, the ozone concentration is 10 to 400 g / Nm 3 The processing temperature is 10℃~60℃, and the processing time is 20s~600s.

5. The silicon wafer texturing method according to claim 1, characterized in that: The thickness of the silicon oxide mask layer is 0.5 nm to 5 nm.

6. The silicon wafer texturing method according to claim 1, characterized in that: The pre-processing of the silicon wafer specifically includes: removing PSG from the surface of the silicon wafer; removing the mechanical damage layer on the surface of the silicon wafer; Pre-cleaning the silicon wafer; Optionally, the operating conditions for removing PSG from the surface of the silicon wafer include: using an acidic solution, treating at a temperature of 20° C. to 50° C. for 20 seconds to 600 seconds; the acidic solution includes a hydrofluoric acid solution and / or a hydrochloric acid solution; Optionally, the operating conditions for removing the mechanical damage layer on the surface of the silicon wafer include: using an alkaline solution, treating at a temperature of 55° C. to 80° C. for 20 seconds to 600 seconds; the alkaline solution includes a sodium hydroxide solution and / or a potassium hydroxide solution; Optionally, the operating conditions for pre-cleaning the silicon wafer include: using a mixture of alkali and hydrogen peroxide, treating at a temperature of 55°C to 80°C for 20s to 600s; the alkali includes sodium hydroxide and / or potassium hydroxide; the mass concentration of the alkali is 0.3% to 3%, and the mass concentration of the hydrogen peroxide is 0.5% to 5%.

7. The silicon wafer texturing method according to claim 1, characterized in that: The texturing process specifically includes: The first surface and the second surface of the silicon wafer are corroded by using a texturing solution, so that the first surface and the second surface of the silicon wafer are formed with a pyramid-shaped textured structure; the texturing solution includes an alkali and a texturing additive; Optionally, the alkali includes sodium hydroxide and / or potassium hydroxide; the mass concentration of the alkali is 0.3% to 5%, and the mass concentration of the texturing additive is 0.5% to 3%; Optionally, the temperature of the texturing is 55° C. to 85° C., and the time is 20s to 600s.

8. The silicon wafer texturing method according to claim 2 or 4, characterized in that: After the texturing and before the ozone oxidation treatment, the method further comprises: performing post-cleaning on the silicon wafer; chemically polishing the silicon wafer; Acid washing of silicon wafers; Optionally, the post-cleaning operation conditions include: using a mixture of alkali and hydrogen peroxide at a temperature of 55° C. to 80° C. for 20 seconds to 600 seconds; the alkali includes sodium hydroxide and / or potassium hydroxide; the mass concentration of the alkali is 0.3% to 3%, and the mass concentration of the hydrogen peroxide is 0.5% to 5%; Optionally, the operating conditions of the chemical polishing include: using a mixture of hydrofluoric acid, hydrochloric acid and ozone, treating at a temperature of 5° C. to 60° C. for 20 seconds to 600 seconds; the mass concentration of the hydrofluoric acid is 0.05% to 0.5%, the mass concentration of the hydrochloric acid is 0.01% to 2%, and the concentration of the ozone is 10 to 80 ppm; Optionally, the pickling operation conditions include: using an HF solution with a mass concentration of 0.2% to 20%, treating at a temperature of 20° C. to 50° C. for 20s to 600s.

9. The silicon wafer texturing method according to claim 2, characterized in that: After forming the silicon oxide mask layer, the method further includes: Polishing the second surface of the silicon wafer to form a polished surface on the second surface of the silicon wafer; performing post-cleaning on the silicon wafer; chemically polishing the silicon wafer; removing the silicon oxide mask layer on the first surface of the silicon wafer; Optionally, the polishing treatment comprises: using a mixture of alkali and an alkali polishing additive at a temperature of 55° C. to 80° C. for 20 seconds to 600 seconds; the alkali comprises sodium hydroxide and / or potassium hydroxide; the mass concentration of the alkali is 0.3% to 5%, and the mass concentration of the alkali polishing additive is 0.5% to 3%; Optionally, the operating conditions for removing the silicon oxide mask layer on the first surface of the silicon wafer include: using an acidic solution for treatment at a temperature of 20°C to 50°C for 20s to 600s; the acidic solution includes a hydrofluoric acid solution and / or a hydrochloric acid solution, and the mass concentration of the acid is 0.2% to 20%.

10. The silicon wafer texturing method according to claim 3 or 4, characterized in that: After forming the silicon oxide mask layer, the method further includes: removing the silicon oxide mask layer on the second surface of the silicon wafer; Polishing the second surface of the silicon wafer to form a polished surface on the second surface of the silicon wafer; Post-cleaning the silicon wafer; chemically polishing the silicon wafer; removing the silicon oxide mask layer on the first surface of the silicon wafer; Optionally, the operating conditions for removing the silicon oxide mask layer on the second surface of the silicon wafer include: using a DHF solution with a mass concentration of 0.2% to 20% at a temperature of 20° C. to 50° C. for 20s to 600s.

11. A method for preparing a solar cell, characterized in that: The following steps are involved: Performing single-side texturing treatment using the silicon wafer texturing method according to claim 1; forming a first intrinsic layer and a second intrinsic passivation layer on the first surface and the second surface of the silicon wafer, respectively; forming a first doping layer and a second doping layer on the first intrinsic layer and the second intrinsic layer, respectively, wherein the first doping layer and the second doping layer have opposite doping types; forming a first transparent conductive layer and a second transparent conductive layer on the first doped layer and the second doped layer, respectively; A first electrode and a second electrode are formed on the first transparent conductive layer and the second transparent conductive layer, respectively.

12. A solar cell, characterized in that: The solar cell is manufactured by the manufacturing method according to claim 11; the solar cell comprises: A silicon wafer, comprising a first surface and a second surface disposed opposite to each other; A first intrinsic layer, a first doped layer, a first transparent conductive layer and a first electrode are sequentially arranged on the first surface; A second intrinsic layer, a second doping layer, a second transparent conductive layer and a second electrode are sequentially arranged on the second surface.

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