A circuit to reduce reverse intermodulation distortion products

Abstract

A circuit comprises an input, an amplifier circuit, signal amplitude detection apparatus, and a predistorter. The input is configured to receive an input signal. The amplifier circuit is configured to output an amplified signal. The signal amplitude detection apparatus is configured to detect at least a portion of a backward wave which interferes with the amplified signal. The signal amplitude detection apparatus is further configured to generate a signal proportional to an amplitude and / or a power of the at least a portion of the backward wave to obtain a generated signal. The predistorter is configured to modify the input signal based on the generated signal and to provide a modified signal to the amplifier circuit.

Description

[0001] A CIRCUIT TO REDUCE REVERSE INTERMODULATION DISTORTION PRODUCTS

[0002] TECHNICAL FIELD

[0003] Embodiments of the present disclosure relate to circuits, and particularly to circuits for reducing the effects of reverse waves in an amplifier circuit interfering with signals output from amplifiers.

[0004] BACKGROUND

[0005] Amplifiers, particularly power amplifiers (PA), in radio systems are generally negatively affected by backward waves (also referred to herein as “interfering waves” or “reverse waves”) which can occur in a radio system when signal energy travels backward in an amplifier (e.g., into an antenna branch and towards the amplifier).

[0006] Backward waves can be caused by reflections from impedance discontinuities in transmission lines (e.g., from contacts, filters, and antennas). They can also enter the circuit as external interference from another (uncoordinated) radio(s).

[0007] In antenna arrays, internal leakage due to coupling from other antennas in the array can be a major source of backward waves to amplifiers. These waves can vary in amplitude and phase (e.g., due to one or more of: beam steering, Multiple-Input Multiple-Output (MIMO) operation, and other varying amplitude and phase effects) and can vary between the different antenna branches. From the perspective of the amplifier, this appears as varying reflections and can be quantified using average and worst-case reflection coefficients.

[0008] The negative effects of backward waves reaching amplifiers include: varying (output) power capacity; varying gain; and increased (nonlinear) distortion due to reverse intermodulation (IM). For example, intermodulation can occur between the desired amplifier output and the backward wave.

[0009] One option for reducing the effects of backward waves is to use circulator-based isolators. Circulator-based isolators have been used for a long time as the standard way of reducing backward wave power and, consequently, reverse intermodulation distortion. However, this option can be undesirable in many cases, especially when space is constrained and when high frequencies are used. That is, circulator-based isolators can be one or more of: big, hard to integrate due to magnetic materials, and generally narrowband. If they are made smaller or more wideband, they can have increased insertion loss. They can also be ineffective at higher frequencies.

[0010] Another option for reducing the effects of backward waves is to use balanced amplifiers. Balanced amplifiers are commonly used for improving the backward termination of backward waves (including antenna reflections). Typically, balanced amplifiers comprise: two identical amplifiers connected to the input ports of a quadrature hybrid that has its output ports connected to an antenna (via filters and transmission lines) and to a resistive termination (also referred to herein as a “terminated port” or “termination resistor”). The antenna port is where the combined power of the amplifiers is output. The terminated port is where backward waves that are linearly and equally reflected by the two amplifiers end up, instead of being reflected and going back to the antenna port.

[0011] Balanced amplifiers can also have the side effect of steering many reverse intermodulation products into the same termination resistor. This occurs because many low-order reverse intermodulation products at individual amplifier output nodes have the same phase as the reflected backward wave. Therefore, they also end up in the termination resistor. This side effect can be used to improve the linearity of high- efficiency amplifiers including Doherty amplifiers (see Pashaeifar, M. et al., (2021), “A Millimeter-Wave Mutual-Coupling-Resilient Double-Quadrature Transmitter for 5G Applications”, IEEE Journal of Solid-State Circuits, 56(12), 3784- 3798).

[0012] Other options for reducing the effects of backward waves include any one or more of: using more linear types of amplifiers, over-dimensioning amplifiers to increase headroom and linearity; using reactive tuning networks to adjust for varying apparent antenna impedance; and feedforward linearization.

[0013] For example, a way to linearize a wideband power amplifier is to use digital predistortion (DPD) techniques. In particular, known DPD techniques can be adapted such that, when employed, they compensate for backward waves within a circuit.

[0014] In one example, a backward signal is detected, digitized, and processed using nonlinear processing (e.g. by using 2-dimensional tables or polynomials).

[0015] One example of a circuit utilizing a DPD technique with such digitized backward wave processing is illustrated in Figure 1. The circuit in Figure 1 comprises a digital predistorter 102, an amplifier 104, an Antenna Observation Receiver (AOR) 106, a directional coupler 108, and an antenna 110.

[0016] The amplifier 104 is configured to amplify a signal, X, that is input into the circuit. The directional coupler 108 is configured to detect (i.e. extract a portion of in this example) a backward wave, Z, moving towards the output of the amplifier 104 in the circuit. The AOR 106 is configured to transform the detected backward wave to a digital format (to obtain a backward wave signal), such as a digital equivalent complex baseband. The output of the AOR 106 and the input signal are input into the DPD 102. The DPD 102 then creates a signal that is to be input into the amplifier 104, so that the amplifier 104 produces an output signal, Y, which is a linearly-amplified version of the input signal. The output signal is time delayed, as indicated by the T block in Figure 1. T represents the added time delays of the backward wave signal caused by the directional coupler, the AOR 106, and parts of the DPD 102. The output signal can then be transmitted by the antenna 110. With the circuit of Figure 1 , analog downconversion and digitization of the backward wave can be contained to the AOR 106.

[0017] Another example of a circuit utilizing a DPD technique with digitized backward wave processing is illustrated in Figure 2. The circuit comprises a two-input digital predistorter 202, an amplifier 204, an antenna array 206, and a (multi-input) Antenna Array Model (AAM) 208.

[0018] The AAM 208 is configured to model the antenna array 206. The AAM 208 receives multiple input signals (e.g., X1,X2, ...) and predicts, using the multiple input signals, a backward wave, Zltcaused by antenna-to-antenna coupling in the antenna array 206. The two-input DPD 202 is configured to receive the first input signal and the predicted backward wave. The AAM 208, together with the two-input DPD 202, can then model the interactions of the antennas in the antenna array 206 so as to output a signal to the amplifier 204 that provides a linearly amplified input signal X1. The advantage of the circuit in Figure 2 is that the analog delay associated with the circuit of Figure 1 can be avoided. However, the circuit of Figure 2 has the disadvantage that it only works when compensating for backward waves caused by antenna-to-antenna coupling in an array.

[0019] SUMMARY

[0020] There currently exist certain challenges. For example, one challenge is that efficient amplifiers (e.g., Doherty amplifiers) are usually more nonlinear than non-efficient amplifiers. Therefore, replacing efficient but nonlinear amplifiers with more linear types of amplifiers (e.g., simple class AB amplifiers) can lead to lower efficiency.

[0021] Another challenge is that, whilst over-dimensioning amplifiers can increase their headroom and linearity (reducing the amount of reverse intermodulation products being created), it can also reduce the efficiency of the amplifiers and uses bigger and more costly transistors.

[0022] Another challenge is that, whilst backward wave effects that look like slow changes in apparent antenna impedance can be tuned away in a narrow band by a reactive network, such reactive networks do not work efficiently if the apparent impedance variations are too fast and / or if the signals are too wideband. Also, such reactive networks do not usually work effectively for backward waves caused by external interferers.

[0023] Another challenge is that, whilst feedforward can remove reverse intermodulation distortion, it can be inefficient because it often has high insertion loss from its directional couplers and high power consumption in its error amplifier.

[0024] There are also challenges associated with the adapted DPD techniques of Figures 1 and 2. For example, using a digitized backward wave has increased computational complexity in comparison to the other methods discussed above for reducing the effects of backward waves (e.g., due to the processing of both the absolute amplitude and the (relative) phase of the backward wave). Hence, the chip area and power consumption associated with circuits in which a backward wave is digitized is increased. The increased power consumption can also be caused by the use of analog-to-digital (A / D) converters (ADCs).

[0025] For example, a challenge associated with the adapted DPD technique of Figure 1 is that there is a large time delay stemming from conversions and digital processing of the backward signal in the AOR 106 and DPD 102. This necessitates an equally large compensating time delay (e.g., the box marked T in Figure 1) on the output side of the amplifier 104 to facilitate synchronous application of the predistortion signal to the backward wave it is to compensate. This is performed in the high-power part of the power amplifier sub-system (i.e. , in the output of the (power) amplifier 204) by using a time-delaying transmission line or time-delay filter, practical implementations of which are usually “lossy”. This causes a power loss, which may be large, that reduces the efficiency and output power of the circuit significantly.

[0026] Regarding the circuit of Figure 2, the two-input DPD 202 together with the AAM 208 is computationally complex. That is, even if linear, the AAM 208 is both relatively complex by itself and adds complexity to the two-input DPD 202. Another disadvantage is that the circuit only functions effectively when compensating for backward waves that result from known system-internal sources with correctly modeled antenna-to-antenna coupling. Thus, it does not work well against external interferers.

[0027] The circuits of Figures 1 and 2 are also ineffective at counteracting effects caused by varying backward waves (e.g., during beam steering or MIMO operation). For example, the circuits cannot compensate for the varying peak output power capacity and gain of individual amplifiers (the peak power loss is especially hard to compensate for solely with DPD techniques). This can reduce the control precision of antenna arrays. A simple solution to this problem is to over-dimension the amplifiers to reduce the variations and increase the amplifier headroom; however, as discussed above, this is costly and inefficient.

[0028] Combining DPD techniques with balanced amplifiers can solve some of the above discussed problems, but not all.

[0029] To address these and other challenges, a first aspect of the present disclosure provides a circuit comprising an input, an amplifier circuit, signal amplitude detection apparatus, and a predistorter. The input is configured to receive an input signal. The amplifier circuit is configured to output an amplified signal. The signal amplitude detection apparatus is configured to detect at least a portion of a backward wave which interferes with the amplified signal. The signal amplitude detection apparatus is further configured to generate a signal proportional to an amplitude and / or a power of the at least a portion of the backward wave to obtain a generated signal. The predistorter is configured to modify the input signal based on the generated signal and to provide a modified signal to the amplifier circuit.

[0030] A second aspect of the present disclosure provides a communication device comprising a circuit according to the first aspect of the present disclosure. The circuit according to embodiments of the disclosure may have one or more of the following technical advantages.

[0031] Embodiments of the present disclosure can be used to reduce reverse intermodulation distortion products of the “variable compression” kind (e.g., those that have the same phase relative to the desired output signal). This is beneficial, as these reverse intermodulation distortion products cannot be corrected by the phase-averaging systems discussed in detail below. By exploiting the nature of these intermodulation products, embodiments of the present disclosure are simple when compared to regular predistortion systems with reverse intermodulation reduction abilities. This synergy means that embodiments of the present disclosure work well with the phase-averaging systems (discussed in detail below).

[0032] Furthermore, embodiments of the present disclosure address most of the above discussed issues with DPD systems. Embodiments of the present disclosure avoid AOR and DPD processing of the backward waves, meaning the associated time delay and lossy compensating output delay lines are also avoided. The computational complexity of the DPD systems is also reduced, especially compared to multi-input DPDs with antenna array modeling.

[0033] Therefore, embodiments of the present disclosure provide predistortion circuits with reduced complexity in comparison to known systems. They also work well together with phase-averaging systems (discussed in detail below) to provide improved resilience to backward wave intermodulation.

[0034] In summary, embodiments of the present disclosure take advantage of the fact that the (residual) backward wave induced distortion is independent of the phase of the backward wave itself, and is instead in phase with the input signal. As such, embodiments of the present disclosure result in less analog loss, less digital power consumption, and lower component costs are achieved.

[0035] BRIEF DESCRIPTION OF THE DRAWINGS

[0036] For a better understanding of examples of the present disclosure, and to show more clearly how the examples may be carried into effect, reference will now be made, by way of example only, to the following drawings in which: Figure 1 is a circuit diagram of a first circuit utilizing DPD techniques for backward wave processing; and

[0037] Figure 2 is a circuit diagram of a second circuit utilizing DPD techniques for backward wave processing;

[0038] Figure 3 is a circuit diagram of a circuit according to embodiments of the disclosure;

[0039] Figure 4 is a circuit diagram of an amplifier circuit according to embodiments of the disclosure;

[0040] Figure 5 is a graph illustrating the results obtained from the circuit of Figure 4;

[0041] Figure 6 is a circuit diagram of a circuit according to embodiments of the disclosure;

[0042] Figure 7 is an amplifier circuit which may be utilized with embodiments of the present disclosure;

[0043] Figure 8 is a collection of graphs illustrating the properties of waves in three amplifier systems;

[0044] Figure 9 is an amplifier circuit which may be utilized with embodiments of the present disclosure;

[0045] Figure 10 is an amplifier circuit which may be utilized with embodiments of the present disclosure;

[0046] Figure 11 is a graph illustrating the power of reverse waves relative to the Adjacent Channel Leakage Ratio (ACLR) of carrier waves in a system with respect to wave frequency;

[0047] Figure 12 is an amplifier circuit which may be utilized with embodiments of the present disclosure;

[0048] Figure 13 is an amplifier circuit which may be utilized with embodiments of the present disclosure; and

[0049] Figure 14 is a communication device according to embodiments of the disclosure.

[0050] DETAILED DESCRIPTION

[0051] Some of the embodiments contemplated herein will now be described more fully with reference to the accompanying drawings. Other embodiments, however, are contained within the scope of the subject matter disclosed herein. The disclosed subject matter should not be construed as limited to only the embodiments set forth herein; rather, these embodiments are provided by way of example to convey the scope of the subject matter to those skilled in the art. Embodiments of the present disclosure result in reduced reverse intermodulation distortion products in circuits, namely those of the type that are not dependent on the phase of the backward wave (e.g., those that remain after even after utilizing the phaseaveraging amplifier circuit discussed below with reference to Figures 7-13, particularly when larger numbers of amplifier branches are used).

[0052] Since these reverse intermodulation distortion products have the same phase relative to the desired output signal, their effect on the amplifier looks like a variable amplitude compression of the desired forward / output signal, wherein the effect depends on the amplitude of the backward wave.

[0053] Embodiments of the present disclosure compensate for the effects of intermodulation products on amplifiers which are induced by the absolute amplitude of the backward wave and are independent of the phase of the backward wave. The compensation is performed by using predistortion components constructed based on the absolute amplitude (or, equivalently, envelope power (e.g. the squared absolute amplitude) of a detected backward wave). In this way, embodiments of the present disclosure are simplified in comparison to previously known predistortion systems for reducing the effects of reverse intermodulation products. This is because simple analogue implementations of embodiments of the present disclosure can be utilized to solve the above discussed problems with prior art systems. As such, embodiments of the present disclosure can compensate for the effects of reverse intermodulation products with low delay and high bandwidth.

[0054] For example, in some embodiments of the present disclosure, the use of complex backward wave detectors can be avoided; instead, circuits may utilize backward wave detectors that are configured to detect the envelope amplitude or envelope power of a backward waves. As another example, the compensation required for the amplifier compression is substantially phase-less, meaning it can be achieved using simple amplitude manipulation of the drive signal.

[0055] As discussed in detail below, in some embodiments of the present disclosure, a backward wave is detected and a signal proportional to the envelope power of the detected backward wave is generated. The generated signal may then be multiplied (e.g., in the analog domain) by a nonlinearly modified input signal to obtain a targeted predistortion signal (in a manner similar to a regular predistorted input signal). The targeted predistortion signal can then be added to the regular input signal and amplified by a non-linear amplifier.

[0056] For example, Figure 3 is a diagram of a circuit according to some embodiments of the present disclosure. The circuit comprises an input 302 configured to receive an input signal, X. The circuit further comprises an amplifier circuit 304 configured to output an amplified signal, Y. For example, the amplified signal may be output to a transmission line 306 that is connectable to an antenna element / antenna, or output directly to an antenna element / antenna 312. The antenna element / antenna 312 may be part of an antenna array. The circuit further comprises a predistorter 310 configured to reduce compression of the output of the amplifier circuit 304 caused by a backward wave, Z, interfering with the amplified signal.

[0057] The amplifier circuit 304 comprises a plurality of amplifiers, such as for example the phaseaveraging amplifier circuit (also referred to as a phase-averaged amplifier circuit) discussed in detail below with reference to Figures 7-13, such as a balanced amplifier.

[0058] The predistorter 310 comprises an analog predistorter or a digital predistorter. For example, in some embodiments, the predistorter 310 may comprise an analog predistorter that has a backward wave envelope power input, implemented as a standalone analog predistorter (i.e. , regular predistortion is done in analog) in parallel with a regular digital predistorter, DPD (i.e., acting on a separate output), or as a standalone analog predistorter used after a standard single-input / single-output DPD.

[0059] The predistorter 310 is configured to modify the input signal to provide a modified signal (i.e., a predistorted version of the input signal) to the amplifier circuit. The input signal is modified to comprise backward wave compression compensation before it is input into the (non-linear) amplifier circuit 304. The predistorter 310 is configured to modify the input signal based on the amplitude and / or power of (at least a portion of) a detected backward wave which interferes with the output of the amplifier circuit 302 (i.e., the source of the amplifier circuit’s 304 nonlinearity). Specifically, the predistorter 310 is configured to modify the input signal based on a generated signal that is proportional to the amplitude and / or power of the (at least a portion of) the detected backward wave, wherein the generated signal is obtained by signal amplitude detection apparatus (discussed in detail below). The amplitude of the at least a portion of the backward wave may correspond to the absolute amplitude of the envelope of the at least a portion of the backward wave, whilst the power of the at least a portion of the backward wave may correspond to the power (i.e. , the squared amplitude) of the envelope of the at least a portion of the backward wave.

[0060] In order to detect the at least a portion of the backward wave which interferes with the amplified signal, the circuit of Figure 3 comprises a signal amplitude detection apparatus 308. The signal amplitude detection apparatus 308 may comprise a directional coupler, such as a backward coupler. A backward coupler uses an odd number of quarter wavelength coupled sections which cause the relevant coupled output to be output from a rear port with a 90-degree relative phase.

[0061] The signal amplitude detection apparatus 308 is configured to detect the at least a portion of the backward wave so that it may generate the signal proportional to the amplitude and / or power of the (at least a portion of) the detected backward wave to obtain the generated signal discussed above. For example, the generated signal may correspond to the envelope power (e.g. squared amplitude) of the backward wave. The generated signal may be described as proportional to the baseband component of |Z|2.

[0062] The skilled person would be aware of a number of methods of producing a signal proportional to the squared / power envelope signal of a Radio Frequency (RF) source. For example, one method is squaring the RF source directly and filtering out the baseband. Squaring the backward wave directly at the RF source can, for example, be done using an analog multiplier with ganged inputs (i.e., the same signal is input in to both inputs) or with “square law” devices which utilize transistors and diodes in some operational modes.

[0063] Another method involves the use of a diode detector (also referred to herein as a peak detector) which entails both rectifying and low pass filtering a detected backward wave before squaring its baseband envelope amplitude output. Resistance on the input side of the diode detector reduces reflections. The diode detector may be followed, for example, by a squaring multiplier at baseband, which can be simpler to implement than squaring the RF source directly.

[0064] A third method is to downconvert the backward RF signal to baseband with a homodyne mixer. The squared envelope may then obtained by squaring the in-phase and quadrature-phase (IQ) components separately and summing them. Downconversion to an intermediate frequency (IF) is also possible.

[0065] The requirements on dynamic range can often be relatively relaxed since the main effort is at medium and high output amplitudes.

[0066] Therefore, in an example of the circuit of Figure 3, the signal modifying apparatus 308 may square at least a portion of the detected backward wave (e.g., using an analog or digital multiplier) and low pass filter the squared at least a portion of the backward wave to obtain the generated signal (a signal proportional to the envelope power).

[0067] As discussed above, the predistorter 310 uses the generated signal to modify the input signal. In some embodiments, this modification comprises the predistorter 310 combining: a first nonlinearly modified signal; the generated signal; and, optionally, the input signal.

[0068] For example, in some embodiments, the circuit of Figure 3 may further comprise a signal modifying apparatus 314 which is configured to provide the first nonlinearly modified signal. The signal modifying apparatus 314 may be configured to receive the input signal from the input 302 and modify the input signal to provide the first nonlinearly modified signal (e.g., by squaring the input signal and passing the squared input signal through a low pass filter). In some embodiments, this may result in the first nonlinearly modified input signal comprising a first polynomial function of the amplitude / power of the input signal, where the amplitude / power of the input signal may correspond to the amplitude / power of an envelope of the input signal. For example, the first nonlinearly modified input signal may be denoted as f (| |2).

[0069] In some embodiments, the predistorter 310 may be configured to further modify the input signal based on a second nonlinearly modified signal (e.g., a second polynomial function of an amplitude of the input signal, such as a regular predistortion signal). For example, to obtain the modified signal, the input signal may be further modified by the predistorter 310 being configured to: combine the input signal, the first nonlinearly modified signal, the generated signal, and the second nonlinearly modified signal. Specifically, the predistorter 310 may: multiply the generated signal (e.g., a signal corresponding to the power of the at least a portion of the backward wave) with the first nonlinearly modified signal to obtain a first multiplied signal; sum the first multiplied signal and the second nonlinearly modified signal to obtain a first summed signal; and multiply the input signal by the first summed signal to obtain the modified signal.

[0070] The predistorter 310 is configured to provide the modified signal to the amplifier circuit 304. The amplifier circuit 304 then outputs the amplified signal, Y, corresponding to an amplified version of the input signal, X. The amplified signal may be provided to the transmission line 306 and / or the antenna 312. By virtue of modifying the input signal in the above discussed manner, the effects of the reverse intermodulation products on the amplified signal are reduced.

[0071] The box marked T in Figure 3 between the output of the amplifier circuit 304 and the signal amplitude detection apparatus 308 represents a delay which enables the backward wave compression compensation to be applied simultaneously with the effect of the backward wave on the amplifier circuit 304. Due to the low delay caused by the above discussed processing, T can be smaller than the delays utilized in prior art circuits for reducing the effects of reverse intermodulation products. Thus, separate delay lines / filters may be significantly reduced or absent from the circuit.

[0072] In the circuit of Figure 3, the multiplying of the generated signal with the first nonlinearly modified signal is done late in the chain, and is typically done in analog baseband, IF, or RF (which is enabled by both the simple analog processing of the backward wave and that the nonlinear processing of the input signal being done independently and without any substantial interacting timing requirements).

[0073] Figure 4 is an example implementation of the circuit of Figure 3. In Figure 4, a (pure) analog predistorter 310 provides backward wave dependent compression compensation to a three-amplifier circuit 304. As discussed above, a targeted predistortion signal is obtained by the analog predistorter 310 multiplying a signal corresponding to a backward wave envelope power signal with a first nonlinearly modified signal. In the example of Figure 4, the signal modifying apparatus 314 uses analog multipliers to construct first polynomial functions (e.g. in | |2) of the input signal’s envelope power and multiply them with the input signal to obtain the first nonlinearly modified signal. Specifically, in this example, the first polynomial functions of the input signal’s envelope power, f(| |2), are formed by weighted sums of squared and multiplied copies of | |2. The generated signal (in this embodiment, a signal corresponding to the backward wave envelope power signal) is obtained by having the directional coupler of the signal amplitude detection apparatus 308 detect and split the detected backward wave into two parts. The two parts are then fed to an analog multiplier at radio frequency (RF). The output from the analog multiplier(s) is filtered by a low-pass filter (e.g., a series inductor and a shunt capacitor) to form the generated signal.

[0074] The first nonlinearly modified signal is then multiplied by the generated signal (i.e., the signal corresponding to the backward wave envelope power signal, |Z|2) to obtain the targeted predistortion signal. In other embodiments, the first nonlinearly modified signal may be multiplied by polynomial functions of the generated signal (e.g., a polynomial of |Z|2). For example, various powers of |Z|2may be multiplied by functions of |X|2, and summations performed accordingly.

[0075] The thus formed backward wave dependent compression compensating part may then be multiplied by the RF input signal in the same way as the regular analog predistortion part (i.e., to obtain the modified signal).

[0076] The amplifier circuit 304 may comprises a phase-averaging amplifier circuit in some examples (discussed in detail below with reference to Figures 7-13) that is capable of removing most of the reverse intermodulation products from the circuit. Some examples of circuits according to this disclosure may also include a regular predistorter. For instance, the circuit of Figure 4 also includes a regular predistorter, comprising the components in the upper left-hand side, which has been simplified for illustration purposes.

[0077] Figure 5 is a graph illustrating the results obtained from the circuit of Figure 4 when used to compensate for a simulated gain compression (of up to -10 dB of the output power) caused by backward waves leaking from other antennas in an array.

[0078] Curves 502 represent first implementations of the circuit of Figure 4 where the input signal was not modified based on the generated signal. That is, in the first implementations, embodiments of the present disclosure were not utilized to reduce the effects of backward waves in the circuit. On the other hand, curves 504 represent second implementations of the circuit of Figure 4 where the input signal was modified based on the generated signal. That is, in the second implementations, embodiments of the present disclosure were utilized to reduce the effects of backward waves in the circuit. Specifically, a signal corresponding to the squared amplitude (i.e. , the power) envelope of the backward wave was used to modify the input signal. It is also possible to use simple nonlinear functions of the squared amplitude envelope of the backward wave (formed in a similar way to the polynomial function of the input signal’s envelope power).

[0079] As seen from curves 502, there is significant and varying compression in the upper output power ranges in the output for the amplifier circuit in the first implementations. In contrast, as seen from curves 504, this compression is substantially removed for the amplifier circuit in the second implementations.

[0080] Figure 6 illustrates a further example of a circuit according to embodiments of this disclosure. Specifically, Figure 6 illustrates a more sophisticated predistortion system than that shown in Figures 3 and 4, which retains the low delay and low loss of the analog predistorters of Figures 3 and 4 but utilizes digital processing for some parts of the backward wave compensation processing.

[0081] The circuit of Figure 6 comprises some similar components to those discussed above in relation to Figures 3 and 4, such as: an input 302 configured to receive an input signal, X, a predistorter 310 (comprising a DPD), an amplifier circuit 304 configured to output an amplified signal Y (e.g., to a transmission line 306 or an antenna 312); signal amplitude detection apparatus 308 (comprising a low pass filter 602); and signal modifying apparatus 310. The circuit further comprises a Transmit Observation Receiver (TOR) 604 and error signal generation elements 606 (for adaptation purposes). A directional coupler 608 may take a part of the forward wave, Y, for use by the TOR 604.

[0082] As with the circuits of Figures 3 and 4, a backward wave, Z, interferes with the amplified signal, Y.

[0083] In embodiments of Figure 6, the modified signal is obtained by multiplying a signal proportional to the amplitude and / or power of the (at least a portion of) the detected backward wave (i.e., the generated signal), such as a signal corresponding to a detected backward wave power envelope (or a function of it), with a first nonlinearly modified input signal, f2■ X.

[0084] The signal corresponding to the backward wave power envelope may be obtained by the signal amplitude detection apparatus 308 comprising a directional coupler 602, which detects a backward signal travelling in the backward direction (i.e. , towards the amplifier circuit 304) by extracting a part of it. The signal amplitude detection apparatus 308 squares the extracted part of the backward wave (e.g., using an analog multiplier with ganged input) and passes the squared wave, Z2, through the low pass filter 602. The resulting signal from the low pass filter 602 is proportional to the envelope of the backward wave.

[0085] The DPD outputs the first nonlinearly modified signal, f2■ X, corresponding to the input signal multiplied by an amplitude dependent, nonlinear function in |X|. The first nonlinearly modified signal may be upconverted from digital equivalent complex baseband to analogue RF by IQ-modulator blocks. An IQ-modulator may include an IQ mixer and an analogue to digital converter.

[0086] The first nonlinearly modified signal may be computed digitally by the DPD (e.g., in the same way as the regular DPD output, f0■ X, discussed below). It may then be digital-to- analog converted.

[0087] The DPD may also be used to compute a regular DPD output signal, f0■ X. For example, the regular DPD output signal may be formed by multiplying the input signal X by several time-shifted, amplitude dependent, nonlinear functions in X.

[0088] The first nonlinearly modified signal is multiplied (e.g., by an (analog) multiplier 610 of the predistorter 304) by the signal corresponding to the backward wave power envelope obtained by the signal amplitude detection apparatus 308. The multiplied signal may then be added to the regular digital-to-analog converted DPD output (i.e., f0■ X), before being used as the RF drive signal to the amplifier circuit 304. Upconversion to RF may be performed using separate mixer circuits for the two signals (as in this figure), or with a single mixer if done after summation. The advantages of the circuit of Figure 6 may include higher precision and better adaptation which make it more suitable for systems of amplifiers with more complex distortion behavior.

[0089] The box marked rcompl represents a delay to enable the simultaneous application of the backward wave compression compensation with the backward wave’s effect on the amplifier circuit 304. Like in Figures 3 and 4, due to the low processing delay of the circuit components, rcompl can be much smaller than in prior art systems, and a separate delay line / filter may not be necessary. If the extra delay can be made small enough to not negatively affect the TOR parts, the forward and backward wave couplers 614 and 612 can merge into one that does both.

[0090] Via the circuit of Figure 6, the backward wave part of the predistortion can be split into different parts. As a result, the more complex processing of the input signal can be done in the digital domain without having any extra compensating delay on the output side, while the production of a squared backward wave envelope signal can be done in the analog domain with low delay and multiplied to it late in the chain, after all the timeconsuming processing and conversions are done. The analog backward wave processing can therefore have low delay since it comprises diode rectification, analog multiplication, and usually light (wide transition band) low pass filtering. The compensating delay for this part can be minimal or even unnecessary and omitted in some examples.

[0091] A simple implementation of the circuit in Figure 6 may use, as the modified signal, a single amplitude dependent nonlinear function in |X| multiplied by the squared backward signal |Z|2. For many present system requirements this gives low enough distortion. However, to increase the linearity of the amplifier circuit 304 further, the circuit of Figure 6 may utilize any one or more of: several time-shifted, nonlinear, functions in |X| (e.g., in a similar manner as for the regular forward DPD); a more complex nonlinear function also of the backward signal Z; and multiple time-shifted nonlinear functions in |Z|.

[0092] The reverse intermodulation distortion products at the output of the individual amplifiers may be of three different kinds. The phase-averaging system discussed in relation to Figures 7-13 below can reduce the effects of two: 1) those that always have the same phase relative to the linearly reflected backward signal, which can be removed effectively, and 2) those with diverse phases that vary in a complicated manner, which can be decreased (e.g., unlimitedly) by increasing the number of amplifiers in the phaseaveraging system. However, the phase averaging system cannot effectively deal with a third kind of reverse intermodulation products: those that have the same phase relative to the desired output signal. These cannot be dealt with regardless of the number of amplifiers in the system, because since they have the same phase as the desired output signal, phase-averaging out these backward wave induced distortion products will also phase-average out the desired output signal. Therefore, an obstacle to be addressed with the phase-averaging system is how to remove the intermodulation products of the third kind, particularly in amplifier systems subject to large backward waves. It is therefore beneficial to utilise the above discussed circuits in combination with phase averaging systems in order to reduce or eliminate all three types of reverse intermodulation products in a circuit.

[0093] Figure 7 is a circuit diagram of an amplifier circuit 700 which may be utilized with embodiments of the present disclosure, such as for example the amplifier circuit 304 shown in Figures 3 and 4, or the amplifier circuit 304 shown in Figure 6. The illustrated amplifier circuit may be referred to herein as a phase-averaging amplifier circuit. The phase averaging amplifier circuit can be used to remove a large part of the phasedependent reverse intermodulation distortion from the circuit. This reduction in reverse intermodulation distortion is achieved by phase-averaging the reverse intermodulation products among multiple amplifiers connected by different length transmission lines to a Wilkinson combiner.

[0094] By utilizing the amplifier circuit 700 with embodiments of the present disclosure, both phase-dependent and phase-independent reverse intermodulation products in a circuit can be reduced.

[0095] The amplifier circuit 700 of Figure 7 can be used in some examples to amplify an input signal (also referred to herein as a first signal) whilst reducing the effects caused by phasedependent reverse waves existing in the circuit. For example, reverse waves in the circuit (e.g., caused by reflections from impedance discontinuities in transmission lines and / or entering the circuit as external interference from other radio sources) may travel towards the amplifiers and interfere with their output signals and / or be reflected by them This can generate reverse intermodulation distortion products (also referred to herein as simply “intermodulation products”) at the output of the amplifiers that may be of the following types: 1) A first type having the same phase relative to any linearly reflected reverse signal;

[0096] 2) A second type having the same phase relative to the amplified signals; or

[0097] 3) A third type having diverse phases that vary in a complicated manner.

[0098] The amplifier circuit of Figure 7 may, in some examples, address issues caused by the first and third types of intermodulation products. That is, the amplifier circuit 700 causes reverse intermodulation distortion products to be steered into resistive terminations (a network of resistors) while combining all wanted output power at one output (a signal combining node).

[0099] The amplifier circuit 700 comprises a first input 702, N amplifiers 704 (where N is an integer and N > 2), N first transmission lines 706 (which may also be referred to herein as “delay” or “phasing” lines), N second transmission lines 708 (which may also be referred to herein as 90 degree transmission lines), a signal combining node 710, and a network of resistors 712. At least one of the amplifiers 702 may be a Power Amplifier (PA). The first transmission lines 706 and the second transmission lines 708 are configured to transmit signals output from the amplifiers 702 to the signal combining node 710.

[0100] The first input 702 is configured to receive a first signal that is to be amplified by the amplifiers 704. In some embodiments, the first signal may be received from a signal source that is not illustrated in Figure 7. In some embodiments, the phase of the first signal at the first input 702 is <p0.

[0101] The first input 702 is connected to each one of the amplifiers 704, and each amplifier comprises a respective second input 714. The second inputs 714 are configured to each receive signals from the first input 702. For example, each amplifier receives, from the first input 702, the first signal with (i.e., modified to include) a respective first phase shift, 6n(where 1 < n < N, and n is an amplifier index). The respective first phase shift may include: any phase change caused by the first signal travelling from the first input 702 to the second input 714 of the respective amplifier; and / or any additional phase change to be introduced into the first signal.

[0102] By having the first signals arrive at respective amplifiers 704 with a respective first phase shift, there may be a relative phase difference between the first signals arriving at each of the different amplifiers 704. For example, in some embodiments, the relative phase differences between first signals arriving at a pair of amplifiers 704 may: be between 0 and 180 degrees (or equivalent, such as between 360 and 540 etc.); and / or be substantially equal to integer multiples of 180 / / V degrees.

[0103] For example, in some embodiments, the respective first phase shift may be any one or more of the following: different for each amplifier; have a magnitude of between 0 and 180 degrees (or equivalent, such as between 360 and 540 etc.); and

[0104] / 180\ substantially equal to (M x ( — )) + C degrees, wherein M is an integer value and C is an integer or non-integer value.

[0105] For example, if N = 3, may be 0 degrees, 02may be 60 degrees, and e3may be 120 degrees. In this example, there may be: a 60 degree relative phase difference between a first signal at the second input 714 of a first amplifier 704 and a first signal at the second input 714 of a second amplifier 704; a 120 degree relative phase difference between a first signal at the second input 714 of the first amplifier 704 and a first signal at the second input 714 of a third amplifier 704; and a 60 degree relative phase difference between a first signal at the second input 714 of the second amplifier 704 and a first signal at the second input 714 of the third amplifier 704.

[0106] In other examples, the phase shifts Qnmay be arbitrary, but nevertheless result in signals from the amplifiers 704 arriving at the signal combining node 710 substantially in phase (e.g., the relative phase shifts between each of the first signals are configured to achieve this purpose).

[0107] In some embodiments, the first phase shift may be introduced to the first signals by third transmission lines (not illustrated) which connect the first input 702 to each of the second inputs 714. For example, the third phase shift may be introduced by configuring the (electrical) lengths of the third transmission lines. In an example, the length of each third transmission line may be l0+ l0n, where l0is a constant value for each third transmission line and l0nis a length introducing a phase shift in the first signal of 6n(where 1 < n < N). For example, the third transmission lines may have electrical length that differ by 180 / / V degrees between a first and second third transmission line, and between a second and third transmission line, and so on.

[0108] Additionally or alternatively, in some embodiments, at least some of the third transmission lines may comprise respective phase shifters that introduce the respective first phase shift. For example, at least one of the respective phase shifters may comprise a modified Schiffman phase shifter, as discussed below in reference to Figure 10.

[0109] Returning to Figure 7, each amplifier 704 further comprises an output 716 which is connected to a first end of a respective first transmission line 706, such that signals output from a respective amplifier 704 are input into the first end of a respective first transmission line 706. Signals that are input into a first end of a respective first transmission line 706 are output from a second end of the respective first transmission line 706.

[0110] The second end of the respective first transmission line 706 is connected to a first end of a respective second transmission line 708, such that signals output from the second end of the respective first transmission line 706 are input into a first end of the respective second transmission line 708. Signals that are input into the first end of the respective second transmission line 708 are output from a second end of the respective second transmission line 708.

[0111] The second ends of respective second transmission lines 708 are connected to the signal combining node 710, and signals that are output from second ends of second transmission lines 708 are input into the signal combining node 710.

[0112] The first transmission lines 706 and the second transmission lines 708 are therefore configured such that signals output from the amplifiers 704 (at substantially the same time) arrive at the combining node 710 substantially in phase.

[0113] For example, the first transmission lines 706 are configured such that signals input into the first ends of the first transmission lines 706 from the amplifiers 704 are output from the second ends of the first transmission lines 706 substantially in phase. This is achieved by configuring each first transmission line 706 such that it introduces a respective second phase shift, an, (where 1 < n < N) in a signal transmitted by the respective first transmission line 706. The introduction of the respective second phase shift in the signal transmitted by the respective first transmission line 706 may, for example, compensate for the effect of the respective first phase shifts applied to the first signal. The respective second phase shift may include: any phase change caused by the first signal travelling from the output 716 of an amplifier 704 to the second end of the connected first transmission line 706; and / or any additional phase change to be introduced into the first signal.

[0114] For example, where a respective first phase shift of 6nhas been applied to a first signal, the respective second phase shift anapplied to the first signal may be X - 0n, where X is a constant (e.g. 180 degrees). For example, if the introduction of the respective first phase shift results in the first signal being delayed by 6ndegrees, the introduction of the second phase shift anmay result in the first signal being delayed by a further 180 - 6ndegrees (or an equivalent phase shift, such as 540 - en).

[0115] In other examples, the phase shifts aNmay be arbitrary, but nevertheless result in signals from the amplifiers 704 arriving at the signal combining node 710 substantially in phase (e.g., the relative phase shifts between each of the first signals are configured to achieve this purpose).

[0116] As a result, the first signals output from the second ends of the first transmission lines 706 may have relative phase differences substantially equal to 0 degrees (or equivalent, such as integer multiples of 360 degrees).

[0117] In some embodiments, the second phase shift is introduced by the first transmission lines 706 by configuring their (electrical) lengths. For example, the length of each first transmission line 706 may be l0+ lan, where l0is a constant value for each first transmission line 706 and lanis a length introducing a phase shift in the first signal of an(where 1 < n < N).

[0118] For example, the first transmission lines 706 may have electrical length that differ by 180 / / V degrees between a first and second first transmission line 706, and between a second and third first transmission line 706, and so on.

[0119] Additionally or alternatively, in some embodiments, the first transmission lines 706 may comprise respective phase shifters that introduce the respective second phase shift. For example, at least one of the respective phase shifters may comprise a modified Schiffman phase shifter, as discussed below in reference to Figure 10.

[0120] Similarly, each second transmission line 708 is configured to introduce a third phase shift, <p, of substantially 90 degrees in a signal transmitted by respective second transmission lines 708 (i.e., a substantially 90 degree phase shift is applied to each of the signals transmitted by the second transmission lines 708).

[0121] As with the first transmission lines 706, in some embodiments, the third phase shift may be introduced by the second transmission lines 708 by configuring their (electrical) lengths. For example, the length of each second transmission line 708 may be 1 , where is a length configured to introduce a phase shift in the first signal of 90 degrees.

[0122] Additionally or alternatively, in some embodiments, at least some of the second transmission lines 708 may comprise respective phase shifters that introduce the respective third phase shift. For example, at least one of the respective phase shifters may comprise a modified Schiffman phase shifter, as discussed below in reference to Figure 10.

[0123] Thus, using the above discussed configuration, of first transmission lines 706 and second transmission lines 708, the first signals output from the amplifiers 704 arrive at the signal combining node 710 substantially in phase. In some embodiments, the signal combining node 710 is configured to combine signals that are input substantially simultaneously into the signal combining node 710. For example, signals output from each amplifier 704 may arrive at the signal combining node 710 at substantially the same time and may be combined into a combined signal.

[0124] As the first signals are substantially in phase when they arrive at the signal combining node 710, they may interfere constructively, providing a combined signal with a larger amplitude than each individual first signal arriving at the signal combining node 710.

[0125] In some embodiments, the signal combining node 710 is configured to output the combined signal to one or more antennas and / or an antenna array included in the circuit of Figure 7 (not illustrated). In some embodiments, the one or more antennas and / or the antenna array may be configured to transmit the combined signal to a wireless receiving device (e.g., a user equipment (UE), a radio access network (RAN) node, etc.). Returning to Figure 7, the network of resistors 712 comprises a plurality of resistors (e.g., a star or delta network of resistors). The network of resistors 712 also comprises N third inputs 718. Each respective one of the third inputs 718 is connected to the second end of a respective one of the first transmission lines 706.

[0126] In some embodiments, the network of resistors 712 may be configured such that at least one resistor is located between each pairing of second ends of the first transmission lines 706. For example, for each pairing, each end of the at least one resistor may be connected to one of the second ends of the pairing.

[0127] If there is a potential difference between at least two of the third inputs 718, a signal is transmitted across (at least part of) the network of resistors 712. The resistance of the plurality of resistors is sufficient to substantially terminate any signal transmitted across the network of resistors.

[0128] Thus, the network of resistors 712 is configured to dissipate signals arriving at the second ends of the first transmission lines 706 out of phase (in which case a potential difference exists across at some of the third inputs 718). The more out of phase the signals, the more the signal energy can be dissipated.

[0129] However, signals arriving at the second ends of the first transmission lines 706 in phase are not dissipated by the network of resistors 712 (as no potential difference exists across the third inputs 718). Here, it is assumed that the signals arriving in phase also arrive at the second ends of the first transmission lines 706 with substantially the same amplitude.

[0130] Thus, in some examples, the amplifier circuit 700 deals with intermodulation products of the first type by being configured such that signals input into the amplifiers 704 (derived from a single source, e.g., first signals) arrive at the third inputs 718 with a relative phase difference of substantially 0 degrees (or equivalent). Since all amplified forward waves are in phase and of equal amplitude at the third inputs 718, they produce no voltage differentials over the network of resistors 712, resulting in no ohmic loss for the forward amplified first signals. Instead, the output power from the amplifiers 704 usefully combines in phase after the second transmission lines 708 at the signal combining node 710 (as the second transmission lines 708 do not change the relative phase differences between each of the first signals). However, this is not the case for reverse waves travelling in the amplifier circuit 700. For example, a reverse wave travelling in the amplifier circuit 700 towards an amplifier 704 along one of the first transmission lines 706 will first be shifted according to the respective second phase shift. If the reverse wave is reflected by the amplifier 704, the reflected reverse wave is again shifted according to the respective second phase shift as it travels back along the same first transmission line 706 away from the amplifier 704.

[0131] Thus, the phase of any intermodulation products in the reverse wave reflected from the amplifier 704 are shifted by twice the respective second phase shift before the reflected reverse wave arrives at a third input 718 of the network of resistors 712.

[0132] If each of the respective second phase shifts introduced by the first transmission lines 706 have magnitudes that are spread evenly over 180 degrees (or are equivalent thereto), the phases of the intermodulation products in the reflected reverse wave at the third inputs 718 of the network of resistors 712 will be spread over a 360 degree range. As such, a large voltage differential may exist over the network of resistors 712, causing a large percentage of the reverse wave energy to be input into the network of resistors 712, causing it to be resistively terminated. As such, the intermodulation products can be greatly reduced in amplitude and / or cancelled out completely. This may also apply to phases that are not evenly spread over a 360 degree range (even if less of the reverse wave energy may be dissipated over the network of resistors 712 in some examples).

[0133] As the signals intended to be amplified by the amplifiers 704 do not arrive at the second ends of the first transmission lines 706 out of phase, they are not reduced in amplitude and / or cancelled out by the network of resistors 712.

[0134] The network of resistors 712 can similarly deal with intermodulation products of the third type if their phases vary randomly. That is, as the value of N increases, it becomes more likely that intermodulation products of the third type in the reflected reverse waves arrive at the second ends of the first transmission lines 706 out of phase, thus causing a similar power differential to that discussed above across the network of resistors 712. In some embodiments, the value of N may be selected such that the average phase difference between intermodulation products of the third type arriving at the third inputs 718 is nonzero. Thus, the amplifier circuit 700 can reduce distortion and variations in power output from amplifiers 704 by selectively terminating reverse intermodulation products of the first and third type. In particular, reverse intermodulation products that are dealt with by known balanced amplifiers are also reduced by the amplifier circuit 700. However, the amplifier circuit 700 reduces intermodulation products more effectively. This is illustrated by the graphs in Figure 8.

[0135] The three columns in Figure 8 each correspond to a respective amplifier system. The left-hand side column is for a system comprising a Doherty amplifier, the middle column is for a system comprising two Doherty amplifiers in a balanced configuration, and the right-hand side column is for a three amplifier system according to embodiments of this disclosure (in this example an amplifier system comprising three Doherty amplifiers). Each column contains, from top to bottom, an efficiency vs. output amplitude plot, an output phase vs. input amplitude plot, and an output amplitude vs. input amplitude plot. First traces (black lines) 802 are for forward waves in the amplifier systems, whilst second traces (light grey lines) 804 are for standing waves in the system.

[0136] It can be observed that the single Doherty amplifier suffers large variations in the output amplitude, phase and efficiency. The balanced configuration corresponding to the middle column provides a reduction of these variations. However, it can be observed that the amplifier circuit 700 (even when comprising just three amplifiers) improves upon these known solutions. This is especially noticeable when comparing the output phase vs. input amplitude plots of each column.

[0137] Returning to Figure 7, in some embodiments, the first transmission lines 706 may have characteristic impedances of Zm(the impedance after output matching).

[0138] In some embodiments, resistors of the network of resistors 712 may each have a resistance of Zmohms when in a star network. In some embodiments, resistors of the network of resistors 712 may each have a resistance of NZmohms (e.g., 3Zmwhen N = 3) when in a delta network.

[0139] In some embodiments, if the first transmission lines 706 and the second transmission lines 708 each have an impedance of Zmohms, the impedance of the network beyond the signal combining node 710 may be the parallel combination of the second transmission lines 706 impedances, ZmjN (e.g., Zmj when N = 3). In other embodiments, the network beyond the signal combining node 710 may have some other impedance if these lines are also used for impedance transformation. For example, in one embodiment, the Wilkinson combiner transforms the second transmission lines 708 such that their initial impedance Zmis transformed to N times that impedance, Zmx N (e.g., 3Zmwhen N = 3). The parallel combination of the second transmission lines 708 results in a load impedance of Zm. As such, the impedance at the network beyond the signal combining node 710 is the same as the impedances of the first transmission lines 706.

[0140] The combination of a star or delta network of resistors 712 and impedance-transforming 90-degree transmission lines to a common point (i.e. , a signal combining node 710) may in some examples be referred to as a Wilkinson power combiner / divider. Whilst embodiments of the present disclosure may use Wilkinson power combiner / dividers as examples, the skilled person would appreciate that embodiments of the disclosure are also suitable for use with any other in-phase power combiner which resistively terminates differential signals arriving at its inputs.

[0141] Figure 9 illustrates an amplifier circuit 700 according to embodiments of the disclosure, wherein N = 3. An input signal is provided via each third transmission line 902 to respective amplifiers 704. The three third transmission lines 902 introduce the respective first phase shift to the inputs 714 of each of the amplifiers 704 such that the otherwise identical input signals arrive at the amplifiers 704 with a relative phase difference between them.

[0142] The three amplifiers 704 are connected at their output side, via three respective first transmission lines 706, to a Wilkinson combiner 904 (or an equivalent power combiner / divider). For the signals to combine without loss in the Wilkinson combiner 904, the path of each signal travelling along a respective third transmission line 902 and respective first transmission line 706 have a substantially equal total delay or phase shift. For example, signals output from the amplifiers 704 should effectively be modified by the opposite delay or phase shift to the ones applied to the input signals before being amplified by the amplifiers 704. For example, if the first transmission lines 706 introduce delays on signals they carry of “pdell”, “pdel2”, and “pdel3”, the third transmission lines 902 may introduce delays on signals they carry of a common delay, pbase, minus the delays of the corresponding third transmission line 902 (e.g., pbase-pdell , pbase-pdel2, and pbase-pdel3, respectively). This is illustrated in Figure 9. Since the three input signals travel along the third and first transmission lines 902, 706 in the circuit for the same amount of time and / or with the same phase shift being applied to them, when they arrive at the Wilkinson combiner 904 they are in phase. Therefore, there is no voltage difference between input nodes of the Wilkinson combiner 904 (assuming that they are also of the same or similar amplitude). Thus, no current will flow in the resistors 910 of the Wilkinson combiner 904. Instead, the power is transferred to an output 710 of the amplifier circuit 700.

[0143] On the other hand, reverse waves in the circuit 700 are split in the Wilkinson combiner 904. The three reverse wave parts will travel to the output nodes of the amplifiers 704 via the three first transmission lines 706. Therefore, each reverse wave part is delayed by pdell , pdel2, and pdel3, respectively.

[0144] At the amplifiers 704, the reverse wave parts may interact with the linear and nonlinear elements output from the amplifiers 704 and produce a number of different intermodulation products in addition to a linearly reflected signal. The reflected signals and the intermodulation products travel back to the Wilkinson combiner 904 through the same first transmission lines 706, essentially doubling the phase shift applied to the reverse wave parts. As only the relative phase difference between the signals transmitted by each of the first transmission lines 706 matters for the Wilkinson combiner 904, any phase introduced to signals due to a common line length of the first transmission lines 706 is inconsequential. The output matching networks of the amplifiers 714 can thus have any length / number of stages, if they are equal.

[0145] The third and first transmission lines 902, 706 are preferably arranged such that the double phase shifts applied to the reverse wave parts (e.g. 2*pdel1 , etc) are spread evenly over 360 degrees (or are equivalent thereto). As such, linearly reflected signals and some intermodulation products arrive at the Wilkinson combiner 904 with large (and potentially maximal) voltage differences over the network of resistors 712 forming part of the Wilkinson combiner 904. The resistors of the network of resistors 712 substantially terminate the reverse wave parts and intermodulation products (i.e., resistively terminate). The 90-degree transmission lines 708 also forming the Wilkinson combiner 904 transform the differential short circuit at the output side (i.e., at the combination point 710) to have very high impedance, meaning that the differential signals all go into the resistors. In the embodiments of Figure 9, the network of resistors 712 is a star network with a floating node. However, in other embodiments, a delta network of resistors comprising resistors 910 between each pair of nodes could instead be used. In such embodiments, the resistors 910 may have three times the resistance of the resistors in the star network, as suggested above for example. An advantage of using a delta network is that it does not have a floating node.

[0146] The degree of cancellation of the reverse wave parts by the Wilkinson combiner 904 of Figure 9 depends on the amplitude and phase balance between the paths from the amplifier outputs to the Wilkinson combiner 904 (e.g., how well matched / similar the phases and amplitudes of the first signals reaching the third inputs 718 are). Both the amplitude balance and phase balance depend on production and signal variations, but the phase has extra complications. In an example implementation of Figure 9, the lengths of the third and first transmission lines 902, 706 may be configured to introduce phase shifts to the signals they carry.

[0147] However, the first and third transmission lines 902, 706 impart phase shifts on the signals they carry which vary linearly with the frequency of the signals, meaning the phase balance between the signals is sensitive to frequency variations in the signals carried by the third and first transmission lines 902, 706.

[0148] In some embodiments, the effects of these phase variations may be reduced by using transmission lines 902, 706 with a smaller variation in phase differences over the whole frequency band of interest. Only the phase differences between signals carried by the first transmission lines matter 706 with regards to the Wilkinson combiner 904, so any common phase component can, in principle, have arbitrary frequency dependence.

[0149] For example, in some embodiments, a modified Schiffman phase shifter may be formed in at least one of the first or third transmission lines 902, 706. This may provide an arrangement that gives an approximation to constant phase differences between the signals carried by the third and / or first transmission lines 902, 706, regardless of any frequency variations they may experience.

[0150] A Schiffman phase shifter comprises two branches. A first branch comprises a pair of 90-degree coupled transmission lines bridged at their far ends. A second branch comprises a 270-degree transmission line (i.e. , a transmission line which introduces a phase delay / shift of 270 degrees in a signal it carries) which is uncoupled from the pair of 90-degree transmission lines. The Schiffman phase shifter has close to 90 degrees of phase difference between signals transmitted by each branch over a relatively wide band.

[0151] Figure 10 illustrates the amplifier circuit 700 of Figure 7 but comprising modified Schiffman phase shifters 1002. In Figure 10, modified Schiffman phase shifters 402 have been adapted so that they may be used: in the amplifier circuit 700 with comprises three branches; and to result in phase differences other than 90 degrees (e.g., 60 degrees or 120 degrees). However, Schiffman phase shifters may also be adapted for use in amplifier circuits with more than three branches.

[0152] An advantage of the amplifier circuit 700 of Figure 10 is that its bandwidth is increased. That is, as the effects of phase variations on the signals carried by the third and first transmission lines 902, 1006 is reduced, they have more constant phase differences over a wider frequency band.

[0153] For example, Figure 11 illustrates the performance of transmission lines for a relative bandwidth of 10%. The upper trace 1102 illustrates transmission lines which introduce phase shifts on signals they carry by configuring their electric lengths. The lower trace 1104 illustrates transmission lines which introduce phase shifts on signals they carry by using modified Schiffman phase shifters. As can be seen from Figure 11, the ACLR for the lower trace 1104 is lower (by several decibels) for wider carrier / reverse wave frequency separations than the upper trace 1102. Therefore, amplifier circuits according to embodiments of the disclosure can be further improved for use with wider range frequency separations / to have larger bandwidth by stacking several coupled line sections with different impedances and coupling factors.

[0154] Returning to Figure 9, the Wilkinson combiner 904 has the advantage that it can easily be adapted for use with more amplifier branches (i.e., when N > 2). This can result in incrementally lower levels of reverse intermodulation distortion.

[0155] For example, in some embodiments, a multi-input Wilkinson combiner or equivalent may be used with a set of first transmission lines 706 (e.g., delay lines or transmission lines comprising phase shifters) that introduce respective second phase shifts into the signals they carry, wherein the respective second phase shifts average out the phase of the reflected waves and intermodulation products over 360 degrees.

[0156] The higher order arrangements have more freedom than the lower ones in that they can be grouped into individually balanced subgroups. For example, instead of signals arriving at the Wilkinson combiner with respective phases spread evenly over 180 degrees (i.e. , such that there is a phase difference equal to an integer multiple of 36 degree phase between each amplified signal or a phase difference equal to an integer multiple of 72 degrees between each reflected reverse signal), one can have a pair of first transmission lines 706 which introduce a 90 degree phase difference shift on the signals they carry, and a triplet of first transmission lines 706 which introduce a 60 degrees phase difference on the signals they carry, and a freely chosen difference relative phase difference between signals transmitted by these groups. This degree of freedom could be useful in some applications.

[0157] In higher-order Wilkinson combiners, a star resistor arrangement may have the same number of resistors as the number of amplifier branches, whilst a delta resistor arrangement may have increasingly more (since it has resistors between all pairs of nodes). Therefore, star resistor arrangements may be favorable for higher-order implementations of the amplifier circuits according to embodiments of the disclosure, that is, with an increasing number of amplifiers in the amplifier circuit.

[0158] Figure 12 illustrates an example of an amplifier circuit 700 according to an embodiment of the present disclosure in which N = 10 and the network of resistors is a star network.

[0159] Wilkinson combiners with more than two inputs can be problematic in that it is sometimes challenging to get all input nodes of the Wilkinson combiner into proximity with the resistors they are connected to. As the length of transmission line used for the connection can change the electrical behavior of the Wilkinson combiner, input nodes that are not in proximity with the resistors they are connected to can cause the Wilkinson combiner to have a reduced terminating effect. In some embodiments, this challenge can be overcome by having series capacitors in these lines, so that they become effectively zero-length (or equivalently zero-phase) over a certain bandwidth.

[0160] In some embodiments, a Gysel power divider / combiner is used in place of a Wilkinson combiner. Gysel power divider / combiners use an additional transmission line network to enable all resistors to have one end coupled to a ground instead of a port node. This can reduce the effect of parasitic capacitance from the termination resistors on the network.

[0161] In some embodiments, to simplify the networks of resistors 712, the combiner employed may be made from a number of Wilkinson combiners arranged hierarchically, wherein the number of third inputs for each combiner is less than the number of inputs of a single Wilkinson combiner, if the single Wilkinson combiner were to be used in the amplifier circuit.

[0162] For example, Figure 13 illustrates a composite amplifier circuit 1300. The composite amplifier circuit 1300 comprises a first amplifier circuit 1302 according to embodiments of the disclosure, in which N = 3, and a second amplifier circuit 1304 in which N = 2, in order to provide a composite amplifier circuit with five amplifiers. The second amplifier circuit 1304 is analogous to amplifier circuits according to embodiments of the disclosure, but with N = 2. The first amplifier circuit 1302 and the second amplifier circuit 1304 are combined with an asymmetrical 2-input Wilkinson combiner 1308. The asymmetrical 2- input Wilkinson combiner 1308 is similar to the previously discussed Wilkinson combiners (e.g., they comprise second transmission lines 708 and a network of resistors 712) but is different in that resistors of their network of resistors 712 may differ in resistance and the second transmission lines 708 have different characteristic impedances. For example, in Figure 13, one resistor of the asymmetrical 2-input Wilkinson combiner 1308 is ohms, whilst the other is Zm / 2 ohms. The characteristic impedances for the second transmission lines 708 connecting the asymmetrical 2-input Wilkinson combiner 1308 to the first amplifier circuit 1302 is Zml , whilst the characteristic impedances for the second transmission lines 708 connecting the asymmetrical 2-input Wilkinson combiner 1308 to the second amplifier circuit 1302 is Zm / 2.

[0163] In Figure 13, the asymmetrical 2-input Wilkinson combiner 1308 can in some examples include a resistance between each branch of the asymmetrical 2-input Wilkinson combiner 1308. This is shown in Figure 13 as two series resistors 712, with resistances and Zm / 2 respectively. In other examples, however, a single resistor or any suitable combination of resistors may be used, serial combinations of resistors that provide the required resistance can be used in each branch. In Figure 13, fourth transmission lines 1306 may connect the outputs of the first and second amplifier circuits 1302, 1304 (e.g., the signal combining nodes 710) to inputs of the asymmetrical 2-input Wilkinson combiner 1308. In some embodiments, the fourth transmission lines 1306 may be configured to introduce respective fourth phase shifts on signals carried by the fourth transmission lines 1306, such that signals output from the first and second amplifier circuits 1302, 1304 arrive at a signal combining node 1310 substantially in phase (wherein the signal combining node 1310 of Figure 13 performs the same function as the signal combining node of Figure 7). For example, the respective fourth phase shifts introduced to signals carried by the fourth transmission lines 1306 may be configured such that they account for the respective second phase shifts introduced to signals carried by the first transmission lines 706 of each of the first and second amplifier circuits 1302, 1304.

[0164] Whilst the composite amplifier circuit 1300 in Figure 13 is illustrated as comprising two amplifier circuits, one with N = 2 and one with TV = 3, it should be appreciated that in other embodiments, a composite circuit according to embodiments of the disclosure may comprise any number of amplifier circuits, wherein at least one or more of the amplifier circuits has a respective number N of amplifiers, where N > 2. In such embodiments, pairs of amplifier circuits may be combined with any asymmetrical 2-input Wilkinson combiner 1308 (or any equivalent asymmetrical combiner). For example, an equivalent combiner may comprise a network of resistors comprising fourth inputs, wherein the fourth inputs are respectively connected to the signal combining nodes of the first amplifier circuit and the second amplifier circuit via the fourth transmission lines 1306, and may also comprise resistors with different resistances.

[0165] In alternative arrangements, each “amplifier” in an amplifier circuit according to this disclosure could be an amplifier circuit according to this disclosure, e.g. an amplifier circuit where N > 2 could itself feed a Wilkinson combiner of two or more inputs. Furthermore, in some examples, if amplifier circuits provide inputs to a Wilkinson combiner, and each amplifier circuit has the same number N of amplifiers, where N > 2, the Wilkinson combiner may be symmetrical instead of asymmetrical. Here it is assumed that the amplifiers in an amplifier circuit are of substantially the same size or output substantially the same power.

[0166] Embodiments of the present disclosure provide a circuit (e.g., a predistortion circuit) that works in synergy with phase-averaging systems, as discussed herein, to provide resilience to backward wave intermodulation distortion. Embodiments of the present disclosure exploit the fact that the phase of the (residual) backward wave induced distortion is independent of the phase of the backward wave itself, and is instead in phase with the input signal. As such, the reverse-wave processing of such products can have relatively low delay and complexity.

[0167] Figure 14 is a schematic diagram of a communication device 1402. The communication device 1402 may be a wireless communication device, such as a UE or a Radio Access Network (RAN) node. The communication device 1402 comprises a circuit according to the embodiments discussed in relation to Figures 1-14. The communication device 1402 may be configured to communicate with another wireless receiving device.

[0168] It should be noted that the above-mentioned examples illustrate rather than limit the disclosure, and that those skilled in the art will be able to design many alternative embodiments without departing from the scope of the appended embodiments. The word “comprising” does not exclude the presence of elements or steps other than those listed in an embodiment or claim, “a” or “an” does not exclude a plurality, and a single processor or other unit may fulfil the functions of several units recited in the embodiments. Any reference signs in the claims shall not be construed so as to limit their scope.

Claims

Claims1. A circuit comprising: an input configured to receive an input signal; an amplifier circuit configured to output an amplified signal; signal amplitude detection apparatus configured to detect at least a portion of a backward wave which interferes with the amplified signal and generate a signal proportional to an amplitude and / or a power of the at least a portion of the backward wave to obtain a generated signal; and a predistorter configured to modify the input signal based on the generated signal and to provide a modified signal to the amplifier circuit.

2. The circuit of claim 1, further comprising a signal modifying apparatus, wherein the signal modifying apparatus is configured to: receive the input signal from the input; and modify the input signal to provide a first nonlinearly modified signal; and wherein the predistorter being configured to modify the input signal based on the generated signal comprises the predistorter being configured to: combine the first nonlinearly modified signal and the generated signal.

3. The circuit of claim 1, further comprising a signal modifying apparatus, wherein the signal modifying apparatus is configured to: receive the input signal from the input; and modify the input signal to provide a first nonlinearly modified signal; and wherein the predistorter is further configured to: receive the first nonlinearly modified signal; and further modify the input signal based on the first nonlinearly modified signal to provide the modified input signal to the amplifier circuit.

4. The circuit of claim 3, wherein the predistorter being configured to modify the input signal based on the first nonlinearly modified signal and the generated signal comprises the predistorter being configured to: combine the input signal, the first nonlinearly modified signal, and the generated signal.

5. The circuit of claim 4, wherein the predistorter is configured to combine the input signal, the first nonlinearly modified signal, and the generated signal with a second nonlinearly modified signal.

6. The circuit of claim 5, wherein the predistorter is configured to combine the input signal, the first nonlinearly modified signal, the generated signal, and the second nonlinearly modified signal by: multiplying the generated signal with the first nonlinearly modified signal to obtain a first multiplied signal; summing the first multiplied signal and the second nonlinearly modified signal to obtain a first summed signal; and multiplying the input signal by the first summed signal to obtain the modified signal.

7. The circuit of any of claims 3-6, wherein the signal modifying apparatus being configured to modify the input signal to provide the first nonlinearly modified signal comprises the signal modifying apparatus being configured to: square the input signal; and pass the squared input signal through a low pass filter.

8. The circuit of any of claims 3-7, wherein the first nonlinearly modified signal comprises a first polynomial function of the amplitude of the input signal.

9. The circuit of claim 8, wherein the amplitude of the input signal corresponds to the amplitude of an envelope of the input signal.

10. The circuit of any of claims 1-9, wherein the amplitude of the at least a portion of the backward wave corresponds to the amplitude of an envelope of the at least a portion of the backward wave.

11. The circuit of any of claims 1 to 10, wherein the signal amplitude detection apparatus is configured to obtain the generated signal by: squaring the at least a portion of the backward wave; and low pass filtering the squared at least a portion of the backward wave.

12. The circuit of any of claims 1-11 , wherein the signal amplitude detection apparatus comprises a directional coupler configured to obtain the at least a portion of the backward wave.

13. The circuit of any of claims 1-12, wherein the predistorter is configured to at least reduce compression of the output of the amplifier circuit by the backward wave.

14. The circuit of any of claims 1-13, wherein the predistorter comprises an analog predistorter or a digital predistorter.

15. The circuit of any of claims 1 to 14, further comprising an antenna, wherein the amplifier circuit outputs the amplified signal to the antenna.

16. The circuit of any of claims 1 to 15, wherein the amplifier circuit comprises a balanced amplifier.

17. The circuit of any of claims 1-16, wherein the amplifier circuit comprises:- a first input configured to receive the modified input signal ;- N first transmission lines, wherein N > 2;- N second transmission lines;- a signal combining node;- N amplifiers, wherein each amplifier comprises:- a second input configured to receive the modified input signal with a respective first phase shift; and- an output connected to a first end of a respective first transmission line, wherein a second end of the respective first transmission line is connected to a first end of a respective second transmission line; wherein the respective first transmission line is configured to introduce a respective second phase shift in a signal transmitted by the respective first transmission line and wherein the respective second transmission line is configured to introduce a third phase shift of substantially 90 degrees in a signal transmitted by the second transmission line; wherein second ends of the second transmission lines are connected to the input signal combining node; andwherein the first transmission lines and the second transmission lines are configured such that signals output from each amplifier arrive at the input signal combining node substantially in phase; and- a network of resistors comprising N third inputs, wherein the network is a star or delta network of resistors, wherein each of the third inputs are connected to the second end of a respective one of the first transmission lines.

18. The circuit of claim 17, wherein each of the respective first phase shifts are different.

19. The circuit of claim 17 or 18, wherein each of the respective first phase shifts is between 0 and 180 degrees.

20. The circuit of any of claims 17-19, wherein each of the respective first phase / 180\ shifts is substantially equal to (M x ( — )) + C degrees, wherein M is an integer value and C is an integer or non-integer value.

21. The circuit of any of claims 17-20, wherein the network of resistors and second transmission lines form part of a Wilkinson power divider or a Gysel power divider.

22. The circuit of any of claims 17-21, further comprising one or more antennas connected to the input signal combining node and / or an antenna array connected to the input signal combining node.

23. The circuit of any of claims 17-22, wherein lengths of the first transmission lines and lengths of the second transmission lines are configured such that signals output from each amplifier arrive at the combining node substantially in phase.

24. The circuit of any of claims 17-23, wherein at least N - 1 of the first transmission lines comprise respective phase shifters, wherein the respective phase shifters are configured such that signals output from each amplifier arrive at the combining node substantially in phase.

25. The circuit of claim 24, wherein at least one of the at least N - 1 first transmission lines comprises coupled lines configured to introduce the respective second phase shift.

26. The circuit of any one of claims 17-25, wherein each of the N amplifiers comprises an unbalanced amplifier.

27. The circuit of any one of claims 17-26, wherein the amplifiers are configured to output signals with substantially the same amplitude.

28. The circuit of any one of claims 17-27, wherein at least one of the following applies: each first transmission line has substantially the same impedance; each second transmission line has substantially the same impedance; and / or each resistor in the network of resistors has substantially the same impedance.

29. The circuit of claim 28, wherein each first transmission line, second transmission line and resistor in the network of resistors has substantially the same impedance.

30. The circuit of any one of claims 17-29, wherein the amplifier circuit is for reducing the effects of reverse waves in the amplifier circuit interfering with signals output from the amplifiers.

31. A circuit comprising: the circuit of any one of claims 17-30; a second amplifier circuit; a network of resistors comprising fourth inputs, wherein the fourth inputs are respectively connected to the input signal combining node of the first amplifier circuit and a signal combining node of the second amplifier circuit via fourth transmission lines, wherein the network of resistors comprises resistors with different resistances; and a second signal combining node connected to the output of the network of resistors, wherein the fourth transmission lines are configured such thatsignals output from each amplifier circuit arrive at the second signal combining node substantially in phase.

32. The circuit of claim 31, wherein the network of resistors forms part of a 2-input Wilkinson combiner.

33. The circuit of claim 31 or 32, wherein the second amplifier circuit comprises an amplifier circuit according to any one of claims 17-30.

34. A communication device comprising the circuit of any one of claims 1-33.

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