Method for manufacturing semiconductor device

Abstract

The purpose of the present invention is to efficiently manufacture a semiconductor device including a two-dimensional material thin film by, in advance, constructing a laminated structure including a transition metal-containing film on a substrate, and by then annealing the transition metal-containing film. Provided is a method for manufacturing a semiconductor device, the method comprising: a step for forming a transition metal-containing film; a step for forming a chalcogenide-resistant film covering a main surface of the transition metal thin film; and a step for annealing the transition metal-containing film in a chalcogen atmosphere using a chalcogen raw material, thereby submitting the transition metal-containing film to chalcogenization to form a two-dimensional material thin film.

Description

Semiconductor device manufacturing method

[0001] The present disclosure relates to methods for manufacturing, for example, semiconductor devices.

[0002] Patent Literature 1 (PTL 1) discloses techniques related to atomic layer deposition, particularly a method for forming a two-dimensional metal chalcogenide thin film using laser-assisted atomic layer deposition. In this patent Literature 1, a metal-containing molecular layer is adhered to the surface of a heated substrate using an atomic layer deposition (ALD) process. The metal-containing molecular layer is then reacted with a chalcogenide-containing radical precursor gas supplied using a plasma to form a two-dimensional amorphous metal chalcogenide thin film, which is then laser-annealed to form a two-dimensional crystalline metal chalcogenide thin film.

[0003] Japanese Patent Application Publication No. 2017-61743

[0004] The techniques of the present disclosure efficiently fabricate semiconductor devices that include two-dimensional thin films of materials.

[0005] One aspect of the present disclosure is a method for manufacturing a semiconductor device, the method including the steps of forming a transition metal-containing film, forming a chalcogen-resistant film covering a main surface of the transition metal thin film, and annealing the transition metal-containing film in a chalcogen atmosphere using a chalcogen source to chalcogenize the transition metal-containing film and form a two-dimensional material thin film.

[0006] According to the technology disclosed herein, semiconductor devices including two-dimensional material thin films can be efficiently manufactured.

[0007] Fig. 1 is a schematic cross-sectional view of a stacked structure required when using a two-dimensional material as a channel of a transistor; Fig. 2 is a schematic cross-sectional view of a process for constructing a stacked structure using a two-dimensional material; Fig. 3 is a flow diagram showing a process for constructing a stacked structure using a two-dimensional material; Fig. 4 is a schematic explanatory diagram showing a state in which a chalcogen raw material penetrates from the side of a transition metal-containing film; Fig. 5 is a schematic explanatory diagram showing an example of a use mode of a sacrificial film;

[0008] In the manufacturing process of semiconductor devices, two-dimensional materials are attracting attention as a semiconductor material that can overcome the limits of miniaturization after silicon. For example, when using two-dimensional materials as the channel of a transistor, it is known that the surface of two-dimensional materials has fewer defects that adversely affect electrical conduction than silicon, etc., making them useful in terms of electrical conduction.

[0009] Two-dimensional materials include graphene and MoS ２ (Molybdenum sulfide), MoSe ２ (Molybdenum selenide), MoTe ２ (Molybdenum telluride), WSe ２ (Tungsten selenide), WTe ２ Known examples of such materials include transition metal dichalcogenides (TMDCs) such as tungsten telluride (TTA). When using a two-dimensional material as a channel of a transistor or the like, the two-dimensional material can be formed by transfer or chemical vapor deposition (CVD), and a conductive contact electrode layer that contacts the channel can be deposited by vacuum deposition.

[0010] However, methods such as transfer printing and CVD require a lot of time, and various devices are required to fabricate the layered structure later, which poses challenges in terms of manufacturing cost and time. In other words, there is a need to establish a method for efficiently forming two-dimensional material thin films and constructing device structures using layered structures including these.

[0011] The technology disclosed herein has been made in consideration of the above circumstances, and involves constructing a layered structure including a transition metal-containing film on a substrate in advance, and then annealing the transition metal-containing film to efficiently construct a layered structure including a two-dimensional material thin film, thereby manufacturing a semiconductor device. Hereinafter, a method for constructing a layered structure including a two-dimensional material thin film according to this embodiment will be described with reference to the drawings. Note that in this specification and the drawings, elements having substantially the same functional configuration are designated by the same reference numerals, and redundant description will be omitted.

[0012] <Configuration of stacked structure> Figure 1 is a schematic cross-sectional view of a stacked structure 100 required when using a two-dimensional material as a channel in, for example, a field-effect transistor as a semiconductor device. The stacked structure 100 has a so-called stacked nanosheet structure, with the two-dimensional material as the channel. Note that a plurality of stacked structures 100 may be formed in an island shape on a wafer W, and Figure 1 illustrates a case where three stacked structures 100 are formed on a wafer W.

[0013] As shown in FIG. 1 , in the stacked structure 100, a gate electrode 103, a gate insulating film 105, a two-dimensional material thin film 110, and a gate insulating film 105 are stacked on a wafer W in this order from the bottom up. A structure composed of the gate electrode 103, the gate insulating film 105, the two-dimensional material thin film 110, and the gate insulating film 105 is repeatedly stacked in three layers, with the gate electrode 103 being formed in the top layer. That is, the two-dimensional material thin film 110 serving as a channel is arranged to be surrounded by the gate insulating film 105 and the gate electrode 103. Although not shown, a region on the surface of the wafer W that is in direct contact with the gate electrode 103 has insulating properties. The wafer W itself may be made of an insulator, or an insulating film may be formed on the surface of the wafer W.

[0014] As shown in the figure, the ends (left and right ends 110a, 110b in the figure) of the two-dimensional material thin film 110 are formed to protrude from other layers (gate electrode 103, gate insulating film 105) in each stacked structure 100. For example, in a field effect transistor with a general structure, one of these ends 110a, 110b is connected to the source and the other is connected to the drain, and the current flowing from the source to the drain is controlled by the gate (gate electrode 103).

[0015] Any method can be used to form the stacked structure 100. For example, the gate electrode 103, the gate insulating film 105, and the two-dimensional material thin film 110 can be formed by methods such as physical vapor deposition (PVD), atomic layer deposition (ALD), chemical vapor deposition (CVD), vacuum deposition, sputtering, etc. Then, the stacked structure 100 can be formed by patterning the formed gate electrode 103, gate insulating film 105, and two-dimensional material thin film 110 into island shapes by etching.

[0016] Although the stacked structure 100 has been illustrated and described as having a configuration in which the gate electrode 103, the gate insulating film 105, and the two-dimensional material thin film 110 are repeatedly stacked, the number of stacked layers is arbitrary. For example, this also includes the case where the two-dimensional material thin film 110 is a single layer.

[0017] <Method of Constructing Stacked Structure> The stacked structure 100 is constructed by subjecting the wafer W to various processes, such as a film formation process, an etching process, and a heat treatment (hereinafter also referred to as an annealing process). As an example, the following describes a process of forming a basic stacked structure containing a transition metal on the wafer W and then performing an annealing process, with reference to the drawings. The module for performing the stacked structure formation process on the wafer W and the module for performing the annealing process are optional, and may be different modules or the same module.

[0018] 2 is a schematic cross-sectional view of a process for constructing a stacked layer structure 200 using a two-dimensional material on a wafer W. Also, FIG. 3 is a flow diagram showing a process for constructing a stacked layer structure 200 using a two-dimensional material. As described above, when forming a stacked layer structure 100 using a two-dimensional material as a channel of a field-effect transistor, it is common to stack multiple layers such as a gate electrode 103, a gate insulating film 105, and a two-dimensional material thin film 110. However, here, to avoid complicating the explanation and to explain more basic principles, a basic stacked layer structure 200 will be illustrated and described.

[0019] 2(b), a sacrificial film 203 is formed (step S1), and a transition metal-containing film 205 is formed thereon (step S2). The sacrificial film 203 and the transition metal-containing film 205 may be repeatedly stacked in a plurality of layers. For example, as shown in the figure, a combination of the sacrificial film 203 and the transition metal-containing film 205 may be stacked twice, with the sacrificial film 203 being formed on the top layer.

[0020] The material of the sacrificial film 203 is arbitrary, and for example, SiO ２ The transition metal-containing film 205 may be made of any material as long as it contains a transition metal such as Mo or W, and may be made of an oxide containing Mo or W (MoO Ｘ , W.O. Ｘ ), nitrides containing Mo or W (MoN Ｘ , W.N. Ｘ ), for example, MoO ３ , Mo ２ N.W. ２ O ３ , WN. The sacrificial film 203 is assumed to be removed in a later process, and as will be described later, a gate electrode, a gate insulating film with a high dielectric constant, or the like may be stacked instead of the sacrificial film 203.

[0021] 2(c), the structure stacked on the wafer W is subjected to an annealing treatment in a chalcogen atmosphere (steps S3 and S4). As a result, the transition metal-containing film 205 is chalcogenized and transformed into a two-dimensional material thin film 210 as shown in FIG. 2(d). As shown in the figure, when multiple layers of the transition metal-containing film 205 are present, all of the transition metal-containing films 205 are chalcogenized simultaneously.

[0022] The chalcogen raw material may be any material, for example, a material containing sulfur (S), selenium (Se), or tellurium (Te) as chalcogen. ２ S, H ２ Se, H ２ Te is an example.

[0023] 2 and 3, a stacked layer structure 200 using two-dimensional materials is constructed on a wafer W. According to this method, a stacked layer structure including a sacrificial film 203 (which may be replaced by a gate electrode or a gate insulating film) and a transition metal-containing film 205 is constructed in advance, and the entire structure is annealed to chalcogenize the transition metal-containing film 205. In other words, for example, a structure including multiple channel portions of a field-effect transistor as a semiconductor device can be constructed in one go, eliminating the need for work such as fabricating each layer one by one, thereby improving efficiency.

[0024] <Annealing Treatment> The conditions for the annealing treatment for chalcogenizing the transition metal-containing film 205 to obtain the two-dimensional material thin film 210 are arbitrary and are not particularly limited. The material to be annealed (here, a wafer W including the transition metal-containing film 205) is carried into a module for performing the annealing treatment, and the inside of the treatment chamber into which the wafer W has been carried is purged with Ar and heated. The annealing treatment is performed by continuously supplying a chalcogen source from the start of the temperature rise.

[0025] Specifically, for example, the inside of the processing vessel is ２ The annealing treatment may be performed for 10 minutes in an S atmosphere at a pressure (internal pressure) of 10 kPa to 100 kPa and a temperature of 600°C to 1000°C. Here, during the annealing treatment, it is preferable that the transition metal-containing film 205 is not exposed on the top surface of the wafer W, and it is preferable to suppress the intrusion of the chalcogen source material from above. For example, in the construction of the stacked structure 200 shown in FIG. 2, a sacrificial film 203 and a transition metal-containing film 205 are repeatedly stacked in multiple layers, with the sacrificial film 203 being the topmost layer. As a result, the chalcogen source material intrudes into the transition metal-containing film 205 only from the side (end face) during the annealing treatment.

[0026] When annealing is performed with a transition metal present on the upper surface of the wafer W, a reaction between the transition metal and the chalcogen raw material occurs simultaneously across the entire surface, presumably resulting in random and large amounts of nuclei being generated in the initial stage. It is believed that the large amounts of nuclei generated prevent the nuclei from growing larger and result in an aggregate of microcrystals.

[0027] On the other hand, in a configuration in which sacrificial films 203 and transition metal-containing films 205 are repeatedly stacked in multiple layers, with the sacrificial film 203 being the uppermost layer (see FIG. 2 ), the chalcogen source penetrates only from the side surfaces (end surfaces) of the transition metal-containing film 205. That is, the upper surface of the transition metal-containing film 205 is covered with the sacrificial film 203, and the chalcogen source penetrates through a narrow area on the side surfaces. Therefore, compared to the above case, it is presumed that the number of nuclei generated is significantly reduced, and the reaction proceeds so that large crystals grow.

[0028] 4 is a schematic explanatory diagram showing how a chalcogen source penetrates into a laminated structure of a sacrificial film 203 and a transition metal-containing film 205 from the side (end face) of the transition metal-containing film 205. Fig. 4(a) shows a schematic cross section of the end of the laminated structure before annealing, and Fig. 4(b) shows a schematic cross section of the end of the laminated structure after annealing. For ease of explanation, the same components in Fig. 4 as those in Fig. 2 are denoted by the same reference numerals.

[0029] 4(a), the chalcogen source penetrates into the side surface (edge ​​surface) of the transition metal-containing film 205, and chalcogenization proceeds from the edge, resulting in transformation into a two-dimensional material thin film 210. As shown in FIG. 4(b), sufficient chalcogenization is achieved not only at the edge but also in the center of the film, and a two-dimensional material thin film 210 having a layered structure is formed.

[0030] As another form of annealing, a two-stage annealing process (so-called two-step annealing) may be performed by switching the annealing conditions. In the method for constructing a stacked structure according to this embodiment, the sacrificial film 203 (or gate electrode, gate insulating film) is stacked adjacent to the transition metal-containing film 205. Therefore, there is a risk that oxides or nitrides containing transition metals may diffuse into adjacent layers (e.g., the sacrificial film 203). Therefore, the annealing process may be performed in a first stage at a relatively low temperature and low pressure in a chalcogen atmosphere, and in a second stage at a high temperature and high pressure in an Ar atmosphere.

[0031] Specifically, for example, the inside of the processing vessel is ２The first stage of annealing treatment may be performed in an S atmosphere at a pressure (internal pressure) of 50 kPa and a temperature of 200°C for 10 minutes, and then the second stage of annealing treatment may be performed in an Ar atmosphere at a pressure of 100 kPa and a temperature of 1100°C for 10 minutes.

[0032] In the first stage of annealing, H ２ Annealing in an S atmosphere prevents oxides or nitrides containing transition metals from diffusing into layers (e.g., the sacrificial film 203) adjacent to the target annealed layer (the transition metal-containing film 205). In the second stage of annealing, annealing is performed in an Ar atmosphere at high temperature and high pressure, making it possible to create a highly crystalline two-dimensional material thin film 210.

[0033] <Use of Sacrificial Film in Laminated Structure> In this embodiment, Fig. 1 illustrates a laminated structure 100 in which a gate electrode 103, a gate insulating film 105, and a two-dimensional material thin film 110 are laminated, and Fig. 2 illustrates a laminated structure 200 in which a sacrificial film 203 and a two-dimensional material thin film 210 are laminated. It is assumed that the sacrificial film will be removed in a later process, and if at least one of the gate electrode and the gate insulating film is made of a material that can withstand chalcogenization in the annealing treatment, it is preferable to laminate them in a step prior to the annealing treatment and perform the annealing treatment all at once.

[0034] In other words, the sacrificial film may be used in any manner in the laminated structure. Figure 5 is a schematic explanatory diagram showing an example of the manner in which the sacrificial film is used.

[0035] As shown in FIG. 5( a), in one embodiment, if both the gate electrode and the gate insulating film are made of materials that can withstand chalcogenization during annealing, a gate electrode 303, a gate insulating film 305, and a two-dimensional material thin film 310 may be stacked, and a sacrificial film may not be used. Also, as shown in FIG. 5( b), in one embodiment, if only the gate insulating film is made of a material that can withstand chalcogenization during annealing, a sacrificial film 320, a gate insulating film 305, and a two-dimensional material thin film 310 may be stacked. Also, as shown in FIG. 5( c), in one embodiment, if neither the gate electrode nor the gate insulating film is made of a material that can withstand chalcogenization during annealing, a sacrificial film 320 and a two-dimensional material thin film 310 may be stacked.

[0036] In the present embodiment, a vertically stacked laminate structure has been described, but this is not limiting. That is, while FIGS. 1 to 5 illustrate a configuration in which a chalcogenization-resistant film (sacrificial film, gate electrode, and gate insulating film) is stacked on the top surface of a transition metal-containing film, the direction in which the laminate structure is constructed is arbitrary, and the surface of the transition metal-containing film on which other films are stacked may be referred to as the "main surface." Here, surfaces other than the main surface constitute, for example, side surfaces, end surfaces, etc. As an example, the laminate structure may be stacked horizontally, and chalcogenization may be performed in a state in which a sacrificial film, gate electrode, or gate insulating film is formed on the main surface of the transition metal-containing film. Alternatively, chalcogenization may be performed in a state in which a gate electrode or gate insulating film is formed concentrically around the transition metal-containing film.

[0037] Examples of gate electrode materials that can withstand chalcogenization during annealing include Ta, TaN, etc. Examples of gate insulating film materials that can withstand chalcogenization during annealing include AlO, HfO ２ , ZrO ２ Examples include:

[0038] By using a sacrificial film in an appropriate manner, a layered structure including a transition metal-containing film can be constructed in advance, and the entire structure can be annealed at once to efficiently construct a layered structure including a two-dimensional material thin film. Furthermore, by covering the main surface of the transition metal-containing film and allowing the chalcogen source to penetrate only from its side (end face), chalcogenization can be efficiently performed, resulting in an excellent two-dimensional material thin film. While specific materials that can withstand sacrificial films and chalcogens are listed, this does not mean that these materials will not be chalcogenized at all. In the case of a sacrificial film, even if the sacrificial film itself is chalcogenized, as long as the main surface is covered with the sacrificial film, chalcogenization of the transition metal-containing film will proceed from the side rather than from the main surface. Even in the case of a gate electrode and a gate insulating film, even if some chalcogenization occurs, they will function as elements, and by covering the main surface, chalcogenization of the transition metal-containing film will proceed from the side rather than from the main surface.

[0039] <Effects of the Technique of the Present Disclosure> As described above, according to the method for constructing a layered structure including a two-dimensional material thin film according to the technique of the present disclosure, a layered structure including a transition metal-containing film is constructed in advance on a wafer W, and then the transition metal-containing film is annealed. Because the entire layered structure can be annealed all at once, the layered structure including the two-dimensional material thin film can be constructed efficiently. In other words, compared to forming a two-dimensional material thin film by transfer printing or CVD, efficiency in manufacturing costs and manufacturing time can be improved.

[0040] For example, when a two-dimensional material is used as a channel of a field-effect transistor, a structure including multiple two-dimensional material thin films 110 is constructed by a collective annealing process, as shown in Figure 1. In the annealing process, multiple layers are chalcogenized at once, which significantly improves productivity.

[0041] In the above description, the semiconductor device to which the technology according to the present disclosure is applied is described as being used in a field effect transistor, but the present disclosure is not limited to this and can be applied to various semiconductor devices.

[0042] The embodiments disclosed herein should be considered to be illustrative in all respects and not restrictive. The above-described embodiments may be omitted, substituted, or modified in various ways without departing from the scope and spirit of the appended claims. For example, the components of the above-described embodiments may be arbitrarily combined. Such an arbitrary combination naturally provides the functions and effects of each of the components involved in the combination, and also provides other functions and effects that are apparent to those skilled in the art from the description of this specification.

[0043] Furthermore, the effects described herein are merely descriptive or exemplary and are not limiting. In other words, the technology according to the present disclosure may achieve other effects that are apparent to those skilled in the art from the description of this specification, in addition to or in place of the above-described effects.

[0044] The following configuration examples also fall within the technical scope of the present disclosure. (1) A method for manufacturing a semiconductor device, comprising: forming a transition metal-containing film; forming a chalcogenation-resistant film covering a main surface of the transition metal thin film; and performing an annealing treatment on the transition metal-containing film in a chalcogen atmosphere using a chalcogen source to chalcogenize the transition metal-containing film and form a two-dimensional material thin film. (2) The method for manufacturing a semiconductor device according to (1), in which the chalcogenation-resistant film is at least one of a sacrificial film, a gate electrode, and a gate insulating film. (3) The method for manufacturing a semiconductor device according to (2), in which the transition metal-containing film and at least one of the sacrificial film, the gate electrode, and the gate insulating film are repeatedly stacked in multiple layers adjacent to each other, and the annealing treatment chalcogenizes the multiple transition metal-containing films collectively. (4) The method for manufacturing a semiconductor device according to (3), wherein in the annealing treatment, a main surface of the transition metal-containing film is covered with at least one of the sacrificial film, the gate electrode, and the gate insulating film, and the chalcogen source is introduced only from an end face of the transition metal-containing film. ２The method for manufacturing a semiconductor device according to any one of (1) to (4), wherein the first annealing step is performed in an S atmosphere and the second annealing step is performed in an Ar atmosphere, and the first annealing step is performed at a lower temperature and pressure than the second annealing step. (6) The method for manufacturing a semiconductor device according to any one of (1) to (5), wherein the transition metal-containing film is formed of an oxide containing Mo or W or a nitride containing Mo or W. (7) The method for manufacturing a semiconductor device according to any one of (1) to (6), wherein the chalcogen raw material is a material containing S, Se, or Te.

[0045] 100 Stacked structure 103 Gate electrode 105 Gate insulating film 110 Two-dimensional material thin film 203 Sacrificial film

Claims

1. A method for manufacturing a semiconductor device, comprising the steps of: forming a transition metal-containing film; forming a chalcogen-resistant film covering a main surface of the transition metal thin film; and annealing the transition metal-containing film in a chalcogen atmosphere using a chalcogen source to chalcogenize the transition metal-containing film and form a two-dimensional material thin film.

2. The method for manufacturing a semiconductor device according to claim 1, wherein the chalcogenation-resistant film is at least one of a sacrificial film, a gate electrode, and a gate insulating film.

3. The method for manufacturing a semiconductor device according to claim 2, wherein at least one of the sacrificial film, the gate electrode, and the gate insulating film and the transition metal-containing film are formed by repeatedly stacking multiple layers adjacent to each other, and the annealing treatment chalcogenizes the multiple transition metal-containing films collectively.

4. The method for manufacturing a semiconductor device according to claim 3, wherein, during the annealing treatment, the main surface of the transition metal-containing film is covered with at least one of the sacrificial film, the gate electrode, and the gate insulating film, and the chalcogen source is allowed to penetrate only from the end faces of the transition metal-containing film.

5. The annealing process is carried out in two stages under different conditions. The first stage is H ２ 2. The method for manufacturing a semiconductor device according to claim 1, wherein the first annealing step is performed in an S atmosphere and the second annealing step is performed in an Ar atmosphere, and the first annealing step is performed at a lower temperature and pressure than the second annealing step.

6. The method for producing a semiconductor device according to claim 1, wherein the transition metal-containing film is formed of an oxide containing Mo or W or a nitride containing Mo or W.

7. The method for manufacturing a semiconductor device according to claim 1, wherein the chalcogen raw material is a material containing S, Se, and Te.

Images