Battery management device and battery system comprising same

Abstract

A battery management device according to an embodiment disclosed in the present document comprises: an intermediate signal generation unit for generating intermediate signals related to controlling the operation of contactors respectively corresponding to a first battery pack and a second battery pack connected in parallel to the first battery pack; and a final signal generation unit for generating a final signal for controlling an electrical connection of a positive contactor corresponding to the second battery pack, the final signal being generated on the basis of the intermediate signal and a comparison result between a link voltage, which is a voltage applied by the first battery pack to nodes to which the first battery pack and the second battery pack are connected, and a pack voltage applied to the contactor corresponding to the second battery pack.

Description

Battery management device and battery system including the same

[0001] Cross-citation with related applications

[0002] This invention claims the benefit of priority from Korean Patent Application No. 10-2024-0045174, filed on April 3, 2024, and all contents of the document in that Korean Patent Application are incorporated herein by reference.

[0003] Technology field

[0004] One embodiment disclosed in this document relates to a battery management device and a battery system including the same.

[0005] Recently, active research and development has been conducted on secondary batteries. The term "secondary battery" refers to a rechargeable battery, encompassing both conventional Ni / Cd and Ni / MH batteries, as well as more recent lithium-ion batteries. Among secondary batteries, lithium-ion batteries boast a significantly higher energy density than conventional Ni / Cd and Ni / MH batteries. Furthermore, lithium-ion batteries can be manufactured in a compact and lightweight form, making them a popular power source for mobile devices. Recently, their use has expanded to include power sources for electric vehicles, drawing attention as a next-generation energy storage medium.

[0006] At least one battery pack is connected in series or parallel to provide pack voltage to a load. A battery management device may be configured to control the electrical connection between the battery packs and the load. In particular, the process of controlling the electrical connection between the parallel-connected battery packs may pose a risk of inrush current generation due to a decrease in resistance caused by the parallel connection between the battery packs.

[0007] One object of the embodiments disclosed in this document is to provide a battery management device that prevents inrush current and a battery system including the same.

[0008] The technical problems of the embodiments disclosed in this document are not limited to the technical problems mentioned above, and other technical problems not mentioned will be clearly understood by those skilled in the art to which the present invention pertains from the description below.

[0009] A battery management device according to an embodiment disclosed in the present document may include an intermediate signal generating unit that generates an intermediate signal related to the operation control of a contactor corresponding to each of a first battery pack and a second battery pack connected in parallel with the first battery pack; and a final signal generating unit that generates a final signal that controls the electrical connection of the contactor corresponding to the second battery pack based on a comparison result between a link voltage, which is a voltage applied to nodes to which the first battery pack and the second battery pack are connected, and a pack voltage applied to a positive contactor corresponding to the second battery pack, and the intermediate signal.

[0010] According to one embodiment, the final signal generation unit may include a comparator that receives the link voltage and the pack voltage and generates a comparison signal; and an SR latch that receives the comparison signal and the intermediate signal and generates the final signal.

[0011] According to one embodiment, the comparator can generate a comparison signal of a logic high state when the difference between the voltage level of the link voltage and the voltage level of the pack voltage is less than a preset reference value, and can generate a comparison signal of a logic low state when the difference between the voltage level of the link voltage and the voltage level of the pack voltage is greater than or equal to the preset reference value.

[0012] According to one embodiment, the SR latch can receive the inverted intermediate signal through a set terminal and the comparison signal through a reset terminal.

[0013] According to one embodiment, the SR latch further includes an enable terminal that receives an enable signal related to connection of a negative contactor corresponding to the second battery pack, and the enable terminal can receive an enable signal of a logic high state when the negative contactor corresponding to the second battery pack is in a short-circuit state, and can receive a disable signal of a logic low state when the negative contactor corresponding to the second battery pack is in an open state.

[0014] According to one embodiment, the final signal corresponds to the inverted output (Q') of the SR latch, and the positive contactor corresponding to the second battery pack can be electrically connected in response to the final signal in a logic high state and the intermediate signal in a logic high state.

[0015] A battery system according to an embodiment disclosed in the present document may include: a first battery pack electrically connected to a first node based on a state of a first contactor and electrically connected to a second node based on a state of a second contactor; a second battery pack electrically connected to the first node based on a state of a third contactor and electrically connected to the second node based on a state of a fourth contactor; and a battery management device that controls an operation of the third contactor based on a comparison result between a link voltage applied between the first node and the second node and a pack voltage applied between the third contactor and the second node, in a state in which the first battery pack is electrically connected to the first node and the second node, and the second battery pack is electrically connected to the second node.

[0016] According to one embodiment, the battery management device may include a comparator that receives the link voltage and the pack voltage as input; and an SR latch that receives the output of the comparator as input to a reset terminal and receives an intermediate signal related to the control of the operation of the third contactor in an inverted state as input to a set terminal.

[0017] According to one embodiment, the comparator can output a comparison signal in a logic high state when a difference between a voltage level of the link voltage and a voltage level of the pack voltage is less than a preset reference value, and can output a comparison signal in a logic high state when a difference between a voltage level of the link voltage and a voltage level of the pack voltage is greater than or equal to the preset reference value.

[0018] According to one embodiment, the battery management device further includes an AND gate that receives the intermediate signal and the inverted output (Q') of the SR latch, and can electrically connect the third contactor based on an output of the AND gate in a logic high state.

[0019] In one embodiment, the intermediate signal may correspond to a logic high state when instructing the third contactor to be shorted, and may correspond to a logic low state when instructing the third contactor to be opened.

[0020] A battery management device and a battery system including the same according to an embodiment disclosed in this document can prevent the occurrence of inrush current when controlling electrical connection between battery packs connected in parallel.

[0021] The effects according to the embodiments disclosed in this document are not limited to the effects mentioned above, and other effects not mentioned can be clearly understood by those skilled in the art according to the disclosure of this document.

[0022] FIG. 1 is a drawing schematically illustrating the configuration of a battery system according to an embodiment disclosed in this document.

[0023] FIG. 2 is a drawing for explaining in detail the configuration of a battery system according to an embodiment disclosed in this document.

[0024] FIG. 3 is a drawing for explaining the configuration of a final signal generation unit according to an embodiment disclosed in this document.

[0025] FIG. 4 is a diagram for explaining the flow of signals over time according to an embodiment disclosed in this document.

[0026] FIG. 5 is a diagram for explaining the logic state of a final signal according to an embodiment disclosed in this document.

[0027] Hereinafter, embodiments disclosed in this document will be described in detail with reference to exemplary drawings. When designating components in each drawing, it should be noted that, where possible, identical components are given identical reference numerals, even if they appear in different drawings. Furthermore, when describing embodiments disclosed in this document, detailed descriptions of related known structures or functions will be omitted if they are deemed to hinder understanding of the embodiments disclosed in this document.

[0028] In describing the components of the embodiments disclosed in this document, terms such as first, second, A, B, (a), (b), etc. may be used. These terms are only intended to distinguish the components from other components and do not limit the nature, order, or sequence of the components. In addition, unless otherwise defined, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by a person of ordinary skill in the art to which the embodiments disclosed in this document belong. Terms defined in commonly used dictionaries should be interpreted as having a meaning consistent with the meaning they have in the context of the relevant technology, and shall not be interpreted in an idealized or overly formal sense unless explicitly defined in this application.

[0029] FIG. 1 is a drawing for schematically explaining the configuration of a battery system according to an embodiment disclosed in this document, and FIG. 2 is a drawing for detailed explanation of the configuration of a battery system according to an embodiment disclosed in this document.

[0030] First, referring to FIG. 1, a battery system (1) may include a battery pack (100) and a battery management device (1000).

[0031] The battery management device (1000) can obtain data related to the status of the battery pack (100) and / or the plurality of battery cells (101, 102, 103, 104) included in the battery pack (100). For example, the battery management device (1000) can obtain data including at least one of voltage, current, temperature, and resistance of each of the battery pack (100) and / or the plurality of battery cells (101, 102, 103, 104). To this end, various sensors or various measurement modules not shown in FIG. 1 may be additionally installed at any location, such as the battery pack (100) or the charge / discharge path.

[0032] The battery management device (1000) can calculate parameters indicating the state of each of the battery pack (100) and / or each of the plurality of battery cells (101, 102, 103, 104), such as SOC (State of Charge) or SOH (State of Health). The battery management device (1000) can calculate parameters based on the state (voltage, current, temperature, resistance, etc.) of each of the battery pack (100) and / or each of the plurality of battery cells (101, 102, 103, 104), but is not limited thereto.

[0033] The battery management device (1000) can manage and / or control the status and / or operation of the battery pack (100). For example, the battery management device (1000) can manage charging and discharging of the battery pack (100), a plurality of battery modules (not shown) included in the battery pack (100), and a plurality of battery cells (101, 102, 103, 104).

[0034] The battery pack (100) may include a plurality of battery cells (101, 102, 103, 104). In FIG. 1, the battery pack (100) is illustrated as including four battery cells (101, 102, 103, 104), but is not limited thereto, and the battery pack (100) may be configured to include n battery cells (n is a natural number greater than or equal to 2).

[0035] The battery pack (100) may be configured to supply power to a target device (not shown). For this purpose, the battery pack (100) may be electrically connected to the target device. Here, the target device (not shown) may include any electrical, electronic, or mechanical device that operates by receiving power from the battery pack (100). For example, the target device (not shown) may be, but is not limited to, a two-wheeled electric vehicle such as an electric vehicle (EV) or an electric scooter. In addition, when the target device (not shown) is a two-wheeled electric vehicle such as an electric scooter, the battery pack (100) mounted on the two-wheeled electric vehicle may be replaceable through a battery swapping station (BSS).

[0036] Here, the battery pack (100) may include a battery module (not shown) not shown in FIG. 1 as a unit of a secondary battery including a plurality of battery cells. The battery module (not shown) may include a plurality of battery cells, and the battery pack (100) may be configured to include a plurality of battery modules (not shown).

[0037] The plurality of battery cells (101, 102, 103, 104) may be, but are not limited to, lithium ion (Li-ion) batteries, lithium ion polymer (Li-ion) batteries, nickel cadmium (Ni-Cd) batteries, nickel metal hydride (Ni-MH) batteries, etc., respectively. In addition, although the battery system (1) in FIG. 1 is illustrated as including one battery pack (100), the battery system (1) may be configured to include n battery packs (n is a natural number greater than or equal to 2) according to an embodiment. In this case, the plurality of battery packs may be connected in series and / or in parallel.

[0038] According to one embodiment, multiple battery packs may be connected in parallel. Referring to FIG. 2, the battery system (1) may include a first battery pack (100) and a second battery pack (200) connected in parallel with the first battery pack (100) through a first node (N1) and a second node (N2).

[0039] The first battery pack (100) may be electrically connected to the first node (N1) and the second node (N2). To this end, the battery system (1) may include a plurality of contactors (110, 120, 130) that electrically connect the first node (N1) and the second node (N2) to the first battery pack (100). According to one embodiment, the first battery pack (100) may be electrically connected to the second node (N2) based on the state of the first negative contactor (130) corresponding to the first battery pack (100), and may be connected to the first node (N1) based on the states of the first positive contactor (110) and the first precharge contactor (120) corresponding to the first battery pack (100).

[0040] Here, the first negative contactor (130) may be a contactor connecting the negative pole of the first battery pack (100) and the second node (N2), the first positive contactor (130) may be a contactor connecting the positive pole of the first battery pack (100) and the first node (N1), and the first pre-charge contactor (120) may be a contactor connecting the positive pole of the first battery pack (100) and the first node (N1) to pre-charge the first capacitor (C1) before the first battery pack (100) is electrically connected to the first node (N1) and the second node (N2).

[0041] Similarly, the second battery pack (100) may be electrically connected to the first node (N1) and the second node (N2). To this end, the battery system (1) may include a plurality of contactors (210, 220, 230) that electrically connect the first node (N1) and the second node (N2) to the second battery pack (200). According to one embodiment, the second battery pack (200) may be electrically connected to the second node (N2) based on the state of the negative contactor (230) corresponding to the second battery pack (200), and may be connected to the first node (N1) based on the states of the positive contactor (210) and the precharge contactor (220) corresponding to the second battery pack (200).

[0042] Here, the second negative contactor (230) may be a contactor connecting the negative pole of the second battery pack (200) and the second node (N2), the second positive contactor (230) may be a contactor connecting the positive pole of the second battery pack (200) and the first node (N1), and the second pre-charge contactor (220) may be a contactor connecting the positive pole of the second battery pack (200) and the first node (N1) to pre-charge the first capacitor (C1) before the second battery pack (200) is electrically connected to the first node (N1) and the second node (N2).

[0043] Throughout the entire description of this specification, for convenience of explanation, it is assumed that the first positive contactor (110) and the second positive contactor (210) are contactors (positive contactors) that electrically connect the positive electrode (Cathode) of the battery pack (100, 200) and the first node (N1), and the first negative contactor (130) and the second negative contactor (230) are contactors (negative contactors) that electrically connect the negative electrode (Anode) of the battery pack (100, 200) and the second node (N2).

[0044] According to one embodiment, a first capacitor (C1) may be connected between a first node (N1) and a second node (N2). The first capacitor (C1) may be connected to at least one battery pack, for example, a first battery pack (100) and / or a second battery pack (200), and may generate a voltage by the first battery pack (100) and / or the second battery pack (200). Here, the voltage applied between the first node (N1) and the second node (N2) may be a link voltage.

[0045] According to one embodiment, each of the plurality of contactors (110, 120, 130, 210, 220, 230) can operate in response to the control of the battery management device (1000, see FIG. 1). The battery management device (1000) can control the connection state of the battery pack (100), and for example, the battery management device (1000) can be configured to control the state of each of the plurality of contactors (110, 120, 130, 210, 220, 230) to a short-circuit state or an open state.

[0046] The battery management device (1000) can control the state of each of a plurality of contactors (110, 120, 130, 210, 220, 230) to electrically connect the first battery pack (100) and / or the second battery pack (200) to the first node (N1) and the second node (N2) simultaneously and / or electrically connect them at different times.

[0047] According to one embodiment, the battery management device (1000) may control the operation of the negative contactor to electrically connect the battery pack with the first node (N1) and the second node (N2). For example, when generating a pack voltage by connecting the first battery pack (100) with the first node (N1) and the second node (N2), the battery management device (1000) may control the operation of the first negative contactor (130) so that the first negative contactor (130) corresponding to the first battery pack (100) is short-circuited.

[0048] According to one embodiment, when the first negative contactor (130) is short-circuited and the negative electrode of the first battery pack (100) and the second node (N2) are electrically connected, the battery management device (1000) can control the operation of the first pre-charge contactor (120). The battery management device (1000) will control the first pre-charge contactor (120) to be short-circuited, thereby pre-charging the first capacitor (C1) for a predetermined period of time.

[0049] According to one embodiment, the battery management device (1000) may control the operation of the first pre-charge contactor (120) so that the first pre-charge contactor (120) is in an open state after the pre-charge period ends, and may control the operation of the first positive contactor (110) so that the first positive contactor (110) is in a short-circuit state. Since the state of the first negative contactor (130) is maintained in a short-circuit state, the first battery pack (100) may be electrically connected to the first node (N1) and the second node (N2), respectively, through the first positive contactor (110) and the first negative contactor (130) in the short-circuit state.

[0050] Assuming that the first battery pack (100) is electrically connected to the first node (N1) and the second node (N2), and the second battery pack (200) is electrically connected to the first node (N1) and the second node (N2), the first capacitor (C1) is charged with the first battery pack (100) and the link voltage is applied by the first battery pack (100), so that the pre-charge operation will not be performed when the second battery pack (200) is connected. However, since the same link voltage is applied to the first capacitor (C1), if the difference between the voltage applied to the positive contactor (210) of the second battery pack (200) and the link voltage is large, a current may rapidly flow in the second battery pack (200). This phenomenon may be an inrush current phenomenon, and may cause damage to the battery pack (100, 200) and / or the battery management device (1000) due to a sudden increase in the current size.

[0051] To prevent such inrush current generation phenomenon, the battery management device (1000) can control the electrical connection of the contactors (210, 220, 230) corresponding to the second battery pack (200). Specifically, the battery management device (1000) can generate an intermediate signal for controlling the second positive contactor (210) and the second negative contactor (230), and can generate a final signal for controlling the second positive contactor (210) based on a comparison result between the generated intermediate signal and the link voltage of the second positive contactor (210).

[0052] For convenience of explanation, it is assumed below that the first battery pack (100) is electrically connected to the first node (N1) and the second node (N2).

[0053] Referring again to FIG. 1, the battery management device (1000) may include an intermediate signal generation unit (1100), a final signal generation unit (1200), an enable signal generation unit (1300), and a memory (1400).

[0054] The intermediate signal generation unit (1100) can generate an intermediate signal for controlling the operation of a plurality of contactors (110, 120, 130, 210, 220, 230). According to one embodiment, the intermediate signal can correspond to an intermediate signal for controlling the state of each of the plurality of contactors (110, 120, 130, 210, 220, 230), and for example, the intermediate signal can be a signal for instructing the plurality of contactors (110, 120, 130, 210, 220, 230) to be in an electrical short state and / or an electrical open state.

[0055] According to one embodiment, when the intermediate signal instructs each of the plurality of contactors (110, 120, 130, 210, 220, 230) to be electrically shorted, the intermediate signal may correspond to a logic high state. Furthermore, when the intermediate signal instructs each of the plurality of contactors (110, 120, 130, 210, 220, 230) to be electrically opened, the intermediate signal may correspond to a logic low state. However, one embodiment disclosed in the present document is not limited to these examples, and the intermediate signal instructing the plurality of contactors to be electrically opened may correspond to a logic high state, and the intermediate signal instructing the plurality of contactors to be electrically shorted may correspond to a logic low state.

[0056] When each of the plurality of contactors (110, 120, 130, 210, 220, 230) operates only under the control of the intermediate signal generated by the battery management device (1000), the inrush current described with reference to FIG. 2 may occur. Accordingly, the battery management device (1000) may generate a final signal that controls the operation of the plurality of contactors (110, 120, 130, 210, 220, 230) based on the intermediate signal generated by the intermediate signal generating unit (1100).

[0057] The final signal generation unit (1200) can generate a final signal for controlling the operation of a plurality of contactors (110, 120, 130, 210, 220, 230) based on the intermediate signal. According to one embodiment, the final signal generation unit (1200) can generate a final signal based on a comparison result between the link voltage applied by the first battery pack (100) described with reference to FIG. 2 and the pack voltage applied to the second positive contactor (210) corresponding to the second battery pack (200). The final signal generation unit (1200) compares the link voltage and the pack voltage and generates a final signal for controlling the electrical connection of the positive contactor (220) when the possibility of inrush current generation is low, thereby preventing damage to the battery pack due to inrush current generation. Detailed information related thereto will be described later in the description of FIG. 3.

[0058] The enable signal generation unit (1300) can generate an enable signal related to the connection of the negative contactor. According to one embodiment, when the negative contactor corresponding to the battery pack (100) is in an electrically shorted state, the enable signal generation unit (1300) can generate and output an enable signal, and when the negative contactor corresponding to the battery pack (100) is in an electrically open state, the enable signal generation unit (1300) can generate and output a disable signal. Here, the enable signal may correspond to a logic high state and the disable signal may correspond to a logic low state, but is not limited thereto.

[0059] The memory (1400) can store various data (e.g., commands, voltage of the battery pack, threshold voltage, etc.) for the operation of the battery management device (1000). According to one embodiment, the memory (130) may include, but is not limited to, a volatile memory device such as a static random access memory (SRAM) or a dynamic random access memory (DRAM), or a non-volatile memory device such as a read only memory (ROM), a programmable ROM (PROM), or a flash memory.

[0060] According to one embodiment, the battery management device (1000) may be formed integrally with the battery pack (100). In this case, the battery management device (1000) may be implemented as a module BMS (Battery Management System) that controls the overall operation of a battery module (not shown) or a pack BMS that controls the overall operation of the battery pack (100), but is not limited thereto.

[0061] According to one embodiment, the battery management device (1000) may be formed separately from the battery pack (100). In this case, the battery management device (1000) may be connected to a battery module (not shown) and / or a battery pack (100) including the same via a wired and / or wireless network, and the battery management device (1000) may be implemented through various devices such as a cloud server, a charger, or a charger / discharger.

[0062] According to one embodiment, the battery management device (1000) can transmit the degradation level (e.g., SOH, etc.) of each of the plurality of battery cells (101, 102, 103, 104) to an external source (e.g., a cloud server or a user terminal). The cloud server can be configured to provide the degradation level, etc. of each of the plurality of battery cells (101, 102, 103, 104) to a plurality of users, and the user terminal may include, but is not limited to, a terminal such as a personal computer (PC) or a smartphone.

[0063] According to one embodiment, the battery management device (1000) may be implemented through a Battery Swapping Station (BSS). Here, the BSS may be a system having a slot into which a battery pack (100) can be inserted and capable of charging the inserted battery pack (100).

[0064] FIG. 3 is a drawing for explaining the configuration of a final signal generation unit according to an embodiment disclosed in this document.

[0065] Referring to FIG. 3, the final signal generation unit (1200, see FIG. 1) may include an inverter (1210), a comparator (1220), an SR latch (1230), and an AND gate (1240).

[0066] According to one embodiment, the final signal generation unit (1200) may include a plurality of hardware modules. Here, the inverter (1210), the comparator (1220), the SR latch (1230), and the AND gate (1240) may be integrated on one substrate and / or integrated on different substrates.

[0067] The inverter (1210) may be configured to invert the logic state of an input signal. According to one embodiment, the inverter (1210) may invert the logic state of an intermediate signal (SIG_OPMID) generated by the intermediate signal generation unit (1100, see FIG. 1). For example, when the intermediate signal generation unit (1100) generates an intermediate signal in a logic high state that instructs the contactor to be in an electrical short state, the inverter (1210) may output a signal in a logic low state, and when the intermediate signal generation unit (1100) generates an intermediate signal in a logic low state that instructs the contactor to be in an electrical open state, the inverter (1210) may output a signal in a logic high state.

[0068] According to one embodiment, the inverter (1210) may be electrically connected to the SET terminal of the SR latch (1230). The inverter (1210) will invert the intermediate signal (SIG_OPMID) and output it to the SET terminal.

[0069] According to one embodiment, the non-inverted intermediate signal (SIG_OPMID) can be input to the input terminal of the AND gate (1240).

[0070] A comparator (1220) may be configured to output a comparison signal (SIG_CMP) based on the result of comparing different inputs. According to one embodiment, the comparator (1220) may receive a link voltage and a voltage of a battery pack, and output a comparison signal (SIG_CMP) of different logic states based on the result of comparing the link voltage and the voltage of the battery pack.

[0071] According to one embodiment, the link voltage may be a voltage applied between the first node (N1) and the second node (N2) by the first battery pack (100) described with reference to FIG. 2. In addition, the pack voltage here may be a voltage applied to the second positive contactor (210) in a state where the second negative contactor (230) is electrically short-circuited and the second positive contactor (210) and the second pre-charge contactor (220) are electrically open. That is, the pack voltage here may be defined as a voltage applied between the fourth node (N4) and the second node (N2).

[0072] When the voltage level difference between the above-described link voltage and pack voltage is large, the second positive contactor (210) may be electrically short-circuited, and an inrush current may occur according to the voltage level difference. The comparator (1220) may output a comparison signal (SIG_CMP) in a logic high state if the difference between the link voltage (V_LINK) and the pack voltage (V_PACK) is less than a preset reference value, and may output a comparison signal (SIG_CMP) in a logic low state if the difference between the link voltage (V_LINK) and the pack voltage (V_PACK) is greater than or equal to a preset reference value. Here, the preset reference value may be 1 V, but is not limited thereto, and the reference value may be set and applied in various ways depending on the design.

[0073] The comparison signal (SIG_CMP) output by the comparator (1220) can be input to the reset terminal of the SR latch (1230).

[0074] The SR latch (1230) can receive an intermediate signal in an inverted state output by the inverter (1210) as input to the set (S) terminal and a comparison signal (SIG_CMP) output by the comparator (1220).

[0075] The SR latch (1230) may further include an enable (E) terminal. Here, an enable signal (SIG_EN) may be input to the enable terminal, and the enable signal (SIG_EN) may be a signal related to the connection of the negative contactor. According to one embodiment, when the negative contactor is in an electrical short state, an enable signal (SIG_EN) in a logic high state may be input to the enable terminal (E), and when the negative contactor is in an electrical open state, an enable signal in a logic low state, i.e., a disable signal, may be input to the enable terminal (E).

[0076] The SR latch (1230) can generate multiple outputs based on input signals input through a set (S) terminal, a reset terminal (R), and an enable terminal (E). The SR latch (1230) can include a non-inverting terminal (Q) and an inverting terminal (Q'). A truth table related to the multiple outputs generated by the SR latch (1230) is described later in the description of FIG. 5.

[0077] According to one embodiment, the SR latch (1230) can generate a final signal (SIG_OPFIN). Here, the final signal (SIG_OPFIN) can correspond to an inverted signal output through the inverting terminal (Q') of the SR latch (1230), and the final signal (SIG_OPFIN) can be input to an AND gate (1240).

[0078] According to one embodiment, the final signal (SIG_OPFIN) in a logic high state may be a signal that causes the contactor to be in an electrical short state, and the final signal (SIG_OPFIN) in a logic low state may be a signal that causes the contactor to be in an electrically open state. The second positive contactor (210) may be electrically connected in response to the final signal (SIG_OPFIN) in a logic high state, and may be maintained in an electrically open state in response to the final signal (SIG_OPFIN) in a logic low state.

[0079] The AND gate (1240) may be electrically connected to the second positive contactor (210) of the second battery pack (200, see FIG. 2). In FIG. 3, only one positive contactor is illustrated, but the invention is not limited thereto, and may be electrically connected to the positive contactor of each of a plurality of battery packs included in the battery system (1, see FIG. 1).

[0080] The second anode contactor (210) can operate in response to the output of the AND gate (1240). The second anode contactor (210) can be electrically shorted in response to an intermediate signal (SIG_OPMID) in a logic high state and a final signal (SIG_OPFIN) in a logic high state.

[0081] According to one embodiment, the second anode contactor (210) may include an EOL terminal for receiving an EOL (End of Line) signal. The EOL signal (SIG_EOL) input through the EOL terminal may be a signal that forces the second anode contactor into an electrical short-circuit state. When an EOL signal in a logic high state is input, the second anode contactor (210) may be electrically short-circuited regardless of the output of the AND gate (1240).

[0082] FIG. 4 is a diagram for explaining the flow of signals over time according to an embodiment disclosed in this document.

[0083] According to one embodiment, it is assumed that a first battery pack (100, see FIG. 2) is first electrically connected to a first node (N1, see FIG. 2) and a second node (N2), and a second battery pack (200, see FIG. 2) connected in parallel with the first battery pack (100) is connected to the first node (N1) and the second node (N2).

[0084] At time T1, the battery management device (1000, see FIG. 1) can output a control signal (SIG_OPFIN_N1) that causes the first negative contactor (130, see FIG. 2) corresponding to the first battery pack (100) to be in an electrical short-circuit state. The first negative contactor (130) can electrically connect the negative pole of the first battery pack (100) and the second node (N2) in response to the control signal (SIG_OPFIN_N1) in a logic high state, and the first negative contactor (130) can maintain the electrical short-circuit state until the control signal (SIG_OPFIN_N1) becomes a logic low state.

[0085] At time T2, the battery management device (1000) can output a control signal (SIG_OPFIN_PREP1) that causes the first pre-charge contactor (120) corresponding to the first battery pack (100) to be in an electrical short-circuit state. The first pre-charge contactor (120) can pre-charge the first capacitor (C1) connected to the first battery pack (100) in response to the control signal (SIG_OPFIN_PREP1) in a logic high state.

[0086] At time T3, the battery management device (1000) can output a first final signal (SIG_OPFIN_P1) of a logic high state that controls the operation of the first positive contactor (110) so that the first positive contactor (110) corresponding to the first battery pack (100) is in an electrical short-circuit state. Since no battery packs other than the first battery pack (100) are electrically connected to the first node (N1) and the second node (N2), and a pre-charge operation has been performed, an inrush current may not be generated. Therefore, the battery management device (1000) can output the first final signal (SIG_OPFIN_P1) so that the first positive contactor (110) is immediately in an electrical short-circuit state.

[0087] At time T4, the battery management device (1000) can output a control signal (SIG_OPFIN_PREP1) that causes the first pre-charge contactor (120) corresponding to the first battery pack (100) to be in an electrically open state. The first pre-charge contactor (120) can electrically open the connection between the first battery pack (100) and the first node (N1) in response to the control signal (SIG_OPFIN_PREP1) in a logic low state.

[0088] In one embodiment, time points T3 and T4 may be the same time point, or time point T4 may precede time point T3.

[0089] According to one embodiment, the voltage level of the link voltage (V_N12) may gradually increase from time T2 when the first capacitor (C1) is precharged. Here, the first link voltage (V_N12) may be a voltage applied between the first node (N1) and the second node (N2) described with reference to FIGS. 1 and 2.

[0090] According to one embodiment, the voltage level of the link voltage (V_N12) may rapidly increase from time T3 when the first positive contactor (110) corresponding to the first battery pack (100) becomes electrically short-circuited. The link voltage (V_N12) may be saturated at time T5, and the link voltage (V_N12) at this time may be the pack voltage by the first battery pack (100).

[0091] The battery management device (1000) can electrically connect the second battery pack (200, see FIG. 2) to the first node (N1) and the second node (N2) while the first battery pack (100) is electrically connected to the first node (N1) and the second node (N2) (after time point T3).

[0092] At time T6, the battery management device (1000) can output a control signal (SIG_OPFIN_N2) that connects a second negative contactor (230) corresponding to the second battery pack (200). The second negative contactor (230) can electrically connect the negative pole of the second battery pack (200) and the second node (N2) in response to the control signal (SIG_OPFIN_N2) in a logic high state, and the second negative contactor (230) can maintain an electrical short-circuit state until the control signal (SIG_OPFIN_N1) becomes a logic low state.

[0093] At time T6, the second negative contactor (230) electrically connects the negative pole of the second battery pack (200) and the second node (N2), so that the battery management device (1000) can output an enable signal (SIG_EN2) of a logic high state at time T6. Here, the enable signal (SIG_EN2) may be a signal related to the electrical connection state of the second negative contactor (200) (e.g., a short-circuit state or an open state).

[0094] Since the second negative contactor (230) is electrically short-circuited at time T6, the voltage level of the pack voltage (V_N42) applied to the second positive contactor (210) corresponding to the second battery pack (200) at time T7 may increase. Here, the pack voltage (V_N42) may be a voltage applied between the fourth node (N4) and the second node (N2) described with reference to FIG. 2, and time points T6 and T7 may be the same time points.

[0095] According to one embodiment, assuming that the difference in voltage levels of the pack voltage (V_N42) and the link voltage (V_N12) after time point T7 is less than a preset reference value, the battery management device (1000) can output a comparison signal (SIG_CMP) in a logic high state at time point T7.

[0096] At time T8, the battery management device (1000) may generate an intermediate signal (SIG_OPMID_P2) for controlling the operation of the second positive contactor (210). At time T8, the battery management device (1000) may output an intermediate signal (SIG_OPMID_P2) of a logic high state that causes the second positive contactor (210) to be in an electrical short-circuit state.

[0097] At time T8, the battery management device (1000) may generate a final signal that controls the operation of the second positive contactor (210). In one embodiment, since the difference in voltage level between the link voltage (V_N12) and the pack voltage (V_N42) is less than a preset reference value, the battery management device (1000) may output a final signal (SIG_OPFIN_P2) in a logic high state.

[0098] From the time point T8, since both the intermediate signal (SIG_OPMID_P2) and the final signal (SIG_OPFIN_P2) for controlling the second positive contactor (210) are in a logic high state, the second positive contactor (210) can electrically connect the positive electrode of the second battery pack (200) and the first node (N1) in response to the intermediate signal (SIG_OPMID_N2) in a logic high state and the final signal (SIG_OPFIN_P2) in a logic high state.

[0099] FIG. 5 is a diagram for explaining the logic state of a final signal according to an embodiment disclosed in this document.

[0100] Referring to FIG. 5, examples of non-inverted outputs (Q) and inverted outputs (Q') generated by an SR latch (1230, see FIG. 3) according to each input are illustrated. Here, '0' may represent a logic low state and '1' may represent a logic high state, but is not limited thereto.

[0101] The SR latch (1230) can output a signal in a logic high (1) state through the non-inverting terminal (Q) and a signal in a logic low (0) state through the inverting terminal (Q') when a signal in a logic high (1) state is input to the set (S) terminal and a signal in a logic low (0) state is input to the reset (R) terminal.

[0102] The SR latch (1230) can output a signal in a logic low (0) state through the non-inverting terminal (Q) and a signal in a logic high (1) state through the inverting terminal (Q') when a signal in a logic low (0) state is input to the set (S) terminal and a signal in a logic high (1) state is input to the reset (R) terminal.

[0103] The SR latch (1230) can output a signal of the previous state through the non-inverting terminal (Q) and the inverting terminal (Q') when a signal of a logic low (0) state is input to the set (S) terminal and a signal of a logic low (0) state is input to the reset (R) terminal.

[0104] According to one embodiment, the SR latch (1230) may further include an enable terminal (E), in which case, the output of the above-described SR latch (1230) may be output in synchronization with the enable signal. That is, when an enable signal in a logic low (0) state, i.e., a disable signal, is input through the enable terminal (E), the SR latch (1230) may output a signal of a previous state through the non-inverting terminal (Q) and the inverting terminal (Q'), and when an enable signal in a logic high (1) state, i.e., an enable signal, is input through the enable terminal (E), the SR latch (1230) may output signals of different states based on the logic state of the signal input to the set (S) terminal and the logic state of the signal input to the reset (R) terminal.

[0105] First, when looking at the cases where an enable signal in a logic low (0) state is input (a to d), both the signals output through the non-inverting terminal (Q) and the inverting terminal (Q') of the SR latch can maintain their previous values.

[0106] According to one embodiment, when an enable signal in a logic high (0) state is input (e to h), the SR latch (1230) can output a signal through each of the non-inverting terminal (Q) and the inverting terminal (Q') based on the logic state of the signal input through the set (S) terminal and the logic state of the signal input through the reset (R) terminal.

[0107] First, when the comparator (1220, see FIG. 2) outputs a comparison signal (SIG_CMP) in a logic high (1) state (f, h), the difference in voltage levels between the link voltage (V_LINK) and the pack voltage (V_PACK) is less than a preset reference value, so the possibility of inrush current generation may be low. In this state, when an intermediate signal (SIG_MID) in a logic high (1) state is generated to control the second positive contactor (210) to an electrical short-circuit state, the intermediate signal (SIG_MID) in a logic high (1) state will be input to the set (S) terminal as a logic low (0) state through the inverter (1210, see FIG. 2) (f). Since the SR latch (1230) outputs a signal in a logic high (1) state through the inverting terminal (Q'), the second positive contactor (210) may be electrically short-circuited.

[0108] In addition, when the comparator (1220) outputs a comparison signal (SIG_CMP) in a logic low (0) state (e, g), the difference in voltage level between the link voltage (V_LINK) and the pack voltage (V_PACK) is greater than or equal to a preset reference value, so there may be a high possibility of inrush current generation. In this state, when an intermediate signal (SIG_MID) in a logic high (1) state is generated to control the second positive contactor (210) to an electrical short-circuit state, the intermediate signal (SIG_MID) in a logic high (1) state will be input to the set (S) terminal in a logic low (0) state via the inverter (1210, see FIG. 2) (e). In this case, the signal output through the non-inverting terminal (Q) and the inverting terminal (Q') of the SR latch (1230) can maintain its previous value.

[0109] Here, if the second positive contactor (210) is in an electrically open state, the SR latch (1230) will output a final signal (SIG_OPFIN) in a logic low (0) state, so that the second positive contactor (210) can maintain the electrically open state. Through this, the battery management device (1000) can prevent the generation of inrush current.

[0110] Here, if the second positive contactor (210) is in an electrical short-circuit state, since power is being supplied by the second battery pack (200), the second positive contactor (210) must maintain the electrical short-circuit state. The second positive contactor (210) will maintain the electrical short-circuit state in response to the final signal (SIG_OPFIN) of the previous value, logic high (1).

[0111] In the above, all components constituting the embodiments have been described as being combined or operating in combination as one. However, this is not necessarily limited to such embodiments, and within the scope of the purpose, all components may be selectively combined and operated in one or more combinations. Furthermore, terms such as "include," "comprise," or "have" described above, unless specifically stated to the contrary, imply that the corresponding component may be inherent, and therefore should be interpreted to include other components rather than excluding other components.

[0112] The above description is merely an example of the technical idea disclosed in this document, and those skilled in the art to which the embodiments disclosed in this document pertain may make various modifications and variations without departing from the essential characteristics of the embodiments disclosed in this document.

[0113] Accordingly, the embodiments disclosed in this document are intended to illustrate, rather than limit, the technical concepts disclosed in this document, and the scope of the technical concepts disclosed in this document is not limited by these embodiments. The scope of protection of the technical concepts disclosed in this document should be interpreted by the claims below, and all technical concepts within the equivalent scope should be interpreted as being included within the scope of the rights of this document.

Claims

1. An intermediate signal generating unit that generates an intermediate signal related to the operation control of a contactor corresponding to each of a first battery pack and a second battery pack connected in parallel with the first battery pack; and A battery management device comprising: a final signal generation unit that generates a final signal for controlling electrical connection of a contactor corresponding to the second battery pack based on a comparison result between a link voltage, which is a voltage applied to nodes to which the first battery pack and the second battery pack are connected, and a pack voltage applied to a positive contactor corresponding to the second battery pack, and the intermediate signal.

2. In the first paragraph, the final signal generating unit, A comparator that receives the link voltage and the pack voltage and generates a comparison signal; and A battery management device comprising an SR latch that receives the comparison signal and the intermediate signal and generates the final signal.

3. In the second paragraph, the comparator, If the difference between the voltage level of the link voltage and the voltage level of the pack voltage is less than a preset reference value, a comparison signal of a logic high state is generated, A battery management device that generates a comparison signal in a logic low state when the difference between the voltage level of the link voltage and the voltage level of the pack voltage is greater than or equal to the preset reference value.

4. In the second paragraph, the SR latch, The inverted intermediate signal is input through the Set terminal, A battery management device that receives the above comparison signal through a reset terminal.

5. In the fourth paragraph, the SR latch, Further comprising an enable terminal for receiving an enable signal related to the connection of a negative contactor corresponding to the second battery pack, The above enable terminal is, When the negative contactor corresponding to the second battery pack is short-circuited, an enable signal in a logic high state is input, A battery management device that receives a disable signal in a logic low state when the negative contactor corresponding to the second battery pack is in an open state.

6. In paragraph 4, The above final signal corresponds to the inverted output (Q') of the SR latch, A battery management device in which the positive contactor corresponding to the second battery pack is electrically connected in response to the final signal of a logic high state and the intermediate signal of a logic high state.

7. A first battery pack electrically connected to a first node based on a state of a first contactor and electrically connected to a second node based on a state of a second contactor; A second battery pack electrically connected to the first node based on the state of the third contactor and electrically connected to the second node based on the state of the fourth contactor; and A battery system comprising: a battery management device that controls the operation of the third contactor based on a comparison result between a link voltage applied between the first node and the second node and a pack voltage applied between the third contactor and the second node, while the first battery pack is electrically connected to the first node and the second node, and the second battery pack is electrically connected to the second node.

8. In the 7th paragraph, the battery management device, A comparator receiving the link voltage and the pack voltage; and The output of the above comparator is input to the reset terminal, A battery system including an SR latch (SR-Latch) that receives an intermediate signal related to the operation control of the third contactor in a reverse state as a set terminal.

9. In the 8th paragraph, the comparator, If the difference between the voltage level of the link voltage and the voltage level of the pack voltage is less than a preset reference value, a comparison signal in a logic high state is output, A battery system that outputs a comparison signal in a logic high state when the difference between the voltage level of the link voltage and the voltage level of the pack voltage is greater than or equal to the preset reference value.

10. In the 8th paragraph, the battery management device, Further comprising an AND gate that receives the intermediate signal and the inverted output (Q') of the SR latch, A battery system electrically connecting the third contactor based on the output of the AND gate in a logic high state.

11. In the 8th paragraph, the intermediate signal is If the third contactor is instructed to be shorted, it corresponds to a logic high state, A battery system corresponding to a logic low state when the third contactor is instructed to open.

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