Photovoltaic module and preparation method therefor, electrical device, power generation device and photovoltaic system

Abstract

Provided in the present application are a photovoltaic module and a preparation method therefor, an electrical device, a power generation device and a photovoltaic system. The photovoltaic module comprises a photovoltaic cell, a buffer layer and a busbar, wherein the photovoltaic cell comprises a light absorption layer and a back electrode layer which are stacked; the buffer layer is located on the side of the back electrode layer that is away from the light absorption layer; the busbar comprises a connecting portion and a main body portion, wherein one end of the connecting portion is connected to the back electrode layer, the other end of the connecting portion is connected to the main body portion, and the main body portion is arranged on the side of the buffer layer that is away from the back electrode layer. In the photovoltaic module, the stress of the light absorption layer in a lamination or use process can be buffered by means of the arrangement of the buffer layer, thereby reducing the risk of damage to the light absorption layer during the lamination or use process, and then improving the photoelectric conversion efficiency of the photovoltaic module.

Description

Photovoltaic module and method for manufacturing the same, power consuming device, power generating device, and photovoltaic system

[0001] Related applications

[0002] The present application claims priority to the Chinese patent application No. 2024104304584, filed on April 10, 2024, and entitled “Photovoltaic module and method for manufacturing the same, power consuming device, power generating device, and photovoltaic system”, the content of which is hereby incorporated by reference in its entirety. TECHNICAL FIELD

[0003] The present application relates to the field of photovoltaic technology, and in particular to a photovoltaic module and a method for manufacturing the same, a power consuming device, a power generating device, and a photovoltaic system. BACKGROUND

[0004] In a conventional photovoltaic module, an insulating layer is arranged between the bus bar and the metal electrode to separate the bus bar and the metal electrode. This way can make the photovoltaic module have good insulation performance. However, the thermal expansion coefficients of the insulating layer and the light-emitting layer of the photovoltaic cell are usually quite different. For example, in a perovskite photovoltaic module, the thermal expansion coefficients of the commonly used polyimide (PI) insulating layer and the perovskite layer are quite different, so that the perovskite layer is subjected to a large stress during lamination and use of the photovoltaic module and is prone to damage, thereby reducing the photoelectric conversion efficiency of the photovoltaic module. SUMMARY

[0005] The present application provides a photovoltaic module, comprising a photovoltaic cell, a buffer layer, and a bus bar; the photovoltaic cell comprises a light-absorbing layer and a back electrode layer arranged in a stack; the buffer layer is located on a side of the back electrode layer away from the light-absorbing layer; the bus bar comprises a connecting portion and a main body portion, one end of the connecting portion is connected to the back electrode layer, the other end of the connecting portion is connected to the main body portion, and the main body portion is arranged on a side of the buffer layer away from the back electrode layer.

[0006] In the above photovoltaic module, the buffer layer can buffer the stress of the light-absorbing layer during lamination or use, reduce the risk of damage to the light-absorbing layer during lamination or use, and thereby improve the photoelectric conversion efficiency of the photovoltaic module.

[0007] In some embodiments, the buffer layer includes a buffer sub-layer and a first insulating layer arranged in a stack, the buffer sub-layer covers part or all of the back electrode layer, and the first insulating layer is arranged between the buffer sub-layer and the main body portion of the busbar. The buffer sub-layer and the first insulating layer are arranged in a stack, the buffer sub-layer covers part or all of the back electrode, and is used to buffer the stress of the light-absorbing layer during lamination or use, thereby reducing the risk of damage to the light-absorbing layer during lamination and use, and further improving the photoelectric conversion efficiency of the photovoltaic module. The first insulating layer is arranged between the buffer sub-layer and the main body portion of the busbar, and by arranging the first insulating layer between the buffer sub-layer and the main body portion of the busbar, the buffer sub-layer and the busbar can cooperate to improve the insulation between the busbar and the back electrode layer when buffering the stress of the light-absorbing layer, thereby reducing the risk of short circuit of the photovoltaic cell.

[0008] In some embodiments, the buffer layer includes a second insulating layer, and the second insulating layer includes an insulating material and a stress-buffering material. By adding the stress-buffering material to the second insulating layer, the stress of the light-absorbing layer during lamination can be buffered, thereby reducing the risk of damage to the light-absorbing layer.

[0009] In some embodiments, the thickness of the buffer sub-layer is 5 microns (μm) to 600 μm. The thickness of the buffer sub-layer in this range can maintain good buffering effect while keeping the perovskite photovoltaic module at a relatively appropriate thickness.

[0010] In some embodiments, the elastic modulus of the buffer sub-layer is 10 megapascals (MPa) to 100 MPa. The elastic modulus of the buffer sub-layer in this range can effectively release stress and further provide better buffering effect.

[0011] In some embodiments, the yield strength of the buffer sub-layer is 1 MPa to 40 MPa. The yield strength of the buffer sub-layer in this range can effectively release stress and further provide better buffering effect.

[0012] In some embodiments, the Vicat softening point temperature of the buffer sub-layer is 37 degrees Celsius (℃) to 100 ℃. At this time, the buffer sub-layer can soften before the first insulating layer, thereby providing better buffering effect inside the photovoltaic module.

[0013] In some embodiments, the buffer sub-layer includes at least one of thermoplastic polyolefin, ethylene-vinyl acetate copolymer, thermoplastic polyurethane elastomer, and polyvinyl butyral. These materials can buffer the stress of the light-absorbing layer during lamination or use, thereby reducing the risk of damage to the light-absorbing layer. Optionally, the thermoplastic polyolefin includes at least one of polypropylene, polyethylene, and ethylene-octene copolymer.

[0014] In some embodiments, the buffer sub-layer covers the entire back electrode layer, and the busbar is connected to the back electrode layer through the buffer sub-layer. The buffer sub-layer covering the entire back electrode layer can effectively alleviate the stress on the light-absorbing layer during lamination and use, and the original film of the buffer sub-layer can be used to improve the sealing performance of the photovoltaic cell package after being cast and softened during lamination.

[0015] In some embodiments, the modulus of elasticity of the stress-buffering material is 10 MPa to 100 MPa. The modulus of elasticity of the stress-buffering material in this range can effectively release stress and provide better buffering effect.

[0016] In some embodiments, the yield strength of the stress-buffering material is 1 MPa to 40 MPa. The yield strength in this range can effectively release stress and further provide better buffering effect.

[0017] In some embodiments, the Vicat softening point temperature of the stress-buffering material is 37℃ to 100℃. At this time, the stress-buffering material can soften before the insulating material, providing better buffering effect inside the photovoltaic module.

[0018] In some embodiments, the stress-buffering material includes at least one of thermoplastic polyolefin, ethylene-vinyl acetate copolymer, thermoplastic polyurethane elastomer, and polyvinyl butyral. Optionally, the thermoplastic polyolefin includes at least one of polypropylene, polyethylene, and ethylene-octene copolymer.

[0019] In some embodiments, the Vicat softening point temperature of the first insulating layer or the second insulating layer is 125℃ to 450℃. At this time, the first insulating layer or the second insulating layer can be well adapted to the use temperature of the photovoltaic module, providing better insulation effect inside the photovoltaic module.

[0020] In some embodiments, the thickness of the first insulating layer or the second insulating layer is 10μm to 100μm. The first insulating layer or the second insulating layer in this thickness range can maintain a relatively appropriate thickness of the photovoltaic module while providing good insulation performance.

[0021] In some embodiments, the first insulating layer or the second insulating layer includes at least one of polyimide and polyethylene terephthalate.

[0022] In some embodiments, any one or more of the buffer sub-layer, the first insulating layer, and the second insulating layer has an adhesive surface facing the back electrode layer. The provision of the adhesive surface facilitates the fixation of the position of any one or more of the buffer sub-layer, the first insulating layer, and the second insulating layer.

[0023] In some embodiments, a film layer is laid on the side of the busbar away from the back electrode layer, and the film layer covers the photovoltaic cell. The presence of the film layer can improve the sealing of the photovoltaic cell and improve the stability of the photovoltaic cell.

[0024] In some embodiments, the busbar includes at least two busbars, respectively connected to the positive electrode and the negative electrode of the back electrode layer.

[0025] In some embodiments, the light-absorbing layer includes a perovskite light-absorbing layer.

[0026] In some embodiments, the photovoltaic cell includes a perovskite cell or a stacked photovoltaic cell containing a perovskite cell.

[0027] A method for manufacturing a photovoltaic module, including the following steps:

[0028] forming a precursor film of a buffer layer on the surface of the back electrode layer of the photovoltaic cell;

[0029] laying a busbar on the back electrode layer, the connecting part of the busbar being connected to the back electrode layer, and the main part of the busbar being arranged on the side of the buffer layer away from the back electrode layer, to obtain a pre-product;

[0030] laminating the pre-product.

[0031] In some embodiments, a precursor film of a film layer is laid on the side of the busbar away from the back electrode layer before laminating.

[0032] An electrical device including the photovoltaic module described above.

[0033] A power generation device including the photovoltaic module described above.

[0034] A photovoltaic system including the photovoltaic module described above. BRIEF DESCRIPTION OF DRAWINGS

[0035] In order to more clearly illustrate the technical solutions of the present application, the following will briefly introduce the drawings used in the present application. Obviously, the drawings described below are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.

[0036] FIG. 1 is a stress-strain curve when testing the elastic modulus and yield strength of a polymer in an embodiment of the present application.

[0037] FIG. 2 is a structural schematic diagram of a photovoltaic module in an embodiment of the present application.

[0038] FIG. 3 is a top view of an embodiment of the photovoltaic module in FIG. 2.

[0039] FIG. 4 is a top view of another embodiment of the photovoltaic module in FIG. 2.

[0040] Fig. 5 is a graph of the PL test results of the perovskite photovoltaic module in Example 1 of the present application.

[0041] Fig. 6 is a graph of the PL test results of the perovskite photovoltaic module in Comparative Example 1 of the present application.

[0042] Fig. 7 is a graph of the surface state of the perovskite photovoltaic module in Comparative Example 2 of the present application before thermal cycling.

[0043] Fig. 8 is a cross-sectional view of the perovskite cell in Example 1 of the present application before lamination.

[0044] Fig. 9 is a cross-sectional view of the perovskite cell in Example 1 of the present application after thermal cycling.

[0045] Fig. 10 is a cross-sectional view of the perovskite cell in Comparative Example 1 of the present application after thermal cycling.

[0046] Fig. 11 is a cross-sectional view of the perovskite cell in Comparative Example 2 of the present application after thermal cycling.

[0047] Legend of the figures: 10: photovoltaic module; 101: base layer; 102: light-absorbing layer or perovskite layer; 103: back electrode layer; 201: buffer sublayer; 202: first insulating layer; 203: busbar; 2031: connecting portion; 2032: main body portion.

[0048] For a better description and illustration of the embodiments and / or examples of the inventions disclosed herein, reference can be made to one or more of the accompanying drawings. Additional details or examples used to describe the drawings should not be considered limiting to the scope of any of the disclosed inventions, the presently described embodiments and / or examples, and the presently understood best modes of these inventions. DETAILED DESCRIPTION

[0049] Hereinafter, some embodiments of the present application are disclosed in detail with appropriate reference to the accompanying drawings. However, there can be cases where unnecessary detailed description is omitted. For example, there can be cases where detailed description of matters well known, repeated description of substantially identical structures are omitted. This is to avoid the following description from becoming unnecessarily lengthy and to facilitate understanding by those skilled in the art. Furthermore, the drawings and the following description are provided so that those skilled in the art can fully understand the present application, and are not intended to limit the subject matter recited in the claims.

[0050] The details of one or more embodiments of the present application are set forth in the accompanying drawings and the description below. Other features, objects, and advantages of the application will be apparent from the description, drawings, and claims.

[0051] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in the description herein is for describing particular embodiments only and is not intended to be limiting of the application.

[0052] The ranges disclosed herein are defined by their lower and upper endpoints, given that a range is defined by selecting a lower endpoint and an upper endpoint, the selected lower and upper endpoints define the boundaries of a particular range. Ranges defined by endpoints can be inclusive or exclusive of the endpoints, and can be arbitrarily combined, i.e., any lower endpoint can be combined with any upper endpoint to form a range. For example, if ranges of 60-120 and 80-110 are listed, it is understood that ranges of 60-110 and 80-120 are also contemplated. Furthermore, if minimum ranges of 1 and 2 are listed, and if maximum ranges of 3, 4, and 5 are listed, then the following ranges are all contemplated: 1-3, 1-4, 1-5, 2-3, 2-4, and 2-5. In this application, unless otherwise indicated, a numerical range "a-b" indicates a shorthand way of describing each and every number that is an integer within the given range of a to b, wherein a and b are both real numbers. For example, the numerical range "0-5" indicates that all real numbers between 0 and 5 have been listed herein, and "0-5" is merely a shorthand way of describing each and every number that is an integer within the given range of 0 to 5. Also, when a parameter is stated to be an integer ≥ 2, it is equivalent to disclose that the parameter is, for example, an integer 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, etc.

[0053] All embodiments and optional embodiments of the present application can be combined with each other to form new technical solutions, if not specifically stated otherwise.

[0054] All technical features and optional technical features of the present application can be combined with each other to form new technical solutions, if not specifically stated otherwise.

[0055] All steps of the present application can be performed in sequence or randomly, and in some embodiments, are performed in sequence, if not specifically stated otherwise. For example, the method comprises steps (a) and (b) indicates that the method can comprise steps (a) and (b) performed in sequence, or steps (b) and (a) performed in sequence. For example, the method further comprises step (c) indicates that step (c) can be added to the method in any sequence, for example, the method can comprise steps (a), (b) and (c), or steps (a), (c) and (b), or steps (c), (a) and (b), etc.

[0056] Unless specifically stated otherwise, as used herein, the term "or" is inclusive. For example, the phrase "A or B" means "A, B, or both A and B." More specifically, the following conditions are each satisfied by the condition "A or B": A is true or present, and B is false or not present; A is false or not present, and A is true or present; or both A and B are true, or both A and B are present.

[0057] Unless specifically stated otherwise, as used herein, the term "room temperature" generally refers to 4-30°C, preferably 25±5°C.

[0058] Unless otherwise indicated, the terms used in this application have the meanings commonly understood by those of ordinary skill in the art. Unless otherwise indicated, the values of each parameter mentioned in this application can be measured by various measurement methods commonly used in the art. For example, the test can be performed according to the method given in the examples of this application.

[0059] In photovoltaic components, such as organic polymer photovoltaic components, organic dye photovoltaic components, perovskite photovoltaic components, etc., the thermal expansion coefficients of the insulating layer and the light-absorbing layer of the photovoltaic cell differ greatly, making the light-absorbing layer prone to damage due to the greater stress during use of the photovoltaic component, thereby reducing the photoelectric conversion efficiency of the photovoltaic component. Taking perovskite photovoltaic components as an example, in the photovoltaic component, the thermal expansion coefficients of the commonly used PI insulating layer and the perovskite layer differ greatly. In the preparation process of the conventional photovoltaic component, after the lamination process, the PL and EL performance of the photovoltaic component has already been abnormal, and during the aging test of the photovoltaic component, the area covered by the PI insulating layer has turned yellow before other areas, indicating that the perovskite layer has already been damaged to a certain extent.

[0060] To this end, an embodiment of the present application provides a photovoltaic component. The photovoltaic component includes a photovoltaic cell, a buffer layer, and a busbar. The photovoltaic cell includes a light-absorbing layer and a back electrode layer stacked. The buffer layer is located on the side of the back electrode layer away from the light-absorbing layer, and the busbar includes a connecting portion and a main body portion, one end of the connecting portion is connected to the back electrode layer, the other end is connected to the main body portion, and the main body portion is arranged on the side of the buffer layer away from the back electrode layer. By arranging the buffer layer, the stress on the light-absorbing layer during lamination or use can be buffered, the risk of damage to the light-absorbing layer during lamination or use can be reduced, and the photoelectric conversion efficiency of the photovoltaic component can be improved.

[0061] It can be understood that the back electrode layer can be understood as the electrode layer on the back side of the photovoltaic cell, which can be understood as the back electrode layer of the conventional photovoltaic cell, and is generally the electrode layer that receives incident light last. The buffer layer represents a functional layer that can buffer stress between the back electrode layer and the busbar. The busbar represents a component that collects current, which functions to collect the current generated inside the photovoltaic cell and transmit it outward.

[0062] It can be understood that the photovoltaic cell includes a plurality of sub-cells, and the plurality of sub-cells can be connected in partial / total series or parallel. The connecting portion of the busbar is connected with the positive and negative electrodes of the back electrode layer of the photovoltaic cell, and collects and transmits the current generated in the photovoltaic cell outward. The main body portion of the busbar is arranged on the side of the buffer layer away from the back electrode layer. The buffer layer is used to isolate the busbar except the connecting portion from the back electrode layer, so as to prevent the busbar except the main body portion from being connected with the back electrode layer and causing short circuit.

[0063] It can be understood that the busbar includes at least two busbars, which are respectively connected with the positive and negative electrodes of the photovoltaic cell, so as to prevent short circuit.

[0064] It can be understood that the light-absorbing layer can also be referred to as a photoelectric conversion layer, which can generate hole-electron pairs under the excitation of incident light. The holes and electrons of the hole-electron pairs are separated under the action of an electric field and are transmitted to different electrodes, respectively, and then form a loop through an external circuit. As an example, the light-absorbing layer can be any one of an organic polymer light-absorbing layer, an organic dye light-absorbing layer, or a perovskite light-absorbing layer.

[0065] In some embodiments, the buffer layer includes a buffer sub-layer and a first insulating layer arranged in a stack. The buffer sub-layer covers part or all of the back electrode layer, and the first insulating layer is arranged between the buffer sub-layer and the main body portion of the busbar. The buffer sub-layer and the first insulating layer are arranged in a stack, and the buffer sub-layer covers part or all of the back electrode layer, so as to buffer the stress of the light-absorbing layer during lamination or use, reduce the risk of damage to the light-absorbing layer during lamination and use, and thus improve the photoelectric conversion efficiency of the photovoltaic assembly. The first insulating layer is arranged between the buffer sub-layer and the main body portion of the busbar. By arranging the first insulating layer between the buffer sub-layer and the main body portion of the busbar, the buffer sub-layer and the busbar can cooperate to improve the insulation between the busbar and the back electrode layer when the stress of the light-absorbing layer is buffered, and reduce the risk of short circuit of the photovoltaic cell.

[0066] It can be understood that the buffer sublayer can cover part or all of the back electrode layer, and the coverage of part or all of the back electrode layer can achieve stress buffering of the light-absorbing layer during lamination or use. Generally, the elastic modulus, yield strength, and Vicat softening point temperature parameters of the buffer sublayer are required to be smaller than the corresponding parameters of the first insulating layer. In this way, for example, during lamination, there is an inherent difference in the coefficient of thermal expansion between the first insulating layer and the back electrode and the light-absorbing layer, which leads to the generation of thermal stress during temperature changes during lamination. At this time, the temperature is relatively high, and the buffer sublayer can soften and flow and other plastic deformations to release stress. At the same time, the stress generated by the buffer sublayer with a smaller elastic modulus than the first insulating layer is smaller under the same strain, thereby achieving stress buffering during lamination, reducing the influence of stress on the back electrode and the light-absorbing layer, and reducing the risk of damage to the back electrode and the light-absorbing layer during lamination. After the photovoltaic module is installed and used in outdoor power stations and other working conditions, temperature cycles will also occur due to day and night changes and seasonal changes. At this time, the stress generated by the buffer sublayer with a smaller elastic modulus than the first insulating layer is smaller under the same strain, thereby achieving stress buffering. Further, the laying area of the buffer sublayer is greater than or equal to the laying area of the first insulating layer, so that the first insulating layer is completely laid on the surface of the buffer sublayer, thereby buffering the stress on the light-absorbing layer during lamination or use, and reducing the risk of damage to the light-absorbing layer during lamination or use.

[0067] In some embodiments, the buffer layer includes a second insulating layer, and the second insulating layer comprises an insulating material and a stress-buffering material. In an embodiment of the present application, by adding a stress-buffering material to the second insulating layer, the stress of the second insulating layer on the light-absorbing layer during lamination can be buffered, and the risk of damage to the light-absorbing layer can be reduced.

[0068] It can be understood that the second insulating layer comprises a stress-buffering material. On the one hand, the second insulating layer can improve the insulation between the busbar and the back electrode layer, thereby reducing the risk of short circuit of the photovoltaic cell. On the other hand, the stress-buffering material in the second insulating layer can soften and flow and other plastic deformations to release stress during lamination, and the elastic modulus of the stress-buffering material is smaller than that of the insulating material in the second insulating layer, thereby achieving stress buffering during lamination, reducing the influence of stress on the back electrode and the light-absorbing layer, and reducing the risk of damage to the back electrode and the light-absorbing layer during lamination. After the photovoltaic module is installed and used in outdoor power stations and other working conditions, temperature cycles will also occur due to day and night changes and seasonal changes. The thermal stress generated by the second insulating layer with the stress-buffering material is smaller.

[0069] It can be understood that the second insulating layer can be a composite layer composed of a stress buffering material layer and an insulating material layer, or can be a second insulating layer formed by mixing a stress buffering material and an insulating material. A person skilled in the art can select different second insulating layers according to actual conditions.

[0070] In some embodiments, in the scheme in which the buffer layer includes the buffer sublayer and the first insulating layer arranged in a stack, the thickness of the buffer sublayer is 5 μm to 600 μm. The thickness of the buffer sublayer in this range can maintain a good buffering effect while keeping the perovskite photovoltaic module at a relatively appropriate thickness. Alternatively, the thickness of the buffer sublayer can be 10 μm, 50 μm, 80 μm, 100 μm, 120 μm, 150 μm, 180 μm, 200 μm, 220 μm, 250 μm, 280 μm, 300 μm, 320 μm, 350 μm, 380 μm, 400 μm, 450 μm, 500 μm, 550 μm, or a range between any two of the above values.

[0071] In some embodiments, in the scheme in which the buffer layer includes the buffer sublayer and the first insulating layer arranged in a stack, the elastic modulus of the buffer sublayer is 10 MPa to 100 MPa. The elastic modulus of the buffer sublayer in this range can effectively release stress and further provide better buffering effect. Alternatively, the elastic modulus of the buffer sublayer can be 10 MPa, 20 MPa, 30 MPa, 40 MPa, 50 MPa, 60 MPa, 70 MPa, 80 MPa, 90 MPa, 100 MPa, or a range between any two of the above values.

[0072] In some embodiments, in the scheme in which the buffer layer includes the buffer sublayer and the first insulating layer arranged in a stack, the yield strength of the buffer sublayer is 1 MPa to 40 MPa. The yield strength of the buffer sublayer in this range can effectively release stress and further provide better buffering effect. Alternatively, the yield strength of the buffer sublayer can be 1 MPa, 2 MPa, 3 MPa, 4 MPa, 5 MPa, 6 MPa, 7 MPa, 8 MPa, 9 MPa, 10 MPa, 15 MPa, 20 MPa, 25 MPa, 30 MPa, 35 MPa, 40 MPa, or a range between any two of the above values.

[0073] In some embodiments, in the scheme where the buffer layer comprises a buffer sub-layer and a first insulating layer arranged in a stack, the buffer sub-layer has a Vicat softening point temperature of 37-100°C. At this time, the buffer sub-layer can soften prior to the first insulating layer, providing a better buffering effect inside the photovoltaic module. Optionally, the buffer sub-layer has a Vicat softening point temperature of 37°C, 40°C, 45°C, 50°C, 55°C, 60°C, 65°C, 70°C, 75°C, 80°C, 85°C, 90°C, 95°C, 100°C, or a range between any two of the above values.

[0074] In this application, the elastic modulus represents the stress required for a material to undergo a unit strain, where the stress refers to the force acting on a unit area, and the strain refers to the relative change in the length of the material.

[0075] The yield strength represents the critical stress value at which a material transitions from elastic deformation to plastic deformation when subjected to external force. Below this stress level, the deformation of the material is reversible, i.e., the material can return to its original shape after the external force is removed; while above this stress level, the material will undergo irreversible plastic deformation.

[0076] The elastic modulus and yield strength can be obtained simultaneously from the cold drawing curve of the polymer. The specific test is as follows: prepare the sample to be tested into a rectangular or dumbbell shape, install it on a universal testing machine, two clamps respectively clamp the two ends of the sample, control the temperature below the Tg of the amorphous polymer or the Tm of the crystalline polymer of the material to be tested, and perform a constant rate tensile test, and plot the stress-strain curve from the obtained data. The slope of the initial linear segment is called the elastic modulus, and the stress corresponding to the highest point of the initial stress rise is called the yield strength.

[0077] For example, please refer to Figure 1, which shows the stress-strain curve when testing the elastic modulus and yield strength of a polymer in an embodiment. In which, the horizontal coordinate Strain represents the strain, the vertical coordinate Stress represents the stress, and the Yield Point represents the yield point, i.e., the highest point of the initial stress rise.

[0078] The Vicat softening point, also known as the Vicat heat deflection temperature, is one of the commonly used indicators to characterize the heat resistance of a material. It is the temperature at which a sample of a certain shape and size reaches a specified deflection when heated at a certain speed in a liquid medium or air bath. The specific test method can use the A 50 Test method.

[0079] In some embodiments, in the scheme where the buffer layer comprises a buffer sub-layer and a first insulating layer arranged in a laminated manner, the buffer sub-layer comprises at least one of thermoplastic polyolefin (TPO), ethylene-octene copolymer (POE), ethylene-vinyl acetate copolymer (EVA), thermoplastic polyurethane elastomer (TPU), and polyvinyl butyral (PVB). The above-mentioned materials can buffer the stress on the light-absorbing layer during lamination or use, thereby reducing the risk of damage to the light-absorbing layer. Optionally, the thermoplastic polyolefin comprises at least one of polypropylene, polyethylene, and ethylene-octene copolymer.

[0080] In some embodiments, the buffer sub-layer is formed by softening and casting the original film of the buffer sub-layer under lamination conditions. It should be noted that the original film of the buffer sub-layer is subjected to temperature and pressure during lamination, resulting in a buffer sub-layer with a small thickness and limited insulation performance. At this time, if the main body of the busbar is directly placed on the surface of the buffer sub-layer, the risk of short circuit of the perovskite battery is relatively large. In the present embodiment, by arranging the first insulating layer between the buffer sub-layer and the main body of the busbar, the insulation between the main body of the busbar and the back electrode layer can be improved, and the risk of short circuit of the photovoltaic cell can be reduced.

[0081] In some embodiments, in the scheme where the buffer layer comprises a second insulating layer comprising an insulating material and a stress-buffering material, the elastic modulus of the stress-buffering material is 10 MPa to 100 MPa. The stress-buffering material with an elastic modulus in this range can effectively release stress and provide better buffering effect. Optionally, the elastic modulus of the stress-buffering material can be 10 MPa, 20 MPa, 30 MPa, 40 MPa, 50 MPa, 60 MPa, 70 MPa, 80 MPa, 90 MPa, 100 MPa, or a range between any two of the above-mentioned values.

[0082] In some embodiments, in the scheme where the buffer layer comprises a second insulating layer comprising an insulating material and a stress-buffering material, the yield strength of the stress-buffering material is 1 MPa to 40 MPa. The stress-buffering material with a yield strength in this range can effectively release stress and further provide better buffering effect. Optionally, the yield strength of the stress-buffering material can be 1 MPa, 2 MPa, 3 MPa, 4 MPa, 5 MPa, 6 MPa, 7 MPa, 8 MPa, 9 MPa, 10 MPa, 15 MPa, 20 MPa, 25 MPa, 30 MPa, 35 MPa, 40 MPa, or a range between any two of the above-mentioned values.

[0083] In some embodiments, in the scheme that the buffer layer comprises the second insulating layer of the insulating material and the stress buffering material, the Vicat softening point temperature of the stress buffering material is 37-100℃. At this time, the stress buffering material can soften before the insulating material, and provide a better buffering effect inside the photovoltaic module. Alternatively, the Vicat softening point temperature of the stress buffering material is 37℃, 40℃, 45℃, 50℃, 55℃, 60℃, 65℃, 70℃, 75℃, 80℃, 85℃, 90℃, 95℃, 100℃, or a range between any two of the above values.

[0084] In some embodiments, in the scheme that the buffer layer comprises the second insulating layer of the insulating material and the stress buffering material, the stress buffering material comprises at least one of thermoplastic polyolefin, ethylene-vinyl acetate copolymer, thermoplastic polyurethane elastomer, and polyvinyl butyral. Alternatively, the thermoplastic polyolefin comprises at least one of polypropylene, polyethylene, and ethylene-octene copolymer. The insulating material comprises at least one of polyimide (PI) and polyethylene terephthalate (PET).

[0085] In some embodiments, the thickness of the first insulating layer or the second insulating layer is 10-100μm. The first insulating layer or the second insulating layer can have a better insulating performance within this thickness range, and the photovoltaic module can have a more appropriate thickness. The thickness of the first insulating layer or the second insulating layer can be 10μm, 11μm, 12μm, 13μm, 14μm, 15μm, 16μm, 17μm, 18μm, 19μm, 20μm, 21μm, 22μm, 23μm, 24μm, 25μm, 30μm, 35μm, 40μm, 45μm, 50μm, 55μm, 60μm, 65μm, 70μm, 75μm, 80μm, 85μm, 90μm, 95μm, 100μm, or any value within a range defined by any two of the above values.

[0086] In some embodiments, the Vicat softening point temperature of the first insulating layer or the second insulating layer is 125-450℃. At this time, the first insulating layer or the second insulating layer can be well adapted to the use temperature of the photovoltaic module, and provide a better insulating effect inside the photovoltaic module. Alternatively, the Vicat softening point temperature of the first insulating layer or the second insulating layer is 125℃, 150℃, 200℃, 250℃, 300℃, 350℃, 400℃, 450℃, or a range between any two of the above values.

[0087] In some embodiments, the first insulating layer or the second insulating layer comprises at least one of polyimide and polyethylene terephthalate.

[0088] It can be understood that, taking polyimide as the insulating material of the first insulating layer or the second insulating layer as an example, and taking polyethylene terephthalate as the material capable of buffering stress of the buffer sub-layer or the second insulating layer as an example, the bulk thermal expansion coefficient of polyimide is 30x10 -6 / K~90x10 -6 / K, the bulk thermal expansion coefficient of polyethylene terephthalate is 180x10 - 6 / K~240x10 -6 / K, taking the perovskite layer as the light-absorbing layer as an example, the bulk thermal expansion coefficient of the perovskite layer is 100x10 -6 / K~157x10 -6 / K. If the polyimide is directly in contact with the perovskite layer and the back electrode, a large thermal stress will be caused, which will further cause the risk of damage to the perovskite layer and the back electrode layer during the lamination process and the use process, and is not conducive to the stability of the photovoltaic module. According to the scheme of the embodiments of the present application, the use of polyimide and polyethylene terephthalate together can reduce the thermal stress during the lamination and use processes, and improve the stability of the photovoltaic module.

[0089] In some embodiments, the buffer sub-layer has an adhesive surface facing the back electrode layer, which is used to effectively fix the buffer sub-layer and prevent it from moving during the subsequent laying of the first insulating layer, thereby facilitating the subsequent laying of the first insulating layer. It can be understood that, when the buffer sub-layer covers the entire back electrode layer, the adhesive surface can not be needed, and such a laying process will not affect the subsequent laying of the first insulating layer.

[0090] In some embodiments, the first insulating layer has an adhesive surface facing the back electrode layer. Such an arrangement is conducive to fixing the position of the first insulating layer and preventing it from moving during the lamination process, thereby reducing the risk of short circuit caused by the movement of the first insulating layer. Optionally, the insulating layer includes an insulating tape.

[0091] In some embodiments, the second insulating layer has an adhesive surface facing the back electrode layer. Such an arrangement is conducive to fixing the position of the second insulating layer and preventing it from moving during the lamination process, thereby reducing the risk of short circuit caused by the movement of the second insulating layer. Optionally, the insulating layer includes an insulating tape.

[0092] In some embodiments, the busbar is laid with a film layer on the side away from the back electrode layer, and the film layer covers the photovoltaic cells. The presence of the film layer can improve the sealing of the encapsulation of the photovoltaic cells and improve the stability thereof. It can be understood that, when the buffer sub-layer covers the entire back electrode, the original film of the buffer sub-layer can be used to improve the sealing of the encapsulation of the photovoltaic cells after being cast and softened during the lamination process, thereby playing the role of the film. In such an implementation, in order to reduce the thickness of the photovoltaic module or simplify the preparation process and cost, the busbar does not need to be laid with a film on the side away from the back electrode layer.

[0093] It can be understood that the adhesive film is a high polymer material meeting the mechanical and electrical properties specified in GB / T 29848-2018, and contains at least one of thermoplastic polyolefin (TPO for short), ethylene-octene copolymer (POE for short), ethylene-vinyl acetate copolymer (EVA for short), thermoplastic polyurethane elastomer (TPU for short), and polyvinyl butyral (PVB for short).

[0094] In some embodiments, the buffer sub-layer covers the entire back electrode layer, and the busbar passes through the buffer sub-layer and is connected to the back electrode layer. The buffer sub-layer covering the entire back electrode layer can effectively alleviate the stress on the light-absorbing layer during lamination and use, and at the same time, the original film of the buffer sub-layer can be used to improve the sealing performance of the photovoltaic cell packaging after being cast and softened during lamination. The busbar passing through the buffer sub-layer and being connected to the back electrode layer can connect the busbar to the positive and negative electrodes of the photovoltaic cell and collect and transmit the current generated inside the photovoltaic cell. Optionally, the busbar includes at least two, and the two busbars are respectively used to connect the positive and negative electrodes of the back electrode layer.

[0095] It can be understood that the busbar passing through the buffer sub-layer can be a channel passing through the buffer sub-layer, or can be led out from the edge of the buffer sub-layer. Taking the channel passing through the buffer sub-layer as an example, during preparation, a channel can be formed on the original film of the buffer sub-layer after the original film of the buffer sub-layer is placed on the back electrode layer. Optionally, the "channel" can be a rectangle with a length of 2 millimeters (mm) to 12 mm and a width of 2 mm to 12 mm, or an ellipse with a major axis of 2 mm to 12 mm, or a circle with a diameter of 2 mm to 12 mm. Further, when the original film of the first insulating layer is placed, the original film of the first insulating layer can be placed between the channels of the original film of the buffer sub-layer, so that the original film of the first insulating layer as a whole has a shape with channels penetrating through the original film of the buffer sub-layer, to facilitate the passage of the busbar.

[0096] In some embodiments, the back electrode layer contains at least one of conductive metal, conductive non-metal, and conductive oxide. Optionally, the conductive metal is selected from at least one of Au, Ag, Cu, Al, Ni, Cr, Bi, Pt, Mg, Mo, W, and alloys thereof. The conductive non-metal is selected from C. The conductive oxide includes at least one of indium tin oxide (ITO for short), aluminum-doped zinc oxide (AZO for short), boron-doped zinc oxide (BZO for short), and indium zinc oxide (IZO for short). Optionally, the thickness of the back electrode layer is not particularly limited, and the electrode thickness commonly used in the art can be used, such as 20 nanometers (nm) to 200 nm, optionally, the thickness of the back electrode layer is 60 nm to 100 nm, and further optionally, the thickness of the back electrode layer is 70 nm to 90 nm.

[0097] In some embodiments, the photovoltaic cell further comprises a transparent electrode layer. The transparent electrode layer is located on the surface of the light absorbing layer away from the back electrode layer. Optionally, the material of the transparent electrode is selected from at least one of fluorine-doped tin oxide (FTO for short), indium tin oxide, aluminum-doped zinc oxide, boron-doped zinc oxide, indium zinc oxide, and indium tungsten oxide (IWO for short). Optionally, the thickness of the transparent electrode is 100-1000 nm, and further optionally, the thickness of the transparent electrode is 300-800 nm. It can be understood that the transparent electrode layer represents the electrode on the light-incoming side of the photovoltaic cell.

[0098] It can be understood that the photovoltaic cell further comprises a substrate. The transparent electrode layer can be formed on the substrate. The substrate includes a glass substrate and a flexible substrate. The material of the flexible substrate can be exemplified but is not limited to organic polymer materials. Further, the material of the flexible substrate can be mixed in different proportions by one or more of the following materials: polyvinyl alcohol (PVA for short), polyethylene terephthalate (PET for short), polyimide (PI for short), polyethylene naphthalate glycol (PEN for short), polydimethylsiloxane (PDMS for short), and the like.

[0099] In some embodiments, the light absorbing layer comprises a perovskite light absorbing layer. As a soft ionic crystal, the perovskite light absorbing layer has a large difference in the coefficient of thermal expansion with the insulating layer in the conventional packaging structure, such as the back electrode layer, the insulating layer, the two bus bars, the adhesive film, wherein one end of the two bus bars is connected to the positive and negative electrodes of the back electrode layer, respectively, and the remaining part is placed on the insulating layer to prevent the bus bar from being connected to the back electrode of other sub-cells to cause short circuit. In the packaging structure, the perovskite light absorbing layer is prone to damage due to the large stress during the use of the perovskite photovoltaic module, thereby reducing the photoelectric conversion efficiency of the photovoltaic module. Through the scheme of the present embodiment, the buffer adhesive layer can buffer the stress of the light absorbing layer during use, reduce the risk of damage to the light absorbing layer during use, and thereby improve the photoelectric conversion efficiency of the photovoltaic module. It can be understood that the scheme of the present application is not only applicable to photovoltaic cells with perovskite light absorbing layers, but also applicable to photovoltaic cells containing other photovoltaic absorbing layers that are prone to stress concentration and may cause damage to the functional layer.

[0100] In some embodiments, the photovoltaic cell comprises a perovskite cell or a stacked photovoltaic cell containing a perovskite cell. It can be understood that the stacked cell containing a perovskite cell includes a perovskite-crystalline silicon stacked cell, a perovskite-perovskite stacked cell, a perovskite-heterojunction stacked cell, etc. It can be understood that the stacked cell can be a two-layer, three-layer, four-layer, or more-layer stacked cell. Further, the connection mode between the stacked cells can be parallel or series connection.

[0101] In some embodiments, the perovskite cell further comprises a hole transport layer and an electron transport layer. The hole transport layer is located between the transparent electrode layer and the perovskite light-absorbing layer, and the electron transport layer is located between the back electrode layer and the perovskite light-absorbing layer, so as to form a trans- perovskite cell. Alternatively, the hole transport layer is located between the back electrode layer and the perovskite light-absorbing layer, and the electron transport layer is located between the transparent electrode layer and the perovskite light-absorbing layer, so as to form a cis- perovskite cell.

[0102] In some embodiments, the perovskite cell further comprises a metal fluoride layer. The metal fluoride layer is located between the electron transport layer and the back electrode layer. Alternatively, the metal fluoride layer is located between the electron transport layer and the transparent electrode layer. The provision of the metal fluoride layer can facilitate the extraction of electrons, thereby improving the photoelectric conversion efficiency of the perovskite photovoltaic module.

[0103] It can be understood that other functional layers, such as a modification layer, can also be introduced into the perovskite cell as needed. Optionally, the perovskite cell can be provided with a modification layer with a suitable energy level, which can play one or more of the following roles: reducing the energy level barrier, facilitating energy level matching, improving carrier extraction efficiency, passivating interface defect states, protecting the light-absorbing layer, inhibiting the oxidative decomposition of water molecules and oxygen on the cell, improving the photoelectric conversion efficiency, and improving the stability of the perovskite cell. Depending on the location of the modification layer, the types of modification layer can include a modification layer between the hole transport layer and the anode, a modification layer between the electron transport layer and the cathode, a modification layer between the hole transport layer and the perovskite layer, a modification layer between the electron transport layer and the perovskite layer, and the like. The materials that can be used for the modification layer in the perovskite cell can include, but are not limited to, Cu2O, NiO, AZO, TiO2, and the like.

[0104] It can be understood that the perovskite layer comprises a material with a chemical formula of ABX3 or A2CDX6. Wherein:

[0105] A is an inorganic or organic or organic-inorganic hybrid cation, comprising at least one of an organic amine cation, a Cs cation, a K cation, a Rb cation, and a Li cation; the organic amine cation is selected from (NR1R2R3R4) + , (R1R2N=CR3R4) + , (R1R2N-C(R5)=NR3R4) + , or (R1R2N-C(NR5R6)=R3R4) + , wherein R1, R2, R3, R4, R5, and R6 are each independently selected from H, a substituted or non-substituted C1-20 alkyl, or a substituted or non-substituted aryl; A is optionally a methylamine group (abbreviation: CH3NH3 + or MA + ), a formamidine group (abbreviation: HC(NH2)2 + or FA+ ), cesium ions (abbreviated as: Cs + ), and rubidium ions (abbreviated as: Rb + ), and further optionally a methylamine group or a formamidine group.

[0106] B is an inorganic or organic or organic-inorganic hybrid cation, including at least one of lead, tin, zinc, titanium, antimony, bismuth, nickel, iron, cobalt, silver, copper, gallium, germanium, magnesium, calcium, indium, aluminum, manganese, chromium, molybdenum, and europium, and optionally a divalent metal ion Pb 2+ and Sn 2+ .

[0107] C is an inorganic or organic or organic-inorganic hybrid cation, and optionally a monovalent metal ion Ag + , etc.

[0108] D is an inorganic or organic or organic-inorganic hybrid cation, and optionally a trivalent metal ion bismuth cation Bi 3+ , antimony cation Sb 3+ , indium cation In 3+ , etc.

[0109] X is an inorganic or organic or organic-inorganic hybrid anion, and optionally one or more of halogen anions and halogen-like anions, and further optionally bromide ions (abbreviated as: Br - ) or iodide ions (abbreviated as: I - ).

[0110] In some embodiments, the perovskite layer has a thickness of 100 nm to 1000 nm. For example, the perovskite layer can have a thickness of 100 nm, 200 nm, 300 nm, 400 nm, 500 nm, 600 nm, 700 nm, 800 nm, 900 nm, 1000 nm, or a range between any two of the above values.

[0111] In some embodiments, the perovskite layer has a band gap of 1.2 electron volts (abbreviated as: eV) to 2.3 eV. For example, the perovskite layer can have a band gap of 1.2 eV, 1.3 eV, 1.4 eV, 1.5 eV, 1.6 eV, 1.7 eV, 1.8 eV, 1.9 eV, 2 eV, 2.1 eV, 2.2 eV, 2.3 eV, or a range between any two of the above values. When the perovskite layer has a band gap within the above range, it can have a higher visible light absorption efficiency.

[0112] In some embodiments, the material of the electron transport layer can include, but is not limited to, one or more of the following materials and derivatives thereof: imide compounds, quinone compounds, fullerenes and derivatives thereof, methoxytriphenylamine-fluoroformamidine (abbreviation: OMeTPA-FA), calcium titanate (abbreviation: CaTiO3), lithium fluoride (abbreviation: LiF), calcium fluoride (abbreviation: CaF2), triphenylamine with triptycene as the core (abbreviation: H101), 3,4-ethylenedioxythiophene-methoxytriphenylamine (abbreviation: EDOT-OMeTPA), N-(4-aniline) carbazole-spirobifluorene (abbreviation: CzPAF-SBF), polythiophene, metal oxide, silicon oxide (abbreviation: SiO2), strontium titanate (abbreviation: SrTiO3), cuprous thiocyanate (abbreviation: CuSCN), and the like; wherein the metal element can include one or more of Mg, Ni, Cd, Zn, In, Pb, Mo, W, Sb, Bi, Cu, Hg, Ti, Ag, Mn, Fe, V, Sn, Zr, Sr, Ga, and Cr.

[0113] In some embodiments, the material of the hole transport layer can include, but is not limited to, one or more of the following materials and derivatives thereof: 2,2',7,7'-tetra[N,N-bis(4-methoxyphenyl)amino]-9,9'-spirobifluorene (abbreviation: Spiro-OMeTAD), polytriazole amine (abbreviation: PTAA), nickel oxide (abbreviation: NiO x ), poly(3,4-ethylenedioxythiophene): polystyrene sulfonate (abbreviation: PEDOT:PSS), poly(3-hexylthiophene) (abbreviation: P3HT), WO3, and the like materials that can transport holes and block electrons.

[0114] Please refer to FIG. 2, which is a cross-sectional view along the center position of the busbar, wherein the photovoltaic module 10 of an embodiment of the present application is shown. The photovoltaic module includes a substrate layer 101, a light-absorbing layer 102, a back electrode layer 103, a buffer sublayer 201, a first insulating layer 202, and a busbar 203. The buffer sublayer 201 and the first insulating layer 202 are located on the side of the back electrode layer 103 away from the light-absorbing layer 102, and the busbar 203 includes a connecting portion 2031 and a main body portion 2032. One end of the connecting portion 2031 is connected to the back electrode layer 103, and the other end is connected to the main body portion 2032. The main body portion 2032 is arranged on the side of the buffer layer away from the back electrode layer 103. By arranging the buffer layer, the stress of the light-absorbing layer 102 during lamination or use can be buffered, the risk of damage to the light-absorbing layer during lamination or use can be reduced, and the photoelectric conversion efficiency of the photovoltaic module 10 can be improved.

[0115] Referring to FIG. 3, it is a top view of one embodiment of the photovoltaic module 10 in FIG. 2, the buffer sublayer 201 covers part of the back electrode layer 103, and the first insulating layer 202 is arranged on the side of the buffer sublayer 201 away from the back electrode layer 103, for isolating the main body part 2032 of the busbar from the back electrode layers of other subcells. It can be understood that other subcells are not shown in the figure. It can also be understood that, in order to further improve the sealing performance of the photovoltaic module package, a film layer is arranged on the photovoltaic module to improve the stability of the photovoltaic module during use.

[0116] Referring to FIG. 4, it is a top view of another embodiment of the photovoltaic module 10 in FIG. 2, the buffer sublayer 201 covers the entire back electrode layer 103, and the first insulating layer 202 is arranged on the side of the buffer sublayer 201 away from the back electrode layer 103, for isolating the main body part 2032 of the busbar from the back electrode layers of other subcells, and the busbar 203 passes through the buffer sublayer 201 and the back electrode layer 103 to be connected to the positive electrode and the negative electrode of the photovoltaic cell 10, so as to collect the current generated in the photovoltaic cell and transmit it outward. It can be understood that other subcells are not shown in the figure. It can also be understood that, in the embodiment, the buffer sublayer 201 covers the entire back electrode layer, and the original film of the buffer sublayer 201 can be used to improve the sealing performance of the photovoltaic cell 10 package after being cast and softened during the subsequent lamination process, thereby playing the role of a film. In this implementation manner, in order to reduce the thickness of the battery module or simplify the preparation process and cost, the side of the busbar 203 away from the back electrode layer 103 does not need to be paved with a film. It can be further understood that, according to actual needs, a person skilled in the art can pave a film on the side of the busbar 203 away from the back electrode layer 103, to further improve the sealing performance of the package.

[0117] It can be understood that, in FIGS. 2 to 4, the buffer layer structure is taken as an example of the buffer sublayer and the first insulating layer, and when the buffer sublayer and the first insulating layer are combined into a second insulating layer or the buffer material and the insulating material are combined into a second insulating layer, the purpose of buffering the stress on the light-absorbing layer can also be achieved. A person skilled in the art can select according to actual conditions, and details are not described herein.

[0118] In some embodiments, the photovoltaic module 10 is a perovskite photovoltaic module, which includes a perovskite cell, and the light-absorbing layer 102 is a perovskite light-absorbing layer.

[0119] In some embodiments, the perovskite cell further includes a transparent electrode layer, a hole transport layer, and an electron transport layer, and the transparent electrode layer is used to receive incident light.

[0120] In some embodiments, the hole transport layer is located between the transparent electrode layer and the perovskite light-absorbing layer, and the electron transport layer is located between the back electrode layer and the perovskite light-absorbing layer. At this time, the perovskite cell is a reverse perovskite cell.

[0121] In some embodiments, a hole transport layer is located between the back electrode layer and the perovskite layer, and an electron transport layer is located between the transparent electrode layer and the perovskite layer. In this case, the perovskite cell is a formal perovskite cell.

[0122] Further, the perovskite cell further comprises a stacked cell comprising at least one perovskite cell, such as a perovskite-perovskite stacked cell, a perovskite-crystalline silicon stacked cell, a perovskite-heterojunction stacked cell, etc. The number of single-junction cells included in the stacked cell can be 2, 3, 4, etc., which can be set by a person skilled in the art according to actual conditions and requirements.

[0123] The application also provides a preparation method of the above-mentioned photovoltaic module. The preparation method of the photovoltaic module comprises the following steps: sequentially forming a precursor film of a buffer layer on a surface of a back electrode layer of a photovoltaic cell; laying a busbar at the back electrode layer, a first part of the busbar being connected with the back electrode layer, and a second part of the busbar being arranged on a side of the buffer layer away from the back electrode layer to obtain a pre-product; and performing a lamination treatment on the pre-product.

[0124] It can be understood that, for the scheme in which the buffer layer comprises a buffer sublayer and a first insulating layer, during the lamination treatment, the precursor film of the buffer sublayer is softened and cast under the lamination conditions to form the buffer sublayer. The buffer sublayer can buffer the stress of the perovskite layer. Optionally, the precursor film of the buffer sublayer comprises at least one of a TPO film, a POE film, an EVA film, a TPU film, and a PVB film.

[0125] Further, for the scheme in which the buffer layer comprises a buffer sublayer and a first insulating layer, the buffer sublayer precursor film covers part of the back electrode layer. Before lamination, a precursor film of an adhesive film covering the entire back electrode layer is laid before lamination of the pre-product, and the precursor film of the adhesive film is softened and cast under the lamination conditions to improve the sealing property of the encapsulation. Optionally, the precursor film of the adhesive film comprises at least one of a TPO film, a POE film, an EVA film, a TPU film, and a PVB film.

[0126] Further, for the scheme in which the buffer layer comprises a buffer sublayer and a first insulating layer, the buffer sublayer precursor film covers the entire back electrode layer. The buffer sublayer precursor film covers the entire back electrode layer, and the precursor film of the buffer sublayer is softened and cast under the lamination conditions to form the buffer sublayer. The buffer sublayer can buffer the stress of the perovskite layer, and can also improve the sealing property of the encapsulation. Optionally, the precursor film of the buffer sublayer comprises at least one of a TPO film, a POE film, an EVA film, a TPU film, and a PVB film.

[0127] Further, the original film of the first insulating layer can not need to cover the surface of the back electrode layer as a whole, but only need to cover the original film of the buffer sub-layer at the position corresponding to the back electrode layer to prevent the bus bar from contacting the back electrode of the middle sub-cell to cause short circuit. Alternatively, the original film of the first insulating layer is a patterned original film, and the pattern of the original film is the same as the patterned shape of the back electrode layer. Further alternatively, the original film of the first insulating layer includes at least one of a PI film and a PET film.

[0128] In some embodiments, the buffer layer includes a second insulating layer containing a stress buffering material. During the laminating process, the stress buffering material softens and flows under the laminating conditions, so as to buffer the stress of the perovskite layer. Alternatively, the original film of the second insulating layer includes a polyimide-polyethylene composite film.

[0129] In some embodiments, before placing the original film of the buffer layer, the bus bars are respectively led out from the positive and negative electrodes of the back electrode layer. After placing the original film of the buffer layer, the bus bars are led out from the channels, and the led-out bus bars are placed on the surface of the original film of the buffer layer.

[0130] In some embodiments, before placing the original film of the buffer layer, after the bus bars are respectively led out from the positive and negative electrodes of the back electrode layer, butyl glue is pasted on the edge of the photovoltaic module. The butyl glue can seal the photovoltaic module to a certain extent. It can be understood that when the butyl glue is pasted, a glue overflow space is reserved on the surface with the back electrode layer.

[0131] It can be understood that before the laminating process, the surface of the pre-product with the bus bars is covered with tempered glass as a cover plate, and the cover plate has channels. Then, the bus bars are led out from the channels on the cover plate. Alternatively, the channels can be through holes on the cover plate glass, or can be one side of the cover plate glass, which can lead the bus bars out of the module. The present application does not limit the cover plate glass and the leading-out of the bus bars.

[0132] In some embodiments, after laminating, a junction box is arranged on the photovoltaic module. The junction box shell can be first fixed on the photovoltaic module by adhesive glue, and then the bus bars are welded at the welding position in the junction box. Then, the silicone gel is injected into the junction box shell. After the silicone gel is solidified, the top cover of the junction box is installed on the junction box shell.

[0133] In some embodiments, the photovoltaic module can also not be provided with a junction box, as long as the bus bars can form a path to output power to the load through any safe power connection form.

[0134] The present application also provides a power utilization device in an embodiment. The power utilization device includes the photovoltaic module.

[0135] The application also provides a power generation device. The power generation device comprises the photovoltaic module.

[0136] In some embodiments, the photovoltaic module can be used as a power generation device of an electric device. The type of the power generation device can include, but is not limited to, integrated power generation. The location of the power generation device can include, but is not limited to, the roof of a car, a backboard, and the like.

[0137] Further, the electric device can include, but is not limited to, a mobile device such as a mobile phone, a notebook computer, and the like, an electric vehicle, an electric train, a ship and a satellite, a power generation system, and the like.

[0138] The application also provides a photovoltaic system. The photovoltaic system comprises the photovoltaic module.

[0139] In order to make the technical problems, technical solutions and beneficial effects solved by the application clearer, the application will be further described in detail below in combination with embodiments and drawings. Obviously, the described embodiments are only a part of the embodiments of the application, rather than all the embodiments. The following description of at least one exemplary embodiment is merely illustrative in nature and in no way should be taken as any limitation on the application and its applications. Based on the embodiments in the application, all other embodiments obtained by those of ordinary skill in the art without creative labor fall within the scope of protection of the application.

[0140] Unless otherwise specified in the embodiments, the technology or conditions are performed according to the technology or conditions described in the literature in the art or according to the product manual. Unless otherwise specified, the reagents or instruments used are conventional products that can be obtained by market purchase.

[0141] Embodiment 1

[0142] In this embodiment, the perovskite battery comprises an FTO transparent electrode layer with a thickness of 500 nm, a nickel oxide hole transport layer with a thickness of 20 nm, a Cs 0.05 FA 0.95 a PbI3 perovskite layer, a C60 electron transport layer with a thickness of 20 nm, and a Cu back electrode layer with a thickness of 100 nm. During the preparation process, P1 scribe, P2 scribe and P3 scribe are performed to divide the battery into multiple sub-batteries. The P1 scribe penetrates the FTO transparent electrode layer to the surface of the substrate, the P2 scribe penetrates the electron transport layer, the perovskite layer to the upper surface of the hole transport layer from the surface of the electron transport layer, and the P3 scribe penetrates the back electrode layer, the electron transport layer, the perovskite layer, the hole transport layer to the upper surface of the FTO electrode layer from the surface of the back electrode layer.

[0143] In this embodiment, the preparation method of the perovskite photovoltaic module is as follows:

[0144] S101: Lead out copper strips as busbars from the positive and negative electrodes of the Cu back electrode layer.

[0145] S102: Paste black butyl glue on the outer edge of the Cu back electrode layer, leaving a part of the glue overflow space.

[0146] S103: Place a rectangular TPO film with a thickness of 0.45 mm covering the entire back electrode on the surface of the Cu back electrode layer, which is the buffer sublayer original film, and open a rectangular channel with a length of 6 mm and a width of 6 mm on both sides of the TPO film by a puncher.

[0147] S104: Place and paste a dark brown PI insulating tape with a thickness of 25 μm and a width of 8 mm between the adjacent channels of the TPO film, which is the first insulating layer.

[0148] S105: Lead out two busbar copper strips from the channels of the TPO film, respectively, with one end of each copper strip connected to the positive and negative electrodes of the Cu back electrode, respectively, and the remaining copper strips placed on the surface of the PI insulating tape, with the other end of each copper strip bent upwards and the two copper strips not in contact, the position of the upward bent part of the copper strip corresponding to the opening position of the cover glass, so as to collect and lead out the current of the perovskite battery through the copper strip.

[0149] S106: Cover the product surface with tempered glass having an opening as a cover plate, and lead out the part of the two copper strips bent upwards from the opening of the tempered glass.

[0150] S107: Vacuum laminating treatment is performed on the product obtained in S106 at 120°C, and then removed and cooled.

[0151] S108: After cooling, install the junction box.

[0152] Example 2

[0153] The perovskite battery in this example is the same as in Example 1. The difference between the preparation process of the photovoltaic module and Example 1 is:

[0154] S101: Lead out copper strips as busbars from the positive and negative electrodes of the Cu back electrode layer.

[0155] S102: Paste black butyl glue on the outer edge of the Cu back electrode layer, leaving a part of the glue overflow space.

[0156] S103: Place a rectangular TPO film with a thickness of 0.45 mm covering the entire back electrode on the surface of the Cu back electrode layer, which is the buffer sublayer original film, and open a rectangular channel with a length of 6 mm and a width of 6 mm on both sides of the TPO film by a puncher.

[0157] S104: A black PI insulation tape with a thickness of 25 pm and a width of 8 mm, i.e., a first insulation layer, is placed between adjacent channels of the TPO film.

[0158] S105: Two copper bus bars are respectively led out from the channels of the TPO film, one end of each of the two copper bus bars is connected to the positive and negative electrodes of the Cu back electrode respectively, and the remaining copper bus bars are placed on the surface of the PI insulation tape, the other end of each of the two copper bus bars is bent upward, and the two copper bus bars do not contact each other, the position of the upward bent part of the copper bus bar corresponds to the position of the opening of the cover glass, so as to collect and lead out the current of the perovskite battery through the copper bus bar.

[0159] S106: A rectangular TPO film with a thickness of 0.45 mm, i.e., a film layer, is covered on the preform obtained in S105 to cover all the back electrodes, and two holes for leading out the copper bus bars are reserved on the TPO film.

[0160] S107: A tempered glass with an opening is covered on the surface of the product with the copper bus bars as a cover plate, and the upward bent part of the two copper bus bars is led out from the opening of the tempered glass.

[0161] S108: The product obtained in S107 is subjected to vacuum lamination treatment at 120°C, and then taken out and cooled.

[0162] S109: After cooling, the junction box is installed.

[0163] Example 3

[0164] In this embodiment, the perovskite battery is the same as that in Example 1. The difference between the preparation process of the photovoltaic module and that in Example 1 is that:

[0165] S101: Copper bus bars are respectively led out from the positive and negative electrodes of the Cu back electrode layer as bus bars.

[0166] S102: Black butyl glue is pasted on the outer edge of the Cu back electrode layer, and a part of the glue overflow space is reserved.

[0167] S103: A rectangular PI-PE composite film with a thickness of 0.1 mm and a width of 8 mm, i.e., a second insulation layer, is placed on the surface of the Cu back electrode layer to cover the back electrode.

[0168] S104: Two copper bus bars are respectively led out from the second insulation layer film, one end of each of the two copper bus bars is connected to the positive and negative electrodes of the Cu back electrode respectively, and the remaining copper bus bars are placed on the surface of the second insulation layer film, the other end of each of the two copper bus bars is bent upward, and the two copper bus bars do not contact each other, the position of the upward bent part of the copper bus bar corresponds to the position of the opening of the cover glass, so as to collect and lead out the current of the perovskite battery through the copper bus bar.

[0169] S105: A rectangular TPO film with a thickness of 0.45 mm, i.e. a buffer sublayer original film, is covered on the entire back electrode of the preform obtained in S104, and two copper strip leading holes are reserved on the TPO film;

[0170] S106: A tempered glass with an opening is covered on the surface of the product with the copper strip as a cover plate, and the part of the two copper strips bent upward is led out from the opening of the tempered glass.

[0171] S107: The product obtained in S106 is subjected to vacuum lamination treatment at 120°C, and then taken out and cooled.

[0172] S108: After cooling, the junction box is installed.

[0173] Comparative Example 1

[0174] In this comparative example, the structure and parameters of the perovskite battery are the same as those in Example 1.

[0175] In this comparative example, the preparation method of the perovskite photovoltaic module is as follows:

[0176] S101: Two copper strips are led out from the positive and negative electrodes of the Cu back electrode layer as busbars, i.e. one end of the two copper strips is connected with the positive and negative electrodes of the Cu back electrode layer, respectively.

[0177] S102: Black butyl adhesive is pasted on the outer edge of the Cu back electrode layer, and a part of the adhesive overflow space is reserved.

[0178] S103: A tea-colored PI insulating adhesive tape with a thickness of 25 μm and a width of 8 mm is pasted on the surface of the Cu back electrode layer.

[0179] S104: The two copper strips are placed on the surface of the insulating adhesive tape to prevent the copper strips from contacting the back electrode of the middle subcell of the perovskite battery; the other end of the two copper strips is bent upward respectively and the two copper strips do not contact, and the position of the upward bent part of the copper strip corresponds to the opening of the subsequent TPO and the opening position of the cover glass.

[0180] S105: A rectangular TPO film with a thickness of 0.45 mm is placed on the surface of the copper strip to cover the entire back electrode, and two holes with a spacing of 22 mm are made on the TPO film by a punch machine, and the one end of the two copper strips bent upward is led out from the two holes, respectively.

[0181] S106: A tempered glass with an opening is covered on the surface of the product with the copper strip as a cover plate, and the copper strip is led out from the opening of the tempered glass.

[0182] S107: The product obtained in S106 is subjected to vacuum lamination treatment at 120°C, and then taken out and cooled.

[0183] S108: Install the junction box after cooling.

[0184] Comparative Example 2

[0185] The structure and parameters of the perovskite battery in the present comparative example are the same as those in Example 1.

[0186] The preparation method of the perovskite photovoltaic module in the present comparative example is as follows:

[0187] S101: Lead out the copper belts on the positive and negative electrodes of the Cu back electrode layer as busbars, that is, one end of each of the two copper belts is connected to the positive and negative electrodes of the Cu back electrode layer.

[0188] S102: Paste black butyl glue on the outer edge of the Cu back electrode layer, leaving a part of the glue overflow space.

[0189] S103: Place a rectangular TPO film with a thickness of 0.45 mm covering the entire back electrode on the surface of the copper belt, and make two holes with a spacing of 22 mm on both sides of the TPO film by using a hole puncher, and then bend one end of each of the two copper belts upward and lead them out from the two holes, respectively, and lay the two copper belts on the surface of the TPO film, and bend the other end of each of the two copper belts upward without contacting each other, and the position of the upward bending part of the copper belt corresponds to the position of the hole in the cover glass.

[0190] S104: Cover the product with TPO film with tempered glass having holes as a cover plate, and lead the copper belts out from the holes in the tempered glass.

[0191] S105: Perform vacuum lamination treatment on the product obtained in S104 at 120°C, and then take it out for cooling.

[0192] S106: Install the junction box after cooling.

[0193] Test Example

[0194] (1) Perform the thermal cycle test MQT 11 specified in the IEC 61215-2:2021 standard on the perovskite photovoltaic modules obtained in the examples and comparative examples. The test method is as follows: install the perovskite photovoltaic module into a thermal cycle test box, install a temperature sensor at the center of the back of the module, hang a weight of 5N on the junction box, connect the positive and negative electrodes of the junction box to the current source of the test box to monitor whether a circuit breaking phenomenon occurs during the test, close the door of the thermal cycle test box, and start the cycle between the sensor measured temperature of -40±2℃ and 85±2℃, the temperature change rate during the temperature rising and falling stages is 1.5 degrees Celsius per minute (abbreviated as: ℃ / min), the temperature of the module should be maintained for 70 minutes (abbreviated as: min) at each extreme condition, the cycle period is 5 hours (abbreviated as: h), and the module is taken out after 200 cycles. Calculate the light-to-electricity conversion efficiency loss rate before and after the cycle by current-voltage (abbreviated as: I-V) characteristic curve test. The results are shown in Table 1.

[0195] Table 1

[0196] As can be seen from Table 1, the perovskite photovoltaic module in Example 1 has a lower light-to-electricity conversion efficiency loss rate compared with the comparative examples, indicating that the structural design of the perovskite photovoltaic module in Example 1 can improve the light-to-electricity conversion efficiency of the photovoltaic module.

[0197] The photovoltaic module in Comparative Example 2 has internal short circuit, and the module cannot work normally. Therefore, in Table 1, the light-to-electricity conversion efficiency and the light-to-electricity conversion efficiency loss rate of Comparative Example 2 are represented by “ / ”.

[0198] (2) The surface state of the perovskite photovoltaic module before and after the thermal cycle test was tested by fluorescence spectrum PL, and the results are shown in Figures 5-7. Among them, Figure 5 is the surface state diagram of the perovskite photovoltaic module in Example 1 before and after thermal cycle, Figure 5(a) is the state diagram before thermal cycle, and Figure 5(b) is the state diagram after 200 cycles of thermal cycle. Figure 6 is the surface state diagram of the perovskite photovoltaic module in Comparative Example 1 before and after thermal cycle, Figure 6(a) is the state diagram before thermal cycle, and Figure 6(b) is the state diagram after 200 cycles of thermal cycle. Figure 7 is the surface state diagram of the perovskite photovoltaic module in Comparative Example 2 before thermal cycle.

[0199] In Figures 5-6, the position of the dashed line box represents the position of the PI tape, as can be seen from Figure 6(a), in Comparative Example 1, before thermal cycle, there is obvious additional color change at the position of the dashed line box, and the actual photo is yellow at this position. The reason is that the thermal expansion and contraction caused by the temperature rising and falling process in the process of “120°C vacuum lamination and taking out and cooling” has caused a certain degree of deterioration of the battery structure. As can be seen from Figure 6(b), after thermal cycle, the position of the dashed line box is relatively obviously black, which indicates that the carrier yield at this position is significantly reduced. As can be seen from Figure 5(a), in Example 1, before thermal cycle, the PL spectrum is uniform, i.e. there is no additional yellow phenomenon at the position of the dashed line box as in Comparative Example 1, and the reason is that the process of “120°C vacuum lamination and taking out and cooling” does not cause negative effects on the device below the tape. As can be seen from Figure 5(b), after thermal cycle, the position of the dashed line box does not have the obvious blackening phenomenon as in Comparative Example 1, which indicates that thermal cycle does not cause the carrier yield of the perovskite layer below the tape to decrease. As can be seen from Figures 5 and 6, the perovskite photovoltaic device in Example 1 has better performance. As can be seen from Figure 7, when no insulating tape is used, short circuit will occur, the surface is completely black, and the photovoltaic module cannot work.

[0200] (3) Test the cross-sectional morphology of the perovskite cell before lamination and the cross-sectional morphology of the perovskite cell after the perovskite photovoltaic module is thermal cycled for 200 cycles, and the results are shown in FIGS. 8-11. FIG. 8 is a cross-sectional view of the perovskite cell before lamination in Example 1. It can be understood that the perovskite cells before lamination in the examples and comparative examples are the same batch of perovskite cells under the same qualified standard, and therefore, the cross-sections of the perovskite cells before lamination in the examples and comparative examples are similar. FIG. 9 is a cross-sectional view of the perovskite cell after the perovskite photovoltaic module in Example 1 is thermal cycled for 200 cycles. FIG. 10 is a cross-sectional view of the perovskite cell after the perovskite photovoltaic module in Comparative Example 1 is thermal cycled for 200 cycles. FIG. 11 is a cross-sectional view of the perovskite cell after the perovskite photovoltaic module in Comparative Example 2 is thermal cycled for 200 cycles.

[0201] As can be seen from FIG. 8, the perovskite layer 102 of the perovskite cell before lamination has a relatively complete structure. As can be seen from FIG. 9, after thermal cycling in Example 1, the perovskite layer 102 of the perovskite cell has a relatively complete structure. As can be seen from FIG. 10, after thermal cycling in Comparative Example 1, the perovskite layer 102 of the perovskite cell has a poor integrity and severe degradation occurs. As can be seen from FIG. 11, after thermal cycling in Comparative Example 2, the perovskite layer 102 of the perovskite cell also has severe degradation. As can be seen from FIGS. 8-11, the structure of the perovskite module in Example 1 can reduce the risk of damage to the perovskite layer 102 in the perovskite cell.

[0202] In addition, it is found through tests that when the buffer sublayer has a thickness of 5-600 μm, an elastic modulus of 10-100 MPa, a yield strength of 1-40 MPa, and a Vicat softening point temperature of 37-100 °C, and the buffer sublayer contains at least one of thermoplastic polyolefin, ethylene-vinyl acetate copolymer, thermoplastic polyurethane elastomer, and polyvinyl butyral; the first insulating layer has a Vicat softening point temperature of 125-450 °C and a thickness of 10-100 μm, and the first insulating layer contains at least one of polyimide and polyethylene terephthalate; or the second insulating layer has a Vicat softening point temperature of 125-450 °C and a thickness of 10-100 μm, and the first insulating layer contains at least one of polyimide and polyethylene terephthalate, the scheme according to the present application can effectively reduce the risk of damage to the light-absorbing layer of the photovoltaic cell during lamination / use.

[0203] The technical features of the above-described examples can be combined in any manner. To make the description concise, not all possible combinations of the technical features in the above-described examples are described, but as long as the combinations of the technical features do not contradict each other, they should be considered within the scope of the present disclosure.

[0204] The above-described embodiments are merely illustrative of several embodiments of the present application, which are described in more detail and in a specific and detailed manner, but should not be construed as limiting the scope of the patent. It should be noted that for those skilled in the art, several modifications and improvements can be made without departing from the concept of the present application, and these are all within the scope of the present application. Therefore, the scope of protection of the patent of the present application should be subject to the appended claims.

Claims

1. A photovoltaic module comprising a photovoltaic cell, a buffer layer, and a busbar; the photovoltaic cell comprises a light-absorbing layer and a back electrode layer arranged in a stacked manner; the buffer layer is located on a side of the back electrode layer away from the light-absorbing layer; the busbar comprises a connecting portion and a main portion, one end of the connecting portion is connected to the back electrode layer, and the other end is connected to the main portion, and the main portion is arranged on a side of the buffer layer away from the back electrode layer.

2. The photovoltaic module according to claim 1, wherein: The buffer layer satisfies at least one of the following characteristics: (1) The buffer layer includes a buffer sublayer and a first insulating layer that are stacked, the buffer sublayer covers part or all of the back electrode layer, and the first insulating layer is arranged between the buffer sublayer and the main body of the busbar; (2) The buffer layer includes a second insulating layer, and the second insulating layer includes an insulating material and a material capable of buffering stress.

3. The photovoltaic module according to claim 2, wherein: The buffer sublayer satisfies at least one of the following characteristics: (1) The thickness of the buffer sublayer is 5 μm to 600 μm; (2) The elastic modulus of the buffer sublayer is 10 MPa to 100 MPa; (3) The yield strength of the buffer sublayer is 1 MPa to 40 MPa; (4) The Vicat softening point temperature of the buffer sublayer is 37°C to 100°C; (5) The buffer sublayer comprises at least one of thermoplastic polyolefin, ethylene-vinyl acetate copolymer, thermoplastic polyurethane elastomer and polyvinyl butyral.

4. The photovoltaic module according to claim 3, wherein: The thermoplastic polyolefin includes at least one of polypropylene, polyethylene and ethylene-octene copolymer.

5. The photovoltaic module according to any one of claims 2 to 4, wherein: The buffer sublayer covers the entire back electrode layer, and the busbar passes through the buffer sublayer and is connected to the back electrode layer. The photovoltaic module according to claim 2, wherein: The material capable of buffering stress satisfies at least one of the following characteristics: (1) The elastic modulus of the material capable of buffering stress is 10 MPa to 100 MPa; (2) The yield strength of the material capable of buffering stress is 1 MPa to 40 MPa; (3) The Vicat softening point temperature of the material capable of buffering stress is 37° C. to 100° C.; (4) The material capable of buffering stress includes at least one of thermoplastic polyolefin, ethylene-vinyl acetate copolymer, thermoplastic polyurethane elastomer and polyvinyl butyral.

7. The photovoltaic module according to claim 6, wherein: The thermoplastic polyolefin includes at least one of polypropylene, polyethylene and ethylene-octene copolymer.

8. The photovoltaic module according to any one of claims 2 to 7, wherein: The first insulating layer or the second insulating layer satisfies at least one of the following characteristics: (1) The Vicat softening point temperature of the first insulating layer or the second insulating layer is 125° C. to 450° C.; (2) The thickness of the first insulating layer or the second insulating layer is 10 μm to 100 μm; (3) The first insulating layer or the second insulating layer includes at least one of polyimide and polyethylene terephthalate.

9. The photovoltaic module according to any one of claims 2 to 8, wherein: Any one or more of the buffer sublayer, the first insulating layer, and the second insulating layer has an adhesive surface, and the adhesive surface faces the back electrode layer.

10. The photovoltaic module according to any one of claims 1 to 9, wherein: A glue film layer is laid on a side of the current bus away from the back electrode layer, and the glue film layer covers the photovoltaic cell.

11. The photovoltaic module according to any one of claims 1 to 10, wherein: The busbars include at least two, which are respectively used to connect the positive electrode and the negative electrode of the back electrode layer.

12. The photovoltaic module according to any one of claims 1 to 11, wherein: The light absorbing layer includes a perovskite light absorbing layer.

13. The photovoltaic module according to claim 12, wherein: The photovoltaic cell includes a perovskite cell or a stacked photovoltaic cell containing a perovskite cell.

14. A method for preparing the photovoltaic module according to any one of claims 1 to 13, comprising the following steps: forming an original film of the buffer layer on the surface of the back electrode layer of the photovoltaic cell; Laying the busbar on the back electrode layer, with the connecting portion of the busbar connected to the back electrode layer, and the main body of the busbar being arranged on a side of the buffer layer away from the back electrode layer, to obtain a pre-finished product; The prefabricated product is subjected to a lamination process.

15. The preparation method according to claim 14, wherein Before lamination, an original film of an adhesive film layer is laid on a side of the current bus away from the back electrode layer.

16. An electrical device comprising the photovoltaic assembly according to any one of claims 1 to 13.

17. A power generation device comprising the photovoltaic module according to any one of claims 1 to 13.

18. A photovoltaic system comprising the photovoltaic module according to any one of claims 1 to 13.

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