Magnetic storage bit and manufacturing method therefor, and magnetic memory

Abstract

The present disclosure provides a magnetic storage bit and a manufacturing method therefor, and a magnetic memory. The magnetic storage bit comprises: an orbit layer; a magnetic tunnel junction, provided with a plurality of functional layers, wherein the plurality of functional layers have a plurality of projections on the orbit layer, the projection of the functional layer having the minimum projection area has a first length in a first direction and a second length in a second direction, the first length is at least twice the second length, the first direction is perpendicular to the second direction, the magnetic tunnel junction is located on one side of the orbit layer, and the direction of the magnetic tunnel junction towards the orbit layer is the stacking direction of the plurality of functional layers; an isolation layer; and a plurality of top electrodes, arranged at intervals in the first direction, wherein the plurality of top electrodes penetrate through an insulating layer and are in contact with the orbit layer. By making the first length of the magnetic tunnel junction at least twice the second length, the distance between the plurality of top electrodes in the magnetic storage bit and through vias of the orbit layer increases, thereby reducing the process difficulty of a metal interconnect.

Description

Magnetic storage bit, method of manufacturing the same, and magnetic memory

[0001] Cross-reference to Related Applications

[0002] This application claims priority to the Chinese patent application No. 2024104785936, filed on April 19, 2024, entitled “Magnetic storage bit, method of manufacturing the same, and magnetic memory”, the entire content of which is incorporated herein by reference. TECHNICAL FIELD

[0003] The present disclosure relates to the technical field of magnetic storage, and in particular, to a magnetic storage bit, a method of manufacturing the same, and a magnetic memory. BACKGROUND

[0004] In the manufacturing of a conventional spin-orbit-torque magnetic random access memory (SOT-MRAM) with a top pinning structure, it is difficult to accurately stop on the track layer when etching a magnetic tunnel junction (MTJ), and there is a problem of great difficulty in manufacturing the magnetic random access memory due to a too small MTJ etching window. Although the SOT-MRAM with a bottom pinning structure can solve the above problem of the MTJ etching window of the SOT-MRAM with the top pinning structure, there is still a problem of great difficulty in the subsequent metal interconnection process due to a small etching window of the top via of the magnetic storage bit. SUMMARY

[0005] The present disclosure provides a magnetic storage bit, a method of manufacturing the same, and a magnetic memory to solve the problem of a small etching window of the top via of the magnetic storage bit with the bottom pinning structure and great difficulty in the metal interconnection process in the related art.

[0006] According to an aspect of the present disclosure, a magnetic storage bit is provided, comprising: a track layer; a magnetic tunnel junction having a plurality of functional layers, the plurality of functional layers having a plurality of projections on the track layer, wherein a functional layer with a smallest projection area has a first length in a first direction and a second length in a second direction, the first length being at least twice the second length, the first direction being perpendicular to the second direction, the magnetic tunnel junction being located on one side of the track layer, and a direction of the magnetic tunnel junction pointing to the track layer being a layer stacking direction of the plurality of functional layers; an isolation layer located on a side of the magnetic tunnel junction away from the track layer; and a plurality of top electrodes arranged at intervals along the first direction on a side of the track layer away from the magnetic tunnel junction, the plurality of top electrodes penetrating the isolation layer and contacting the track layer.

[0007] In some embodiments, the ratio of the first length to the second length is 1:2-1:10.

[0008] In some embodiments, the magnetic storage bit further comprises a buffer layer between the track layer and the top electrode, and connecting the track layer and the top electrode; or the magnetic storage bit further comprises a ferromagnetic layer between the track layer and the top electrode, and connecting the track layer and the top electrode.

[0009] In some embodiments, the magnetic storage bit further comprises a bottom electrode on a side of the magnetic tunnel junction away from the track layer, and in contact with the magnetic tunnel junction.

[0010] In some embodiments, the magnetic storage bit further comprises a magnetization layer between the bottom electrode and the magnetic tunnel junction, and connecting the bottom electrode and the magnetic tunnel junction.

[0011] In some embodiments, the magnetic storage bit further comprises a first insulating layer on a side of the track layer away from the magnetic tunnel junction, and part of the top electrode penetrates the first insulating layer.

[0012] According to another aspect of the present disclosure, there is provided a magnetic memory comprising at least one magnetic storage bit, the magnetic storage bit being the magnetic storage bit described above.

[0013] According to still another aspect of the present disclosure, there is provided a method for manufacturing a magnetic storage bit, the method comprising: providing a first substrate; forming a magnetic tunnel junction on a side of the first substrate, the magnetic tunnel junction having a plurality of functional layers; forming a track layer on a side surface of the magnetic tunnel junction, the track layer being on a side of the magnetic tunnel junction along a stacking direction of the plurality of functional layers, and the plurality of functional layers having a plurality of projections on the track layer, wherein a functional layer with a smallest projection area has a first length in a first direction and a second length in a second direction, and the first length is at least twice the second length; forming an isolation layer on a side surface of the isolation layer away from the track layer; and forming a plurality of top electrodes on a side surface of the isolation layer away from the track layer, the plurality of top electrodes being arranged at intervals along the side of the track layer in the first direction.

[0014] In some embodiments, the step of providing the first substrate comprises: providing a second substrate; sequentially forming a preliminary first sub-insulating layer, a preliminary first barrier layer and a preliminary second sub-insulating layer on a side surface of the second substrate, and performing etching treatment on the preliminary first sub-insulating layer, the preliminary first barrier layer and the preliminary second sub-insulating layer to form a first through hole, so as to obtain the first sub-insulating layer and the second sub-insulating layer in the first barrier layer and the second insulating layer; forming a bottom electrode in the first through hole, the bottom electrode being in contact with the magnetic tunnel junction; removing the second substrate to obtain the first substrate; and after the step of forming the magnetic tunnel junction, the bottom electrode is in contact with the magnetic tunnel junction.

[0015] In some embodiments, the step of forming the plurality of top electrodes comprises: forming a preliminary isolation layer on the track layer; performing etching treatment on the preliminary isolation layer to form a second through hole in the preliminary isolation layer to obtain the isolation layer; and filling the electrode material into the second through hole to obtain the top electrode.

[0016] The technical scheme of the present disclosure provides a magnetic storage bit, comprising a track layer, a magnetic tunnel junction and a plurality of top electrodes, wherein the magnetic tunnel junction has a plurality of functional layers, the plurality of functional layers have a plurality of projections on the track layer, the functional layer with the smallest projection area has a first length in a first direction and a second length in a second direction, the first length is at least twice the second length, the first direction is perpendicular to the second direction, the magnetic tunnel junction is located on one side of the track layer, and the direction of the magnetic tunnel junction pointing to the track layer is the stacking direction of the plurality of functional layers; an isolation layer is located on the side of the magnetic tunnel junction away from the track layer; and a plurality of top electrodes are arranged on the side of the track layer away from the magnetic tunnel junction and are spaced apart along the first direction, the plurality of top electrodes contact the track layer through the isolation layer. By making the first length of the magnetic tunnel junction in the first direction greater than or equal to twice the second length of the magnetic tunnel junction in the second direction, the spacing of the through holes between the plurality of top electrodes and the track layer of the magnetic storage bit can be increased, that is, the spacing between the top through holes is increased, the etching window of the top through holes is increased, and the difficulty of metal interconnection is reduced. BRIEF DESCRIPTION OF DRAWINGS

[0017] The accompanying drawings, which form a part of the disclosure, are intended to provide further understanding of the disclosure, and the illustrative embodiments of the present disclosure and their description serve the purpose of explaining the present disclosure. In the drawings:

[0018] FIG. 1 shows a cross-sectional structure schematic diagram of a magnetic storage bit structure provided in an embodiment of the present disclosure;

[0019] FIG. 2 shows an enlarged top view structure schematic diagram of a magnetic storage bit structure provided in an embodiment of the present disclosure;

[0020] FIG. 3 shows a cross-sectional structure schematic diagram of another magnetic storage bit structure provided in an embodiment of the present disclosure;

[0021] FIG. 4 shows a cross-sectional structure schematic diagram of still another magnetic storage bit structure provided in an embodiment of the present disclosure;

[0022] FIG. 5 shows a cross-sectional structure schematic diagram of still another magnetic storage bit structure provided in an embodiment of the present disclosure;

[0023] FIG. 6 shows a cross-sectional structure schematic diagram of still another magnetic storage bit structure provided in an embodiment of the present disclosure;

[0024] Fig. 7 shows a flow chart of a method for preparing a magnetic storage bit according to an embodiment of the present disclosure;

[0025] Fig. 8 shows a cross-sectional view of a substrate after a magnetic tunnel junction is prepared in a method for preparing a magnetic storage bit according to an embodiment of the present disclosure;

[0026] Fig. 9 shows a cross-sectional view of a substrate after a second substrate is provided and a first barrier layer, a second insulating layer, and a bottom electrode are formed in a method for preparing a magnetic storage bit according to an embodiment of the present disclosure;

[0027] Fig. 10 shows a cross-sectional view of a substrate after a track layer and a magnetic tunnel junction are formed on the substrate formed in Fig. 9;

[0028] Fig. 11 shows a cross-sectional view of a substrate after an insulating layer is formed on the track layer formed in Fig. 10;

[0029] Fig. 12 shows a cross-sectional view of a substrate after a top electrode is formed in the insulating layer formed in Fig. 11.

[0030] In the above drawings, the following reference signs are used: 10, track layer; 20, magnetic tunnel junction; 30, top electrode; 40, bottom electrode; 50, first insulating layer; 60, magnetization layer; 70, ferromagnetic layer; 80, buffer layer; 91, first sub-insulating layer; 92, second sub-insulating layer; 93, third sub-insulating layer; 94, fourth sub-insulating layer; 100, insulating layer; 101, first substrate; 102, second substrate; 110, first barrier layer; 120, second barrier layer; 130, third barrier layer. DETAILED DESCRIPTION

[0031] It should be noted that the embodiments and features of the present disclosure can be combined with each other without conflict. The present disclosure will be described in detail below with reference to the accompanying drawings and in conjunction with embodiments.

[0032] In order to enable those skilled in the art to better understand the present disclosure, the technical solutions in the embodiments of the present disclosure will be described clearly and completely below with reference to the accompanying drawings and in conjunction with the embodiments. Obviously, the described embodiments are only a part of the embodiments of the present disclosure, rather than all the embodiments. Based on the embodiments in the present disclosure, all other embodiments obtained by those skilled in the art without creative work should fall within the protection scope of the present disclosure.

[0033] It should be noted that the terms "first", "second", and the like in the description and claims of the present disclosure and the above drawings are used to distinguish similar objects, and do not necessarily indicate a specific order or sequence. It should be understood that the data thus used can be interchanged under appropriate circumstances, so that the embodiments of the present disclosure described herein can be implemented. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion, for example, a process, method, system, product or device that includes a series of steps or units does not necessarily have to be limited to those steps or units clearly listed, but can include other steps or units not clearly listed or inherent to these processes, methods, products or devices.

[0034] In the prior art, in the manufacture of spin orbit torque magnetic random access memory (SOT-MRAM), it is difficult to accurately stop on the track layer when etching the top electrode in the magnetic storage bit, the magnetic storage bit etching window is too small, and the manufacturing process of the magnetic random access memory is difficult.

[0035] Therefore, the present disclosure studies the above problems and proposes a magnetic storage bit, as shown in FIGS. 1-6, comprising: a track layer 10; a magnetic tunnel junction 20 having a plurality of functional layers, the plurality of functional layers having a plurality of projections on the track layer 10, wherein the functional layer with the smallest projection area has a first length in a first direction X and a second length in a second direction Y, the first length is at least twice the second length, the first direction X is perpendicular to the second direction Y, the magnetic tunnel junction 20 is located on one side of the track layer 10, and the direction of the magnetic tunnel junction 20 pointing to the track layer 10 is the stacking direction of the plurality of functional layers; an isolation layer 100 located on the side of the magnetic tunnel junction 20 away from the track layer 10; a plurality of top electrodes 30 arranged on the side of the track layer 10 away from the magnetic tunnel junction 20 and spaced apart along the first direction X, the plurality of top electrodes 30 penetrating the isolation layer 100 and contacting the track layer 10.

[0036] The present disclosure increases the spacing of the through holes between the plurality of top electrodes 30 provided on the magnetic tunnel junction 20 and the track layer 10 by introducing a magnetic tunnel junction 20 with a certain aspect ratio in the magnetic storage bit, i.e. increasing the spacing between the top through holes, thereby also reducing the difficulty of metal interconnection.

[0037] In the optional embodiment described above, as shown in FIG. 1 and FIG. 2, the magnetic storage bit includes a track layer 10, a magnetic tunnel junction 20, and a plurality of top electrodes 30, wherein the magnetic tunnel junction 20 has a plurality of functional layers, the functional layers include a barrier layer, a free layer, and a reference layer, the stacking direction of the three layers is set as the third direction, the track layer 10 is on one side of the magnetic tunnel junction 20 in the third direction, the plurality of top electrodes 30 are arranged on the surface of the track layer 10 away from the magnetic tunnel junction 20 and are spaced apart along the first direction X, and FIG. 2 shows a top view of the track layer 10 and the magnetic tunnel junction 20 after being stacked, the length-width ratio of the track layer 10 and the magnetic tunnel junction 20 is consistent, and the length in the first direction X is at least twice the length in the second direction Y; the through holes between the top electrodes 30 and the track layer 10 are top through holes of the magnetic storage bit, and by keeping the length-width ratio within the range, the spacing between the top through holes is increased when the top electrodes 30 are subsequently formed, and the difficulty of metal interconnection between the subsequent top electrodes 30 and the track layer 10 is reduced.

[0038] The magnetic storage bit described above adopts the structure of a bottom pinned MTJ, and the electrical properties, magnetic properties, and annealing stability of the bottom pinned MTJ structure are higher. Since the MTJ, the track layer, and part of the isolation layer are formed by one-time etching through the same photomask, there is no additional metal back-sputtering onto the MTJ after etching, which reduces the impact on the device performance of the magnetic storage bit and further improves the yield of the device.

[0039] In some optional embodiments, as shown in FIG. 1, the material of the track layer 10 can be any one or more of W, Ta, Pt, WTax, PtCoO, PtMgO, AuPt, PtCr, PtHf, PtTi, BiSb, and BiSe, and the thickness of the track layer 10 is 5 nm to 10 nm. The material of the track layer 10 needs to be selected from heavy metals or topological materials with a relatively large spin Hall angle, which have a strong spin-orbit coupling effect. The heavy metals can generate a large spin Hall angle, which makes them very effective in generating and manipulating spin current. The edge state or surface state of the topological material has a non-trivial topological property, which can protect the spin current from the influence of local defects, thereby improving the transmission efficiency of the spin current.

[0040] In some optional embodiments, as shown in FIG. 2, the ratio of the first length to the second length is 1:2 to 1:10.

[0041] In the optional embodiment described above, the magnetic tunnel junction 20 overlaps with the track layer 10 as shown in FIG. 2. When the ratio of the first length to the second length of the magnetic tunnel junction 20 is within the range of 1:2 to 1:10, the etching window of the subsequent top electrode can be increased to reduce the etching difficulty, and the volume of the magnetic storage bit can be controlled in a smaller range as much as possible, thereby reducing the volume of the device and the production cost.

[0042] In some optional embodiments, as shown in FIG. 3, the magnetic storage bit further comprises a buffer layer 80, which is located between the track layer 10 and the top electrode 30 and connects the track layer 10 and the top electrode 30; or as shown in FIG. 4, the magnetic storage bit further comprises a ferromagnetic layer 70, which is located between the track layer 10 and the top electrode 30 and connects the track layer 10 and the top electrode 30.

[0043] In the above optional embodiments, as shown in FIG. 3, there is a buffer layer 80 between the track layer 10 and the top electrode 30, the material of the buffer layer 80 can be any one or more of Mg, MgB2and a compound of Mg, the material of the buffer layer 80 can also be a C-containing compound, the material of the buffer layer 80 can also be any one or more of TaTix, Mg1-xTixB2, Mg(B1-xCx)2and ((Mg1-xTix)B2-yCy), the resistivity of the buffer layer 80 prepared by the above buffer layer 80 material is at least 10 times higher than the resistivity of the track layer 10, when the magnetic storage bit is working, the buffer layer 80 is in parallel with the track layer 10, which will shunt the current in the track layer 10, and thus will cause the magnetic storage bit to increase the write power consumption, and even affect the accuracy of writing, when the resistivity of the buffer layer 80 is at least 10 times higher than the resistivity of the track layer 10, the risk of shunting the current of the track layer 10 by the buffer layer 80 can be effectively reduced, and the writing accuracy of the magnetic storage bit when working can be further improved, and the specific material of the buffer layer can be reasonably selected by those skilled in the art according to the actual situation, and the present disclosure is not limited in this regard.

[0044] In the above optional embodiments, as shown in FIG. 3, the partial isolation layer 100, the buffer layer 80, the track layer 10 and the magnetic tunnel junction 20 are formed by one-time etching through the same mask, when the isolation layer 100 and the buffer layer 80 are etched to form the above-mentioned top via, since there is a large etching selectivity between the buffer layer 80 and the track layer 10, the track layer 10 will not be eroded by the etching gas when the etching stops, and the etching can stop at the buffer layer 80 before etching to the track layer 10, at this time, the buffer layer 80 can be etched away in part, but will not be etched completely.

[0045] In the optional embodiment, as shown in FIG. 4, there is a ferromagnetic layer 70 between the track layer 10 and the top electrode 30, and the resistivity of the ferromagnetic layer 70 is at least 10 times higher than that of the track layer 10. When the magnetic storage bit is in read / write operation, the ferromagnetic layer 70 is in parallel with the track layer 10, which will shunt the current in the track layer 10, thereby increasing the write power consumption of the magnetic storage bit and even affecting the accuracy of writing. When the resistivity of the ferromagnetic layer 70 is at least 10 times higher than that of the track layer 10, the risk of current shunting of the ferromagnetic layer 70 to the track layer 10 can be effectively reduced, and the writing accuracy of the magnetic storage bit in the write operation can be further improved.

[0046] In the optional embodiment, as shown in FIG. 4, when the ferromagnetic layer 70 has a horizontal magnetic field, it will provide a bias electric field for the magnetic storage bit, so that the magnetic tunnel junction 20 is determined to flip. The material of the ferromagnetic layer 70 can be any one or more of FeV, CoFeB and Fe, or a high-resistivity ferromagnetic alloy doped with elements such as C, N and Si.

[0047] In the optional embodiment, as shown in FIG. 4, the ferromagnetic layer 70, part of the isolation layer 100, the track layer 10 and the magnetic tunnel junction 20 are formed by one-time etching through the same mask. When etching the ferromagnetic layer 70 and the isolation layer 100 to form the top via hole, since there is a large etching selectivity between the ferromagnetic layer 70 and the track layer 10, the etching stops when the track layer 10 is not eroded by the etching gas. Before etching the track layer 10, the etching can stop at the ferromagnetic layer 70. At this time, the ferromagnetic layer 70 may be etched away in part, but not completely. Those skilled in the art can reasonably select the specific material of the ferromagnetic layer according to the actual situation, and the present disclosure is not limited in this regard.

[0048] In some optional embodiments, as shown in FIG. 5, the magnetic storage bit further includes a magnetization layer 60, which is located between the bottom electrode 40 and the magnetic tunnel junction 20, and connects the bottom electrode 40 and the magnetic tunnel junction 20.

[0049] In the optional embodiment described above, as shown in FIG. 5, the partial isolation layer 100, the track layer 10, and the magnetic tunnel junction 20 and the magnetization layer 60 are formed by one-time etching through the same mask. The magnetization layer 60 in the structure of the magnetic storage bit can connect the bottom electrode 40 and the magnetic tunnel junction 20. The magnetization layer 60 has the same aspect ratio as the magnetic tunnel junction 20. When the magnetic storage bit is powered on, the magnetization layer 60 generates an upward or downward magnetic field. When the magnetic field of the free layer in the magnetic tunnel junction 20 is different from the direction of the magnetic field, the magnetic field can make the direction of the magnetic field of the free layer flip, thereby realizing the zero-field flipping of the magnetic storage bit without the need for additional magnetic field. Whether the magnetization layer 60 generates an upward or downward magnetic field depends on the material of the magnetization layer 60.

[0050] In the optional embodiment described above, the material of the magnetization layer 60 can be any one or more of Co, Fe, Ni, CoFe, CoFeB, NiFe, FeCrCo, AlNiCo, and NdFeB. Those skilled in the art can select the type of material of the magnetization layer by themselves, and the disclosure does not make specific limitations.

[0051] In some optional embodiments, as shown in FIGS. 1, 3-5, the magnetic storage bit further comprises a first insulating layer 50, which is located on the side of the track layer 10 away from the magnetic tunnel junction 20, and the partial top electrode 30 penetrates the first insulating layer 50.

[0052] In the optional embodiment described above, as shown in FIGS. 1, 3-5, the first insulating layer 50 is located on the side of the track layer 10 away from the magnetic tunnel junction 20. The first insulating layer 50 can effectively protect the track layer 10 from being damaged by etching. The first insulating layer 50 and the track layer 10 have a large etching selectivity ratio. When the top hole is etched, the first insulating layer 50 is etched first, so that the track layer 10 is not eroded by etching gas when the etching stops, and the etching stop position can be accurately on the surface of the track layer 10.

[0053] In the optional embodiment described above, the material of the first insulating layer 50 can be any one or more of SiO2, SiN, SiC, and SiCN. The first insulating layer 50 can be a single layer or a multi-layer dielectric composite film structure, and the disclosure does not make specific limitations.

[0054] In some optional embodiments, as shown in FIGS. 1, 3-6, the magnetic storage bit further comprises a bottom electrode 40, which is located on the side of the magnetic tunnel junction 20 away from the track layer 10 and in contact with the magnetic tunnel junction 20.

[0055] In the optional embodiment described above, as shown in FIG. 1, FIG. 3 to FIG. 6, the bottom electrode 40 is located on the side of the magnetic tunnel junction 20 away from the track layer 10, and the material of the bottom electrode 40 can be any one or more of Cu, Ag and Au. Those skilled in the art can select the material of the bottom electrode according to the actual situation, and the disclosure does not make specific limitations.

[0056] Exemplarily, as shown in FIG. 6, the magnetic storage bit simultaneously includes the buffer layer 80 and the magnetization layer 60. The buffer layer 80, the partial isolation layer 100, the track layer 10, the magnetic tunnel junction 20 and the magnetization layer 60 are formed by one-time etching through the same mask. When the top via hole is etched, the buffer layer 80 and the track layer 10 have a large etching selectivity ratio, so that the track layer 10 is not eroded by the etching gas when the etching stops. Before etching to the track layer 10, the etching can be stopped at the buffer layer 80. At this time, the buffer layer 80 can be etched away in part, but not completely.

[0057] According to another embodiment of the disclosure, a magnetic storage device is also provided, which includes at least one magnetic storage bit, and the magnetic storage bit is the magnetic storage bit in the above embodiments.

[0058] The above-mentioned magnetic storage device of the disclosure increases the spacing between the plurality of top electrodes provided on the magnetic tunnel junction and the track layer / ferromagnetic layer, i.e. increases the spacing between the top via holes, and reduces the difficulty of metal interconnection between the subsequent top electrodes and the track layer / ferromagnetic layer.

[0059] According to another embodiment of the disclosure, a preparation method of a magnetic storage bit is also provided, as shown in FIG. 7, which includes:

[0060] Step S100: providing a substrate;

[0061] Step S200: forming a magnetic tunnel junction on one side surface of the substrate, and the magnetic tunnel junction has a plurality of functional layers, and the plurality of functional layers have a plurality of projections on the track layer, wherein the functional layer with the smallest projection area has a first length in a first direction and a second length in a second direction, and the first length is at least twice the second length;

[0062] Step S300: forming a track layer on one side surface of the magnetic tunnel junction, and the track layer is located on one side of the magnetic tunnel junction along the stacking direction of the plurality of functional layers;

[0063] Step S400: forming an isolation layer on the side surface of the track layer away from the magnetic tunnel junction;

[0064] Step S500: forming a plurality of top electrodes on the side surface of the isolation layer away from the track layer, the plurality of top electrodes being arranged at intervals along the first direction on one side of the track layer.

[0065] By using the preparation method of the magnetic storage bit provided in the present disclosure, the magnetic tunnel junction with a certain aspect ratio is introduced into the magnetic storage bit, the spacing of the through holes between the plurality of top electrodes arranged on the magnetic tunnel junction and the track layer is increased, that is, the spacing between the top through holes is increased, and the difficulty of metal interconnection between the subsequent top electrodes and the track layer / ferromagnetic layer is reduced.

[0066] Exemplary embodiments of the preparation method of the magnetic storage bit provided in the present disclosure will be described in more detail below with reference to the accompanying drawings. However, these exemplary embodiments can be implemented in various different forms, and should not be interpreted as being limited only to the embodiments set forth herein. It should be understood that these embodiments are provided in order to make the disclosure of the present disclosure complete and complete, and to fully convey the ideas of these exemplary embodiments to those of ordinary skill in the art.

[0067] First, as shown in FIG. 8, step S100 is performed: providing a first substrate 101.

[0068] Specifically, a first substrate 101 is first provided.

[0069] The first substrate 101 herein can also include other semiconductor layers, such as the bottom electrode of the magnetic storage bit in the first substrate 101, which can be set by those skilled in the art according to the actual situation.

[0070] After providing the first substrate 101, step S200 is performed: as shown in FIG. 8, a magnetic tunnel junction 20 is formed on one side of the first substrate 101, and the magnetic tunnel junction 20 has a plurality of functional layers.

[0071] Specifically, as shown in FIG. 8, a reference layer, a free layer and a barrier layer are sequentially deposited on one side of the first substrate 101 to form a magnetic tunnel junction 20, and the reference layer, the free layer and the barrier layer are the plurality of functional layers of the magnetic tunnel junction 20, and the length in the first direction X is at least twice the length in the second direction Y; by keeping the aspect ratio within this range, the spacing of the through holes between the top electrodes 30 and the track layer 10 is increased, and the difficulty of metal interconnection is also reduced.

[0072] In some optional embodiments, as shown in FIG. 9, before the step of forming the magnetic tunnel junction, the preparation method further comprises: providing a second substrate 102; sequentially forming a preliminary first sub-insulating layer, a preliminary first barrier layer and a preliminary second sub-insulating layer on one side surface of the second substrate 102, and performing etching treatment on the preliminary first sub-insulating layer, the preliminary first barrier layer and the preliminary second sub-insulating layer to form a first through hole, thereby obtaining the first barrier layer 110 and the second insulating layer, and the second insulating layer comprises the first sub-insulating layer 91 and the second sub-insulating layer 92; and filling electrode material into the first through hole to obtain the bottom electrode 40.

[0073] In the above optional embodiments, as shown in FIG. 9, before the step of forming the magnetic tunnel junction 20, the second substrate 102 is provided first, the insulating material is deposited on the second substrate 102 to form a preliminary first sub-insulating layer, the preliminary first sub-insulating layer is subjected to etching treatment to form a first sub-through hole, thereby obtaining the first sub-insulating layer 91, the electrode material is deposited into the first sub-through hole to obtain a first bottom electrode, the plane where the first bottom electrode is located is subjected to planarization treatment, the first bottom electrode and the first sub-insulating layer 91 are then deposited with the barrier material to form a preliminary first barrier layer, the insulating material is deposited on the preliminary first barrier layer to form a preliminary second sub-insulating layer, the preliminary second sub-insulating layer and the preliminary first barrier layer are sequentially subjected to etching treatment to obtain a second sub-through hole, the first barrier layer 110 and the second sub-insulating layer 92, the first sub-through hole and the second sub-through hole form the first through hole, and the electrode material is deposited into the second sub-through hole to obtain a second bottom electrode, the plane where the second bottom electrode is located is subjected to planarization treatment, the first bottom electrode and the second bottom electrode constitute the bottom electrode 40, and then the second substrate 102 is removed. The process of forming the bottom electrode 40 can adopt any one or more of the dual damascene process and the chemical vapor deposition, which is not specifically limited in the present disclosure.

[0074] It should be noted that the second substrate 102 is a substrate for preparing the first sub-insulating layer 91, the second sub-insulating layer 92, the first barrier layer 110 and the bottom electrode 40, and the second substrate 102 is removed when the above structure is prepared. The first substrate 101 is a structure composed of the first sub-insulating layer 91, the second sub-insulating layer 92, the first barrier layer 110 and the bottom electrode 40 in FIG. 8, which is introduced in the above text to replace the structure (excluding the second substrate 102) in FIG. 8 for the convenience of description. The length of the first substrate 101 in the first direction X is longer than the length of the magnetic tunnel junction in the first direction X, and the length of the first substrate 101 in the second direction Y is longer than the length of the magnetic tunnel junction in the second direction Y, so as to facilitate the ratio between the first length and the second length of the magnetic tunnel junction to meet the range of 1:2-1:10 in the subsequent preparation. The material of the second substrate 102 can be any one or more of silicon, gallium arsenide, zinc selenide and indium phosphide, which is not specifically limited in the present disclosure.

[0075] After the step of forming the magnetic tunnel junction 20 on one side surface of the substrate is performed, as shown in FIG. 10, a step S300 is performed: forming the track layer 10 on one side surface of the magnetic tunnel junction 20, the track layer 10 is located on one side of the magnetic tunnel junction 20 along the stacking direction of the multi-layer functional layer, the multi-layer functional layer has multiple projections on the track layer 10, wherein the functional layer with the smallest projection area has a first length in the first direction X and a second length in the second direction Y, the first length is at least twice the second length.

[0076] Specifically, the magnetic tunnel junction 20 is formed on the first substrate, the first substrate is composed of the first sub-insulating layer 91, the second sub-insulating layer 92, the first barrier layer 110 and the bottom electrode 40, the track layer 10 is formed on the magnetic tunnel junction 20, and the same mask is used for etching the magnetic tunnel junction 20 and the track layer 10 to make the ratio of the first length to the second length of the magnetic tunnel junction 20 and the track layer 10 in the range of 1:2-1:10, which not only reduces the alignment accuracy of etching to form the through hole between the top electrode and the track layer 10, but also reduces the etching difficulty, and does not significantly increase the switching current and power consumption of the magnetic tunnel junction 20.

[0077] After the step of forming the track layer 10 on one side surface of the magnetic tunnel junction 20 is performed, as shown in FIG. 11, a step S400 is performed: forming the isolation layer 100 on one side surface of the track layer 10 away from the magnetic tunnel junction 20.

[0078] Specifically, the isolation layer 100 has a multi-layer structure, a preliminary first insulating layer, a preliminary second barrier layer, a preliminary third sub-insulating layer, a preliminary third barrier layer and a preliminary fourth sub-insulating layer are sequentially formed on the track layer 10, a second through hole is formed in the preliminary first insulating layer, the preliminary second barrier layer, the preliminary third sub-insulating layer, the preliminary third barrier layer and the preliminary fourth sub-insulating layer to obtain the isolation layer 100; other structures and directions in FIG. 11 are the same as in FIG. 10, which will not be repeated here.

[0079] After the step of forming the isolation layer 100 on one side surface of the track layer 10 away from the magnetic tunnel junction 20 is performed, as shown in FIG. 12, a step S500 is performed: forming multiple top electrodes 30 on one side surface of the isolation layer away from the track layer.

[0080] Specifically, the step of forming multiple top electrodes 30 includes: as shown in FIG. 12, filling the electrode material in the second through hole to obtain the top electrode 30, and the second through hole in the first insulating layer 50, the second barrier layer 120, the third barrier layer 130 and the third sub-insulating layer 93 of the second insulating layer is the top through hole.

[0081] In the optional embodiment described above, as shown in FIG. 12, a preliminary second barrier layer, a preliminary third sub-insulating layer and a preliminary third barrier layer are sequentially deposited on the first insulating layer 50, and then the three layers are sequentially etched to obtain a third sub-via hole, and electrode material is deposited into the third sub-via hole to obtain a part of the top electrode 30, the third sub-insulating layer 93, the second barrier layer 120 and the third barrier layer 130; as shown in FIG. 12, a preliminary fourth sub-insulating layer is deposited on the third barrier layer 130, and the preliminary fourth sub-insulating layer is etched to obtain a fourth sub-via hole, and electrode material is filled into the fourth sub-via hole to obtain the top electrode 30 and the fourth sub-insulating layer 94, and the third sub-via hole and the fourth sub-via hole constitute the second via hole, which is the top via hole of the magnetic storage bit. The process of forming the top electrode 30 can use any one or more of the dual damascene process and chemical vapor deposition, which is not specifically limited by the present disclosure.

[0082] In the optional embodiment described above, as shown in FIG. 12, the first insulating layer 50 can be formed after the deposition of the track layer 10, and the magnetic tunnel junction 20, the track layer 10 and the first insulating layer 50 share the same mask plate for etching to form, wherein the magnetic tunnel junction 20 has a first length in the first direction X and a second length in the second direction Y, and the ratio of the first length to the second length is within the range of 1:2-1:10, which can increase the etching window of the top via hole and reduce the difficulty of metal interconnection.

[0083] In the optional embodiment described above, the material of the first insulating layer 50 and the second insulating layer can be any one or more of SiO2, SiN, SiC and SiCN, and the first insulating layer 50 and the second insulating layer can be a one-layer or multi-layer dielectric composite film layer structure, which is not specifically limited by the present disclosure.

[0084] It should also be noted that the terms "comprising", "containing", or any other variant thereof are intended to cover non-exclusive inclusions, such that a process, method, article or apparatus that comprises a list of elements does not only include those elements, but also other elements not explicitly listed, or other elements inherent to such a process, method, article or apparatus. Without more limitations, the element defined by the phrase "comprising a" does not exclude the presence of additional identical elements in the process, method, article or apparatus that includes the element.

[0085] The above is only an embodiment of the present disclosure and is not intended to limit the present disclosure. The present disclosure can have various modifications and changes for those skilled in the art. Any modification, equivalent replacement, improvement, etc. within the spirit and principles of the present disclosure shall be included in the scope of the claims of the present disclosure.

Claims

1. A magnetic memory cell, comprising: a track layer; a magnetic tunnel junction having a multi-layer functional layer, the multi-layer functional layer having a plurality of projections on the track layer, wherein a projection of a functional layer with a smallest projection area has a first length in a first direction and a second length in a second direction, the first length being at least twice the second length, the first direction being perpendicular to the second direction, the magnetic tunnel junction being located on one side of the track layer, and a direction of the magnetic tunnel junction pointing to the track layer being a stacking direction of the multi-layer functional layer; an isolation layer located on a side of the magnetic tunnel junction away from the track layer; and a plurality of top electrodes located on a side of the track layer away from the magnetic tunnel junction and spaced apart along the first direction, the plurality of top electrodes penetrating the isolation layer and contacting the track layer. A ratio of the first length to the second length is 1:2-1:

10. The magnetic memory cell further comprises a buffer layer located between the track layer and the top electrodes and connecting the track layer and the top electrodes, or the magnetic memory cell further comprises a ferromagnetic layer located between the track layer and the top electrodes and connecting the track layer and the top electrodes. The magnetic memory cell further comprises a bottom electrode located on a side of the magnetic tunnel junction away from the track layer and contacting the magnetic tunnel junction. The magnetic memory cell further comprises a magnetization layer located between the bottom electrode and the magnetic tunnel junction, the magnetization layer connecting the bottom electrode and the magnetic tunnel junction.

2. The magnetic storage bit cell of claim 1, wherein, The magnetic memory cell further comprises a first insulating layer located on a side of the track layer away from the magnetic tunnel junction, and part of the top electrodes penetrating the first insulating layer.

3. The magnetic memory bit of claim 1 wherein, The magnetic memory cell is any one of the magnetic memory cells of claims 1-6.

4. The magnetic memory bit of claim 1 wherein, The preparation method comprises:

5. The magnetic storage bit cell of claim 4, wherein, providing a first substrate; 6. The magnetic memory bit of claim 1 wherein, forming a magnetic tunnel junction on one side of the first substrate, the magnetic tunnel junction having a multi-layer functional layer; 7. A magnetic memory comprising at least one magnetic memory bit, wherein, forming a track layer on a side surface of the magnetic tunnel junction, the track layer being located on a side of the magnetic tunnel junction along a stacking direction of the multi-layer functional layer, the multi-layer functional layer having a plurality of projections on the track layer, wherein a projection of a functional layer with a smallest projection area has a first length in a first direction and a second length in a second direction, the first length being at least twice the second length; 8. A method of fabricating a magnetic memory bit according to any one of claims 1 to 6, wherein, forming an isolation layer on a side surface of the track layer away from the magnetic tunnel junction; forming a plurality of top electrodes on a side surface of the isolation layer away from the track layer, the plurality of top electrodes being spaced apart along the first direction on a side of the track layer. The step of forming the first substrate comprises: providing a second substrate; forming a preliminary first sub-insulating layer, a preliminary first barrier layer and a preliminary second sub-insulating layer in sequence on a side surface of the second substrate, and performing etching treatment on the preliminary first sub-insulating layer, the preliminary first barrier layer and the preliminary second sub-insulating layer to form a first through hole, to obtain a first sub-insulating layer and a second sub-insulating layer in the first barrier layer and the second insulating layer; ​ 9. The production method according to claim 8, wherein ​ ​ ​ forming a bottom electrode in the first via hole; removing the second substrate to obtain the first substrate; The bottom electrode is in contact with the magnetic tunnel junction after the step of forming the magnetic tunnel junction.

10. The production method according to claim 8, wherein The step of forming a plurality of top electrodes comprises: forming a preliminary isolation layer on the track layer; performing etching treatment on the preliminary isolation layer to form a second via hole in the preliminary isolation layer to obtain the isolation layer; filling electrode material into the second via hole to obtain a top electrode.

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