Fast convolution based DFT-s-OFDM transceiver

Abstract

Different processes to process data for transmission or to process received data are described. For example, at a transmitting entity a process may comprise at least partitioning L input symbols into parts, multiplying, per a part, elementwise samples of the part by a first sequence to obtain first windowed portions of the part; transforming, per a part, the first windowed portions of the part into a frequency domain to obtain L frequency domain bins; mapping, per a part, the L frequency domain bins into N frequency domain bins; multiplying, per a part, elementwise the N frequency domain bins by a sequence, to obtain N windowed portions of the part; transforming, per a part, the N windowed portions of the part into time domain by IFFT of size N to obtain N output parts; and generating a signal to be transmitted based on the N output parts.

Description

[0001]PROCESSING SYMBOLSTECHNICAL FIELD Various example embodiments relate to communication systems. BACKGROUND In wireless communication to transmit and receive information, symbols representing the information are conveyed in signals. The signals are carried using a waveform. One promising waveform is a discrete Fourier transform-spread orthogonal frequency division multiplexing (DFT-s-OFDM) waveform, which is a single-carrier fre- quency division multiple access waveform. For efficient implementations, the set of feasible DFT sizes used for generating the DFT-s-OFDM waveforms is commonly re- stricted. A solution enabling more flexibility to transform sizes is desired. SUMMARY The independent claims define the scope, and different embodiments are defined in dependent claims. According to an aspect, there is provided an apparatus comprising at least one processor and at least one memory storing instructions that, when executed by the at least one processor, cause the apparatus to at least: partition L input symbols into parts, wherein L is a positive integer; multiply, per a part, elementwise samples of the part by a first sequence to obtain first windowed portions of the part; transform, per a part, the first windowed portions of the part into frequency domain to obtain L first frequency domain bins; map, per a part, the L first frequency domain bins into N second frequency domain bins by performing at least one of inserting Z zeros or replicating R first frequency domain bins, wherein N is a positive integer whose value is bigger than L, Z=N-L-R, and 0 ≤R≤ (N-L); multiply, per a part, elementwise the N second frequency domain bins by a second sequence, to obtain N second windowed portions of the part; transform, per a part, the N second windowed portions of the part into time domain by inverse fast Fourier transform of size N to obtain N output parts; generate a signal to be transmitted based on the N output parts; and add cyclic prefix either to the L input symbols before the partition or to the output parts before generating the signal. In ex- ample embodiments, the at least one processor and the at least one memory storing instructions, when executed by the at least one processor, further cause the apparatus to perform at least fast Fourier transform of size M and inverse fast Fourier transform of size M during transforming the first windowed portions of the part to obtain L first frequency domain bins, wherein M is a positive integer. In example embodiments, M = 2h, wherein h is a positive integer. In example embodiments, the at least one processor and the at least one memory storing instructions, when executed by the at least one processor, further cause the apparatus to transform, per a part, the first windowed portions of the part into frequency domain to obtain L first frequency domain bins by performing, per a part, a frequency domain convolution comprising at least: mapping first windowed portions of the part into M samples by zero padding, wherein M equals to or is bigger than W+L-1, wherein W is the number of the first windowed portions of the part; trans- forming the M samples into a first transform domain by fast Fourier transform of size M to obtain M first transform domain samples; multiplying elementwise the M first transform domain samples by a third sequence, to obtain M third windowed portions; transforming the M third windowed portions to M first frequency domain bins by in- verse fast Fourier transform of size M; and selecting from the M first frequency domain bins the L first frequency domain bins. In example embodiments, the at least one processor and the at least one memory storing instructions, when executed by the at least one processor, further cause the apparatus to select the L first frequency domain bins by discarding first W-1 first frequency domain bins and selecting next L first frequency domain bins out of the M first frequency domain bins. In example embodiments, the at least one processor and the at least one memory storing instructions, when executed by the at least one processor, further cause the apparatus to transform, per a part, the first windowed portions of the part into frequency domain to obtain L first frequency domain bins by performing, per a part, a frequency domain convolution comprising at least: dividing first windowed por- tions into first overlapping portions of length M; transforming the first overlapping portions into first overlapping transform domain by fast Fourier transform of size M to obtain first overlapping transform domain representations of the first overlapping por- tions; multiplying elementwise at least some of the first overlapping transform domain representations by corresponding second overlapping sequences to obtain at least L third overlapping windowed portions; and combining the L third overlapping win- dowed portions through overlap-and-add or overlap-and-save processing to obtain L first frequency-domain bins. In example embodiments, the at least one processor and the at least one memory storing instructions, when executed by the at least one processor, further cause the apparatus to determine the number of first overlapping portions based on L and M, and the number of second overlapping portions based on L, M and W, wherein W is the number of the first windowed portions of the part. In example embodiments, the at least one processor and the at least one memory storing instructions, when executed by the at least one processor, cause the apparatus to: partition the L input symbols into L modulated symbols; and add the cy- clic prefix to the N output parts, which are symbols. In example embodiments, the at least one processor and the at least one memory storing instructions, when executed by the at least one processor, cause the apparatus to: add the cyclic prefix to the L input symbols to obtain L input symbols; partition the L input symbols into parts by dividing, per an input symbol, the input symbol into Q blocks, a block containing W samples, wherein Q and W are positive in- tegers; and generate the signal by overlapping the N output parts of the Q blocks. According to an aspect, there is provided an apparatus comprising at least one processor and at least one memory storing instructions that, when executed by the at least one processor, cause the apparatus to at least: receive a signal; obtain, per a block received in the signal, P samples in time domain, wherein P is a positive integer; remove cyclic prefix from the P samples to obtain N samples, wherein N is a positive integer; partition N samples into input parts; transform, per an input part, the input parts into frequency domain by fast Fourier transform of size N to obtain N frequency domain bins; multiply, per an input part, elementwise the N frequency domain bins by a second sequence, to obtain N windowed frequency domain bins; select, per an input part, from the N windowed frequency domain bins L windowed frequency domain bins, wherein L is a positive integer whose value is smaller than N; transform, per an input part, the L windowed frequency domain bins into time domain to obtain time domain input portions; multiply, per an input part, elementwise the time domain input por- tions of the input part by a first sequence to obtain windowed samples of the input part; and combine the windowed samples of the input parts into L symbols. In example embodiments, the at least one processor and the at least one memory storing instructions, when executed by the at least one processor, further cause the apparatus to transform, per an input part, the L windowed frequency domain bins of the input part into the time domain to obtain L time domain input portions by performing, per an input part, a frequency domain convolution comprising at least: mapping the L windowed frequency domain bins of the input part into M windowed frequency domain bins by zero padding, wherein M equals to or is bigger than W+L-1, wherein W*N / L is the number of the time domain portions of the input part; trans- forming the M windowed frequency domain bins into a first transform domain by fast Fourier transform of size M to obtain M first transform domain samples; multiplying elementwise the M first transform domain samples by a third sequence, to obtain M third windowed portions; transforming the M third windowed portions into M time domain samples by inverse fast Fourier transform of size M; and selecting from the M time domain samples the L time domain input portions. In example embodiments, the at least one processor and the at least one memory storing instructions, when executed by the at least one processor, further cause the apparatus to transform, per an input part, the L frequency domain bins of the input part into time domain to obtain L time domain input portions by performing, per an input part, a frequency domain convolution comprising at least: dividing L win- dowed frequency domain bins into first overlapping portions of length M; transforming the first overlapping portions into a first overlapping transform domain by fast Fourier transform of size M to obtain first overlapping transform domain representations of the first overlapping portions; multiplying elementwise at least some of the first over- lapping transform domain representations by corresponding second overlapping se- quences to obtain third overlapping portions; and transforming the third overlapping portions into M first overlapping time domain samples by inverse fast Fourier trans- form of size M; and combining the M first overlapping time domain samples through overlap-and-add or overlap-and-save processing to obtain L time domain input por- tions. In example embodiments, L=12d, wherein d is a positive integer. According to an aspect there is provided a method comprising at least: par- titioning L input symbols into parts, wherein L is a positive integer; multiplying, per a part, elementwise samples of the part by a first sequence to obtain first windowed por- tions of the part; transforming, per a part, the first windowed portions of the part into frequency domain to obtain L first frequency domain bins; mapping, per a part, the L first frequency domain bins into N second frequency domain bins by performing at least one of inserting Z zeros or replicating R first frequency domain bins, wherein N is a positive integer whose value is bigger than L, Z=N-L-R, and 0 ≤R≤ (N-L); multiplying, per a part, elementwise the N second frequency domain bins by a second sequence, to obtain N second windowed portions of the part; transforming, per a part, the N second windowed portions of the part into time domain by inverse fast Fourier transform of size N to obtain N output parts; generating a signal to be transmitted based on the N output parts; and adding cyclic prefix either to the L input symbols before the partition or to the output parts before generating the signal. According to an aspect there is provided a method comprising at least: re- ceiving a signal; obtaining, per a block received in the signal, P samples in time domain, wherein P is a positive integer; removing cyclic prefix from the P samples to obtain N samples, wherein N is a positive integer; partitioning N samples into input parts; trans- forming, per an input part, the input parts into frequency domain by fast Fourier trans- form of size N to obtain N frequency domain bins; multiplying, per an input part, ele- mentwise the N frequency domain bins by a second sequence, to obtain N windowed frequency domain bins; selecting, per an input part, from the N windowed frequency domain bins L windowed frequency domain bins, wherein L is a positive integer whose value is smaller than N; transforming, per an input part, the L windowed frequency domain bins into time domain to obtain time domain input portions; multiplying, per an input part, elementwise the time domain input portions of the input part by a first sequence to obtain windowed samples of the input part; and combining the windowed samples of the input parts into L symbols. According to an aspect there is provided a computer readable medium com- prising instructions which, when executed by an apparatus, cause the apparatus to per- form at least: partitioning L input symbols into parts, wherein L is a positive integer; multiplying, per a part, elementwise samples of the part by a first sequence to obtain first windowed portions of the part; transforming, per a part, the first windowed por- tions of the part into frequency domain to obtain L first frequency domain bins; map- ping, per a part, the L first frequency domain bins into N second frequency domain bins by performing at least one of inserting Z zeros or replicating R first frequency domain bins, wherein N is a positive integer whose value is bigger than L, Z=N-L-R, and 0 ≤R≤ (N-L); multiplying, per a part, elementwise the N second frequency domain bins by a second sequence, to obtain N second windowed portions of the part; transforming, per a part, the N second windowed portions of the part into time domain by inverse fast Fourier transform of size N to obtain N output parts; generating a signal to be trans- mitted based on the N output parts; and adding cyclic prefix either to the L input sym- bols before the partition or to the output parts before generating the signal. According to an aspect there is provided a computer readable medium com- prising instructions which, when executed by an apparatus, cause the apparatus to per- form at least: receiving a signal; obtaining, per a block received in the signal, P samples in time domain, wherein P is a positive integer; removing cyclic prefix from the P sam- ples to obtain N samples, wherein N is a positive integer; partitioning N samples into input parts; transforming, per an input part, the input parts into frequency domain by fast Fourier transform of size N to obtain N frequency domain bins; multiplying, per an input part, elementwise the N frequency domain bins by a second sequence, to obtain N windowed frequency domain bins; selecting, per an input part, from the N windowed frequency domain bins L windowed frequency domain bins, wherein L is a positive in- teger whose value is smaller than N; transforming, per an input part, the L windowed frequency domain bins into time domain to obtain time domain input portions; multi- plying, per an input part, elementwise the time domain input portions of the input part by a first sequence to obtain windowed samples of the input part; and combining the windowed samples of the input parts into L symbols. In example embodiments the computer readable medium is a non-transi- tory computer readable medium. According to an aspect there is provided a computer program comprising instructions, which, when executed by an apparatus, cause the apparatus to perform at least: partitioning L input symbols into parts, wherein L is a positive integer; multiply- ing, per a part, elementwise samples of the part by a first sequence to obtain first win- dowed portions of the part; transforming, per a part, the first windowed portions of the part into frequency domain to obtain L first frequency domain bins; mapping, per a part, the L first frequency domain bins into N second frequency domain bins by per- forming at least one of inserting Z zeros or replicating R first frequency domain bins, wherein N is a positive integer whose value is bigger than L, Z=N-L-R, and 0 ≤R≤ (N-L); multiplying, per a part, elementwise the N second frequency domain bins by a second sequence, to obtain N second windowed portions of the part; transforming, per a part, the N second windowed portions of the part into time domain by inverse fast Fourier transform of size N to obtain N output parts; generating a signal to be transmitted based on the N output parts; and adding cyclic prefix either to the L input symbols be- fore the partition or to the output parts before generating the signal. According to an aspect there is provided a computer program comprising instructions, which, when executed by an apparatus, cause the apparatus to perform at least: receiving a signal; obtaining, per a block received in the signal, P samples in time domain, wherein P is a positive integer; removing cyclic prefix from the P samples to obtain N samples, wherein N is a positive integer; partitioning N samples into input parts; transforming, per an input part, the input parts into frequency domain by fast Fourier transform of size N to obtain N frequency domain bins; multiplying, per an in- put part, elementwise the N frequency domain bins by a second sequence, to obtain N windowed frequency domain bins; selecting, per an input part, from the N windowed frequency domain bins L windowed frequency domain bins, wherein L is a positive in- teger whose value is smaller than N; transforming, per an input part, the L windowed frequency domain bins into time domain to obtain time domain input portions; multi- plying, per an input part, elementwise the time domain input portions of the input part by a first sequence to obtain windowed samples of the input part; and combining the windowed samples of the input parts into L symbols. BRIEF DESCRIPTION OF DRAWINGS Embodiments are described below, by way of example only, with reference to the accompanying drawings, in which Fig.1 illustrates an exemplified high-level system architecture; Fig.2A illustrates an example process at a transmitting entity; Fig.2B illustrates an example process at a transmitting entity; Fig.3 illustrates an example sub-process at a transmitting entity; Fig.4 illustrates an example sub-process at a transmitting entity; Fig.5 illustrates an example sub-process at a transmitting entity; Fig.6 illustrates an example process at a receiving entity; Fig.7 illustrates an example sub-process at a receiving entity; Fig.8 illustrates an example sub-process at a receiving entity; Fig.9 illustrates an example process at a transmitting entity; Fig.10 illustrates an example process at a transmitting entity; Fig.11 illustrates an example sub-process at a transmitting entity; Fig.12 illustrates an example sub-process at a transmitting entity; Fig.13 illustrates an example process at a receiving entity; Fig.14 illustrates an example process at a receiving entity; Fig.15 illustrates simulation results; Fig.16 illustrates examples of error vector magnitudes; Fig.17 illustrates simulation results; Fig.18 illustrates simulation results; Fig 19 illustrates examples of error vector magnitudes; Fig.20 is a schematic block diagram; and Fig.21 is a schematic block diagram. DETAILED DESCRIPTION OF SOME EMBODIMENTS The following embodiments are only presented as examples. Although the specification may refer to “an”, “one”, or “some” embodiment(s) and / or example(s) in several locations, this does not necessarily mean that each such reference is to the same embodiment(s) or example(s), or that a particular feature only applies to a single em- bodiment and / or single example. Single features of different embodiments and / or ex- amples may also be combined to provide other embodiments and / or examples. Fur- thermore, words “comprising” and “including” should be understood as not limiting the described embodiments to consist of only those features that have been mentioned and such embodiments may contain also features / structures that have not been spe- cifically mentioned. Further, although terms including ordinal numbers, such as “first”, “second”, etc., may be used for describing various elements, the elements are not re- stricted by the terms. The terms are used merely for the purpose of distinguishing an element from other elements. For example, a first element could be termed an element or a second element without departing from the scope of the present disclosure. 5G-Advanced, and beyond future wireless networks aim to support a large variety of services, use cases and industrial verticals, for example unmanned mobility with fully autonomous connected vehicles, other vehicle-to-everything (V2X) services, or smart environment, e.g. smart industry, smart power grid, or smart city, just to name few examples. To provide variety of services with different requirements, such as en- hanced mobile broadband, ultra-reliable low latency communication, massive machine type communication, wireless networks are envisaged to adopt network slicing, flexi- ble decentralized and / or distributed computing systems and ubiquitous computing, with local spectrum licensing, spectrum sharing, infrastructure sharing, and intelligent automated management underpinned by mobile edge computing, artificial intelligence, for example machine learning, based tools, cloudification and blockchain technologies. For example, in the network slicing multiple independent and dedicated network slice instances may be created within the same infrastructure to run services that have dif- ferent requirements on latency, reliability, throughput and mobility. In addition to the above listed features, 6G (sixth generation) networks are expected to adopt short- packet communication, for example. Key features of 6G will include intelligent con- nected management and control functions, programmability, integrated sensing and communication, reduction of energy footprint, trustworthy infrastructure, scalability and affordability.^In addition to these, 6G is also targeting new use cases covering the integration of localization and sensing capabilities into system definition to unifying user experience across physical and digital worlds. Various techniques described herein may also be applied to a cyber-physi- cal system (CPS) (a system of collaborating computational elements controlling physi- cal entities). CPS may enable the implementation and exploitation of massive amounts of interconnected ICT devices (sensors, actuators, processors microcontrollers, etc.) embedded in physical objects at different locations. Mobile cyber physical systems, in which the physical system in question has inherent mobility, are a subcategory of cyber-physical systems. Examples of mobile physical systems include mobile robotics and electronics transported by humans or animals. The examples are described herein using principles and terminology of 5G (fifth generation) without limiting the examples, and the terminology used to the 5G. A person skilled in the art may apply the solutions and examples to other communication systems, for example beyond 5G, e.g.6G, 7G, etc., provided with necessary properties. Fig.1 illustrates an exemplified extremely high-level network architecture only showing some functional entities, all being logical units, whose implementation may differ from what is shown. The connections shown in Fig.1 are logical connections; the actual physical connections may be different. Referring to Fig.1, a wireless network 100, or a system comprising wireless networks, comprises device components 101 for device functionalities in device do- main, access network components 102 for access network functionalities in access net- work domain, core network components 103 for core network functionalities in core network domain, and data network components 104 for data network functionalities in data network domain. A device component 101 may be any electrical device, or apparatus 110, connectable to an access network and configurable to be in a wireless connection on one or more communication channels 122, including one or more control channels, with an access network component 102, e.g. an access network apparatus 120, provid- ing a cell 121, for example. The physical link from the device component 101 to the access network component 102 towards a core network component 103 is called an uplink or a reverse link and the physical link to the device component is called a down- link or a forward link. By way of example rather than limitation, the device component 101 may referred to as a served apparatus, a downlink apparatus, a mobile apparatus, a terminal device, a communication device, a user equipment (UE), a subscriber station (SS), a portable subscriber station, a mobile station (MS), or an access terminal (AT). A non-limiting lists of examples of the device component 101, or what the device compo- nent 101 may comprise or be comprised in, include a mobile phone, a cellular phone, a smart phone, a voice over internet protocol (VoIP) phone, a wireless local loop phone, a device using a wireless modem, a portable computer, a desktop computer, laptop- embedded equipment (LEE), laptop-mounted equipment (LME), a smart device, a mul- timedia device, an image capture terminal device, such as a digital camera, a gaming terminal device, a music storage and playback appliance, a drone, a vehicle, an auto- mated guided vehicle, an autonomous connected vehicle, a vehicle-mounted wireless terminal device, a wireless endpoint, an internet of things device, an industrial internet of things device, a device operating in an industrial and / or an automated processing chain contexts, a consumer electronics device, a consumer internet of things device, a mobile robot, a mobile robot arm, a sensor, a surveillance camera, an eHealth related device, a medical monitoring device, a medical device, for example for remote surgery, a wearable device, such as a smart watch, a smart ring, a head-mounted display (HMD), an on-person device, etc. The device component may also be part of a group of device components seen as one device component, i.e. one mobile apparatus, by the wireless network. An access network domain may be based on any kind of an access network, such as a cellular access network, for example 5G network, 5G-Advanced network, 6G network, etc., a non-terrestrial network, a legacy cellular radio access network, for ex- ample 4G or older generation network, or a non-cellular access network, for example a wireless local area network, or any combination thereof. To provide the wireless ac- cess, the access network comprises access network components 102, such as access network apparatuses 120, or access devices. An access device component 102 may pro- vide one or more cells 121, possibly with different cell accessibility per a cell, but a cell is provided by one access device. However, there may be overlapping cells, for example a macro cell provided by an access device operating in co-operation of access nodes providing smaller cells, such as micro-, femto- or picocells, which overlap at least partly within the macro cell. There are a wide variety of access network components 102. A non-limiting lists of examples of the access network component 102, or what the access network component 102 may comprise or be comprised in, include different types of base stations, such as eNBs, gNBs, split gNBs, transmission-reception points, network- controlled repeaters, nodes operationally coupled to one or more remote radio heads, satellites, donor nodes in integrated access and backhaul (IAB), fixed IAB nodes, mobile IAB nodes mounted on vehicles, for example, etc. At least some of the apparatuses in the access network may provide an abstraction platform to separate abstractions of network functions from the processing hardware. Further, it should be noted that some of the components may be multi-do- main components. For example a device component 101 may also provide services to other device components, i.e. operate also as an access network component 102, for example be a relay node, or a mobile IAB node, or a mobile termination part in an IAB node. Hence, herein term mobile apparatus is used for device components, or device component functionality in a multi-domain component and term access network appa- ratus is used for access network components or access network component function- ality in a multi-domain component. The core network components 103 form one or more core networks. A core network may be based on a non-standalone core network, for example an LTE-based network, or a standalone access network, for example a 5G core network. However, it should be appreciated that the core network, and the core network components 103, may use any technology that enable network services to be delivered between devices and data networks. A data network may be any network, like the internet, an intranet, a wide area network, etc. Different remote monitoring and / or data collection services for dif- ferent use cases may be reached via the data network and the data network compo- nents 104. In general, a mobile apparatus 110 may comprise one or more wireless transmitters and one or more wireless receivers to communicate on the one or more communication channels 122. Correspondingly, an access network apparatus 120 may comprise one or more wireless transmitters and one or more wireless receivers to communicate on the one or more communication channels 122. In case of downlink transmissions, the access network apparatus 120 may be referred to as a wireless transmitter and the mobile apparatus 110 may be referred to as the wireless receiver. On the other hand, in case of uplink transmission the mobile apparatus 110 may be referred to as the wireless transmitter and the access network apparatus 120 may be referred to as the wireless receiver. In case of D2D communications, one mobile appa- ratus 110 may be referred to as the wireless transmitter and another mobile apparatus 110 may be referred to as the wireless receiver. Thus, embodiments of the present dis- closure are related to the wireless transmitter and / or the wireless receiver and / or a wireless transceiver in general, but not limited to any specific device. In the examples below parallel to serial or serial to parallel conversions are not shown or discussed. Further, in the examples below, for the sake of clarity of de- scription, it is assumed that a symbol is a single modulated symbol, for example a phase shift keying modulated symbol, or a quadrature amplitude modulation modulated symbol. Applying the disclosed principles and examples to multiple blocks of modu- lated symbols, for example, is a straightforward task for one skilled in the art. Fig. 2A and 2B illustrate non-limiting example functionalities of an appa- ratus transmitting information, i.e. example functionalities how a wireless transmitter, or an apparatus comprising the wireless transmitter, or an apparatus comprised in the wireless transmitter, may generate a signal that is to be transmitted. Referring to Fig. 2A, input symbols 221 are received, cyclic prefix (CP) is added (block 201) to the input symbols 221, and the thus obtained L input symbols are partitioned (block 202) into parts, wherein L is a positive integer. A part may be the L symbols, or a block (a processing block) of one or more symbols comprised in the L symbols in implementations in which the L symbols are divided into two or more blocks. For example, the L input symbols may be partitioned into parts by dividing, or sharing, per L input symbols, the input symbols into Q parts (Q processing blocks), a part containing W samples, wherein Q and W are positive integers. It should be appre- ciated that when Q=1, the partition in block 202 is in practice omitted. Then samples of the parts are multiplied (block 203), per a part, i.e. samples part by part, elementwise. More precisely, samples of a part are multiplied ele- mentwise by a first sequence to obtain first windowed portions of the part. The thus obtained first windowed portions are transformed (block 204), per a part, into frequency domain to obtain L first frequency domain bins. Different non-limiting examples how to perform the transformation will be described with Fig. 3, Fig.4, and Fig.5. The transformation in block 204 may be a frequency domain con- volution realized either using single fast Fourier transform / inverse fast Fourier trans- form (FFT / IFFT) pair, or multiple shorter overlapping FFT / IFFT pairs. For example, the apparatus may be configured to perform at least FFT of size M and IFFT of size M during transforming the first windowed portions of the part to obtain L first frequency domain bins, wherein M is a positive integer. The M may be equal to 2h, wherein h is a positive integer. However, it should be appreciated that values of L and M may be arbi-trarily selected. Compared to current restrictions requiring that ^^ = 2^^ × 3^^ × 5^^ ,wherein a, b and c are non-negative integers, more freedom is provided. Further, the restricted value of L means that spectral efficiency and / or allocation flexibility is re- stricted. By enabling arbitrarily selected L value, it is possible to increase spectrum uti- lization. Further, it makes it possible to support same allocation sizes for both cyclic prefix-orthogonal frequency division multiplexing (CP-OFDM) and DFT-s-OFDM wave- forms, thereby simplifying dynamic waveform switching, for example. Then the L first frequency domain bins are mapped (block 205), per a part, into N second frequency domain bins, wherein N is a positive integer whose value is bigger than L. The mapping may be performed by inserting Z zeros, or by replicating R first frequency domain bins, or by inserting Z zeros and by replicating R first frequency domain bins, wherein Z=N-L-R, and 0 ≤R≤ (N-L). The N second frequency domain bins are multiplied (block 206), per a part, elementwise by a second sequence, to obtain N second windowed portions of the part. The N second windowed portions of the part are transformed (block 207), per a part, into time domain by IFFT of size N to obtain N output parts, and a signal 222 to be transmitted is generated (block 208) based on the N output parts. For example, the signal may be generated by overlapping and adding the N output parts of the Q blocks. The signal may be generated for a single carrier frequency division multiple access waveform (SC-FDMA), or for a discrete Fourier transform spread orthogonal frequency division multiplexing (DFT-s-OFDM) waveform, for transmission. The process in the example of Fig.2B differs from the example of Fig.2A in that respect that the cyclic prefixes are added at a later stage, otherwise the process is similar. Referring to Fig.2B, L input symbols 221 are received, and the L input sym- bols are partitioned (block 202) into parts, wherein L is a positive integer. A part may be the L symbols, or a block (a processing block) of one or more symbols comprised in the L symbols in implementations in which the L symbols are divided into two or more parts (processing blocks, or simply blocks). Then samples of the parts are multiplied (block 203), per a part, i.e. samples part by part, elementwise. More precisely, samples of a part are multiplied ele- mentwise by a first sequence to obtain first windowed portions of the part. The thus obtained first windowed portions are transformed (block 204), per a part, into frequency domain to obtain L first frequency domain bins. As described above with Fig.2A, different non-limiting examples how to perform the transformation will be described with Fig.3, Fig.4, and Fig.5. The transformation in block 204 may be a frequency domain convolution realized either using single FFT / IFFT pair, or multiple shorter overlapping FFT / IFFT pairs. For example, the apparatus may be configured to perform at least FFT of size M and IFFT of size M during transforming the first win- dowed portions of the part to obtain L first frequency domain bins, wherein M is a pos- itive integer. The M may be equal to 2h, wherein h is a positive integer. However, it should be appreciated that values of L and M may be arbitrarily selected, as described above with Fig.2A. Then the L first frequency domain bins are mapped (block 205), per a part, into N second frequency domain bins, wherein N is a positive integer whose value is bigger than L. The mapping may be performed by inserting Z zeros, or by replicating R first frequency domain bins, or by inserting Z zeros and by replicating R first frequency domain bins, wherein Z=N-L-R, and 0 ≤R≤ (N-L). The N second frequency domain bins are multiplied (block 206), per a part, elementwise by a second sequence, to obtain N second windowed portions of the part. The N second windowed portions of the part are transformed (block 207), per a part, into time domain by IFFT of size N to obtain N output parts. The output parts may be samples. Further, cyclic prefix is added (block 201) to the output parts and a signal 222 to be transmitted is generated (block 208) based on the N output parts to which the cyclic prefix has been added. In other words, when the length of the cyclic prefix is N_CP, the signal is generated using N+N_CP output parts of block 201, the N+N_CP output parts being based on said N output parts of block 207. The signal may be generated for a single carrier frequency division multiple access waveform, or for a discrete Fourier transform spread orthogonal frequency division multiplexing (DFT-s- OFDM) waveform, for transmission. Fig.3 illustrates one detailed non-limiting example of how first windowed portions may be transformed (block 204 in Fig 2A / Fig.2B), per a part, into frequency domain to obtain L first frequency domain bins. For the clarity of description, in the example of Fig.3, a frequency domain convolution per a part is described. It should be appreciated that the process may comprise other functions not described herein. Referring to Fig. 3, first windowed portions (311) of a part are mapped (block 301) into M samples by zero padding, wherein M equals to or is bigger than W+L-1, wherein W is the number of the first windowed portions of the part. The M samples are transformed (block 302) into first transform domain by FFT of size M to obtain M first transform domain samples. The M first transform domain samples are multiplied (block 303) elementwise by a third sequence, to obtain M third windowed portions. The M third windowed portions are transformed (block 304) to M first fre- quency domain bins by IFFT of size M, and L first frequency domain bins (312) are selected from the M first frequency domain bins by discarding first W-1 first frequency domain bins and selecting next L first frequency domain bins out of the M first fre- quency domain bins. Naturally, any other way to select may be used. Fig. 4 illustrates another detailed non-limiting example of how first win- dowed portions may be transformed (block 204 in Fig 2A / Fig.2B), per a part, into fre- quency domain to obtain L first frequency domain bins. For the clarity of description, in the example of Fig. 4, a frequency domain convolution per a part is described. It should be appreciated that the process may comprise other functions not described herein. Referring to Fig. 4, first windowed portions (311) of a part are divided (block 401) into first overlapping portions of length M. The first overlapping portions are transformed (block 402) into first overlapping transform domain by FFT of size M to obtain first overlapping transform domain representations of the first overlapping portions. At least some of the first overlapping transform domain representations are multiplied (block 403) elementwise by corresponding second overlapping sequences 411 to obtain at least L third overlapping windowed portions. The second overlapping sequences 411 may be precalculated sequences or sequences of first overlapping com- plex portions that have undergone similar process as described in blocks 401 and 402. The L third overlapping windowed portions are transformed (block 404) into first overlapping frequency-domain bins by IFFT of size M. The L first overlapping fre- quency domain bins are combined (block 405) to obtain L first frequency domain bins 312. The combining may be through overlap-and-add or overlap-and-save (also called as overlap-and-discard) processing. Fig. 5 illustrates another detailed non-limiting example of how first win- dowed portions may be transformed (block 204 in Fig 2A / Fig.2B), per a part, into fre- quency domain to obtain L first frequency domain bins. The example of Fig.5 is based on the example of Fig.4. For the clarity of description, in the example of Fig. 5, a fre- quency domain convolution per a part is described. It should be appreciated that the process may comprise other functions not described herein. Referring to Fig.5, when the first windowed portions (311) of a part are to be processed, the number of first overlapping portions and the number of second over- lapping portions are determined (block 501). The number of first overlapping portions may be determined based on L and M, and the number of second overlapping portions may be determined based on L, M and W, wherein W is the number of the first win- dowed portions of the part. Then the first windowed portions (311) of a part are di- vided (block 401) into the determined number of first overlapping portions of length M. The first overlapping portions are transformed (block 402) into first overlapping transform domain by FFT of size M to obtain first overlapping transform domain rep- resentations of the first overlapping portions. At least some of the first overlapping transform-domain representations are multiplied (block 403) elementwise by corre- sponding second overlapping sequences 411 to obtain at least L third overlapping win- dowed portions. Since not all M results are used, there is no need to multiply all M rep- resentations. The L third overlapping windowed portions are transformed (block 404) into first overlapping frequency-domain bins by IFFT of size M. Then the L first over- lapping frequency domain bins are combined (block 405) to obtain L first frequency domain bins 312. The combining may be through overlap-and-add or overlap-and-save processing. In the examples of Fig. 4 and Fig. 5, any size of M can be used both in FFT / IFFT, thereby enabling realizing all the possible Discrete Fourier Transform (DFT) sizes L. (DFT is a discrete version of FFT.) Fig. 6 illustrates non-limiting example functionalities of an apparatus re- ceiving information, i.e. example functionalities how a wireless receiver, or an appa- ratus comprising the wireless receiver, or an apparatus comprised in the wireless re- ceiver, may process a received signal. Referring to Fig.6, when a signal 611 is received, P samples in time domain is obtained (block 601), per a block, wherein P is a positive integer. Said block may be a chunk of samples, shortly a chunk, or a sample block, corresponding to L input sym- bols at the transmitting entity. Then cyclic prefix is removed (block 602) from the P samples to obtain N samples, wherein N is a positive integer. The thus obtained N sam- ples are partitioned (block 603) into input parts. Then the input parts are transformed (block 604), per an input part, into frequency domain by FFT of size N to obtain N fre- quency domain bins. The N frequency domain bins are multiplied (block 605) ele- mentwise by a second sequence, to obtain N windowed frequency domain bins (per an input part). L windowed frequency domain bins are selected (block 606), per an input part, from the N windowed frequency domain bins, wherein L is a positive integer whose value is smaller than N. The L windowed frequency domain bins are trans- formed (block 607), per an input part, into time domain to obtain time domain input portions. Different non-limiting examples how to perform the transformation will be described with Fig. 7 and Fig. 8. The transformation in block 607 may be a discrete convolution, such as a frequency domain convolution converting the sequences into frequency domain, multiplying element-wise, and converting the result back into time domain. The frequency domain convolution may be realized either using single FFT / IFFT pair, or multiple shorter overlapping FFT / IFFT pairs. For example, the appa- ratus may be configured to perform at least FFT of size M and IFFT of size M during transforming the first windowed portions of the part to obtain L first frequency domain bins, wherein M is a positive integer. The M may be equal to 2h, wherein h is a positive integer. However, it should be appreciated that values of L and M may be arbitrarily selected, as explained above with Fig.2A. The time domain input portions of the input part are then multiplied (block 608), per an input part, elementwise by a first sequence to obtain windowed samples of the input part; and the windowed samples of the input parts are combined (block 609) into L symbols 612. Fig.7 illustrates one detailed non-limiting example of how L windowed fre- quency bins may be transformed (block 607 in Fig.6), per an input part, into time do- main to obtain time domain input portions. For the clarity of description, in the exam- ple of Fig.7, a frequency domain convolution per an input part is described. It should be appreciated that the process may comprise other functions not described herein. Referring to Fig.7, the L windowed frequency domain bins 711 of an input part are mapped (block 701) into M windowed frequency domain bins by zero padding, wherein M equals to or is bigger than W+L-1, wherein W*N / L is the number of the time domain portions of the input part. At the receiving entity, W may be seen as a number of output-rate samples, corresponding to the number of the first windowed portions at the receiving entity. The M windowed frequency domain bins are transformed (block 702) into first transform domain by FFT of size M to obtain M first transform domain samples. The M first transform domain samples are multiplied (block 703) ele- mentwise by a third sequence, to obtain M third windowed portions. The M third win- dowed portions are transformed (block 704) into M time domain samples by IFFT of size M, and L time domain input portions 712 are selected (block 705) from the M time domain samples. Fig.8 illustrates another detailed non-limiting example of how L windowed frequency bins may be transformed (block 607 in Fig.6), per an input part, into time domain to obtain time domain input portions. For the clarity of description, in the ex- ample of Fig. 8, a frequency domain convolution per a part is described. It should be appreciated that the process may comprise other functions not described herein. Referring to Fig.8, the L windowed frequency domain bins 711 of an input part is divided (block 801) into first overlapping portions of length M. The first over- lapping portions are transformed (block 802) into first overlapping transform domain by FFT of size M to obtain first overlapping transform domain representations of the first overlapping portions. At least some of the first overlapping transform domain rep- resentations are multiplied (block 803) elementwise by corresponding second over- lapping sequences 811 to obtain third overlapping portions. The second overlapping sequences 811 may be obtained as described above with sequences 411. The third overlapping portions are then transformed (block 804) into M first overlapping time domain samples by IFFT of size M. The M first overlapping time domain samples are then combined (block 805) through overlap-and-add or overlap-and-save processing to obtain L time domain input portions 712. Fig.9 and Fig.10 illustrate two non-limiting examples to generate a signal for the DFT-s-OFDM waveform from sequence of L symbols. The L input symbols may be phase shift keying (PSK) modulated symbols, or quadrature amplitude modulation (QAM) modulated symbols. In the example of Fig.9, a non-filtered signal is generated, and in the example of Fig.10 a filtered signal is generated. Further, in the example of Fig. 9 it is assumed that a part is L symbols, whereas in the example of Fig. 10 it is assumed that the part is a subset, or portion, of L symbols, called a block in the example of Fig.10. In other words, when integer Q indicates to how many parts L symbols aredivided, in the example of Fig. 9 ^^ = 1 and in the example of Fig. 10 Q>1. Further, inthe examples of Fig. 9 and Fig. 10, a transmission bandwidth in terms of number of modulation symbols L can be any value. Referring to Fig.9, it is assumed, for the sake of clarity of description, that a number of L symbol sequences is B, wherein a value of L can be any value. Hence, a transmission bandwidth in terms of the number of frequency-domain bins can haveany value. The sequences of L input symbols 911 in time domain are indexed for ^^ =0, 1, … , ^^ − 1, first input symbol of the ^^th sequence 921 being x0,b and last input sym-bol of the ^^th sequence 922 being xL-1, b. The input symbols are windowed (block 901) by a first sequence, which in the illustrated example is a complex-valued sequence^^0 ∈ ℂ^^×1. An example of the complex-valued sequence is given below with Example 3. Then the L first windowed portions 912 in time domain undergo a frequency domain convolution. For example, the frequency domain convolution may be the one described below with Fig.11 or the one described below with Fig.12. The resulting L frequency domain bins 913, or frequency domain represen- tations, are mapped (block 903) into N frequency domain bins by inserting (N-L) zeros, wherein N is an integer whose value is bigger than the value of L, to have spectral ex- tension into the frequency domain data. In another implementation the spectral exten- sion is obtained by replicating (N-L) frequency domain bins. In a further implementa- tion the spectral extension is obtained by both inserting zeros and replicating some of the frequency domain bins. The thus obtained second frequency domain bins 914 are windowed (block 904) by multiplying elementwise the frequency domain bins 914 by a second sequence,which in the illustrated example is a complex-valued sequence ^^0 ∈ ℂ^^×1. An example of the complex-valued sequence is given below with Example 3. The thus obtained N second windowed portions 915 in frequency domain are converted (block 905) into time domain by IFFT of size N. Cyclic prefix (CP) is added (block 906) to the time domain output parts 916resulting to ^^ + ^^CP,^^ samples 917 in time domain, ^^ + ^^CP,^^ denoted by N+N_CPin Fig.9. In other words, cyclic prefix (CP) of length ^^CP,^^is added into ^^th time do-main output-rate sequence of N samples. Here, the resulting ^^ + ^^CP,^^ samples cor-respond to a single output-rate DFT-s-OFDM -symbol, i.e. a symbol for transmissions for DFT-s-OFDM waveform. Referring to Fig.10, it is assumed, for the sake of clarity of description, that a number of L symbol sequences is B, wherein a value of L can be any value. Hence, a transmission bandwidth in terms of the number of frequency-domain bins can haveany value. The sequences of L input symbols 1011 in time domain are indexed for ^^ =0, 1, … , ^^ − 1, first input symbol of the ^^th sequence 1021 being x0,b and last inputsymbol of the ^^th sequence 1022 being xL-1, b. Cyclic prefix (CP) is added (block 1001) to the input symbols. In other words, cyclic prefix of length ^^CP,^^is added into ^^th sequence of L input-rate input symbols (i.e., in time domain prior to DFT). Here, theresulting ^^ + ^^CP,^^ symbols 1012, L+LCP,b denoted by L-c in Fig. 10, correspond to asingle input-rate DFT-s-OFDM symbol. Then the symbols are divided (block 1002), or shared, into Q parts, i.e. intoQ blocks. In other words, per a resulting DFT-s-OFDM symbol, the resulting ^^ + ^^CP,^^input symbols are divided, or shared, into ^^ blocks. For example, each block may con-sist of ^^^^ = (^^ + ^^CP,^^) / ^^ samples for ^^ = 0,1, … ,^^ − 1. Symbols may also be di-vided, or shared, such that the number of samples per a block is different in different blocks. For example, in case of odd ^^CP,^^, there may be one or more blocks with a dif- ferent number of samples compared to a number of samples in a first block. The thus obtained time domain representations 1013 are processed block-wise, the block-wise processing described with blocks 1003 to 1007 being similar to the processing de- scribed above with blocks 901 to 905 in Fig.9. The block-wise processing is performedQ times for ^^ = 0,1, In the block-wise processing, the input per a block q (per a part) comprises Lq samples 1013 in time domain, first input sample of the ^^th sequence 1023 being xq,0,b and last input sample of the ^^th sequence 1024 being xq,L-1, b. The input samples are windowed (block 1003) by a first sequence, which in the illustrated example is acomplex-valued sequence ^^ = 0,1, … ,^^ − 1. Then the Lq first win-dowed portions 1014 in time domain undergo a frequency domain convolution (block 1004). For example, the frequency domain convolution may be the one described be- low with Fig.11 or the one described below with Fig.12. The resulting Lq frequency domain bins 1015 (block bins), or frequency do- main representations, are mapped (block 1005) into N frequency domain bins by in- serting (N-L) zeros, wherein N is an integer whose value is bigger than the value of L, to have spectral extension into the frequency domain data. In another implementation the spectral extension is obtained by replicating (N-L) frequency domain bins. In a fur- ther implementation the spectral extension is obtained by both inserting zeros and replicating some of the frequency domain bins. The thus obtained second frequency domain bins 1016 are windowed (block 1006) by multiplying elementwise the frequency domain bins 1016 by a secondsequence, which in the illustrated example is a complex-valued sequence ^^^^ ∈ ℂ^^×1for ^^ = 0,1, … , ^^ − 1.The thus obtained N second windowed portions 1017 in frequency domain are converted (block 1007) into time domain by IFFT of size N. The thus obtained Q time domain results 1018 are processed (block 1008) in the example of Fig.10 using overlap and add (OLA). More precisely, the resulting Q time domain blocks 1018 undergo overlap and add process. (An exemplified overlap and add process is described below in point 11 of the example 3.) Consecutive DFT-s- OFDM symbols also undergo the overlap and add process. The result of the process is N filtered samples 1019 in time domain, ready for transmission. In another implemen- tation overlap and save (OLS) process may be used in block 1008. It should be appre-ciated, that the value of N in Fig. 10 corresponds to the value of ^^ + ^^CP,^^ in the ex-ample of Fig.9, due to the cyclic prefixes being add at the beginning of the process in the example of Fig.10. However, for the sake of clarity of description, in the example of Fig.10 mere N is used. Further, the samples 1019 are filtered because of the cyclic pre- fixes also undergo the frequency domain convolution. When the frequency domain con- volution is performed, as in the example of Fig. 10, for overlapping chunks of input samples, the frequency convolution is transformed into acyclic frequency convolution which gives better waveform characteristics than cyclic (circular) frequency convolu- tion. Fig. 11 illustrates a non-limiting example of a frequency domain convolu- tion the first windowed portions may undergo. The process is described assuming that it is performed for the example of Fig.10. It is a straightforward process to apply it to the example of Fig. 9, wherein Lq = L0= L and Q=1 (i.e. sequence of L symbols is one block). Referring to Fig.11, following is performed for each of the B sequences of L symbols and for each of the Q blocks. In other words, it is performed per a part. The Lq input samples 1111 in time domain are mapped (block 1101) into M samples, for examples by zero padding, i.e. inserting M-Lq zeros. Other examples of mapping are described above. The value of M can be any value fulfilling the following:^^ ≥ ^^^^ + ^^ − 1 for ^^ = 0,1, … ,^^ − 1. Then the M samples 1112 in time domain are converted (block 1102) to first transform domain by FFT of size M. For example, value (or size) ^^ = provides an efficient implementation of FFT, but any other value canbe used as well. Here, ⌈^^⌉ denotes the smallest integer greater than or equal to ^^.Then the M samples 1113 in first transform domain are windowed (block 1103) by multiplying elementwise the M samples in the first transform domain by acorresponding complex-valued sequence ^^ ^^×1^^ ∈ ℂ for ^^ = 0,1, … ,^^ − 1. For ex-ample, ^^^^may be obtained by FFT of size M from a prototype response ^^^^∈ +^^−1×1, i.e., ^^ − (^^^^ + ^^ − 1) last samples are padded by zeros. An example of theprototype response is given below with the example 3. The resulting windowed samples 1114 are converted (block 1104) into sec- ond transform domain by IFFT of size M, i.e. of the same size as FFT in block 1102. Then from the M output samples 1115 in second transform domain, the first Lq-1 output samples are discarded and next L samples out of the M output samples are selected (block 1105) and output 1116 is Lq frequency domain bins (result 1015 in Fig. 10). Fig.12 illustrates another non-limiting example of a frequency domain con- volution the first windowed portions may undergo. The process is described assuming that it is performed for the example of Fig.10. It is a straightforward process to apply it to the example of Fig.9, wherein Lq = L0= L and Q=1 (i.e. L symbols is one block). Referring to Fig.12, following is performed for each of the B sequences of L symbols and for each of the Q blocks. In other words, it is performed per a part. Referring to Fig.12, the Lq input samples 1211 are divided (block 1201) into overlapping parts of length M. The overlapping parts may be called data parts (over- lapping data parts). The number of overlapping data parts, NDP, may be determined by equation (1): ^^DP = ⌈(^^ + 0.5^^) / (0.5^^)⌉ (1)Then, the overlapping parts 1212 in time domain are converted into fre- quency domain using FFT of size M. As in the above, a value of the M can be any valuefulfilling the following: ^^ ≥ ^^^^ + ^^ − 1 for ^^ = 0,1, … , ^^ − 1. For example, value(or size) ^^ = 2⌈log2(^^^^ + ^^−1)⌉ provides an efficient implementation of FFT, but assaid, any other value can be used as well. Then the M samples 1213 in first transform domain are windowed (block 1203) by multiplying elementwise at least some of the M samples in first transform domain by corresponding sequences 1217, for example frequency-domain representa- tions of the impulse response parts. It should be appreciated that some of the element- wise multiplications are not needed as at the end L of the output samples are utilized. For example, sequences 1217 may be precalculated and obtained from a memory, and / or they, or some of them, may be obtained using the following process,in which complex-valued sequences ^^−1)×1 for ^^ = 0,1, … − 1 corre-sponding to impulse response are divided into the overlapping parts of the length M (same value as used block 1201), and after that the overlapping parts corresponding to impulse responses may be converted into frequency domain using FFT of size M, and the results are then input 1217. The number of overlapping impulse response parts may be obtained using equation (2). Then the results 1214 of the elementwise multiplications are converted (block 1204) into time domain by IFFT of size M, i.e. of the same size as FFT in block 1202. The thus obtained time domain sequences 1215 are combined in the illus- trated example through overlap-and-add (OLA) processing such that the L combined output samples 1216 correspond to the frequency domain convolution of the input samples the complex-value sequence ^^^^. In other words, the L output samples 1216 are Lq frequency domain bins (result 1015 in Fig.10). Alternatively, overlap-and-save (OLS) processing may be used in the combining. Fig.13 illustrates non-limiting example functionalities of an apparatus re- ceiving information, i.e. example functionalities how a wireless receiver, or an appa- ratus comprising the wireless receiver, or an apparatus comprised in the wireless re- ceiver, may process a received signal generated as described above with Fig.9 or Fig. 10, for example. In the illustrated example of Fig. 13 it is assumed that samples are processed per a sample, whereas in the example of Fig.14 it is assumed that samples are split, or divided, per a sample into sets or processing blocks. Further, in both exam- ples that samples have been obtained from a signal received. Referring to Fig.13, process starts by removing (block 1301) from the ob-tained P samples 1311, i.e. ^^ + ^^CP,^^ samples, in time domain cyclic prefix (CP) oflength ^^CP,^^, resulting to N samples in time domain. The N samples 1312 in time do- main are transformed (block 1302) by FFT of size N into N frequency domain bins. The thus obtained N frequency domain bins 1313 in frequency domain are windowed (block 1303) by multiplying elementwise the frequency domain bins 1313 by a se-quence, which may be a complex-valued sequenceThe sequence may cor- respond to a second sequence described above at a transmitting entity. Hence, a trans- ceiver may use the sequence both when transmitting and when receiving. From the thus obtained N windowed frequency bins 1314 L windowed frequency bins are se- lected (block 1304). For example, first and last L / 2 windowed frequency domain bins out of the N windowed frequency bins may be selected. Then the L windowed frequency bins 1315 in frequency domain undergo a frequency domain convolution (block 1305). For example, a process described above with Fig. 7 or with Fig. 8 may be performed in block 1305. Resulting L time domain input portions 1316 in time domain are then windowed (block 1306) by multiplyingthen elementwise by a sequence, which may be a complex-valued sequence ^^0 ∈ ℂ^^×1. The sequence may correspond to a first sequence described above at a transmitting entity. Hence, a transceiver may use also that sequence both when transmitting and when receiving. The resulting L received output symbols 1317 in time domain are in- dexed for b=0, 1, …, B-1, first output of the ^^th L symbol sequence 1321 being x0,b and last output of the ^^th L symbol sequence 1322 being xL-1, b. Referring to Fig.14, process starts by removing (block 1301) from the ob-tained P samples 1411. i.e. ^^ + ^^CP,^^ samples, in time domain cyclic prefix (CP) oflength ^^CP,^^, resulting to N samples in time domain. The N samples 1412 in time do- main are then divided (block 1402), or split, into Q sets, or blocks (processing blocks), or parts of ^^^^samples, wherein a value of the Q is two or more. The thus obtained Q sets of ^^^^samples 1413 in time domain undergo (block 1403) each the process de- scribed above with blocks 1302 to block 1306 in Fig.13. The resulting Q sets of L output symbols (symbol parts) in time domain 1414, are then combined (block 1404), for ex- ample by overlap and add process, or by overlap and save process. The resulting L re- ceived output symbols 1415 in time domain are indexed for b=0, 1, …, B-1, first output of the ^^th L symbol sequence 1421 being x0,b and last output of the ^^th L symbol se- quence 1422 being xL-1, b. As can be seen from the above examples, number of frequency-domain bins and hence number of symbols L can be any value, for example, when resources are al- located in terms of resource blocks consisting of 12 resource elements, the value of L may be set to be 12d, wherein d is a positive integer. Below some specific examples are described to analyze computational com- plexity of some above described examples compared against a plain DFT-s-OFDM. In the plain DFT-s-OFDM DFT or FFT of size L, which is equivalent to allocation size in number of subcarriers, is taken from the input 911. Then the resulting L frequency bins are mapped into N bins by adding (N-L) zeros, IFFT of size N is then taken, and then the process continues as in block 906. Example 1: Generating a signal using example of Fig. 9 for non-filtered DFT-s-OFDM waveform for 60 MHz channel with a convolution of Fig.11 : For 60 MHz channel with 60 kHz sub-carrier spacing (SCS), the number ofphysical resource blocks (PRBs) is 79. Therefore ^^ = 12 × 79 = 948 (e.g. in block901). The output sample rate is ^^s = 122.88 Msps (mega samples per second) and,therefore, ^^ = ^^s / 60000 = 2048 (e.g. in block 905). Here, one (^^ = 1) processingblock per L symbols is used. For convolution of Fig. 11, ^^0 = ^^ = 948 (in block 1101). Therefore,when the computationally efficient power-of-two transform sizes are used, IFFT andFFT are of size ^^ = 2⌈log2(^^^^ + ^^−1)⌉ = 2048 (e.g. in block 1104). The IFFT of Fig. 9 (inblock 905) is of size ^^ = 2048. In addition, element-wise multiplication by window(^^0) of length ^^ = 948 (in block 901), window (^^0) of length ^^ = 2048 (in block904), and window (^^ ) of length ^^ ⌈log2(^^^^ + ^^−1)⌉0 = 2 = 2048 (in block 1103) areneeded. The overall complexity per generated DFT-s-OFDM symbol is then three trans- forms of size 2048 and three windowing operations. In terms of number of real multiplications, one FFT of size 2048 takes 16388 real multiplications using split-radix FFT algorithm. For three transforms and three windows the total complexity is then ^^mult = 3 × 16388 + 3(^^ + ^^ + ^^) = 64296.Here, it is assumed that complex-to-complex multiplication takes three real multiplications. The complexity of the plain DFT-s-OFDM generation is not straightforwardto estimate as no algorithms for the computation of DFT of size ^^ = 12 × 79 is knowin the literature. Assuming that “schoolbook” approach (direct evaluation of summa- tions of multiplications) is used for the evaluating the transforms, then the number ofreal multiplications for DFT of size 79 is 3 × 792 = 18723. DFT of size 12 requires 16real multiplications, therefore the overall complexity needed for evaluating DFT of size948 is 12 × 18723 + 79 × 16 = 225940. Also here three real multiplications is usedfor complex-to-complex multiplication. IFFT is realized using the split-radix FFT re- quiring 16388 real multiplications. Therefore, the overall complexity in terms of realmultiplications for the plain DFT-s-OFDM generation is 225940 + 16388 = 242328.As can be seen, the complexity of the plain DFT-s-OFDM generation is 3.8 times the complexity of the example of Fig.9 with Fig.11. Fig.15 illustrates simulated power spectral density (PSD) for the example1 (i.e. example of Fig. 9 with Fig. 11) using FFT / IFFT of size ^^ = 2048 for generatingDFT of size ^^ = 12 × 79 = 948 and PSD for the plain DFT-s-OFDM generated directlyusing DFT of size ^^ = 948. As can be seen, PSDs are the same for both approaches. Fig. 16 illustrates measured error vector magnitudes (EVMs) for both ap- proaches, assuming that plain DFT-s-OFDM receiver processing is used. In the example, EVM is measured ^^EVM / 2 samples before and after a reference point, where ^^EVMis the EVM window length defined by 3GPP for the cyclic prefix, CP, the corresponding EVM values being denoted by “EVM low” and “EVM high”, respectively. “EVM middle” denotes the EVM for reference timing, in the middle of CP. As can be seen, EVMs are zero for both approaches, as expected. Example 2: Generating a signal using example of Fig. 9 for non-filtered DFT-s-OFDM waveform for 60 MHz channel with a convolution of Fig.12 : The specifications are the same as in the Example 1 except now process inFig.12 is used for convolution. Let us use FFT size of ^^ = 512 for realizing DFT. Inputdata of length ^^ = 948 and impulse response (corresponding to ^^0) of length ^^^^ +^^ − 1 = 1895 is divided into overlapping parts (in block 1201). In this case, the num-ber of overlapping parts of size ^^ = 512 are ^^DP = 5 and ^^IP = 8 , respectively(calculated using equations (1) and (2)). In other words, the data and the impulse re-sponse are represented as matrices of size ^^ × ^^DP and ^^ × ^^DP , respectively.These matrices are converted column-wise into frequency domain by FFTs (in block 1202). In general, all the frequency domain representations of the data parts can be multiplied by all the frequency domain representations of the impulse response parts(in block 1203). In this case, the number of vector-to-vector multiplications is 5 × 8 =40. However, as only ^^ output samples are utilized, it is sufficient to omit some of the columns and carry out only needed ones as shown in Table 1 below. In this case, only 24 vector multiplications of FFTs of the impulse response parts by FFTs of the data parts are needed. FFTs for the impulse response parts can be precomputed, i.e., those do not need to be implemented. Only five output parts are needed (corresponding to vector multiplications on five rows on Table 1), therefore, only five parts needs to be converted back to time domain by IFFTs (in block 1204). The overlap-and-add takes only additions (in block 1205). Overall, processing takes 10 FFTs / IFFTs of size 512, IFFT of size 2048, 24 element-wise multiplications of the impulse response parts by the data parts, and windowing of length ^^ and ^^. FFT / IFFT of size 512 takes 3076 real multiplications. The overall complexity in terms of real multiplications is then10 × 3076 + 16388 + 3 × (24 × 512 + 948 + 2048) = 93000. This value is 1.4 timeshigher than in the Example 1, but this approach is seen feasible as same optimized transform realization can be used for implementing all DFT sizes. Table 1: Needed multiplications of the data parts (DP) by the impulse re- sponse parts (IP) in Example 2. Here, the row starting with “DP 1” means that first col- umn of FFT of the data part matrix is multiplied by the fourth, fifth, sixth, seventh, and eight column of FFT of the impulse response part matrix. IP 1 IP 2 IP 3 IP 4 IP 5 IP 6 IP 7 IP 8DP 1 x x x x xDP 2 x x x x xDP 3 x x x x xDP 4 x x x x xDP 5 x x x xFig.17 illustrates PSD for the example 2 (i.e. example of Fig.9 with Fig.12)using FFT of size ^^ = 2048 for generating DFT of size ^^ = 948 and PSD for the plainDFT-s-OFDM generated directly using DFT of size ^^ = 948. As can be seen, PSDs arethe same for both approaches. Even though not illustrated, also EVMs are zero for both approaches, as expected. Example 3: Generating a signal using example of Fig.10 for filtered DFT-s-OFDM wave- form for 20 MHz channel with 15 kHz SCS with a convolution of Fig.11 using followingalgorithm with following values ^^ = 2048, ^^ = 12 × 106 = 12 × 2 × 53 = 1272,and two (^^ = 2) processing blocks per resulting DFT-s-OFDM symbol:1. For simplicity, assume that CP length is the same for all DFT-s-OFDM symbols(for ^^ = 0,1, … , ^^ − 1). Now CP length on the high-rate side (after IFFT) is^^CP,^^ = 9 / 128 × 2048 = 144 samples. This corresponds to the ^^CP,^^ = ⌈9 / 128 × 1272⌉ = 90 samples on the low-rate side (before DFT). Add CP of length90 symbols to input blocks of ^^ = 1272 symbols (in block 1001). Total numberof symbols per block corresponding to DFT-s-OFDM symbol is now 90 + 1272 = 1362.2. Divide or share the input samples of the ^^th DFT-s-OFDM symbol to be gener-ated into ^^ = 2 parts such that both parts consists of ^^0 = ^^1 = 1362 / 2 =681 symbols (in block 1202). Let us denote the resulting symbol vectors by 3. Multiply ^^0,^^ and ^^1,^^ elementwise by vectors ^^0 and ^^1 , respectively,where for ^^ = 1,2, … , ^^^^ and ^^ = 0,1 (inblock 1203). Here, [^^^^]^^denotes the ^^th element of vector ^^^^.4. Use ^^ = = 2048 for convolution. Map themultiplied vectors diag(^^0)^^0,^^and diag(^^1)^^1,^^into the first ^^^^input bins of FFT transforms of size ^^ (in block 1101). 5. Take FFTs of size ^^ (in block 1102). Let us denote the transformed blocks as^^^^^^1diag(^^1)^^0,^^and ^^^^^^1diag(^^2)^^1,^^. Here, ^^^^denotes DFT matrix of size ^^ and matrix ^^1maps ^^^^windowed samples into ^^ input bins of DFT. 6. Multiply the transformed vectors elementwise by vectors ^^0 = ^^^^^^2^^0 and^^ = ^^^^^^2^^1 , respectively, where a prototype response [^^^^]^^ = exp ^^^^(^^ − ^^^^)2 )for ^^ = 1, 2, … , ^^ + ^^^^ − 1 and ^^ = 0, 1 (in block 1103). Here,matrix ^^2 maps ^^ + ^^^^ − 1 samples into ^^ input bins of DFT.7. Take IFFT of size ^^ (in block 1104). Let us denote the transformed blocks as^^^−^1diag(^^0)^^^^^^diag(^^0)^^0,^^and ^^^−^1diag(^^1)^^^^^^diag(^^1)^^1,^^. Here, ^^^−^1denotes the IDFT matrix of size ^^. 8. Discard ^^^^ first samples and select the next ^^ samples from each of the trans-formed sequences (in block 1105). 9. Multiply the transformed vectors elementwise by vectors ^^0 = ^^0 ⊙ ^^0 and^^ = ^ ^1 ⊙ ^^1, respectively, (in block 1006) where 1)(^^ + 1) + ^^2 / 2)) for ^^ = 1,2, … , ^^ and ^^ = 0,1. Here, ^^^^ = ^^ / 4 − ^^CP / ^^and ^^^^is desired pulse shaping response. 10. Take IFFT of size ^^ from the resulting blocks (in block 1007). Let us denotethese processing blocks as 11. Define two sets of output indices: and and construct the output vector by adding the ^^0,^^and ^^1,^^to output starting from ^^0,^^ and ^^1,^^, respectively, for ^^ = 0,1, … , ^^ − 1 (in block 1008).In the above filtered-DFT-s-OFDM processing (Example of Fig.10), CP is in- serted at the low-rate side before DFT and then it is interpolated at the high rate by the DFT / IFFT pair. The CP lengths are defined on high-rate side, e.g., for 10 MHz channelwith 15 kHz SCS, the CP length is ^^CP,^^ = 80 samples for the first DFT-s-OFDM symbolwithin the half subframe (^^ = 0) while for the other DFT-s-OFDM symbols the CPlength is ^^CP,^^ = 72 samples (^^ ≠ 0). Now the proposed approach uses CPs of length⌈72^^ / ^^⌉ = 49 for first DFT-s-OFDM symbol within the half subframe and ⌈80^^ / ^^⌉ =44 for the others. Then these low-rate CPs are interpolated to high rate giving49^^ / ^^ = 80.4103 and 44^^ / ^^ = 72.2051 samples. However, the overlap and add(OLA) process in block 1008 aligns the interpolated CP sequences exactly such that CP is 80 and 72 samples, respectively. Hence, the CP performance is not compromised. For plain DFT-s-OFDM waveform generation, additional filtering block is needed to limit the spectral leakage of the resulting waveform. Here, the reference de-sign is trivial time domain filter of order 120. For filtering of ^^ = 2048 samples, thecomplexity is 2 × 120 × 2048 / 2 = 245760 real multiplications. For the proposed ap-proach, the processing consists of six transforms of size 2048 and six windowing oper-ations. The complexity is therefore 6 × 16388 + 3(^^0 + ^^1 + 2^^ + 2^^) = 125949real multiplications. The complexity for the proposed approach for generating the fil- tered DFT-s-OFDM waveform is therefore only 50% of that of the filtering needed by the plain DFT-s-OFDM waveform generations. Fig.18 illustrates simulated power spectral density (PSD) for the example 3 (i.e. example of Fig. 10 with Fig. 11), called in the Fig. 18 “flexible filtered DFT-s-OFDM”, using FFT of size ^^ = 2048 for generating DFT of size ^^ = 12 × 79 = 948,PSD for the plain DFT-s-OFDM generated directly using DFT of size ^^ = 948, and fortime filtered plain DFT-s-OFDM, called in Fig.18 “time-domain filtered DFT-s-ODFM”. As can be seen, the spectral containment in terms of out-of-band emissions for the ap- proach of the example 3 is better (> 10 dB) when compared to the conventional time- domain filtered approach. Fig. 19 illustrates measured error vector magnitudes (EVMs) for the ap- proaches, assuming that plain DFT-s-OFDM is used at the receiver. In the example, EVM is measured ^^EVM / 2 samples before and after a reference point, where ^^EVMis the EVM window length defined by 3GPP for the cyclic prefix, CP, the corresponding EVM values being denoted by “EVM low” and “EVM high”, respectively. “EVM middle” de- notes the EVM for reference timing, in the middle of CP. As can be seen, the cyclic prefix performance is not compromised. The blocks and related functions described above by means of Fig.1 to Fig. 14 are in no absolute chronological order, and some of them may be performed simul- taneously or in an order differing from the given one. Other functions can also be exe- cuted between them or within them, and other signal processing applied. Some of the blocks or part of the blocks or one or more pieces of information can also be left out or replaced by a corresponding block or part of the block or one or more pieces of infor- mation. Furthermore, some of the blocks in one example may be combined with an- other example. Fig.20 illustrates an apparatus 2001, that may be configured at least to gen- erate signals to be transmitted according to some embodiments, or configured at least to process received signals according to some embodiments, or configured at least to generate signals to be transmitted according to some embodiments and to process re- ceived signals according to some embodiments. The apparatus, examples of which are given with Fig. 1, may be a wireless transmitter, or a wireless receiver, or a wireless transceiver, or an apparatus comprising one or more wireless transmitters, and / or one or more wireless receivers, and / or one or more wireless transceivers, or be comprised in a wireless transmitter, or in a wireless receiver, or in a wireless transceiver. Differ- ent examples of such apparatuses are described above with Fig.1. Fig.21 illustrates an apparatus that may implement distributed functionality of the apparatus illustrated in Fig.20. According to an embodiment, there is provided an apparatus comprising at least means for partitioning L input symbols into parts, wherein L is a positive integer; means for multiplying, per a part, elementwise samples of the part by a first sequence to obtain first windowed portions of the part; means for transforming, per a part, the first windowed portions of the part into frequency domain to obtain L first frequency domain bins; means for mapping, per a part, the L first frequency domain bins into N second frequency domain bins by performing at least one of inserting Z zeros or by replicating R first frequency domain bins, wherein N is a positive integer whose value is bigger than L, Z=N-L-R, and 0 ≤R≤ (N-L); means for multiplying, per a part, ele- mentwise the N second frequency domain bins by a second sequence, to obtain N sec- ond windowed portions of the part; means for transforming, per a part, the N second windowed portions of the part into time domain by inverse fast Fourier transform of size N to obtain N output parts; means for generating a signal to be transmitted based on the N output parts; and means for adding cyclic prefix either to the L input symbols before the partition or to the output parts before generating the signal. According to an embodiment, there is provided an apparatus comprising at least means for receiving a signal; means for obtaining, per a block received in the signal, P samples in time domain, wherein P is a positive integer; means for removing cyclic prefix from the P samples to obtain N samples, wherein N is a positive integer; means for partitioning N samples into input parts; means for transforming, per an in- put part, the input parts into frequency domain by fast Fourier transform of size N to obtain N frequency domain bins; means for multiplying, per an input part, elementwise the N frequency domain bins by a second sequence, to obtain N windowed frequency domain bins; means for selecting, per an input part, from the N windowed frequency domain bins L windowed frequency domain bins, wherein L is a positive integer whose value is smaller than N; means for transforming, per an input part, the L windowed frequency domain bins into time domain to obtain time domain input portions; means for multiplying, per an input part, elementwise the time domain input portions of the input part by a first sequence to obtain windowed samples of the input part; and means for combining the windowed samples of the input parts into L symbols. The apparatus 2001 may comprise one or more communication control cir- cuitry 2020, such as at least one processor, and at least one memory 2030, including one or more algorithms 2031, such as a computer program code (software) wherein the at least one memory and the computer program code (software) are configured, with the at least one processor, to cause the apparatus to carry out any one of the ex- emplified functionalities of a corresponding apparatus, described above with any of Fig.1 to Fig.14. Said at least one memory 2030 may also comprise at least one database 2032. Referring to Fig. 20, the one or more communication control circuitries 2020 of the apparatus 2001 comprise at least an enhanced signal processing circuitry 2021 which is at least configured to perform signal processing. To this end, the en- hanced signal processing circuitry 2021 of the apparatus 2001 is configured to carry out at least some of the functionalities described above, e.g., by means of Fig.1 to Fig. 14, using one or more individual circuitries. Referring to Fig.20, the memory 2030 may be implemented using any suit- able data storage technology, such as semiconductor based memory devices, flash memory, magnetic memory devices and systems, optical memory devices and systems, fixed memory and removable memory. Referring to Fig.20, the apparatus 2001 may further comprise different in- terfaces 2010 such as one or more communication interfaces (TX / RX) comprising hardware and / or software for realizing communication connectivity according to one or more communication protocols and / or for realizing sensing, for example joint com- munication and sensing. The one or more communication interfaces 2010 may enable connecting to the Internet and / or to a core network of a wireless communications net- work and / or to a radio access network and / or to other apparatuses within range of the apparatus. The one or more communication interface 2010 may provide the appa- ratus with communication capabilities to communicate in a cellular communication system and enable communication to second apparatuses, such as different network nodes or elements or device components, e.g., mobile apparatuses, such as terminal devices or user equipments, for example. The one or more communication interfaces 2010 may comprise standard well-known components such as an amplifier, filter, fre- quency-converter, (de)modulator, and encoder / decoder circuitries, controlled by the corresponding controlling units, and one or more antennas. In an embodiment, as shown in Fig.21, at least some of the functionalities of the apparatus of Fig. 20 may be shared between two physically separate devices, forming one operational entity. Therefore, the apparatus may be seen to depict the op- erational entity comprising one or more physically separate devices for executing at least some of the described processes. Thus, the apparatus of Fig. 21, utilizing such shared architecture, may comprise a control unit CU 2120, or a remote control unit, such as a host computer or a server computer, operatively coupled (e.g. via a wireless or wired connection) to a remote distributed unit DU 2122 located in the first appa- ratus or in a remote head of the first apparatus. In an embodiment, at least some of the described processes may be performed by the CU 2120. In an embodiment, the execu- tion of at least some of the described processes may be shared among the DU 2122 and the CU 2120. Similar to Fig.20, the apparatus of Fig.21 may comprise one or more com- munication control circuitries (CNTL) 2120, such as at least one processor, and at least one memory (MEM) 2130, including one or more algorithms (PROG) 2131, such as a computer program code (software) wherein the at least one memory and the computer program code (software) are configured, with the at least one processor, to cause the apparatus to carry out any one of the exemplified functionalities of the apparatus, de- scribed above, e.g., by means of Fig.1 to Fig.14. In embodiments, the CU 2120 may generate a virtual network through which the CU 2120 communicates with the DU 2122. In general, virtual networking may involve a process of combining hardware and software network resources and network functionality into a single, software-based administrative entity, a virtual net- work. Network virtualization may involve platform virtualization, often combined with resource virtualization. Network virtualization may be categorized as external virtual networking which combines many networks, or parts of networks, into the server com- puter or the host computer (e.g. to the CU). External network virtualization is targeted to optimized network sharing. Another category is internal virtual networking which provides network-like functionality to the software containers on a single system. Vir- tual networking may also be used for testing the terminal device. In embodiments, the virtual network may provide flexible distribution of operations between the DU and the CU. In practice, any digital signal processing task may be performed in either the DU or the CU and the boundary where the responsibil- ity is shifted between the DU and the CU may be selected according to implementation. As used in this application, the term ‘circuitry’ may refer to one or more or all of the following: (a) hardware-only circuit implementations, such as implementa- tions in only analog and / or digital circuitry, and (b) combinations of hardware circuits and software (and / or firmware), such as (as applicable): (i) a combination of analog and / or digital hardware circuit(s) with software / firmware and (ii) any portions of hardware processor(s) with software, including digital signal processor(s), software, and memory(ies) that work together to cause an apparatus, such as a terminal device or an access node, to perform various functions, and (c) hardware circuit(s) and pro- cessor(s), such as a microprocessor(s) or a portion of a microprocessor(s), that re- quires software (e.g. firmware) for operation, but the software may not be present when it is not needed for operation. This definition of ‘circuitry’ applies to all uses of this term in this application, including any claims. As a further example, as used in this application, the term ‘circuitry’ also covers an implementation of merely a hardware circuit or processor (or multiple processors) or a portion of a hardware circuit or pro- cessor and its (or their) accompanying software and / or firmware. The term ‘circuitry’ also covers, for example and if applicable to the particular claim element, a baseband integrated circuit for an access node or a terminal device or other computing or net- work device. In an embodiment, at least some of the processes described in connection with Fig. 1 to Fig. 14 may be carried out by an apparatus comprising corresponding means for carrying out at least some of the described processes. Some example means for carrying out the processes may include at least one of the following: detector, pro- cessor (including dual-core and multiple-core processors), digital signal processor, controller, receiver, transmitter, encoder, decoder, memory, RAM, ROM, software, firmware, display, user interface, display circuitry, user interface circuitry, user inter- face software, display software, circuit, antenna, antenna circuitry, and circuitry. In an embodiment, the at least one processor, the memory, and the computer program code form processing means or comprises one or more computer program code portions for carrying out one or more operations according to any one of the embodiments of Fig. 1 to Fig.14 or operations thereof. Embodiments and examples as described may also be carried out in the form of a computer process defined by a computer program or portions thereof. Em- bodiments of the functionalities described in connection with Fig.1 to Fig.14 may be carried out by executing at least one portion of a computer program comprising corre- sponding instructions. The computer program may be provided as a computer reada- ble medium comprising program instructions stored thereon or as a non-transitory computer readable medium comprising program instructions stored thereon. The computer program may be in source code form, object code form, or in some interme- diate form, and it may be stored in some sort of carrier, which may be any entity or device capable of carrying the program. For example, the computer program may be stored on a computer program distribution medium readable by a computer or a pro- cessor. The computer program medium may be, for example but not limited to, a record medium, computer memory, read-only memory, electrical carrier signal, telecommu- nications signal, and software distribution package, for example. The computer pro- gram medium may be a non-transitory medium. The term “non-transitory,” as used herein, is a limitation of the medium itself (i.e., tangible, not a signal) as opposed to a limitation on data storage persistency (e.g., RAM vs. ROM). Coding of software for car- rying out the embodiments as shown and described is well within the scope of a person of ordinary skill in the art. Even though the embodiments have been described above with reference to examples according to the accompanying drawings, it is clear that the embodiments are not restricted thereto but can be modified in several ways within the scope of the appended claims. Therefore, all words and expressions should be interpreted broadly and they are intended to illustrate, not to restrict, the embodiment. It will be obvious to a person skilled in the art that, as technology advances, the inventive concept can be implemented in various ways within the scope of independent claims. Further, it is clear to a person skilled in the art that the described embodiments may, but are not required to, be combined with other embodiments in various ways within the scope of independent claims.

Claims

CLAIMS 1. An apparatus comprising at least one processor and at least one memory storing instructions that, when executed by the at least one processor, cause the appa- ratus to at least: partition L input symbols into parts, wherein L is a positive integer; multiply, per a part, elementwise samples of the part by a first sequence to obtain first windowed portions of the part; transform, per a part, the first windowed portions of the part into frequency domain to obtain L first frequency domain bins; map, per a part, the L first frequency domain bins into N second frequency domain bins by performing at least one of inserting Z zeros or replicating R first fre- quency domain bins, wherein N is a positive integer whose value is bigger than L, Z=N- L-R, and 0 ≤R≤ (N-L); multiply, per a part, elementwise the N second frequency domain bins by a second sequence, to obtain N second windowed portions of the part; transform, per a part, the N second windowed portions of the part into time domain by inverse fast Fourier transform of size N to obtain N output parts; generate a signal to be transmitted based on the N output parts; and add cyclic prefix either to the L input symbols before the partition or to the output parts before generating the signal.

2. The apparatus of claim 1, wherein the at least one processor and the at least one memory storing instructions, when executed by the at least one processor, further cause the apparatus to perform at least fast Fourier transform of size M and inverse fast Fourier transform of size M during transforming the first windowed por- tions of the part to obtain L first frequency domain bins, wherein M is a positive integer.

3. The apparatus of claim 2, wherein M = 2h, wherein h is a positive integer.

4. The apparatus of claim 1, 2 or 3, wherein the at least one processor and the at least one memory storing instructions, when executed by the at least one pro- cessor, further cause the apparatus to transform, per a part, the first windowed por- tions of the part into frequency domain to obtain L first frequency domain bins by per- forming, per a part, a frequency domain convolution comprising at least: mapping first windowed portions of the part into M samples by zero pad- ding, wherein M equals to or is bigger than W+L-1, wherein W is the number of the first windowed portions of the part;transforming the M samples into a first transform domain by fast Fourier transform of size M to obtain M first transform domain samples; multiplying elementwise the M first transform domain samples by a third sequence, to obtain M third windowed portions; transforming the M third windowed portions to M first frequency domain bins by inverse fast Fourier transform of size M; and selecting from the M first frequency domain bins the L first frequency do- main bins.

5. The apparatus of claim 4, wherein the at least one processor and the at least one memory storing instructions, when executed by the at least one processor, further cause the apparatus to select the L first frequency domain bins by discarding first W-1 first frequency domain bins and selecting next L first frequency domain bins out of the M first frequency domain bins.

6. The apparatus of claim 1, 2 or 3, wherein the at least one processor and the at least one memory storing instructions, when executed by the at least one pro- cessor, further cause the apparatus to transform, per a part, the first windowed por- tions of the part into frequency domain to obtain L first frequency domain bins by per- forming, per a part, a frequency domain convolution comprising at least: dividing first windowed portions into first overlapping portions of length M; transforming the first overlapping portions into first overlapping transform domain by fast Fourier transform of size M to obtain first overlapping transform do- main representations of the first overlapping portions; multiplying elementwise at least some of the first overlapping transform domain representations by corresponding second overlapping sequences to obtain at least L third overlapping windowed portions; and combining the L third overlapping windowed portions through overlap- and-add or overlap-and-save processing to obtain L first frequency-domain bins.

7. The apparatus of claim 6, wherein the at least one processor and the at least one memory storing instructions, when executed by the at least one processor, further cause the apparatus to determine the number of first overlapping portions based on L and M, and the number of second overlapping portions based on L, M and W, wherein W is the number of the first windowed portions of the part.

8. The apparatus of any of claims 1 to 7, wherein the at least one processor and the at least one memory storing instructions, when executed by the at least one processor, cause the apparatus to: partition the L input symbols into L modulated symbols; and add the cyclic prefix to the N output parts, which are symbols.

9. The apparatus of any of claims 1 to 7, wherein the at least one processor and the at least one memory storing instructions, when executed by the at least one processor, cause the apparatus to: add the cyclic prefix to the L input symbols to obtain L input symbols; partition the L input symbols into parts by dividing, per an input symbol, the input symbol into Q blocks, a block containing W samples, wherein Q and W are positive integers; and generate the signal by overlapping the N output parts of the Q blocks.

10. An apparatus comprising at least one processor and at least one memory storing instructions that, when executed by the at least one processor, cause the appa- ratus to at least: receive a signal; obtain, per a block received in the signal, P samples in time domain, wherein P is a positive integer; remove cyclic prefix from the P samples to obtain N samples, wherein N is a positive integer; partition N samples into input parts; transform, per an input part, the input parts into frequency domain by fast Fourier transform of size N to obtain N frequency domain bins; multiply, per an input part, elementwise the N frequency domain bins by a second sequence, to obtain N windowed frequency domain bins; select, per an input part, from the N windowed frequency domain bins L windowed frequency domain bins, wherein L is a positive integer whose value is smaller than N; transform, per an input part, the L windowed frequency domain bins into time domain to obtain time domain input portions; multiply, per an input part, elementwise the time domain input portions of the input part by a first sequence to obtain windowed samples of the input part; and combine the windowed samples of the input parts into L symbols.

11. The apparatus of claim 10, wherein the at least one processor and the at least one memory storing instructions, when executed by the at least one processor, further cause the apparatus to transform, per an input part, the L windowed frequency domain bins of the input part into the time domain to obtain L time domain input por- tions by performing, per an input part, a frequency domain convolution comprising at least: mapping the L windowed frequency domain bins of the input part into M windowed frequency domain bins by zero padding, wherein M equals to or is bigger than W+L-1, wherein W*N / L is the number of the time domain portions of the input part; transforming the M windowed frequency domain bins into a first transform domain by fast Fourier transform of size M to obtain M first transform domain samples; multiplying elementwise the M first transform domain samples by a third sequence, to obtain M third windowed portions; transforming the M third windowed portions into M time domain samples by inverse fast Fourier transform of size M; and selecting from the M time domain samples the L time domain input por- tions.

12. The apparatus of claim 10, wherein the at least one processor and the at least one memory storing instructions, when executed by the at least one processor, further cause the apparatus to transform, per an input part, the L frequency domain bins of the input part into time domain to obtain L time domain input portions by per- forming, per an input part, a frequency domain convolution comprising at least: dividing L windowed frequency domain bins into first overlapping portions of length M; transforming the first overlapping portions into a first overlapping trans- form domain by fast Fourier transform of size M to obtain first overlapping transform domain representations of the first overlapping portions; multiplying elementwise at least some of the first overlapping transform domain representations by corresponding second overlapping sequences to obtain third overlapping portions; and transforming the third overlapping portions into M first overlapping time domain samples by inverse fast Fourier transform of size M; and combining the M first overlapping time domain samples through overlap- and-add or overlap-and-save processing to obtain L time domain input portions.

13. The apparatus of any preceding claim, wherein L=12d, wherein d is a positive integer.

14. A method comprising at least: partitioning L input symbols into parts, wherein L is a positive integer; multiplying, per a part, elementwise samples of the part by a first sequence to obtain first windowed portions of the part; transforming, per a part, the first windowed portions of the part into fre- quency domain to obtain L first frequency domain bins; mapping, per a part, the L first frequency domain bins into N second fre- quency domain bins by performing at least one of inserting Z zeros or replicating R first frequency domain bins, wherein N is a positive integer whose value is bigger than L, Z=N-L-R, and 0 ≤R≤ (N-L); multiplying, per a part, elementwise the N second frequency domain bins by a second sequence, to obtain N second windowed portions of the part; transforming, per a part, the N second windowed portions of the part into time domain by inverse fast Fourier transform of size N to obtain N output parts; generating a signal to be transmitted based on the N output parts; and adding cyclic prefix either to the L input symbols before the partition or to the output parts before generating the signal.

15. A method comprising at least: receiving a signal; obtaining, per a block received in the signal, P samples in time domain, wherein P is a positive integer; removing cyclic prefix from the P samples to obtain N samples, wherein N is a positive integer; partitioning N samples into input parts; transforming, per an input part, the input parts into frequency domain by fast Fourier transform of size N to obtain N frequency domain bins; multiplying, per an input part, elementwise the N frequency domain bins by a second sequence, to obtain N windowed frequency domain bins; selecting, per an input part, from the N windowed frequency domain bins L windowed frequency domain bins, wherein L is a positive integer whose value is smaller than N; transforming, per an input part, the L windowed frequency domain bins into time domain to obtain time domain input portions;multiplying, per an input part, elementwise the time domain input portions of the input part by a first sequence to obtain windowed samples of the input part; and combining the windowed samples of the input parts into L symbols.

16. A computer readable medium comprising instructions which, when ex- ecuted by an apparatus, cause the apparatus to perform at least: partitioning L input symbols into parts, wherein L is a positive integer; multiplying, per a part, elementwise samples of the part by a first sequence to obtain first windowed portions of the part; transforming, per a part, the first windowed portions of the part into fre- quency domain to obtain L first frequency domain bins; mapping, per a part, the L first frequency domain bins into N second fre- quency domain bins by performing at least one of inserting Z zeros or replicating R first frequency domain bins, wherein N is a positive integer whose value is bigger than L, Z=N-L-R, and 0 ≤R≤ (N-L); multiplying, per a part, elementwise the N second frequency domain bins by a second sequence, to obtain N second windowed portions of the part; transforming, per a part, the N second windowed portions of the part into time domain by inverse fast Fourier transform of size N to obtain N output parts; generating a signal to be transmitted based on the N output parts; and adding cyclic prefix either to the L input symbols before the partition or to the output parts before generating the signal.

17. A computer readable medium comprising instructions which, when ex- ecuted by an apparatus, cause the apparatus to perform at least: receiving a signal; obtaining, per a block received in the signal, P samples in time domain, wherein P is a positive integer; removing cyclic prefix from the P samples to obtain N samples, wherein N is a positive integer; partitioning N samples into input parts; transforming, per an input part, the input parts into frequency domain by fast Fourier transform of size N to obtain N frequency domain bins; multiplying, per an input part, elementwise the N frequency domain bins by a second sequence, to obtain N windowed frequency domain bins; selecting, per an input part, from the N windowed frequency domain bins L windowed frequency domain bins, wherein L is a positive integer whose value is smaller than N;transforming, per an input part, the L windowed frequency domain bins into time domain to obtain time domain input portions; multiplying, per an input part, elementwise the time domain input portions of the input part by a first sequence to obtain windowed samples of the input part; and combining the windowed samples of the input parts into L symbols.

18. The computer readable medium of claim 16 or 17, wherein the com- puter readable medium is a non-transitory computer readable medium.

19. A computer program comprising instructions, which, when executed by an apparatus, cause the apparatus to perform at least: partitioning L input symbols into parts, wherein L is a positive integer; multiplying, per a part, elementwise samples of the part by a first sequence to obtain first windowed portions of the part; transforming, per a part, the first windowed portions of the part into fre- quency domain to obtain L first frequency domain bins; mapping, per a part, the L first frequency domain bins into N second fre- quency domain bins by performing at least one of inserting Z zeros or replicating R first frequency domain bins, wherein N is a positive integer whose value is bigger than L, Z=N-L-R, and 0 ≤R≤ (N-L); multiplying, per a part, elementwise the N second frequency domain bins by a second sequence, to obtain N second windowed portions of the part; transforming, per a part, the N second windowed portions of the part into time domain by inverse fast Fourier transform of size N to obtain N output parts; generating a signal to be transmitted based on the N output parts; and adding cyclic prefix either to the L input symbols before the partition or to the output parts before generating the signal.

20. A computer program comprising instructions, which, when executed by an apparatus, cause the apparatus to perform at least: receiving a signal; obtaining, per a block received in the signal, P samples in time domain, wherein P is a positive integer; removing cyclic prefix from the P samples to obtain N samples, wherein N is a positive integer; partitioning N samples into input parts; transforming, per an input part, the input parts into frequency domain by fast Fourier transform of size N to obtain N frequency domain bins;multiplying, per an input part, elementwise the N frequency domain bins by a second sequence, to obtain N windowed frequency domain bins; selecting, per an input part, from the N windowed frequency domain bins L windowed frequency domain bins, wherein L is a positive integer whose value is smaller than N; transforming, per an input part, the L windowed frequency domain bins into time domain to obtain time domain input portions; multiplying, per an input part, elementwise the time domain input portions of the input part by a first sequence to obtain windowed samples of the input part; and combining the windowed samples of the input parts into L symbols.

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