Various high-level syntax improvements in dynamic mesh coding

Abstract

A mechanism for processing video data is disclosed. The mechanism includes determining to combine Hypothetical Reference Decoders (HRDs) for different sub-bitstreams. A conversion is performed between a visual media data and a bitstream based on the HRDs.

Description

Atty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W) Various High-Level Syntax Improvements In Dynamic Mesh Coding CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application claims the priority to and benefits of U.S. Provisional Patent Application No.63 / 636,457, filed on April 19, 2024, and U.S. Provisional Patent Application No.63 / 668,083, filed on July 5, 2024. All of these applications are herein incorporated by reference in their entireties. TECHNICAL FIELD

[0002] The present disclosure relates to generation, storage, and consumption of digital audio video media information in a file format. BACKGROUND

[0003] Digital video accounts for the largest bandwidth used on the Internet and other digital communication networks. As the number of connected user devices capable of receiving and displaying video increases, the bandwidth demand for digital video usage is likely to continue to grow. SUMMARY

[0004] A first aspect relates to a method for processing video data comprising: determining to combine Hypothetical Reference Decoders (HRDs) for different sub-bitstreams; and performing a conversion between a visual media data and a bitstream based on the HRDs.

[0005] A second aspect relates to an apparatus for processing video data comprising: a processor; and a non- transitory memory with instructions thereon, wherein the instructions upon execution by the processor, cause the processor to perform any of the preceding aspects.

[0006] A third aspect relates to non-transitory computer readable medium comprising a computer program product for use by a video coding device, the computer program product comprising computer executable instructions stored on the non-transitory computer readable medium such that when executed by a processor cause the video coding device to perform the method of any of the preceding aspects.

[0007] A fourth aspect relates to a non-transitory computer-readable recording medium storing a bitstream of a video which is generated by a method performed by a video processing apparatus, wherein the method comprises: determining to combine Hypothetical Reference Decoders (HRDs) for different sub-bitstreams; and generating a bitstream based on the determining.

[0008] A fifth aspect relates to a method for storing bitstream of a video comprising: determining to combine Hypothetical Reference Decoders (HRDs) for different sub-bitstreams; generating a bitstream based on the determining; and storing the bitstream in a non-transitory computer-readable recording medium.

[0009] A sixth aspect relates to a method, apparatus, or system described in the present disclosure.

[0010] For the purpose of clarity, any one of the foregoing embodiments may be combined with any one or more of the other foregoing embodiments to create a new embodiment within the scope of the present disclosure.

[0011] These and other features will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings and claims.Atty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W) BRIEF DESCRIPTION OF THE DRAWINGS

[0012] For a more complete understanding of this disclosure, reference is now made to the following brief description, taken in connection with the accompanying drawings and detailed description, wherein like reference numerals represent like parts.

[0013] FIG.1 is a block diagram illustrating a decoder design of dynamic mesh coding.

[0014] FIG.2 is a block diagram illustrating a structure of a dynamic mesh coding test model.

[0015] FIG.3 is a block diagram showing an example video processing system.

[0016] FIG.4 is a block diagram of an example video processing apparatus.

[0017] FIG.5 is a flowchart for an example method of video processing.

[0018] FIG.6 is a block diagram that illustrates an example video coding system.

[0019] FIG.7 is a block diagram that illustrates an example encoder.

[0020] FIG.8 is a block diagram that illustrates an example decoder.

[0021] FIG.9 is a schematic diagram of an example encoder. DETAILED DESCRIPTION

[0022] It should be understood at the outset that although an illustrative implementation of one or more embodiments are provided below, the disclosed systems and / or methods may be implemented using any number of techniques, whether currently known or yet to be developed. The disclosure should in no way be limited to the illustrative implementations, drawings, and techniques illustrated below, including the exemplary designs and implementations illustrated and described herein, but may be modified within the scope of the appended claims along with their full scope of equivalents. 1. Initial discussion

[0023] This disclosure is related to improvements to motion picture experts group immersive (MPEG-I) video- based dynamic mesh coding. Specifically, it is related to the high-level syntax design. It may be also applicable to other immersive video coding standards or codecs. 2. Further discussion

[0024] In computer graphics, a three-dimensional (3D) / immersive content can usually be represented by a 3D mesh and a texture map. Those mesh and texture data can be generated by a machine or can be converted from images captured by multiple cameras from different angles. Similar to two-dimensional (2D) video, when those 3D contents change with time, the mesh and texture data also change and comprises a sequence of dynamic mesh. The data volume of dynamic mesh are usually huge and make it difficult to store and transmit. To meet the requirement of applications that use dynamic mesh, Motion Picture Expert Group (MPEG) in short, issued a call for proposal [1]. To efficiently use the 2D codecs that are already available, one of the key requirements is to use the current 2D video coding standard to compress most data and keep other parts simple and of low complexity. Such a requirement can guarantee that the representation can take advantages of the 2D video hardware / software systems, without many efforts to redesign a specific system just for dynamic mesh.Atty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W)

[0025] MPEG received 5 responses to the call for proposal. Based on those proposals, a test model was built for the development of the planned dynamic mesh coding standard.

[0026] The latest test model of dynamic mesh coding (V-DMC) until this document is drafted can be found via this link http: / / mpegx.int-evry.fr / software / MPEG / dmc / mpeg-vmesh-tm / - / tags / v7.0; and the latest working draft document is WD 6.0 [2]. 2.1 Data representation in dynamic mesh coding

[0027] FIG.1 is a block diagram illustrating a decoder design of dynamic mesh coding. FIG.1 shows a decoder design as described in WD 6.0 [2]. It can be seen that a dynamic mesh decoder receives 4 bitstreams and performs decoding to reconstruct the dynamic mesh plus texture signals. The first bitstream is to represent the base mesh, which is a decimated version of the original mesh. The second bitstream is to represent displacement vectors between the reconstructed base mesh and the original mesh. The displacement vectors are arranged as a 2D video and compressed with an 2D video coding standard compliant codec, or the displacement can also be coded using an arithmetic codec. The third bitstream is to represent the texture (or attribute map). The attribute map is also arranged as a 2D video and compressed with an 2D video coding standard compliant codec. The design philosophy is to make the base mesh part small enough so that the module to process base mesh can be implemented simply. On the other hand, the displacement vectors and the attribute map accounts for most volume of the whole dynamic mesh data, which can be processed with the current dedicated highly efficient 2D video coding systems. Such a design can reduce the extra efforts to implement the dynamic mesh coding system and guarantee the high throughout and coding efficiency for the dynamic mesh data. 2.2 Test model of dynamic mesh coding

[0028] FIG.2 is a block diagram illustrating a structure of a dynamic mesh coding test model. FIG.2 shows the structure of an example dynamic mesh coding model. In the model, Draco is used to compress base mesh and the HEVC test model, e.g., HM, is used to compress displacement vectors and attribute map. However, it should be noted that other mesh or video coding systems can also be used in dynamic mesh coding.

[0029] The base mesh m is generated from the original mesh with a down-sampling scheme. Its quantized version^’ is then coded using Draco. The reconstrused base mesh ^’’ can be obtained by inverse quantization of ^’ .Displacement vectors ^’ are generated by making the difference between the original mesh and the subdivided version of ^’’ using a subdivision scheme. 2.3 Basemesh sub-bitstream

[0030] The following abbreviations may be used herein: BaseMesh Coding Layer (BMCL), BaseMesh Frame Parameter Set (BMFPS), BaseMesh Sequence Parameter Set (BMSPS), Coded BaseMesh Buffer (CBMB), Coded BaseMesh Sequence (CBMS), Decoded BaseMesh Buffer (DBMB). Syntax and semantics Syntax in tabular form General network abstraction layer (NAL) unit syntax bmesh_nal_unit( BmNumBytesInNalUnit ) { DescriptorAtty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W) bmesh_nal_unit_header( ) BmNumBytesInRbsp = 0_ _ _ r bmeshnalforbiddenzero bit f(1)General basemesh sequence parameter set RBSP syntax bmesh_sequence_parameter_set_rbsp( ) { Descriptor b t t id (4)Atty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W) bmesh_ref_list_struct( i ) bmsps_inter_mesh_motion_group_size_minus1 ue(v)bmsps_extension( extension_type, extension_length ) { Descriptorbmesh_profile_tier_level( ) { DescriptorAtty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W) bmptl_level_idc u(8) bmptl_num_sub_profiles u(6)_ _ _ _ or bm tconemeshframeonl fla u(1)General basemesh frame parameter set RBSP syntax bmesh_frame_parameter_set_rbsp( ) { DescriptorAtty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W) bmfps_extension_data_flag u(1) rbsp_trailing_bits( )or bmsi usesingle meshflag u(1)bmesh_submesh_layer_rbsp( ) { DescriptorAtty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W) Basemesh submesh header syntax bmesh_submesh_header ( ) { Descriptor if( nal_unit_type >= NAL_BLA_W_LP && nal_unit_type <= NAL_RSV_IRAP_BMCL_bmesh_ref_list_struct( rlsIdx ) { DescriptorAtty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W) for( i = 0; i < num_ref_entries[ rlsIdx ]; i++ ) { if( bmsps_long_term_ref_mesh_frames_flag )_ _ , or if( bmsh t e == I SUBMESH ) {bm_intra_submesh_unit( submeshID, unitSize ) { Descriptor Sizeas an ordered stream of bytes or bits within which the locations of unit boundaries are identifiable from patterns in the data. The format of such basemesh data is identified by bmptl_profile_codec_group_idc or by a component codec mapping SEI message. Basemesh inter submesh unit syntax bm_inter_submesh_unit( submeshID, unitSize ) { DescriptorAtty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W) bm_inter_submesh_data_unit( submeshID, bm_vertex_count[ submeshID ] ) length_alignment( ) sizeerns in the data. The format of such basemesh data is identified by bmptl_profile_codec_group_idc or by a component codec mapping SEI message. Basemesh inter submesh data unit syntax bm_inter_submesh_data_unit_default ( submeshID, vertexCount ) { Descriptor if( vertexCount > 0 )Atty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W) if( BmiduMvFlag[ submeshID ][ v ]) { for( k = 0; k < 3; k++ ) {sdu_skip_submesh_unit( ) { DescriptorGeneral

[0033] Semantics associated with the syntax structures and with the syntax elements within these structures are specified in this subclause. When the semantics of a syntax element are specified using a table or a set of tables, any values that are not specified in the table(s) shall not be present in the bitstream unless otherwise specified in this disclosure. NAL unit semantics General NAL unit semantics

[0034] BmNumBytesInNalUnit specifies the size of the NAL unit in bytes. This value is required for decoding of the NAL unit. Some form of demarcation of NAL unit boundaries is necessary to enable inference of BmNumBytesInNalUnit. One such demarcation method is specified in Annex D in V-DMC for the sample stream format. Other methods of demarcation can be specified outside this disclosure.Atty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W)

[0035] NOTE 1 – The basemesh coding layer (BMCL) is specified to efficiently represent the content of the basemesh data. The NAL is specified to format that data and provide header information in a manner appropriate for conveyance on a variety of communication channels or storage media. All data are contained in NAL units, each of which contains an integer number of bytes. A NAL unit specifies a generic format for use in both packet-oriented and bitstream systems. The format of NAL units for both packet-oriented transport and sample streams is identical except that in the sample stream format specified in Annex D in V-DMC, each NAL unit can be preceded by an additional element that specifies the size of the NAL unit.

[0036] rbsp_byte[ i ] is the i-th byte of an RBSP. An RBSP is specified as an ordered sequence of bytes as follows:

[0037] The RBSP contains a string of data bits (SODB) as follows: 1. If the SODB is empty (i.e., zero bits in length), the RBSP is also empty. 2. Otherwise, the RBSP contains the SODB as follows: – The first byte of the RBSP contains the first (most significant, left-most) eight bits of the SODB; the next byte of the RBSP contains the next eight bits of the SODB, etc., until fewer than eight bits of the SODB remain. – The rbsp_trailing_bits( ) syntax structure is present after the SODB as follows: – The first (most significant, left-most) bits of the final RBSP byte contain the remaining bits of the SODB (if any). – The next bit consists of a single bit equal to 1 (i.e., rbsp_stop_one_bit). – When the rbsp_stop_one_bit is not the last bit of a byte-aligned byte, one or more bits equal to 0 (i.e., instances of rbsp_alignment_zero_bit) are present to result in byte alignment.

[0038] Syntax structures having these RBSP properties are denoted in the syntax tables using an "_rbsp" suffix. These structures are carried within NAL units as the content of the rbsp_byte[ i ] data bytes. The association of the RBSP syntax structures to the NAL units is as specified inTable H-1.

[0039] NOTE 2 – When the boundaries of the RBSP are known, the decoder can extract the SODB from the RBSP by concatenating the bits of the bytes of the RBSP and discarding the rbsp_stop_one_bit, which is the last (least significant, right-most) bit equal to 1, and discarding any following (less significant, farther to the right) bits that follow it, which are equal to 0. The data necessary for the decoding process is contained in the SODB part of the RBSP. NAL unit header semantics

[0040] nal_forbidden_zero_bit shall be equal to 0.

[0041] nal_unit_type specifies the type of the RBSP data structure contained in the NAL unit as specified in Table H.1.

[0042] NAL units that have nal_unit_type in the range of NAL_UNSPEC_45..NAL_UNSPEC_63, inclusive, for which semantics are not specified, shall not affect the decoding process specified in this document.

[0043] NOTE 1 – NAL unit types in the range of NAL_UNSPEC_45..NAL_UNSPEC_63 can be used as determined by the application. No decoding process for these values of nal_unit_type is specified in this document.Atty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W) Since different applications can use these NAL unit types for different purposes, particular care needs to be exercised in the design of encoders that generate NAL units with these nal_unit_type values, and in the design of decoders that interpret the content of NAL units with these nal_unit_type values. This document does not define any management for these values. These nal_unit_type values could only be suitable for use in contexts in which "collisions" of usage (i.e., different definitions of the meaning of the NAL unit content for the same nal_unit_type value) are unimportant, or not possible, or are managed – e.g., defined or managed in the controlling application or transport specification, or by controlling the environment in which bitstreams are distributed.

[0044] For purposes other than determining the amount of data in the decoding units of the bitstream (as specified in D in V-DMC), decoders shall ignore (i.e., remove from the bitstream and discard) the contents of all NAL units that use reserved values of nal_unit_type.

[0045] NOTE 2 – This requirement allows future definition of compatible extensions to this document.

[0046] Similar NAL unit types, as for the atlas case, were defined for the basemesh enabling similar functionalities for random access and segmentation of the basemesh. Unlike the atlas that is split into tiles, in this document we define the concept of a submesh and define specific nal units that correspond to coded base submesh data. In addition, NAL units that can include metadata such as SEI messages are also defined.

[0047] In particular, the basemesh NAL unit types supported are specified in Table H-1: Table H.1 bmesh_nal_unit_type Name of Content of basemesh NAL unit and RBSP NAL b h l it t t t t it L L L L LAtty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W) 10 NAL_SKIP_N Coded submesh of a skipped basemesh BMCL 11 NAL_SKIP_R frame L L L L L L L L L L L L L LAtty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W) 38 NAL_PREFIX_ESEI Essential supplemental enhancement non- 39 NAL_SUFFIX_ESEI information BMCL L Ld leading (RASL) or random access decodable leading (RADL) mesh frames present in the bitstream.

[0049] NOTE 4 – A broken link access (BLA) mesh frame having nal_unit_type equal to NAL_BLA_W_LP can have associated RASL or RADL mesh frames present in the bitstream. A BLA mesh frame having nal_unit_type equal to NAL_BLA_W_RADL does not have associated RASL mesh frames present in the bitstream, but can have associated RADL mesh frames in the bitstream. A BLA mesh frame having nal_unit_type equal to NAL_BLA_N_LP does not have associated leading mesh frames present in the bitstream.

[0050] NOTE 5 – An instantaneous decoding refresh (IDR) mesh frame having nal_unit_type equal to NAL_IDR_N_LP does not have associated leading mesh frames present in the bitstream. An IDR mesh frame having nal_unit_type equal to NAL_IDR_W_RADL does not have associated RASL mesh frames present in the bitstream, but can have associated RADL mesh frames in the bitstream.

[0051] All coded submesh NAL units of an access unit shall have the same value of nal_unit_type. A mesh frame or an access unit is also referred to as having a nal_unit_type equal to the nal_unit_type of the coded submesh NAL units of the mesh frame or the access unit.

[0052] If a mesh frame has nal_unit_type equal to NAL_TRAIL_N, NAL_TSA_N, NAL_STSA_N, NAL_RADL_N, NAL_RASL_N, the mesh frame is an SLNR mesh frame. Otherwise, the mesh frame is a sub-layer reference mesh frame.

[0053] Each mesh frame, other than the first mesh frame in the bitstream in decoding order, is considered to be associated with the previous intra random access point (IRAP) mesh frame in decoding order.

[0054] When a mesh frame is a leading mesh frame, it shall be a RADL or RASL mesh frame.

[0055] When a mesh frame is a trailing mesh frame, it shall not be a RADL or RASL mesh frame.

[0056] When a mesh frame is a leading mesh frame, it shall precede, in decoding order, all trailing mesh frames that are associated with the same IRAP coded mesh frame.

[0057] No RASL mesh frames shall be present in the bitstream that are associated with a BLA mesh frame having nal_unit_type equal to NAL_BLA_W_RADL or NAL_BLA_N_LP.

[0058] No RASL mesh frames shall be present in the bitstream that are associated with an IDR mesh frame.Atty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W)

[0059] No RADL mesh frames shall be present in the bitstream that are associated with a BLA mesh frame having nal_unit_type equal to NAL_BLA_N_LP, an IDR mesh frame having nal_unit_type equal to NAL_IDR_N_LP.

[0060] NOTE 6 – It is possible to perform random access at the position of an IRAP coded mesh access unit by discarding all access units before the IRAP coded mesh access unit (and to correctly decode the IRAP coded mesh frame and all the subsequent non-RASL mesh frames in decoding order), provided each parameter set is available (either in the bitstream or by external means not specified in this document) when it needs to be activated.

[0061] Any RASL mesh frame associated with a CRA or BLA mesh frame shall precede any RADL mesh frame associated with the CRA or BLA mesh frame in output order.

[0062] Any RASL mesh frame associated with a CRA mesh frame shall follow, in output order, any IRAP coded mesh frame that precedes the CRA mesh frame in decoding order.

[0063] A nal_unit_type equal to NAL_V3C_AUD that is associated with a particular mesh frame j means that all output Visual Volumetric Video-based Coding (V3C) component frames, if present in their corresponding sub- bitstreams, and that have the same output time order as the mesh frame j, shall have the same decoding order, while accounting for missing frames in each sub-bitstream, as that of the mesh frame.

[0064] NOTE 7 – An application can specify that all mesh frames in a V3C sequence are delimited using a nal_unit_type equal to NAL_V3C_AUD, in which case all V3C sub-bitstreams including sub-bitstreams that correspond to different maps will be aligned in both decoding order and output time.

[0065] NOTE 8 – If a frame in a sub-bitstream is missing, and a NAL_V3C_AUD is encountered it can be assumed that this missing frame is virtually present in its sub-bitstream and has the same decoding order as all other corresponding frames in the other sub-bitstreams. This frame can then be generated using such methods as described in Annex B.

[0066] nal_layer_id specifies the identifier of the layer to which an BMCL NAL unit belongs or the identifier of a layer to which a non-BMCL NAL unit applies. The value of nal_layer_id shall be in the range of 0 to 62, inclusive. The value of 63 may be specified in the future by ISO / IEC. For purposes other than determining the amount of data in the decoding units of the bitstream, decoders shall ignore all data that follow the value 63 for nal_layer_id in a NAL unit, and decoders conforming to a profile specified in Annex A shall ignore (i.e., remove from the bitstream and discard) all NAL units with values of nal_layer_id not equal to 0.

[0067] NOTE 9 – The value of 63 for nal_layer_id can be used to indicate an extended layer identifier in a future extension of this document.

[0068] The value of nal_layer_id shall be the same for all BMCL NAL units of a coded mesh frame. The value of nal_layer_id of a coded mesh frame is the value of the nal_layer_id of the ACL NAL units of the coded mesh frame.

[0069] When nal_unit_type is equal to NAL_EOB, the value of nal_layer_id shall be equal to 0.

[0070] nal_temporal_id_plus1 minus 1 specifies a temporal identifier for the NAL unit. The value of nal_temporal_id_plus1 shall not be equal to 0.Atty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W)

[0071] The variable BmTemporalID is specified as follows: BmTemporalID = nal_temporal_id_plus1 – 1 (48)

[0072] When nal_unit_type is in the range of NAL_BLA_W_LP to NAL_RSV_IRAP_BMCL29, inclusive, i.e., the coded submesh belongs to an IRAP coded mesh frame, BmTemporalID shall be equal to 0.

[0073] When nal_unit_type is equal to NAL_TSA_R or NAL_TSA_N, BmTemporalID shall not be equal to 0.

[0074] When nal_layer_id is equal to 0 and nal_unit_type is equal to NAL_STSA_R or NAL_STSA_N, BmTemporalID shall not be equal to 0.

[0075] The value of BmTemporalID shall be the same for all BMCL NAL units of an access unit. The value of BmTemporalID of a coded mesh frame or an access unit is the value of the BmTemporalID of the BMCL NAL units of the coded mesh frame or the access unit. The value of BmTemporalID of a sub-layer representation is the greatest value of BmTemporalID of all BMCL NAL units in the sub-layer representation.

[0076] The value of BmTemporalID for non-BMCL NAL units is constrained as follows: 1. If nal_unit_type is equal to NAL_BMSPS, BmTemporalID shall be equal to 0 and the BmTemporalID of the access unit containing the NAL unit shall be equal to 0. 2. Otherwise, if nal_unit_type is equal to NAL_EOS or NAL_EOB, BmTemporalID shall be equal to 0. 3. Otherwise, if nal_unit_type is equal to NAL_AUD, NAL_V3C_AUD, or NAL_FD, BmTemporalID shall be equal to the BmTemporalID of the access unit containing the NAL unit. 4. Otherwise, BmTemporalID shall be greater than or equal to the BmTemporalID of the access unit containing the NAL unit.

[0077] NOTE 10 – When the NAL unit is a non-BMCL NAL unit, the value of BmTemporalID is equal to the minimum value of the BmTemporalID values of all access units to which the non-BMCL NAL unit applies. When nal_unit_type is equal to NAL_BMFPS, BmTemporalID can be greater than or equal to the BmTemporalID of the containing access unit, as all basemesh frame parameter sets (BMFPSs) can be included in the beginning of a bitstream, wherein the first coded basemesh frame has BmTemporalID equal to 0. When nal_unit_type is equal to NAL_PREFIX_NSEI, NAL_PREFIX_ESEI, NAL_SUFFIX_NSEI, or NAL_SUFFIX_ESEI, BmTemporalID can be greater than or equal to the BmTemporalID of the containing access unit, as an SEI NAL unit can contain information, e.g., in a buffering period SEI message or a basemesh frame timing SEI message, that applies to a bitstream subset that includes access units for which the BmTemporalID values are greater than the BmTemporalID of the access unit containing the SEI NAL unit. Order of NAL units and basemesh frames, and association to coded basemesh frames, access units, and coded basemesh sequences General

[0078] This subclause specifies constraints on the order of NAL units and basemesh frames in the basemesh sub- bitstream.Atty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W)

[0079] Any order of NAL units in the basemesh sub-bitstream obeying these constraints is referred to in the text as the decoding order of NAL units. Within a NAL unit, the syntax in subclause 8.3, specifies the decoding order of syntax elements. Decoders shall be capable of receiving NAL units and their syntax elements in decoding order. Order of BMSPS, and BMFPS RBSPs and their activation

[0080] This subclause specifies the activation process of basemesh sequence parameter sets (BMSPSs) and basemesh frame parameter sets (BMFPSs).

[0081] NOTE – The BMSPS and BMFPS mechanism decouples the transmission of infrequently changing information from the transmission of coded mesh data. BMSPSs and BMFPSs can, in some applications, be conveyed "out-of-band".

[0082] An BMFPS RBSP includes parameters that can be referred to by the coded submesh NAL units of one or more coded basemesh frames. Each BMFPS RBSP is initially considered not active for any basemesh at the start of the operation of the decoding process. At most one BMFPS RBSP is considered active for each basemesh at any given moment during the operation of the decoding process, and the activation of any particular BMFPS RBSP for a particular basemesh results in the deactivation of the previously active BMFPS RBSP for the particular mesh.

[0083] When an BMFPS RBSP (with a particular value of afps_mesh_frame_parameter_set_id) is not active for a particular basemesh and is referred to by a coded submesh NAL unit with nal_layer_id equal to 0 (using a value of ath_mesh_frame_parameter_set_id equal to the afps_mesh_frame_parameter_set_id value), it is then activated. This BMFPS RBSP is called the active BMFPS RBSP until it is deactivated by the activation of another BMFPS RBSP. Let the variable bmfpsMeshID be either set equal to vuh_mesh_id of the BMFPS RBSP or determined through external means if the V3C unit header is unavailable. Let the variable activatingBMeshID be either set equal to vuh_mesh_id of the coded submesh NAL unit or determined through external means if the V3C unit header is unavailable. An BMFPS RBSP, with that particular value of bmfps_frame_parameter_set_id, shall be available to the decoding process prior to its activation, included in at least one coded mesh access unit with BmTemporalID less than or equal to the BmTemporalID of the BMFPS NAL unit or provided through external means, bmfpsMeshID shall be equal to activatingBMeshID, and the BMFPS NAL unit containing the BMFPS RBSP shall have nal_layer_id equal to 0.

[0084] Any BMFPS NAL unit containing the value of bmfps_frame_parameter_set_id for the active BMFPS RBSP for a coded mesh frame shall have the same content as that of the active BMFPS RBSP for the coded basemesh frame, unless it follows the last BMCL NAL unit of the coded basemesh frame and precedes the first BMCL NAL unit of another coded basemesh frame.

[0085] An BMSPS RBSP includes parameters that can be referred to by one or more BMFPS RBSPs. Each BMSPS RBSP is initially considered not active at the start of the operation of the decoding process. At most one BMSPS RBSP is considered active at any given moment during the operation of the decoding process, and the activation of any particular BMSPS RBSP results in the deactivation of the previously active BMSPS RBSP.

[0086] When an BMSPS RBSP (with a particular value of bmsps_sequence_parameter_set_id) is not already active for a particular basemesh and it is referred to by activation of an BMFPS RBSP (in which bmfps_sequence_parameter_set_id is equal to afpsMeshID setAtty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W) equal to vuh_mesh_id or determined through external means), it is activated for the particular basemesh. This BMSPS RBSP is called the active BMSPS RBSP for the particular basemesh until it is deactivated by the activation of another BMSPS RBSP for the particular basemesh. Let the variable bmspsMeshID be either set equal to vuh_mesh_id or determined through external means if the V3C unit header is unavailable. Let the variable activatingMeshID either be set equal to vuh_mesh_id of the coded submesh or determined through external means if the V3C unit header is unavailable. An BMSPS RBSP, with that particular value of bmsps_mesh_sequence_parameter_set_id, shall be available to the decoding process prior to its activation, included in at least one access unit with BmTemporalID equal to 0 or provided through external means, bmspsMeshID equal to activatingMeshID, and the NAL unit containing the BMSPS RBSP shall have nal_layer_id equal to 0. An activated BMSPS RBSP shall remain active for the entire coded basemesh sequence (CBMS).

[0087] Any BMSPS NAL unit with any bmspsMeshID value and nal_layer_id equal to 0 containing the value of bmsps_sequence_parameter_set_id for the active BMSPS RBSP for a CBMS shall have the same content as that of the active BMSPS RBSP for the CBMS, unless it follows the last access unit of the CBMS and precedes the first BMCL NAL unit of another CBMS.

[0088] All constraints that are expressed on the relationship between the values of the syntax elements and the values of variables derived from those syntax elements in BMSPSs and BMFPSs, and other syntax elements, are expressions of constraints that apply only to the active BMSPS RBSP and the active BMFPS RBSP. If any BMSPS RBSP and BMFPS RBSP is present that is never activated in the bitstream, its syntax elements shall have values that would conform to the specified constraints if it was activated by reference in an otherwise conforming bitstream.

[0089] During operation of the decoding process (see Clause H.9 in V-DMC), the values of parameters of the active BMSPS RBSP and the active BMFPS RBSP are considered in effect. For interpretation of SEI messages, the values of the active BMSPS RBSP and the active BMFPS RBSP for the operation of the decoding process for the BMCL NAL units of the coded basemesh frame with nal_layer_id equal to 0 in the same access unit are considered in effect unless otherwise specified in the SEI message semantics. Order of access units (AUs) and association to CBMSs

[0090] A bitstream conforming to this document consists of one or more CBMSs.

[0091] A CBMS consists of one or more access units. The order of NAL units and coded basemesh frames, and their association to access units are described in subclause 8.4.5.4.3.

[0092] The first access unit of a CBMS is an IRAP coded mesh access unit with NoOutputBeforeRecoveryFlag equal to 1.

[0093] It is a requirement of bitstream conformance that, when present, the next access unit after an access unit that contains an end of sequence NAL unit or an end of a bitstream NAL unit shall be an IRAP coded mesh access unit, which may be an IDR access unit, a BLA access unit, or a CRA access unit.Atty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W) Order of NAL units and coded basemesh frames, and their association to access units

[0094] This subclause specifies the order of NAL units and coded basemesh frames, and their association to access units for CASs that belong to a CVSs that conform to one or more of the profiles specified in Annex A and that are decoded using the decoding process.

[0095] An access unit consists of one coded basemesh with nal_layer_id equal to 0, zero or more BMCL NAL units with nal_layer_id greater than 0, and zero or more non-BMCL NAL units. The association of BMCL NAL units to coded meshes is described in subclause H.8.2.2.3.5.

[0096] The first access unit in the bitstream starts with the first NAL unit of the bitstream.

[0097] Let firstBlAFrmNalUnit be the first BMCL NAL unit of a coded mesh frame with nal_layer_id equal to 0. The first of any of the following NAL units preceding firstBlAFrmNalUnit and succeeding the last BMCL NAL unit preceding firstBlAFrmNalUnit, if any, specifies the start of a new access unit:

[0098] NOTE 1 – The last BMCL NAL unit preceding firstBlAFrmNalUnit in decoding order can have nal_layer_id greater than 0. 1. access unit delimiter or V3C access unit delimiter NAL unit with nal_layer_id equal to 0 (when present), 2. BMSPS NAL unit with nal_layer_id equal to 0 (when present), 3. BMFPS NAL unit with nal_layer_id equal to 0 (when present), 4. Prefix SEI NAL unit with nal_layer_id equal to 0 (when present), 5. NAL units with nal_unit_type in the range of NAL_RSV_NBMCL_40..NAL_RSV_NBMCL_44 with nal_layer_id equal to 0 (when present), 6. NAL units with nal_unit_type in the range of NAL_UNSPEC_45..NAL_UNSPEC_63 with nal_layer_id equal to 0 (when present).

[0099] NOTE 2 – The first NAL unit preceding firstBlAFrmNalUnit and succeeding the last BMCL NAL unit preceding firstBlAFrmNalUnit, if any, can only be one of the above-listed NAL units.

[0100] When there is none of the above NAL units preceding firstBlAFrmNalUnit and succeeding the last BMCL NAL preceding firstBlAFrmNalUnit, if any, firstBlAFrmNalUnit starts a new access unit.

[0101] The order of the coded basemesh frames and non-BMCL NAL units within an access unit shall obey the following constraints: 1. When an access unit delimiter or a V3C access unit delimiter NAL unit with nal_layer_id equal to 0 is present, it shall be the first NAL unit. There shall be at most one access unit delimiter or V3C access unit delimiter NAL unit with nal_layer_id equal to 0 in any access unit. 2. When any BMSPS NAL units, BMFPS NAL units, prefix SEI NAL units, NAL units with nal_unit_type in the range of NAL_RSV_NACL_40..NBMCL_RSV_NBMCL_44, or NAL units with nal_unit_type in the range of NAL_UNSPEC_45..NAL_UNSPEC_63 are present, they shall not follow the last BMCL NAL unit of the access unit.Atty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W) 3. NAL units having nal_unit_type equal to NAL_FD, NAL_SUFFIX_NSEI, NAL_SUFFIX_ESEI or in the range of NAL_RSV_NBMCL_40..NAL_RSV_NBMCL_44 or NAL_UNSPEC_45..NAL_UNSPEC_63 shall not precede the first BMCL NAL unit of the access unit. 4. When an end of sequence NAL unit with nal_layer_id equal to 0 is present, it shall be the last NAL unit among all NAL units with nal_layer_id equal to 0 in the access unit other than an end of a bitstream NAL unit (when present). 5. When an end of a bitstream NAL unit is present, it shall be the last NAL unit in the access unit.

[0102] NOTE 3 – Decoders conforming to profiles specified in Annex A do not use NAL units with nal_layer_id greater than 0, e.g., access or V3C access unit delimiter NAL units with nal_layer_id greater than 0, for access unit boundary detection, except for identification of a NAL unit as an BMCL or non-BMCL NAL unit. Order of BMCL NAL units and association to coded mesh frames

[0103] This subclause specifies the order of BMCL NAL units and association to coded basemesh frames.

[0104] Each BMCL NAL unit is part of a coded basemesh frame.

[0105] The order of the BMCL NAL units within a coded basemesh frame is constrained as follows: 1. The first BMCL NAL unit of the coded basemesh frame shall have ath_id equal to FirstSubmeshID.

[0106] The submeshs of a basemesh frame shall be in increasing order of their ath_id values. 2.4 Atlas sequence parameter set extension and quantization parameters syntax and semantics in V-DMC

[0107] The following descriptions show atlas sequence parameter set extension and quantization parameters syntax and semantics designs in V-DMC CD text [4]. 8.3.6.1.3 Atlas sequence parameter set V-DMC extension syntax asps_vdmc_extension( ) { DescriptorAtty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W) asve_displacement_reference_qp u(7) asve_quantization_parameters_present_flag u(1)vdmc_quantization_parameters( qpIndex, subdivisionCount ){ DescriptorAtty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W) vqp_bitdepth_offset[ qpIndex ] se(v) if( vqp_lod_quantization_flag[ qpIndex ] == 0 ) {Atty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W) vqp_inverse_quantization_offset_value_log2_prec1_delta[ qpIndex ] se(v) [ i ][ j ][ k ]_ _ _

[0109] asve_lod_adaptive_subdivision_flag equal to 1 indicates that subdivision method is signaled for each subdivision iteration. asve_lod_adaptive_subdivision_flag equal to 0 indicates that the same subdivision method is applied for each subdivision iterations.

[0110] asve_subdivision_method[ i ] indicates the identifier of the method to subdivide the meshes associated with the current atlas sequence parameter set at the subdivision with subdivision index equal to i. Table 2 describes the list of supported subdivision methods and their relationship with asve_subdivision_method. Table 2 – Subdivision methods list asve_subdivision_method f i i i h f i i i h

[0111] he displacement ispresent in the compressed geometry video. The remaining two components are inferred to be 0. asve_1D_displacement_flag equal to 0 specifies that all 3 components of the displacement are present in the compressed geometry video. The following variable is defined: DisplacementDim = asve_1d_displacement_flag ? 1 : 3

[0112] asve_displacement_reference_qp specifies the initial value of QuantizationParameter for current frame. When not present asve_displacement_reference_qp is set to be equal to 49.Atty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W)

[0113] asve_quantization_parameters_present_flag equal to 1 specifies that the vdmc_quantization_parameters( ) syntax structure is present. asve_quantization_parameters_present_flag equal to 0 specifies that the vdmc_quantization_parameters ( ) syntax structure is not present.

[0114] asve_transform_method indicates the identifier of the transform applied to the displacement. Table 3 describes the list of supported transforms and their relationship with asve_transform_method. Table 3 – Transform methods list asve_transform_method afve transform method Name of transform method

[0115] _ g_ _p _ g q g p ay be present in vdmc_lifting_transform_parameters syntax structure. asve_lifting_offset_present_flag equal to 0 that the lifting offset parameters are not present in vdmc_lifting_transform_parameters syntax structure.

[0116] asve_num_attribute_video indicates the number of the attributes signalled through the video sub- bitstreams. It is a requirement of V3C bitstream conformance that the value of asve_num_attribute_video shall be equal to the value of ai_attribute_count[ j ], where j is the ID of the current atlas.

[0117] asve_attribute_type_id[ i ] indicates the attribute type of the Attribute Video Data unit with index i. ISO / IEC 23090-5(2E):2023 Table 4 describes the list of supported attributes. It is a requirement of V3C bitstream conformance that the value of asve_attribute_type_id[ i ] shall be equal to the value of ai_attribute_type_id[ j ][ i ], where j is the ID of the current atlas.

[0118] asve_attribute_frame_width[ i ]indicates the atlas frame width of the Attribute Video Data unit with index i in terms of integer luma samples for the atlas with atlas ID j. It is a requirement of V3C bitstream conformance that the value of asve_attribute_frame_width[ i ] shall be equal to the value of vps_ext_attribute_frame_width[ j ][ i ], where j is the ID of the current atlas.

[0119] asve_attribute_frame_height[ i ] indicates the atlas frame height of the Attribute Video Data unit with index i in terms of integer luma samples for the atlas with atlas ID j. It is a requirement of V3C bitstream conformance that the value of asve_attribute_frame_height[ i ] shall be equal to the value of vps_ext_attribute_frame_height[ j ][ i ], where j is the ID of the current atlas.

[0120] asve_attribute_subtexture_enabled_flag[ i ] equal to 0 specifies that the information of the area in the image corresponding to a submesh is not present for the attribute signalled in the Attribute Video Data unit with index i in meshpatch data unit. asve_attribute_subtexture_enabled_flag[ i ] equal to 1 specifies the information of the area inAtty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W) the image corresponding to a submesh is present for the attribute signalled in the Attribute Video Data unit with index i in meshpatch data unit.

[0121] asve_displacement_id_present_flag equal to 1 displacement data patch is identified by ID. asve_displacement_id_present_flag equal to 0 displacement data is identified by its position.asve_packing_method equal to 0 specifies that the displacement component samples are packed in ascending order, asve_packing_method equal to 1 specifies that the displacement component samples are packed in descending order.

[0122] asve_projection_texcoord_enable_flag equal to 0 specifies that the texture coordinates may be transmitted in the basemesh , asve_projection_texcoord_enable_flag equal to 1 specifies that the texture coordinates will be derived using projection parameters from the meshpatch data unit.

[0123] asve_projection_texcoord_mapping_present_flag equals to 1 indicates the asve_projection_texcoord_mapping_attribute_index is present. If asve_projection_texcoord_mapping_present_flag equals to 0 indicates the asve_projection_texcoord_mapping_attribute_index is not present, and the face ID is derived implicitly using connected components.

[0124] asve_projection_texcoord_mapping_attribute_index indicates the index of the basemesh attribute, which will be used to map a set of faces to a sub-patch.

[0125] asve_projection_texcoord_output_attribute_index indicates the index of the texture coordinate attribute carried in the reconstructed basemesh. The value indicated by asve_projection_texcoord_output_attribute_index shall be less than or equal to the vps_ext_bmesh_data_attribute_count. When not present asve_projection_texcoord_output_attribute_index is set to be equal to 0.

[0126] asve_projection_texcoord_output_bit_depth_minus1 indicates the bit depth of the texture coordinate generated by orthoAtlas. asve_projection_texcoord_output_bit_depth_minus1 shall be in the range of 0 to 31, inclusive.

[0127] asve_projection_texcoord_scale_factor indicates the value of the scaling factor variable TexcoordProjectionScaleFactor that is used for texture coordinate derivation from geometry projection.

[0128] asve_vdmc_vui_parameters_present_flag equal to 1 specifies that the vdmc_vui_parameters( ) syntax structure, as specified in Annex G, is present. asve_vdmc_vui_parameters_present_flag equal to 0 specifies that the vdmc_vui_parameters( ) syntax structure, as specified in Annex G, is not present. 8.4.6.1.4 Quantization parameters semantics

[0129] vqp_lod_quantization_flag[ qpIndex ] equal to 1 indicates that the quantization parameter will be sent per level-of-detail using delta coding. vqp_lod_quantization_flag[ qpIndex ] equal to 0 indicates that the quantization parameter will be the same for all level-of-details. qpIndex is the index of the quantization parameter set.

[0130] vqp_bitdepth_offset[ qpIndex ] indicates the bit depth offset value applied to the quantization process of the displacements. qpIndex is the index of the quantization parameter set.

[0131] vqp_quantization_parameters[ qpIndex ][ k ] indicates the quantization parameter to be used for the inverse quantization of the kth-component of the displacements. The value ofAtty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W) vqp_quantization_parameters[ qpIndex ][ k ] shall be in the range of 0 to 100, inclusive. qpIndex is the index of the quantization parameter set.

[0132] vqp_log2_lod_inverse_scale[ qpIndex ][ k ] indicates the scaling factor applied to the quantization process of the kth-component of the displacements for each level of detail. qpIndex is the index of the quantization parameter set.

[0133] vqp_lod_delta_quantization_parameter_value[ qpIndex ][ i ][ k ] specifies the absolute difference of quantization parameter value between the value asve_displacement_reference_qp and the quantization parameter for the ith-layer and kth-component. When not present, the value of vqp_lod_delta_quantization_parameter_value[ qpIndex ][ i ][ k ] is inferred as 0. The value of QuantizationParameter of each LoD layer shall be in the range of 0 to 100. qpIndex is the index of the quantization parameter set.

[0134] vqp_lod_delta_quantization_parameter_sign[ qpIndex ][ i ][ k ] specifies the sign of difference of quantization parameter value between the value asve_displacement_reference_qp and the quantization parameter for the ith-layer and kth-component. vqp_lod_delta_quantization_parameter_sign[ qpIndex ][ i ][ k ] equal to 0 indicate the difference is positive. vqp_lod_delta_quantization_parameter_sign[ qpIndex ][ i ][ k ] equal to 1 indicate the difference is negative. When not present, the value of vqp_lod_delta_quantization_parameter_sign[ qpIndex ][ i ][ k ] is inferred as 0. qpIndex is the index of the quantization parameter set.

[0135] vqp_direct_quantization_enabled_flag[ qpIndex ] equal to 1 indicates that the inverse scale factor is derived from the signaled displacement quantization parameter directly and computed as follows: InverseScale[ qpIndex ][ i ][ k ] = 1 ÷ QuantizationParameter[ qpIndex ][ i ][ k ]

[0136] vqp_direct_quantization_enabled_flag[ qpIndex ] equal to 0 indicates that the inverse scale factor shall be computed as follows: bitDepthPosition = asps_geometry_3d_bit_depth_minus1 + 1 InverseScale[ qpIndex ][ i ][ k ] = pow(0.5, 16 + vqp_bitdepth_offset[ qpIndex ] – bitDepthPosition + (4 – QuantizationParameter[ qpIndex ][ i ][ k ]) ÷ 6) Where qpIndex is the index of the quantization parameter set.

[0137] vqp_inverse_quantization_offset_enable_flag[ qpIndex ] equal to 0 specifies that the inverse quantization offset may not be applied for compensating the inverse quantized wavelet-transformed coefficients of the displacement. vqp_inverse_quantization_offset_enable_flag[ qpIndex ] equal to 1 specifies that the inverse quantization offset is applied for compensating the inverse quantized wavelet-transformed coefficients of the displacement.

[0138] vqp_inverse_quantization_offset_sign_delta[ qpIndex ][ i ][ j ][ k ] indicates the difference of signs of the inverse quantization offset value which is used for compensating the inverse quantized wavelet-transformed displacement coefficients, located in zone k (dead-zone: 0, non-dead-zone-positive: 1, non-dead-zone-negative: 2), with displacement dimension j, between LoD i and LoD i-1 when i is non-zero value. When i is zero, it indicates the absolute value for the sign.

[0139] vqp_inverse_quantization_offset_value_log2_prec1_delta[ qpIndex ][ i ][ j ][ k ] indicates difference of the values of the inverse quantization offset value for a first precision level located in zone k (dead-zone: 0, non-dead-Atty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W) zone-positive: 1, non-dead-zone-negative: 2), with displacement dimension j, between LoD i and LoD i-1 when i is non-zero value. When i is zero, it indicates the absolute value for the offset value for a first precision level associated with LoD 0.

[0140] vqp_inverse_quantization_offset_value_log2_prec2_delta[ qpIndex ][ i ][ j ][ k ] indicates the value of the inverse quantization offset value for a second precision level located in zone k (dead-zone: 0, non-dead-zone- positive: 1, non-dead-zone-negative: 2), with displacement dimension j, between LoD i and LoD i-1 when i is non- zero value. When i is zero, it indicates the absolute value for the offset value for a second precision level associated with LoD 0. 2.5 Displacement sequence parameter set RBSP and quantization parameters syntax and semantics in V-DMC J.7.1.2.1.1 General displacement sequence parameter set RBSP syntax displ_sequence_parameter_set_rbsp( ) { Descriptor dsps sequence parameter set id u(4)Atty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W) dsps_extension_count u(7) }_ _ , r d lod uantizationfla[ Index ] u(1)Atty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W) dqp_lod_delta_quantization_parameter_value[ qpIndex ][ i ][ k ]_ _ _ _ t for reference by other syntax elements.

[0142] dsps_codec_id indicates the identifier of the codec used to compress the displacement. dsps_codec_id shall be in the range of 0 to 255, inclusive. This codec may be identified through the profiles defined in Annex J.10, a component codec mapping SEI message, or through means outside this document. It may be associated with a specific displacement codec through the profiles specified in the corresponding specification, or could be explicitly indicated with an SEI message as is done in the V3C specification for the video sub-bitstreams.

[0143] dsps_single_dimension_flag indicates the number of dimensions for the displacements associated with the displacements. dsps_single_dimension_flag equal to 0 indicates three components for the displacements are used. dsps_single_dimension_flag equal to 1 indicates only normal component for the displacements is used. The variable MaxDimension is derived as follows: MaxDimension = dsps_single_dimension_flag ? 1 : 3

[0144] dsps_msb_align_flag indicates how the decoded displacement samples are converted to samples at the displacement range bit depth as specified in B.2.8.

[0145] dsps_log2_max_displ_frame_order_cnt_lsb_minus4 plus 4 specifies the values of the variables Log2MaxDisplFrmOrderCntLsb and MaxDisplFrmOrderCntLsb that are used in the decoding process for the displacement frame order count as follows: Log2MaxDisplFrmOrderCntLsb = dsps_log2_max_displ_frame_order_cnt_lsb_minus4 + 4 Log2MaxDisplFrmOrderCntLsb MaxDisplFrmOrderCntLsb = 2

[0146] The value of dsps_log2_max_displ_frame_order_cnt_lsb_minus4 shall be in the range of 0 to 12, inclusive.Atty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W)

[0147] dsps_max_dec_displ_frame_buffering_minus1 plus 1 specifies the maximum required size of the decoded displacement frame buffer for the CDS in units of displacement frame storage buffers. The value of dsps_max_dec_displ_frame_buffering_minus1 shall be in the range of 0 to 15, inclusive.

[0148] dsps_max_num_reorder_frames specifies the maximum allowed number of frames that can precede any frame in in decoding order and follow that frame in output order for the CDS. The value of dsps_max_num_reorder_frames shall be in the range of 0 to bmsps_max_dec_mesh_frame_buffering_minus1, inclusive.

[0149] dsps_max_latency_increase_plus1 not equal to 0 is used to compute the value of MaxLatencyDisplacementFrames, which specifies the maximum number of frames that can precede any frame in output order and follow that picture in decoding order for the CDS.

[0150] When dsps_max_latency_increase_plus1 is not equal to 0, the value of MaxLatencyDisplacementFrames is specified as follows: MaxLatencyDisplacementFrames = dsps_max_num_reorder_frames + dsps_max_latency_increase_plus1 − 1

[0151] When dsps_max_latency_increase_plus1 is equal to 0, no corresponding limit is expressed. The value of dsps_max_latency_increase_plus1 shall be in the range of 0 to 2^32 − 2, inclusive.

[0152] dsps_long_term_ref_displ_frames_flag equal to 0 specifies that no long-term reference displacement is used for inter prediction of any coded displacement frame in the CDS. dsps_long_term_ref_displ_frames_flag equal to 1 specifies that long term reference displacement frames may be used for inter prediction of one or more coded displacement frames in the CDS.

[0153] dsps_num_ref_displ_frame_lists_in_dsps specifies the number of the displ_ref_list_struct( rlsIdx ) syntax structures included in the displacement sequence parameter set. The value of dsps_num_ref_displ_frame_lists_in_dsps shall be in the range of 0 to 64, inclusive.

[0154] NOTE – A decoder allocates memory for a total number of displ_ref_list_struct( rlsIdx ) syntax structures equal to (dsps_num_ref_displ_frame_lists_in_dsps + 1) since there can be one displ_ref_list_struct( rlsIdx ) syntax structure directly signalled in the a displacement headers of the current displacement frame.

[0155] dsps_geometry_3d_bit_depth_minus1 plus 1 indicates the bit depth of the geometry coordinates of the reconstructed volumetric content. dsps_geometry_3d_bit_depth_minus1 shall be in the range of 0 to 31, inclusive.

[0156] dsps_subdivision_method indicates the identifier of the method to subdivide the meshes associated with the current dsps sequence parameter set. Table 2 describes the list of supported subdivision methods and their relationship with dsps_subdivision_method.

[0157] dsps_subdivision_iteration_count indicates the number of iterations used for the subdivision. When not present the value of dsps_subdivision_iteration_count is inferred to be equal to 0.

[0158] dsps_displacement_reference_qp specifies the initial value of QuantizationParameter for current frame. When not present dsps_displacement_reference_qp is set to be equal to 49.Atty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W)

[0159] dsps_extension_present_flag equal to 1 specifies that dsps_extension_count is present in the displacement sequence parameter set.

[0160] dsps_extension_count specifies the number of extensions present in the current displacement sequence parameter set. When not present, dsps_extension_count is inferred to be equal to 0.

[0161] dsps_extensions_length_minus1 when present, specifies the cumulative length in bytes, DspsExtensionsLength, for all extensions that follow this syntax element. DspsExtensionsLength is computed as follows: if( dsps_extension_count == 0 ) DspsExtensionsLength = 0 else DspsExtensionsLength = dsps_extensions_length_minus1 + 1

[0162] It is a requirement, when dsps_extension_count is not equal to 0, that DspsExtensionsLength is equal to 3 * dsps_extension_count plus the sum of all dsps_extension_length[ i ].

[0163] dsps_extension_type[ i ] indicates the DSPS extension type for the extension with index i as specified in Table J.2 in V-DMC. Values indicated as reserved are reserved for future use by ISO / IEC and shall not be present in bitstreams conforming to this version of this document. Decoders conforming to this version of this document should ignore such reserved extensions. It is a requirement that a particular dsps_extension_type[ i ] value shall only be present once in an entire DSPS, while the order of extensions does not matter.

[0164] dsps_extension_length[ i ] specifies the number of bytes used to represent the payload size of the syntax structure of the associated extension with index i. If dsps_extension_length[ i ] is equal to 0, no extension payload is present for the extension with index i. Otherwise, the extension with index i shall have a payload size in bits in the range of 8 * ( dsps_extension_length[ i ] – 1 ) + 1 to 8 * dsps_extension_length[ i ], inclusive. 7.2.2.1.3 Quantization parameters syntax

[0165] dqp_lod_quantization_flag[ qpIndex ] equal to 1 indicates that the quantization parameter will be sent per level-of-detail using delta coding. dqp_lod_quantization_flag[ qpIndex ] equal to 0 indicates that the quantization parameter will be the same for all level-of-details. qpIndex is the index of the quantization parameter set.

[0166] dqp_bitdepth_offset[ qpIndex ] indicates the bit depth offset value applied to the quantization process of the displacements. qpIndex is the index of the quantization parameter set.

[0167] dqp_quantization_parameters[ qpIndex ][ k ] indicates the quantization parameter to be used for the inverse quantization of the kth-component of the displacements. The value of dqp_quantization_parameters[ qpIndex ][ k ] shall be in the range of 0 to 100, inclusive. qpIndex is the index of the quantization parameter set.

[0168] dqp_log2_lod_inverse_scale[ qpIndex ][ k ] indicates the scaling factor applied to the kth-component of the displacements for each level of detail. qpIndex is the index of the quantization parameter set.

[0169] dqp_lod_delta_quantization_parameter_value[ qpIndex ][ i ][ k ] specifies the absolute difference of quantization parameter value between the value dsps_displacement_reference_qp and the quantization parameter for the ith-layer and kth-component. When not present, the value of dqp_lod_delta_quantization_parameter_value[Atty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W) qpIndex ][ i ][ k ] is inferred as 0. qpIndex is the index of the quantization parameter set. The value of QuantizationParameter of each LoD layer shall be in the range of 0 to 100.

[0170] dqp_lod_delta_quantization_parameter_sign[ qpIndex ][ i ][ k ] specifies the sign of difference of quantization parameter value between the value dsps_displacement_reference_qp and the quantization parameter for the ith-layer and kth-component. dqp_lod_delta_quantization_parameter_sign[ qpIndex ][ i ][ k ] equal to 0 indicate the difference is positive. dqp_lod_delta_quantization_parameter_sign[ qpIndex ][ i ][ k ] equal to 1 indicate the difference is negative. When not present, the value of dqp_lod_delta_quantization_parameter_sign[ qpIndex ][ i ][ k ] is inferred as 0. qpIndex is the index of the quantization parameter set. 3. Technical problems solved by disclosed embodiments

[0171] An example design for dynamic mesh coding has the following problems:

[0172] First, there should be a HRD defined for each sub-bitstream. However, the number of sub-bitstreams may be large and make the decoder implementation complicated. It is desirable to reduce the number of HRD needed

[0173] Second, for non-video sub-bitstreams, there are no indications on the maximum allowed number of reordered pictures.

[0174] Third, for non-video sub-bitstreams, there are no indications on the maximum latency.

[0175] Fourth, there are no constraints among different sub-bitstreams that may make the whole system latency large.

[0176] Fifth, syntax elements of subdivision iteration count are directly signalled. However, when the count is 0, signalling the count is not necessary.

[0177] Sixth, Qp reference offset for displacement is confusing.

[0178] Seventh, the current Qp can be equal to 0, the derived InverseScale may be invalid. 4. A listing of solutions and embodiments

[0179] To address at least some of the above problems, methods as summarized below are disclosed. The items should be considered as examples to explain the general concepts and should not be interpreted in a narrow way. Furthermore, these designs can be applied individually or combined in any manner. 1. To address drawbacks of problem 1, HRDs for different sub-bitstreams may be combined. a. In one example, combination among HRDs for sub-bitstream 1 to sub-bitstream N means that for NAL units of different bit-streams with the same nal_unit_type are all treated as the same type in a joint HRD. i. When multiple HRDs are combined, bitstream conformance are for the joint HRD but not the individual HRD. b. In one example, atlas HRD and basemesh HRD may be combined. c. In one example, atlas HRD and displacement HRD may be combined. d. In one example, displacement HRD and basemesh HRD may be combined. e. In one example, atlas HRD, basemesh HRD and displacement HRD may be combined.Atty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W) 2. To address drawbacks of problem 2, one or more syntax elements to indicate the maximum allowed number of pictures reordering may be signalled in the sub-bitstream. a. In one example, the maximum allowed number of pictures reordering means the maximum allowed number of output pictures that can precede any output picture in decoding order and follow that picture in output order. b. In one example, the maximum allowed number of pictures reordering is shall be in the range of 0 to the maximum required size of the decoded picture buffer for the sub-bitstream. c. In one example, one or more syntax elements are signalled to indicate the maximum allowed number of pictures reordering for atlas sub-bitstream. d. In one example, one or more syntax elements are signalled to indicate the maximum allowed number of pictures reordering for basemesh sub-bitstream. e. In one example, one or more syntax elements are signalled to indicate the maximum allowed number of pictures reordering for displacement sub-bitstream. f. In one example, if the sub-bitstream has different temporal levels, for each temporal level, one or more syntax elements are signalled to indicate the maximum allowed number of pictures reordering for that temporal level. g. In one example, furthermore, one or more syntax elements are signalled to indicate the maximum allowed number of pictures reordering for all sub-bitstreams. i. In one example, the maximum allowed number of pictures reordering for all sub-bitstreams is the maximum value of the maximum allowed number of pictures reordering for each sub- bitstream. ii. In one example, the syntax elements may be signalled in the atlas parameter set extension. iii. In one example, the syntax elements may be signalled in the VUI parameters extension. h. In one example, one or more syntax elements may be used to indicate whether the maximum allowed number of picture reordering is 0 or not. i. In one example, a flag may be used to indicate if whether the maximum allowed number of picture reordering is 0 or not. 3. To address drawbacks of problem 3, one or more syntax elements to indicate the maximum latency may be signalled in the sub-bitstream. a. In one example, the latency is term of number of pictures. b. In one example, the maximum latency means the maximum number of output pictures that can precede any output picture in output order and follow that picture in decoding order. c. In one example, one or more syntax elements are signalled to indicate the maximum latency for atlas sub-bitstream. d. In one example, one or more syntax elements are signalled to indicate the maximum latency for basemesh sub-bitstream.Atty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W) e. In one example, one or more syntax elements are signalled to indicate the maximum latency for displacement sub-bitstream. f. In one example, if the sub-bitstream has different temporal levels, for each temporal level, one or more syntax elements are signalled to indicate the maximum latency for that temporal level. g. In one example, furthermore, one or more syntax elements are signalled to indicate the maximum latency for all sub-bitstreams. i. In one example, the maximum latency for all sub-bitstreams is the maximum value of the maximum latency for each sub-bitstream. ii. In one example, the syntax elements may be signalled in the atlas parameter set extension. iii. In one example, the syntax elements may be signalled in the VUI parameters extension. h. In one example, one or more syntax elements may be used to indicate whether the maximum latency is 0 or not. i. In one example, a flag may be used to indicate if whether the maximum latency is 0 or not. 4. To address drawbacks of problem 4, one or more syntax elements to indicate the maximum allowed number of pictures reordering and / or the maximum latency may be signalled in the bitstream. a. In one example, assume a bitstream has sub-bitstream 1 to sub-bitstream N and the maximum allowed number of pictures reordering for sub-bitstream i is R(i), i = 1...N, one or more syntax elements may be signalled to indicate the largest number of R(i), i = 1...N. b. In one example, assume a bitstream has sub-bitstream 1 to sub-bitstream N and the maximum latency for sub-bitstream i is L(i), i = 1...N, one or more syntax elements may be signalled to indicate the largest number of L(i), i = 1...N. c. In one example, the syntax element(s) may be in the atlas parameter sequence set. d. In one example, the syntax element(s) may be in the common atlas parameter sequence set. 5. To address drawbacks of problem 5, subdivision iteration counts minus 1 may be signalled in the bitstream. a. In one example, in the atlas sequence parameter set, the number of iterations minus 1 may be signalled. b. In one example, in the atlas frame parameter set, the number of iterations minus 1 may be signalled. c. In one example, in the meshpatch data unit, the number of iterations minus 1 may be signalled. 6. To address drawbacks of problem 1, non-video sub-bitstreams may be conveyed as or within an atlas sub- bitstream. a. In one example, instead of coding a basemesh sub-bitstream, an atlas sub-bitstream may be designed to carry the basemesh data. i. In one example, furthermore, it requires that the basemesh has the same intra / inter coding type and / or reference frame structure as the atlas sub-bitstream. b. In one example, instead of coding a displacement sub-bitstream, an atlas sub-bitstream may be designed to carry the displacement data.Atty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W) i. In one example, furthermore, it requires that the displacement data has the same intra / inter coding type and / or reference frame structure as the atlas sub-bitstream. c. In one example, an atlas sub-bitstream may be designed to carry both the basemesh data and displacement data. i. In one example, furthermore, it requires that both the basemesh and displacement have the same intra / inter coding type and / or reference frame structure as the atlas sub-bitstream. 7. To address drawbacks of problem 6, it is specified that a delta value to the reference Qp may be signalled. a. In one example, reference Qp minus N may be signalled. i. In one example, N is equal to 49. 8. To address drawbacks of problem 7, it is specified that Qp value, signalled or derived, shall be greater than 0. a. In one example, the minimal Qp value is equal to 1. 9. To address drawbacks of problem 7, alternatively, a clipping operator may be applied to derive Qp values. a. In one example, a clipping operator Clip3(minQp, maxQp, Qp) may be applied before the Qp value is used. i. In one example, minQp is equal to 1. ii. In one example, maxQp is equal to 100. 5. Embodiments

[0180] Below are some example embodiments for the aspects summarized above in Section 4.

[0181] Most relevant parts that have been added or modified are in bold, and some of the deleted parts are in bold and italic fonts. There may be some other changes that are editorial in nature and thus not indicated. 5.1 Embodiment 1

[0182] This embodiment is for item 1, 1.e as summarized above in Section 4. The following text changes are based on V3C 3rd edition [3]. E.1 General

[0183] This annex specifies the hypothetical reference decoder (HRD) and its use to check atlas sub-bitstream and decoder conformance. In this section, a bitstream refers to an atlas sub-bitstream unless otherwise indicated.

[0184] Two types of bitstreams or bitstream subsets are subject to HRD conformance checking for this document. The first type, called a Type I bitstream, is a NAL unit stream containing – the ACL NAL units and non-ACL NAL units with nal_unit_type equal to NAL_FD (filler data NAL units) for all coded atlas access units in the atlas sub-bitstream – the BMCL NAL units and non-BMCL NAL units with nal_unit_type equal to NAL_FD (filler data NAL units) for all basemesh units in the basemesh sub-bitstream if a basemesh sub-bitstream is present. – the DCL NAL units and non-DCL NAL units with nal_unit_type equal to NAL_FD (filler data NAL units) for all displacement units in the displacement sub-bitstream if a displacement sub-bitstream is present.Atty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W)

[0185] The second type, called a Type II bitstream, is a NAL unit stream contains, in addition to the ACL NAL units and filler data NAL units for all coded atlas access units in the atlas sub-bitstream, BMCL NAL units and non- BMCL NAL units with nal_unit_type equal to NAL_FD (filler data NAL units) for all basemesh units in the basemesh sub-bitstream if a basemesh sub-bitstream is present, at least one of the following: – additional non-ACL NAL units other than filler data NAL units, – additional non-BMCL NAL units other than filler data NAL units if a basemesh sub-bitstream is present, – additional non-DCL NAL units other than filler data NAL units if a displacement sub-bitstream is present, – the sample stream nal header structure syntax elements, ssnh_unit_size_precision_bytes_minus1 and ssnh_reserved_zero_5bits, and all ssnu_nal_unit_size syntax elements that form a NAL sample stream from the NAL unit stream (as specified in Annex D). 5.2 Embodiment 2

[0186] This embodiment is for item 2, 2.a, 2.d, 2.e, 3, 3.a, 3.b, 3.d, 3.e as summarized above in Section 4. The following text changes are based on V-DMC WD 6.0 [2]. H.8.1.3.1.1 General basemesh sequence parameter set RBSP syntax bmesh_sequence_parameter_set_rbsp( ) { Descriptor...

[0187] bmsps_max_dec_mesh_frame_buffering_minus1 plus 1 specifies the maximum required size of the decoded basemesh frame buffer for the CBMS in units of basemesh frame storage buffers. The value of bmsps_max_dec_mesh_frame_buffering_minus1 shall be in the range of 0 to 15, inclusive.

[0188] bmsps_max_num_reorder_frames specifies the maximum allowed number of frames that can precede any frame in in decoding order and follow that frame in output order for the CBMS. The value of bmsps_max_num_reorder_frames shall be in the range of 0 to bmsps_max_dec_mesh_frame_buffering_minus1, inclusive.

[0189] bmsps_max_latency_increase_plus1 not equal to 0 is used to compute the value of MaxLatencyFrames, which specifies the maximum number of frames that can precede any frame in output order and follow that picture in decoding order for the CBMS.

[0190] When bmsps_max_latency_increase_plus1 is not equal to 0, the value of MaxLatencyFrames is specified as follows:Atty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W) MaxLatencyFrames = bmsps_max_num_reorder_frames + bmsps_max_latency_increase_plus1 − 1

[0191] When bmsps_max_latency_increase_plus1 is equal to 0, no corresponding limit is expressed. The value of bmsps_max_latency_increase_plus1 shall be in the range of 0 to 232− 2, inclusive. ... J.7.1.2.1.1 General displacement sequence parameter set RBSP displ_sequence_parameter_set_rbsp( ) { Descriptor dsps sequence parameter set id u(4)...

[0192] dsps_max_dec_displ_frame_buffering_minus1 plus 1 specifies the maximum required size of the decoded displacement frame buffer for the CDS in units of displacement frame storage buffers. The value of dsps_max_dec_displ_frame_buffering_minus1 shall be in the range of 0 to 15, inclusive.Atty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W)

[0193] dsps_max_num_reorder_frames specifies the maximum allowed number of frames that can precede any frame in in decoding order and follow that frame in output order for the CDS. The value of dsps_max_num_reorder_frames shall be in the range of 0 to bmsps_max_dec_mesh_frame_buffering_minus1, inclusive.

[0194] dsps_max_latency_increase_plus1 not equal to 0 is used to compute the value of MaxLatencyFrames, which specifies the maximum number of frames that can precede any frame in output order and follow that picture in decoding order for the CDS.

[0195] When dsps_max_latency_increase_plus1 is not equal to 0, the value of MaxLatencyFrames is specified as follows: MaxLatencyFrames = dsps_max_num_reorder_frames + dsps_max_latency_increase_plus1 − 1

[0196] When dsps_max_latency_increase_plus1 is equal to 0, no corresponding limit is expressed. The value of dsps_max_latency_increase_plus1 shall be in the range of 0 to 232− 2, inclusive. 5.3 Embodiment 3

[0197] This embodiment is for the items 1, 1.a and 1.a.i summarized above in Section 4. The following text changes are based on V-DMC CD text [4]. 8.3.6.1.3 Atlas sequence parameter set V-DMC extension syntax asps_vdmc_extension( ) { Descriptor bdi i i it ti t...Atty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W)

[0198] asve_displacement_reference_qp_minus49 plus 49 specifies the initial value of QuantizationParameter for current frame. The value of asve_displacement_reference_qp_minus49 shall be in the range of −48 to +51, inclusive. When not present asve_displacement_reference_qp_minus49 is set to be equal to 490. ... J.7.1.2.1.1 General displacement sequence parameter set RBSP syntax displ_sequence_parameter_set_rbsp( ) { Descriptor ...

[0199] dsps_displacement_reference_qp_minus49 plus 49 specifies the initial value of QuantizationParameter for current frame. The value of dsps_displacement_reference_qp_minus49 shall be in the range of −48 to +51, inclusive. When not present dsps_displacement_reference_qp_minus49 is set to be equal to 490. ... 5.4 Embodiment 4

[0200] This embodiment is for the items 2, 2.a summarized above in Section 4. The following text changes are based on V-DMC CD text [4]. 8.4.6.1.4 Quantization parameters semantics

[0201] vqp_lod_quantization_flag[ qpIndex ] equal to 1 indicates that the quantization parameter will be sent per level-of-detail using delta coding. vqp_lod_quantization_flag[ qpIndex ] equal to 0 indicates that the quantization parameter will be the same for all level-of-details. qpIndex is the index of the quantization parameter set.

[0202] vqp_bitdepth_offset[ qpIndex ] indicates the bit depth offset value applied to the quantization process of the displacements. qpIndex is the index of the quantization parameter set.

[0203] vqp_quantization_parameters[ qpIndex ][ k ] indicates the quantization parameter to be used for the inverse quantization of the kth-component of the displacements. The value of vqp_quantization_parameters[ qpIndex ][ k ] shall be in the range of 01 to 100, inclusive. qpIndex is the index of the quantization parameter set.

[0204] vqp_log2_lod_inverse_scale[ qpIndex ][ k ] indicates the scaling factor applied to the quantization process of the kth-component of the displacements for each level of detail. qpIndex is the index of the quantization parameter set.

[0205] vqp_lod_delta_quantization_parameter_value[ qpIndex ][ i ][ k ] specifies the absolute difference of quantization parameter value between the value asve_displacement_reference_qp and the quantization parameter for the ith-layer and kth-component. When not present, the value of vqp_lod_delta_quantization_parameter_value[ qpIndex ][ i ][ k ] is inferred as 0. The value of QuantizationParameter of each LoD layer shall be in the range of 01 to 100. qpIndex is the index of the quantization parameter set.Atty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W) ... 7.2.2.1.3 Quantization parameters syntax semantics

[0206] dqp_lod_quantization_flag[ qpIndex ] equal to 1 indicates that the quantization parameter will be sent per level-of-detail using delta coding. dqp_lod_quantization_flag[ qpIndex ] equal to 0 indicates that the quantization parameter will be the same for all level-of-details. qpIndex is the index of the quantization parameter set.

[0207] dqp_bitdepth_offset[ qpIndex ] indicates the bit depth offset value applied to the quantization process of the displacements. qpIndex is the index of the quantization parameter set.

[0208] dqp_quantization_parameters[ qpIndex ][ k ] indicates the quantization parameter to be used for the inverse quantization of the kth-component of the displacements. The value of dqp_quantization_parameters[ qpIndex ][ k ] shall be in the range of 01 to 100, inclusive. qpIndex is the index of the quantization parameter set.

[0209] dqp_log2_lod_inverse_scale[ qpIndex ][ k ] indicates the scaling factor applied to the kth-component of the displacements for each level of detail. qpIndex is the index of the quantization parameter set.

[0210] dqp_lod_delta_quantization_parameter_value[ qpIndex ][ i ][ k ] specifies the absolute difference of quantization parameter value between the value dsps_displacement_reference_qp and the quantization parameter for the ith-layer and kth-component. When not present, the value of dqp_lod_delta_quantization_parameter_value[ qpIndex ][ i ][ k ] is inferred as 0. qpIndex is the index of the quantization parameter set. The value of QuantizationParameter of each LoD layer shall be in the range of 01 to 100.

[0211] dqp_lod_delta_quantization_parameter_sign[ qpIndex ][ i ][ k ] specifies the sign of difference of quantization parameter value between the value dsps_displacement_reference_qp and the quantization parameter for the ith-layer and kth-component. dqp_lod_delta_quantization_parameter_sign[ qpIndex ][ i ][ k ] equal to 0 indicate the difference is positive. dqp_lod_delta_quantization_parameter_sign[ qpIndex ][ i ][ k ] equal to 1 indicate the difference is negative. When not present, the value of dqp_lod_delta_quantization_parameter_sign[ qpIndex ][ i ][ k ] is inferred as 0. qpIndex is the index of the quantization parameter set. 5.5 Embodiment 5

[0212] This embodiment is for the items 3, 3.a, 3.a.i summarized above in Section 4. The following text changes are based on V-DMC CD text [5]. 8.3.6.1.4 Quantization parameters syntax vdmc_quantization_parameters( qpIndex, subdivisionCount ){ DescriptorAtty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W) QuantizationParameter[ qpIndex ][ i ][ k ] = Clip3(1, 100,Atty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W) vqp_inverse_quantization_offset_value_log2_prec2_delta[ qpIndex ] se(v) [ i ][ j ][ k ]_ _ dqplodquantizationflag[ qpIndex ] u(1)Atty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W) QuantizationParameter[ qpIndex – 1 ][ i ][ k ] + ( 1 – 2 * dqp_lod_delta_quantization_parameter_sign[ qpIndex ][ i ][ k ] ) *[1] MPEG technical requirements, “CfP for. Dynamic Mesh Coding,” ISO / IEC JTC 1 / SC 29 / WG 2 doc. no. N145, in Oct.2021. [2] MPEG output document, “WD 6.0 of V-DMC,” ISO / IEC JTC 1 / SC 29 / WG 7 doc. no. N00822, in Jan.2024. [3] MPEG output document, “Text of ISO / IEC FDIS 23090-52nd Edition Visual volumetric video-based coding (V3C) and video-based point cloud compression (V-PCC) ,” ISO / IEC JTC 1 / SC 29 / WG 7 doc. no. N00553, in Jan.2024. [4] MPEG output document, “Text of ISO / IEC CD 23090-29 Video-based mesh coding,” ISO / IEC JTC 1 / SC 29 / WG 7 doc. no. N00885, in Apr.2024.

[0213] FIG. 3 is a block diagram showing an example video processing system 4000 in which various embodiments disclosed herein may be implemented. Various implementations may include some or all of the components of the system 4000. The system 4000 may include input 4002 for receiving video content. The video content may be received in a raw or uncompressed format, e.g., 8- or 10-bit multi-component pixel values, or may be in a compressed or encoded format. The input 4002 may represent a network interface, a peripheral bus interface, or a storage interface. Examples of network interface include wired interfaces such as Ethernet, passive optical network (PON), etc. and wireless interfaces such as Wi-Fi or cellular interfaces.

[0214] The system 4000 may include a coding component 4004 that may implement the various coding or encoding methods described in the present disclosure. The coding component 4004 may reduce the average bitrate of video from the input 4002 to the output of the coding component 4004 to produce a coded representation of the video. The coding techniques are therefore sometimes called video compression or video transcoding techniques. The output of the coding component 4004 may be either stored, or transmitted via a communication connected, as represented by the component 4006. The stored or communicated bitstream (or coded) representation of the video received at the input 4002 may be used by a component 4008 for generating pixel values or displayable video that is sent to a display interface 4010. The process of generating user-viewable video from the bitstream representation is sometimes called video decompression. Furthermore, while certain video processing operations are referred to as “coding” operations or tools, it will be appreciated that the coding tools or operations are used at an encoder and corresponding decoding tools or operations that reverse the results of the coding will be performed by a decoder.Atty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W)

[0215] Examples of a peripheral bus interface or a display interface may include universal serial bus (USB) or high definition multimedia interface (HDMI) or DisplayPort, and so on. Examples of storage interfaces include serial advanced technology attachment (SATA), peripheral component interconnect (PCI), integrated drive electronics (IDE) interface, and the like. The embodiments described in the present disclosuremay be embodied in various electronic devices such as mobile phones, laptops, smartphones or other devices that are capable of performing digital data processing and / or video display.

[0216] FIG.4 is a block diagram of an example video processing apparatus 4100. The apparatus 4100 may be used to implement one or more of the methods described herein. The apparatus 4100 may be embodied in a smartphone, tablet, computer, Internet of Things (IoT) receiver, and so on. The apparatus 4100 may include one or more processors 4102, one or more memories 4104 and video processing circuitry 4106. The processor(s) 4102 may be configured to implement one or more methods described in the present disclosure. The memory (memories) 4104 may be used for storing data and code used for implementing the methods and embodiments described herein. The video processing circuitry 4106 may be used to implement, in hardware circuitry, some embodiments described in the present disclosure. In some embodiments, the video processing circuitry 4106 may be at least partly included in the processor 4102, e.g., a graphics co-processor.

[0217] FIG.5 is a flowchart for an example method 4200 of video processing. The method 4200 determines to combine Hypothetical Reference Decoders (HRDs) for different sub-bitstreams at step 4202. A conversion between a visual media data and a bitstream based on the HRDs at step 4204. The conversion may include encoding at an encoder, decoding at a decoder, or combinations thereof.

[0218] It should be noted that the method 4200 can be implemented in an apparatus for processing video data comprising a processor and a non-transitory memory with instructions thereon, such as video encoder 4400, video decoder 4500, and / or encoder 4600. In such a case, the instructions upon execution by the processor, cause the processor to perform the method 4200. Further, the method 4200 can be performed by a non-transitory computer readable medium comprising a computer program product for use by a video coding device. The computer program product comprises computer executable instructions stored on the non-transitory computer readable medium such that when executed by a processor cause the video coding device to perform the method 4200.

[0219] FIG. 6 is a block diagram that illustrates an example video coding system 4300 that may utilize the embodiments of this disclosure. The video coding system 4300 may include a source device 4310 and a destination device 4320. Source device 4310 generates encoded video data which may be referred to as a video encoding device. Destination device 4320 may decode the encoded video data generated by source device 4310 which may be referred to as a video decoding device.

[0220] Source device 4310 may include a video source 4312, a video encoder 4314, and an input / output (I / O) interface 4316. Video source 4312 may include a source such as a video capture device, an interface to receive video data from a video content provider, and / or a computer graphics system for generating video data, or a combination of such sources. The video data may comprise one or more pictures. Video encoder 4314 encodes the video data from video source 4312 to generate a bitstream. The bitstream may include a sequence of bits that form a codedAtty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W) representation of the video data. The bitstream may include coded pictures and associated data. The coded picture is a coded representation of a picture. The associated data may include sequence parameter sets, picture parameter sets, and other syntax structures. I / O interface 4316 may include a modulator / demodulator (modem) and / or a transmitter. The encoded video data may be transmitted directly to destination device 4320 via I / O interface 4316 through network 4330. The encoded video data may also be stored onto a storage medium / server 4340 for access by destination device 4320.

[0221] Destination device 4320 may include an I / O interface 4326, a video decoder 4324, and a display device 4322. I / O interface 4326 may include a receiver and / or a modem. I / O interface 4326 may acquire encoded video data from the source device 4310 or the storage medium / server 4340. Video decoder 4324 may decode the encoded video data. Display device 4322 may display the decoded video data to a user. Display device 4322 may be integrated with the destination device 4320, or may be external to destination device 4320, which can be configured to interface with an external display device.

[0222] Video encoder 4314 and video decoder 4324 may operate according to a video compression standard, such as the High Efficiency Video Coding (HEVC) standard, Versatile Video Coding (VVM) standard and other current and / or further standards.

[0223] FIG.7 is a block diagram illustrating an example of video encoder 4400, which may be video encoder 4314 in the system 4300 illustrated in FIG.6. Video encoder 4400 may be configured to perform any or all of the embodiments of this disclosure. The video encoder 4400 includes a plurality of functional components. The embodiments described in this disclosure may be shared among the various components of video encoder 4400. In some examples, a processor may be configured to perform any or all of the embodiments described in this disclosure.

[0224] The functional components of video encoder 4400 may include a partition unit 4401; a prediction unit 4402, which may include a mode select unit 4403, a motion estimation unit 4404, a motion compensation unit 4405, and an intra prediction unit 4406; a residual generation unit 4407; a transform processing unit 4408; a quantization unit 4409; an inverse quantization unit 4410; an inverse transform unit 4411; a reconstruction unit 4412; a buffer 4413; and an entropy encoding unit 4414.

[0225] In other examples, video encoder 4400 may include more, fewer, or different functional components. In an example, prediction unit 4402 may include an intra block copy (IBC) unit. The IBC unit may perform prediction in an IBC mode in which at least one reference picture is a picture where the current video block is located.

[0226] Furthermore, some components, such as motion estimation unit 4404 and motion compensation unit 4405 may be highly integrated, but are represented in the example of video encoder 4400 separately for purposes of explanation.

[0227] Partition unit 4401 may partition a picture into one or more video blocks. Video encoder 4400 and video decoder 4500 may support various video block sizes.

[0228] Mode select unit 4403 may select one of the coding modes, intra or inter, e.g., based on error results, and provide the resulting intra or inter coded block to a residual generation unit 4407 to generate residual block data and to a reconstruction unit 4412 to reconstruct the encoded block for use as a reference picture. In some examples, modeAtty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W) select unit 4403 may select a combination of intra and inter prediction (CIIP) mode in which the prediction is based on an inter prediction signal and an intra prediction signal. Mode select unit 4403 may also select a resolution for a motion vector (e.g., a sub-pixel or integer pixel precision) for the block in the case of inter prediction.

[0229] To perform inter prediction on a current video block, motion estimation unit 4404 may generate motion information for the current video block by comparing one or more reference frames from buffer 4413 to the current video block. Motion compensation unit 4405 may determine a predicted video block for the current video block based on the motion information and decoded samples of pictures from buffer 4413 other than the picture associated with the current video block.

[0230] Motion estimation unit 4404 and motion compensation unit 4405 may perform different operations for a current video block, for example, depending on whether the current video block is in an I slice, a P slice, or a B slice.

[0231] In some examples, motion estimation unit 4404 may perform uni-directional prediction for the current video block, and motion estimation unit 4404 may search reference pictures of list 0 or list 1 for a reference video block for the current video block. Motion estimation unit 4404 may then generate a reference index that indicates the reference picture in list 0 or list 1 that contains the reference video block and a motion vector that indicates a spatial displacement between the current video block and the reference video block. Motion estimation unit 4404 may output the reference index, a prediction direction indicator, and the motion vector as the motion information of the current video block. Motion compensation unit 4405 may generate the predicted video block of the current block based on the reference video block indicated by the motion information of the current video block.

[0232] In other examples, motion estimation unit 4404 may perform bi-directional prediction for the current video block, motion estimation unit 4404 may search the reference pictures in list 0 for a reference video block for the current video block and may also search the reference pictures in list 1 for another reference video block for the current video block. Motion estimation unit 4404 may then generate reference indexes that indicate the reference pictures in list 0 and list 1 containing the reference video blocks and motion vectors that indicate spatial displacements between the reference video blocks and the current video block. Motion estimation unit 4404 may output the reference indexes and the motion vectors of the current video block as the motion information of the current video block. Motion compensation unit 4405 may generate the predicted video block of the current video block based on the reference video blocks indicated by the motion information of the current video block.

[0233] In some examples, motion estimation unit 4404 may output a full set of motion information for decoding processing of a decoder. In some examples, motion estimation unit 4404 may not output a full set of motion information for the current video. Rather, motion estimation unit 4404 may signal the motion information of the current video block with reference to the motion information of another video block. For example, motion estimation unit 4404 may determine that the motion information of the current video block is sufficiently similar to the motion information of a neighboring video block.

[0234] In one example, motion estimation unit 4404 may indicate, in a syntax structure associated with the current video block, a value that indicates to the video decoder 4500 that the current video block has the same motion information as another video block.Atty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W)

[0235] In another example, motion estimation unit 4404 may identify, in a syntax structure associated with the current video block, another video block and a motion vector difference (MVD). The motion vector difference indicates a difference between the motion vector of the current video block and the motion vector of the indicated video block. The video decoder 4500 may use the motion vector of the indicated video block and the motion vector difference to determine the motion vector of the current video block.

[0236] As discussed above, video encoder 4400 may predictively signal the motion vector. Two examples of predictive signaling techniques that may be implemented by video encoder 4400 include advanced motion vector prediction (AMVP) and merge mode signaling.

[0237] Intra prediction unit 4406 may perform intra prediction on the current video block. When intra prediction unit 4406 performs intra prediction on the current video block, intra prediction unit 4406 may generate prediction data for the current video block based on decoded samples of other video blocks in the same picture. The prediction data for the current video block may include a predicted video block and various syntax elements.

[0238] Residual generation unit 4407 may generate residual data for the current video block by subtracting the predicted video block(s) of the current video block from the current video block. The residual data of the current video block may include residual video blocks that correspond to different sample components of the samples in the current video block.

[0239] In other examples, there may be no residual data for the current video block for the current video block, for example in a skip mode, and residual generation unit 4407 may not perform the subtracting operation.

[0240] Transform processing unit 4408 may generate one or more transform coefficient video blocks for the current video block by applying one or more transforms to a residual video block associated with the current video block.

[0241] After transform processing unit 4408 generates a transform coefficient video block associated with the current video block, quantization unit 4409 may quantize the transform coefficient video block associated with the current video block based on one or more quantization parameter (QP) values associated with the current video block.

[0242] Inverse quantization unit 4410 and inverse transform unit 4411 may apply inverse quantization and inverse transforms to the transform coefficient video block, respectively, to reconstruct a residual video block from the transform coefficient video block. Reconstruction unit 4412 may add the reconstructed residual video block to corresponding samples from one or more predicted video blocks generated by the prediction unit 4402 to produce a reconstructed video block associated with the current block for storage in the buffer 4413.

[0243] After reconstruction unit 4412 reconstructs the video block, the loop filtering operation may be performed to reduce video blocking artifacts in the video block.

[0244] Entropy encoding unit 4414 may receive data from other functional components of the video encoder 4400. When entropy encoding unit 4414 receives the data, entropy encoding unit 4414 may perform one or more entropy encoding operations to generate entropy encoded data and output a bitstream that includes the entropy encoded data.Atty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W)

[0245] FIG. 8 is a block diagram illustrating an example of video decoder 4500 which may be video decoder 4324 in the system 4300 illustrated in FIG.6. The video decoder 4500 may be configured to perform any or all of the embodiments of this disclosure. In the example shown, the video decoder 4500 includes a plurality of functional components. The embodiments described in this disclosure may be shared among the various components of the video decoder 4500. In some examples, a processor may be configured to perform any or all of the embodiments described in this disclosure.

[0246] In the example shown, video decoder 4500 includes an entropy decoding unit 4501, a motion compensation unit 4502, an intra prediction unit 4503, an inverse quantization unit 4504, an inverse transformation unit 4505, a reconstruction unit 4506, and a buffer 4507. Video decoder 4500 may, in some examples, perform a decoding pass generally reciprocal to the encoding pass described with respect to video encoder 4400.

[0247] Entropy decoding unit 4501 may retrieve an encoded bitstream. The encoded bitstream may include entropy coded video data (e.g., encoded blocks of video data). Entropy decoding unit 4501 may decode the entropy coded video data, and from the entropy decoded video data, motion compensation unit 4502 may determine motion information including motion vectors, motion vector precision, reference picture list indexes, and other motion information. Motion compensation unit 4502 may, for example, determine such information by performing the AMVP and merge mode.

[0248] Motion compensation unit 4502 may produce motion compensated blocks, possibly performing interpolation based on interpolation filters. Identifiers for interpolation filters to be used with sub-pixel precision may be included in the syntax elements.

[0249] Motion compensation unit 4502 may use interpolation filters as used by video encoder 4400 during encoding of the video block to calculate interpolated values for sub-integer pixels of a reference block. Motion compensation unit 4502 may determine the interpolation filters used by video encoder 4400 according to received syntax information and use the interpolation filters to produce predictive blocks.

[0250] Motion compensation unit 4502 may use some of the syntax information to determine sizes of blocks used to encode frame(s) and / or slice(s) of the encoded video sequence, partition information that describes how each macroblock of a picture of the encoded video sequence is partitioned, modes indicating how each partition is encoded, one or more reference frames (and reference frame lists) for each inter coded block, and other information to decode the encoded video sequence.

[0251] Intra prediction unit 4503 may use intra prediction modes for example received in the bitstream to form a prediction block from spatially adjacent blocks. Inverse quantization unit 4504 inverse quantizes, i.e., de-quantizes, the quantized video block coefficients provided in the bitstream and decoded by entropy decoding unit 4501. Inverse transform unit 4505 applies an inverse transform.

[0252] Reconstruction unit 4506 may sum the residual blocks with the corresponding prediction blocks generated by motion compensation unit 4502 or intra prediction unit 4503 to form decoded blocks. If desired, a deblocking filter may also be applied to filter the decoded blocks in order to remove blockiness artifacts. The decoded video blocks areAtty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W) then stored in buffer 4507, which provides reference blocks for subsequent motion compensation / intra prediction and also produces decoded video for presentation on a display device.

[0253] FIG. 9 is a schematic diagram of an example encoder 4600. The encoder 4600 is suitable for implementing the techniques of VVC. The encoder 4600 includes three in-loop filters, namely a deblocking filter (DF) 4602, a sample adaptive offset (SAO) 4604, and an adaptive loop filter (ALF) 4606. Unlike the DF 4602, which uses predefined filters, the SAO 4604 and the ALF 4606 utilize the original samples of the current picture to reduce the mean square errors between the original samples and the reconstructed samples by adding an offset and by applying a finite impulse response (FIR) filter, respectively, with coded side information signaling the offsets and filter coefficients. The ALF 4606 is located at the last processing stage of each picture and can be regarded as a tool trying to catch and fix artifacts created by the previous stages.

[0254] The encoder 4600 further includes an intra prediction component 4608 and a motion estimation / compensation (ME / MC) component 4610 configured to receive input video. The intra prediction component 4608 is configured to perform intra prediction, while the ME / MC component 4610 is configured to utilize reference pictures obtained from a reference picture buffer 4612 to perform inter prediction. Residual blocks from inter prediction or intra prediction are fed into a transform (T) component 4614 and a quantization (Q) component 4616 to generate quantized residual transform coefficients, which are fed into an entropy coding component 4618. The entropy coding component 4618 entropy codes the prediction results and the quantized transform coefficients and transmits the same toward a video decoder (not shown). Quantization components output from the quantization component 4616 may be fed into an inverse quantization (IQ) components 4620, an inverse transform component 4622, and a reconstruction (REC) component 4624. The REC component 4624 is able to output images to the DF 4602, the SAO 4604, and the ALF 4606 for filtering prior to those images being stored in the reference picture buffer 4612.

[0255] A listing of solutions preferred by some examples is provided next.

[0256] The following solutions show examples of embodiments discussed herein.

[0257] 1. A method for processing media data comprising: determining to combine Hypothetical Reference Decoders (HRDs) for different sub-bitstreams; and performing a conversion between a visual media data and a bitstream based on the HRDs.

[0258] 2. The method of solution 1, wherein for sub-bitstream 1 to sub-bitstream N, network abstraction layer (NAL) units of different sub-bitstreams with the same nal_unit_type are all treated as the same type in a joint HRD.

[0259] 3. The method of any of solutions 1-2, wherein bitstream conformance is for a joint HRD and not individual HRDs when multiple HRDs are combined.

[0260] 4. The method of any of solutions 1-3, wherein two or more of atlas HRD, basemesh HRD, and displacement HRD are combined.

[0261] 5. The method of any of solutions 1-4, wherein one or more syntax elements are signalled in a sub- bitstream to indicate a maximum allowed number of pictures reordering.Atty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W)

[0262] 6. The method of any of solutions 1-5, wherein a maximum allowed number of pictures reordering includes a maximum allowed number of output pictures that can precede any output picture in decoding order and follow that picture in output order.

[0263] 7. The method of any of solutions 1-6, wherein the maximum allowed number of pictures reordering shall be in the range of 0 to the maximum required size of the decoded picture buffer for the sub-bitstream.

[0264] 8. The method of any of solutions 1-7, wherein one or more syntax elements are signalled to indicate the maximum allowed number of pictures reordering for atlas sub-bitstream, for basemesh sub-bitstream, or displacement sub-bitstream.

[0265] 9. The method of any of solutions 1-8, wherein when a sub-bitstream has different temporal levels, one or more syntax elements are signalled to indicate the maximum allowed number of pictures reordering for each temporal level.

[0266] 10. The method of any of solutions 1-9, wherein one or more syntax elements are signalled to indicate a maximum allowed number of pictures reordering for all sub-bitstreams.

[0267] 11. The method of any of solutions 1-10, wherein a maximum allowed number of pictures reordering for all sub-bitstreams is a maximum value of the maximum allowed number of pictures reordering for each sub-bitstream, or wherein the syntax elements are signalled in an atlas parameter set extension, or wherein the syntax elements are signalled in a video usability information (VUI) parameters extension.

[0268] 12. The method of any of solutions 1-11, wherein one or more syntax elements are signalled in a sub- bitstream to indicate a maximum latency.

[0269] 13. The method of any of solutions 1-12, wherein latency is a number of pictures, or wherein maximum latency is a maximum number of output pictures that can precede any output picture in output order and follow that picture in decoding order.

[0270] 14. The method of any of solutions 1-13, wherein one or more syntax elements are signalled to indicate the maximum latency for atlas sub-bitstream, the maximum latency for basemesh sub-bitstream, or the maximum latency for displacement sub-bitstream.

[0271] 15. The method of any of solutions 1-14, wherein when a sub-bitstream has different temporal levels, one or more syntax elements are signalled to indicate a maximum latency for each temporal level.

[0272] 16. The method of any of solutions 1-15, wherein one or more syntax elements are signalled to indicate a maximum latency for all sub-bitstreams, or wherein a maximum latency for all sub-bitstreams is a maximum value of the maximum latency for each sub-bitstream, or wherein the syntax elements are signalled in an atlas parameter set extension, or wherein the syntax elements are signalled in a VUI parameters extension.

[0273] 17. The method of any of solutions 1-16, wherein one or more syntax elements are signalled in the bitstream to indicate a maximum allowed number of pictures reordering or a maximum latency.

[0274] 18. The method of any of solutions 1-17, wherein when a bitstream has sub-bitstream 1 to sub-bitstream N and a maximum allowed number of pictures reordering for sub-bitstream i is R(i), i = 1...N, one or more syntaxAtty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W) elements are signalled to indicate the largest number of R(i), i = 1...N, or wherein when a bitstream has sub-bitstream 1 to sub-bitstream N and the maximum latency for sub-bitstream i is L(i), i = 1...N, one or more syntax elements are signalled to indicate the largest number of L(i), i = 1...N, or wherein the syntax elements are signalled in an atlas parameter set extension, or wherein the syntax elements are signalled in a VUI parameters extension.

[0275] 19. The method of any of solutions 1-18, wherein a subdivision iteration counts minus 1 is signalled in the bitstream.

[0276] 20. The method of any of solutions 1-19, wherein a number of iterations minus 1 is signalled in an atlas sequence parameter set, in an atlas frame parameter set, or in a meshpatch data unit.

[0277] 21. An apparatus for processing video data comprising: a processor; and a non-transitory memory with instructions thereon, wherein the instructions upon execution by the processor, cause the processor to perform the method of any of solutions 1-20.

[0278] 22. A non-transitory computer readable medium comprising a computer program product for use by a video coding device, the computer program product comprising computer executable instructions stored on the non- transitory computer readable medium such that when executed by a processor cause the video coding device to perform the method of any of solutions 1-20.

[0279] 23. A non-transitory computer-readable recording medium storing a bitstream of a video which is generated by a method performed by a video processing apparatus, wherein the method comprises: determining to combine Hypothetical Reference Decoders (HRDs) for different sub-bitstreams; and generating a bitstream based on the determining.

[0280] 24. A method for storing bitstream of a video comprising: determining to combine Hypothetical Reference Decoders (HRDs) for different sub-bitstreams; generating a bitstream based on the determining; and storing the bitstream in a non-transitory computer-readable recording medium.

[0281] 25. A method, apparatus, or system described in the present disclosure.

[0282] In the solutions described herein, an encoder may conform to the format rule by producing a coded representation according to the format rule. In the solutions described herein, a decoder may use the format rule to parse syntax elements in the coded representation with the knowledge of presence and absence of syntax elements according to the format rule to produce decoded video.

[0283] In the present disclosure, the term “video processing” may refer to video encoding, video decoding, video compression or video decompression. For example, video compression algorithms may be applied during conversion from pixel representation of a video to a corresponding bitstream representation or vice versa. The bitstream representation of a current video block may, for example, correspond to bits that are either co-located or spread in different places within the bitstream, as is defined by the syntax. For example, a macroblock may be encoded in terms of transformed and coded error residual values and also using bits in headers and other fields in the bitstream. Furthermore, during conversion, a decoder may parse a bitstream with the knowledge that some fields may be present, or absent, based on the determination, as is described in the above solutions. Similarly, an encoder may determine thatAtty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W) certain syntax fields are or are not to be included and generate the coded representation accordingly by including or excluding the syntax fields from the coded representation.

[0284] The disclosed and other solutions, examples, embodiments, modules and the functional operations described in this disclosurecan be implemented in digital electronic circuitry, or in computer software, firmware, or hardware, including the structures disclosed in this disclosureand their structural equivalents, or in combinations of one or more of them. The disclosed and other embodiments can be implemented as one or more computer program products, i.e., one or more modules of computer program instructions encoded on a computer readable medium for execution by, or to control the operation of, data processing apparatus. The computer readable medium can be a machine-readable storage device, a machine-readable storage substrate, a memory device, a composition of matter effecting a machine-readable propagated signal, or a combination of one or more them. The term “data processing apparatus” encompasses all apparatus, devices, and machines for processing data, including by way of example a programmable processor, a computer, or multiple processors or computers. The apparatus can include, in addition to hardware, code that creates an execution environment for the computer program in question, e.g., code that constitutes processor firmware, a protocol stack, a database management system, an operating system, or a combination of one or more of them. A propagated signal is an artificially generated signal, e.g., a machine-generated electrical, optical, or electromagnetic signal, that is generated to encode information for transmission to suitable receiver apparatus.

[0285] A computer program (also known as a program, software, software application, script, or code) can be written in any form of programming language, including compiled or interpreted languages, and it can be deployed in any form, including as a stand-alone program or as a module, component, subroutine, or other unit suitable for use in a computing environment. A computer program does not necessarily correspond to a file in a file system. A program can be stored in a portion of a file that holds other programs or data (e.g., one or more scripts stored in a markup language document), in a single file dedicated to the program in question, or in multiple coordinated files (e.g., files that store one or more modules, sub programs, or portions of code). A computer program can be deployed to be executed on one computer or on multiple computers that are located at one site or distributed across multiple sites and interconnected by a communication network.

[0286] The processes and logic flows described in this disclosurecan be performed by one or more programmable processors executing one or more computer programs to perform functions by operating on input data and generating output. The processes and logic flows can also be performed by, and apparatus can also be implemented as, special purpose logic circuitry, e.g., a field-programmable gate array (FPGA) or an application-specific integrated circuit (ASIC).

[0287] Processors suitable for the execution of a computer program include, by way of example, both general and special purpose microprocessors, and any one or more processors of any kind of digital computer. Generally, a processor will receive instructions and data from a read only memory or a random-access memory or both. The essential elements of a computer are a processor for performing instructions and one or more memory devices for storing instructions and data. Generally, a computer will also include, or be operatively coupled to receive data from or transfer data to, or both, one or more mass storage devices for storing data, e.g., magnetic, magneto optical disks, orAtty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W) optical disks. However, a computer need not have such devices. Computer readable media suitable for storing computer program instructions and data include all forms of non-volatile memory, media and memory devices, including by way of example semiconductor memory devices, e.g., erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), and flash memory devices; magnetic disks, e.g., internal hard disks or removable disks; magneto optical disks; and compact disc read-only memory (CD ROM) and Digital versatile disc-read only memory (DVD-ROM) disks. The processor and the memory can be supplemented by, or incorporated in, special purpose logic circuitry.

[0288] While the present disclosurecontains many specifics, these should not be construed as limitations on the scope of any subject matter or of what may be claimed, but rather as descriptions of features that may be specific to particular embodiments of the present disclosure. Certain features that are described in the present disclosure in the context of separate embodiments can also be implemented in combination in a single embodiment. Conversely, various features that are described in the context of a single embodiment can also be implemented in multiple embodiments separately or in any suitable subcombination. Moreover, although features may be described above as acting in certain combinations and even initially claimed as such, one or more features from a claimed combination can in some cases be excised from the combination, and the claimed combination may be directed to a subcombination or variation of a subcombination.

[0289] Similarly, while operations are depicted in the drawings in a particular order, this should not be understood as requiring that such operations be performed in the particular order shown or in sequential order, or that all illustrated operations be performed, to achieve desirable results. Moreover, the separation of various system components in the embodiments described in the present disclosure should not be understood as requiring such separation in all embodiments.

[0290] Only a few implementations and examples are described and other implementations, enhancements and variations can be made based on what is described and illustrated in the present disclosure.

[0291] A first component is directly coupled to a second component when there are no intervening components, except for a line, a trace, or another medium between the first component and the second component. The first component is indirectly coupled to the second component when there are intervening components other than a line, a trace, or another medium between the first component and the second component. The term “coupled” and its variants include both directly coupled and indirectly coupled. The use of the term “about” means a range including ±10% of the subsequent number unless otherwise stated.

[0292] While several embodiments have been provided in the present disclosure, it should be understood that the disclosed systems and methods might be embodied in many other specific forms without departing from the spirit or scope of the present disclosure. The present examples are to be considered as illustrative and not restrictive, and the intention is not to be limited to the details given herein. For example, the various elements or components may be combined or integrated in another system or certain features may be omitted, or not implemented.

[0293] In addition, techniques, systems, subsystems, and methods described and illustrated in the various embodiments as discrete or separate may be combined or integrated with other systems, modules, techniques, orAtty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W) methods without departing from the scope of the present disclosure. Other items shown or discussed as coupled may be directly connected or may be indirectly coupled or communicating through some interface, device, or intermediate component whether electrically, mechanically, or otherwise. Other examples of changes, substitutions, and alterations are ascertainable by one skilled in the art and could be made without departing from the spirit and scope disclosed herein.

Claims

Atty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W) CLAIMS What is claimed is:

1. A method for processing media data, comprising: determining to combine Hypothetical Reference Decoders (HRDs) for different sub-bitstreams; and performing a conversion between a visual media data and a bitstream based on the HRDs.

2. The method of claim 1, wherein non-video sub-bitstreams are conveyed as at least a part of an atlas sub- bitstream.

3. The method of any of claims 1-2, wherein instead of coding a basemesh sub-bitstream, basemesh data is carried in an atlas sub-bitstream.

4. The method of any of claims 1-3, wherein the basemesh data is required to have a same intra / inter coding type and / or reference frame structure as the atlas sub-bitstream.

5. The method of any of claims 1-4, wherein instead of coding a displacement sub-bitstream, displacement data is carried in an atlas sub-bitstream.

6. The method of any of claims 1-5, wherein the displacement data is required to have a same intra / inter coding type and / or reference frame structure as the atlas sub-bitstream.

7. The method of any of claims 1-6, wherein the atlas sub-bitstream carries both the basemesh data and the displacement data.

8. The method of any of claims 1-7, wherein both the basemesh data and the displacement data are required to have the same intra / inter coding type and / or reference frame structure as the atlas sub-bitstream.

9. The method of any of claims 1-8, wherein a delta value to a reference quantization parameter (Qp) is signaled.

10. The method of any of claims 1-9, wherein the reference Qp minus N is signaled.

11. The method of any of claims 1-10, wherein the reference Qp minus N is signaled, wherein N is equal to 49.

12. The method of any of claims 1-10, wherein a value of Qp is greater than 0, regardless of whether the Qp is signaled or derived.Atty. Dkt. No.: 4824-55404 (P24042397399WO2; G25N12878W) 13. The method of any of claims 1-12, wherein a minimum Qp value is equal to 1.

14. The method of any of claims 1-13, wherein a clipping operator is applied to derive a Qp value.

15. The method of any of claims 1-14, wherein the clipping operator is applied before the Qp value is used, and wherein the clipping operator comprises Clip3(minQp, maxQp, Qp, wherein minQp is equal to 1, maxQp is equal to 100, and Qp represents the Qp value before being clipped.

16. The method of any of claims 1-15, wherein the conversion includes encoding the visual media data into the bitstream.

17. The method of any of claims 1-15, wherein the conversion includes decoding the visual media data from the bitstream.

18. An apparatus for processing video data comprising: a processor; and a non-transitory memory with instructions thereon, wherein the instructions upon execution by the processor, cause the processor to perform the method of any of claims 1-17.

19. A non-transitory computer readable medium comprising a computer program product for use by a video coding device, the computer program product comprising computer executable instructions stored on the non-transitory computer readable medium such that when executed by a processor cause the video coding device to perform the method of any of claims 1-17.

20. A non-transitory computer-readable recording medium storing a bitstream of a video which is generated by a method performed by a video processing apparatus, wherein the method comprises: determining to combine Hypothetical Reference Decoders (HRDs) for different sub-bitstreams; and generating a bitstream based on the determining.

21. A method for storing bitstream of a video comprising: determining to combine Hypothetical Reference Decoders (HRDs) for different sub-bitstreams; generating a bitstream based on the determining; and storing the bitstream in a non-transitory computer-readable recording medium.

Images