Real-time radiation dosimeter using SRAM power-up state

Abstract

A radiation dosimeter may include a static random-access memory (SRAM) and a processor. The processor may be configured to power up the SRAM. The processor may be configured to read a power-up state of the SRAM. The processor may be configured to determine a bit error rate (BER) of the read power-up state compared to a reference power-up state. The processor may be configured to calculate a radiation dose based on the determined BER. The read power-up state may include a current PUF of the SRAM. The reference power-up state may include a GoldPUF of the SRAM.

Description

[0001] REAL-TIME RADIATION DOSIMETER USING SRAM POWER-UP STATE

[0002] CROSS-REFERENCE TO RELATED APPLICATION

[0003] This patent application claims the benefit of and priority to U.S. Provisional App. No. 63 / 634,592 filed April 16, 2024, titled “REAL-TIME RADIATION DOSIMETER USING SRAM POWER-UP STATE,” which is incorporated in the present disclosure by reference in its entirety.

[0004] GOVERNMENT SUPPORT

[0005] This invention was made with government support under Grant Number 2346853, awarded by the National Science Foundation. The government has certain rights in the invention.

[0006] FIELD

[0007] The embodiments discussed in the present disclosure are related to a real-time radiation dosimeter using SRAM power-up state.

[0008] BACKGROUND

[0009] Unless otherwise indicated in the present disclosure, the materials described in the present disclosure are not prior art to the claims in the present application and are not admitted to be prior art by inclusion in this section.

[0010] Dosimetry plays a role in safeguarding personnel and electronic instruments from the harmful effects of ionizing radiation. A dosimeter provides the ability to quantify the radiation dose over time, providing data for radiation protection and monitoring programs. Ideally, dosimeters would accurately measure radiation doses from X-rays, gamma rays, beta particles, and neutrons. However, in practice, the effectiveness of specific dosimeters is often limited by their physical characteristics.

[0011] High exposures of ionizing radiation can pose a significant risk to human health both in the short term and long term. Radiation exposure in various doses may occur in many relatively common environments and scenarios, including from dental x-rays, chest x-rays, the natural environment, aircraft travel, CT scans, in and around nuclear power plants, at the International Space Station, and radiation therapy, as well as in more uncommon environments and scenarios such as nuclear disasters (Chernobyl, Fukushima) and space radiation. US Nuclear Regulatory Commission, “PART 20 — STANDARDS FOR PROTECTION AGAINST RADIATION 0 NRC. The radiation dose may vary depending on the environment and / or scenario from, e.g., 10'4rad (radiation absorbed dose) or lower to 105rad or higher. In the instant application, radiation absorbed dose, or rad, is used herein to quantify total ionizing dose (TID); rad is a commonly used unit for measuring energy deposition from radiation.

[0012] In extreme situations, such as nuclear disasters in Fukushima and Chernobyl, immediate measurement capabilities in the higher dose range may facilitate accurate assessment of exposure levels. This differs from occupational monitoring in fields like healthcare, mining, and nuclear energy which require meticulous regulatory radiation monitoring programs due to frequent exposures to low doses that can accumulate over time and potentially exceed safety limits, including the annual maximum allowed for emergency responders. F. A. Mettler, W. Huda, T. T. Yoshizumi, and M. Mahesh, “Effective Doses in Radiology and Diagnostic Nuclear Medicine: A Catalog,” Radiology, vol. 248, no. 1, pp. 254-263, Jul. 2008. Moreover, dosimeters designed for monitoring radiation exposure in typical occupational settings may be inadequate for extremely high doses. Therefore, there exists a need to develop dosimeter technology for monitoring total -dose in extremely high radiation environments to ensure safety and effective situational awareness.

[0013] The subject matter claimed in the present disclosure is not limited to embodiments that solve any disadvantages or that operate only in environments such as those described above. Rather, this background is only provided to illustrate one example technology area where some embodiments described in the present disclosure may be practiced.

[0014] SUMMARY

[0015] This Summary is provided to introduce a selection of concepts in a simplified form that are further described below in the Detailed Description. This Summary is not intended to identify key features or essential characteristics of the claimed subject matter, nor is it intended to be used as an aid in determining the scope of the claimed subject matter.

[0016] In an example embodiment, a radiation dosimeter may include a static random access memory (SRAM) and a processor. The processor may be configured to power up the SRAM. The processor may be configured to read a power-up state of the SRAM. The processor may be configured to determine a bit error rate (BER) of the read power-up state compared to a reference power-up state. The processor may be configured to calculate a radiation dose based on the determined BER. In another example embodiment, a method to measure radiation dose may include powering up a SRAM after radiation exposure. The method may include reading a power- up state of the SRAM. The method may include determining a BER of the read power-up state compared to a reference power-up state. The method may include calculating a radiation dose based on the determined BER.

[0017] In another example embodiment, a non-transitory computer-readable medium may have computer-readable instructions stored thereon that are executable by a processor to perform or control performance of operations. The operations may include powering up a SRAM after radiation exposure. The operations may include reading a power-up state of the SRAM. The operations may include determining a BER of the read power-up state compared to a reference power-up state. The operations may include calculating a radiation dose based on the determined BER.

[0018] The object and advantages of the embodiments will be realized and achieved at least by the elements, features, and combinations particularly pointed out in the claims. Both the foregoing general description and the following detailed description are exemplary and explanatory and are not restrictive.

[0019] BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Example embodiments will be described and explained with additional specificity and detail through the use of the accompanying drawings in which:

[0021] FIG. 1 conceptually illustrates an example SRAM-based radiation dosimetry process;

[0022] FIGS. 2 A and 2B illustrate various example radiation dosimeters;

[0023] FIG. 3 illustrates an example SRAM cell that may be included in any of the SRAMs described herein;

[0024] FIG. 4 illustrates five representative power-up states of eight SRAM cells of a given SRAM;

[0025] FIG. 5 conceptually illustrates effects of TID on the SRAM cell of FIG. 3;

[0026] FIG. 6 illustrates an example operating environment in which one or more radiation dosimeters may be implemented;

[0027] FIG. 7 illustrates a flowchart of an example method to measure radiation dose;

[0028] FIG. 8A illustrates baseline characterization results respectively for a 90 nm SRAM chip and a 150 nm SRAM chip; FIG. 8B shows dependence of variance with PUF length respectively for the 90 nm SRAM chip and the 150 nm SRAM chip;

[0029] FIGS. 9A-9C includes various plots that illustrate responses of the 90 nm SRAM, the 150 nm SRAM chip, and a 250 nm SRAM chip to TID;

[0030] FIG. 10 includes various plots that further illustrate responses of the 90 nm, 150 nm, and 250 nm SRAM chips to TID;

[0031] FIG. 11 illustrates HD of the 90 nm, 150 nm, and 250 nm SRAM chips as a function of radiation dose, spanning from 5 krad (Si) to 100 krad (Si);

[0032] FIG. 12 presents error (%) as a function of radiation dose, ranging from 5 krad (Si) to 100 krad (Si) for the 90 nm, 150 nm, and 250 nm SRAM chips; and

[0033] FIG. 13 illustrates a block diagram of an example computing system 1300, all arranged according to at least one embodiment described herein.

[0034] DETAILED DESCRIPTION

[0035] There are several types of existing dosimeters, each with relative strengths and limitations. E. Wagner, R. Sorom, and L. Wiles, “Radiation Monitoring for the Masses,” Health Physics, vol. 110, no. 1, pp. 37-44, Jan. 2016. Basic radiographic or radiochromic films, which are thin plastic sheets coated with a radiation-sensitive emulsion that changes color upon exposure, historically used to detect occupational radiation exposures. E. B. Podgorsak, “Radiation Oncology Physics:”, July 2005 and B. Chatterjee, C. Mousoulis, D. Seo, A. Kumar, S. Maity, S. M. Scott, D. J. Valentino, D. T. Morisette, D. Peroulis, S. Sen, “A Wearable Real-time CMOS Dosimeter with Integrated Zero-bias Floating-Gate Sensor and an 861nW 18-bit Energy-Resolution Scalable Time-based Radiation to Digital Converter,” in 2019 IEEE Custom Integrated Circuits Conference (CICC), Apr. 2019, pp. 1-4. While these films can detect the presence of radiation, they lack quantification of absorbed dose. Consequently, more accurate and quantifiable sensors have been developed over the past few decades to measure the low doses of radiation typically encountered in occupational settings. For example, Thermoluminescent dosimeters (TLDs) (E. Tochilin, N. Goldstein, and W. G. Miller, “Beryllium Oxide as a Thermoluminescent Dosimeter,” Health Physics, vol. 16, no. 1, p. 1, Jan. 1969) are a type of passive dosimeter used for dose monitoring. While TLDs can provide accurate measurements within specific applications, their analysis requires expensive equipment and calibration due to variability in individual TLD responses. These limitations have led to the adoption of optically stimulated luminescence dosimeters (OSLDs) as an alternative. OSLDs typically exhibit less variability between individual dosimeters and are less prone to signal loss compared to TLDs. However, like TLDs, OSLDs also require offsite analysis due to the high cost of the necessary equipment. Similarly, ion-based chamber radiation sensors offer high accuracy and resolution but tend to be bulky.

[0036] Electronic field effect transistor-based dosimeters (RADFETs) (P. Kumari, L. Davies, N. P. Bhat, E. Zhang, M. W. McCurdy, D. M. Fleetwood, B. Ray, “State-of-the- Art Flash Chips for Dosimetry Applications,” in 2018 IEEE Radiation Effects Data Workshop (REDWf Jul. 2018, pp. 1-4, A. Jaksic, G. Ristic, M. Pejovic, A. Mohammadzadeh, C. Sudre and W. Lane, "Gamma-ray irradiation and post-irradiation responses of high dose range RADFETs," RADECS 2001. 2001 6th European Conference on Radiation and Its Effects on Components and Systems (Cat. No.01TH8605). Grenoble, France, 2001, and M. Brucoli, S. Danzeca, M. Brugger, A. Masi, A. Pineda, J. Cesari, L. Dusseau, F. Wrobel, "Floating Gate Dosimeter Suitability for Accelerator-Like Environments," in IEEE Transactions on Nuclear Science, vol. 64, no. 8, pp. 2054-2060, Aug. 2017) represent a promising advancement, however, they require dedicated hardware for readout and are not suitable for high dose (>lk rad) measurements. On the other hand, floating gate (FG) radiation dosimeters offer higher sensitivity and resolution, but they have complex readout systems and are sensitive to temperature variations. B. Chatterjee, C. Mousoulis, D. Seo, A. Kumar, S. Maity, S. M. Scott, D. J. Valentino, D. T. Morisette, D. Peroulis, S. Sen, “A Wearable Real-time CMOS Dosimeter with Integrated Zero-bias Floating-Gate Sensor and an 861nW 18-bit Energy-Resolution Scalable Time-based Radiation to Digital Converter,” in 2019 IEEE Custom Integrated Circuits Conference (CICCf Apr. 2019, pp. 1-4. In short, there are several dosimeters capable of measuring radiation for different ranges, these devices tend to be bulky, expensive, and involve complex readout processes.

[0037] Thus, for extreme radiation levels there is a clear need for real-time dosimetry technology that optimizes key requirements such as cost, processing, readout time, reliability, resource requirements, and compatibility with existing hardware. This ensures that it can be deployed across a wide range of radiation detection for various applications. For instance, space exploration and nuclear disaster scenarios particularly require high- dose dosimeters for precise measurements.

[0038] In the realm of Silicon-based CMOS dosimeters, several intriguing proposals have emerged in the literature. For instance, Tarr et al. demonstrated a floating-gate MOSFET dosimeter using a CMOS-compatible fabrication process. N. G. Tarr, G. F. Mackay, K. Shortt, and I. Thomson, “A floating gate MOSFET dosimeter requiring no external bias supply,” in RADECS 97. Fourth European Conference on Radiation and its Effects on Components and Systems (Cat. No.97TH8294), Sep. 1997, pp. 277-281. They gauged the change in threshold voltage of the fabricated floating-gate MOSFET in relation to the absorbed dose. Brucoli et al. employed a similar floating-gate MOSFET device structure, integrating an on-chip signal processing circuit to measure radiation dose in terms of output frequency. M. Brucoli, S. Danzeca, M. Brugger, A. Masi, A. Pineda, J. Cesari, L. Dusseau, F. Wrobel, "Floating Gate Dosimeter Suitability for Accelerator-Like Environments," in IEEE Transactions onN. More recently, Kumari et al. leveraged commercial NAND flash memory chips as dosimeters, exhibiting promising sensitivity for low Total Ionizing Dose (TID). P. Kumari, L. Davies, N. P. Bhat, E. Zhang, M. W. McCurdy, D. M. Fleetwood, B. Ray, “State-of-the-Art Flash Chips for Dosimetry Applications,” in 2018 IEEE Radiation Effects Data Workshop (REDWf Jul. 2018, pp. 1-4 and P. Kumari, U. Surendranathan, M. Wasiolek, K. Hattar, N. Bhat, and B. Ray, “Analytical Bit-Error Model of NAND Flash Memories for Dosimetry Application,” IEEE Transactions on Nuclear Science, vol. 69, no. 3, pp. 478-484, Mar. 2022. However, flash memory chips typically become non-functional for TID > 50 krad(Si) due to failure of charge-pump circuits, limiting their usefulness in high radiation dose environments. An SRAM based active radiation detector using Single Event Upset (SEU) has been proposed in the literature. See D. Makowski, M. Grecki, B. Swiercz, A. Napieralski, DMCS, Lodz , Poland B. Mukherjee, S. Simrock, DESY, Hamburg, “SRAM-Based Passive Dosimeter for High-Energy Accelerator Environments - CERN Document Server.”, Proceedings of DIP AC, 2005, G. Korkian, Daniel Leon, Francisco J. Franco et al., "Single Event Upsets Under Proton, Thermal, and Fast Neutron Irradiation in Emerging Nonvolatile Memories," in IEEE Access, vol. 10, pp. 114566- 114585, 2022, and S. Woo, R. Yoon, D. Bae, K. Kim, H. Lee, S. Chung, C. Cho, J. Kim, S. A. Wender, Y. Kim, “Analysis of Efficiency and Utilization with SRAM Dosimetry for Single-Event Effect Evaluation under Irradiation,” in 2022 22nd European Conference on Radiation and Its Effects on Components and Systems (RADECS) , Oct. 2022, pp. 1-6. However, the SEU-based SRAM dosimeter is not suitable for detecting the TID caused by X-rays or gamma rays.

[0039] Embodiments of the present disclosure will now be explained with reference to the accompanying figures. It is to be understood that the figures are diagrammatic and schematic representations of such example embodiments, and are not limiting, nor are they necessarily drawn to scale. In the figures, features with like numbers indicate like structure and function unless described otherwise.

[0040] In contrast to other dosimeters described elsewhere herein, some embodiments herein involve the use of the power-up state of an SRAM as a real-time radiation dosimeter. FIG. 1 conceptually illustrates an example SRAM-based radiation dosimetry process 100, arranged in accordance with at least one embodiment herein. As illustrated in FIG. 1, a SRAM 102 has an initial power-up state 104A that is read out prior to radiation exposure. The SRAM 102 is exposed to radiation 106 which alters the power-up state 104A, resulting in an altered power-up state 104B that may be read out later, e.g., after exposure to the radiation 106. The altered power-up state 104B may be compared to the initial power-up state 104A as indicated at 108 to identify a bit error rate (BER) in the power-up state, which BER may be indicative of the TID. In the illustrated example, two bits in the initial power- up state 104 A were flipped by exposure to the radiation 106 in the altered power-up state 104B. The initial and flipped bits in the initial power-up state 104 A and the altered power- up state 104B are outlined to highlight the radiati on -induced change.

[0041] In these and other embodiments, the power-up state of an SRAM such as the SRAM 102 may serve as a digital fingerprint or Physical Uncl enable Function (PUF) for device authentication. The inventors of the embodiments described herein have recognized that SRAM PUF is sensitive to ionizing radiation dose, and the corresponding alterations in PUF characteristics may be harnessed as a dosimeter. Some embodiments involve various off-the-shelf commercial SRAM memory chips, including a Cypress 90 nm SRAM memory chip, a Cypress 150 nm SRAM memory chip, and a Cyprus 250 nm SRAM memory chip. All three SRAM chips display sensitivity even at low radiation doses of 500 rad (Si), while remaining operational at a high radiation dose of 350 krad (Si). The older technology node SRAM memory chips, specifically the Cypress 250 nm and 150 nm SRAM memory chips exhibit greater sensitivity and linearity with TID compared to the Cyprus 90 nm SRAM memory chip. Embodiments herein are not limited to the foregoing SRAM devices and instead extend to other SRAM devices, e.g., from the same or other vendors, based on the same or other technologies (e.g., 90 nm, 150 nm, 250 nm, or other).

[0042] FIGS. 2 A and 2B illustrate various example radiation dosimeters 200 A, 200B, arranged in accordance with at least one embodiment herein. As illustrated, each radiation dosimeter 200 A, 200B includes a SRAM 202 A, 202B and a processor 204 A, 204B. In FIG. 2A, the SRAM 202A comprises an external SRAM chip, such as a Commercial Off-The- Shelf (COTS) SARM chip. In FIG. 2B, the SRAM 202B comprises embedded SRAM, e.g. SRAM that is embedded in the processor 204B.

[0043] The radiation dosimeter 200A, 200B may generally operate as follows. The processor 204A, 204B may power up the SRAM 202A, 202B, read a power-up state of the SRAM 202 A, 202B, determine a BER of the read power-up state compared to a reference (or initial) power-up state, and calculate a radiation dose based on the determined BER. The processor 204A, 204B may also determine the reference power-up state as described in more detail elsewhere herein.

[0044] Each SRAM described herein, including the SRAMs 202A, 202B of FIGS. 2A-2B, may generally include multiple SRAM cells. FIG. 3 illustrates an example SRAM cell 300 that may be included in any of the SRAMs herein, arranged in accordance with at least one embodiment herein. The SRAM cell 300 is a six-transistor (6T) SRAM cell that includes a pair of cross-coupled CMOS inverters 302, 304 and two access transistors 306, 308. Each of the CMOS inverters 302, 304 includes a pair of opposite-polarity metal-oxide- semiconductor field-effect transistors (MOSFETs). For example, the CMOS inverter 302 includes p-type MOSFET Pi and n-type MOSFET Ni while the CMOS inverter 304 includes p-type MOSFET P2 and n-type MOSFET N2. The cross-coupled inverter pair 302, 304 manifests two stable states, each representing logical states 0 and 1, respectively. Following a power-up sequence, SRAM cells can exist in either state, dictated by a process variation-induced small difference in the drive strength of individual transistors. Consequently, the power-up state of a SRAM made up of multiple SRAM cells yields a random, unpredictable signature, suitable for creating a digital fingerprint of a chip or a PUF. J. M. Cannon et al., "Electrical Measurement of Cell-to-Cell Variation of Critical Charge in SRAM and Sensitivity to Single-Event Upsets by Low-Energy Protons," mlEEE Transactions on Nuclear Science, vol. 68, no. 5, pp. 815-822, May 2021, D. M. Fleetwood, “Total-Ionizing-Dose Effects, Border Traps, and 1 / f Noise in Emerging MOS Technologies,” IEEE Transactions on Nuclear Science, vol. 67, no. 7, pp. 1216-1240, Jul. 2020, and U. Surendranathan, H. Wilson, M. Wasiolek, K. Hattar, A. Milenkovic, and B. Ray, “Total Ionizing Dose Effects on the Power-Up State of Static Random- Access Memory,” IEEE Transactions on Nuclear Science, vol. 70, no. 4, pp. 641-647, Apr. 2023.

[0045] The power-up states of a given SRAM yield similar but not identical random bit sequences upon repeated capture due to some SRAM cells changing states from electronic noise. For instance, FIG. 4 illustrates five representative power-up states of eight SRAM cells of a given SRAM, arranged in accordance with at least one embodiment herein. The five power-up states are respectively labeled PUF 1, PUF 2, PUF 3, PUF 4, and PUF 5. As illustrated, there may be a few unstable bits that change their state during subsequent power-up states (e.g., due to electronic noise), specifically the fifth and seventh bits in this example.

[0046] The unstable bits reduce the PUF accuracy. PUF accuracy may be quantified by a BER metric between the current PUF state and a reference PUF state. For example, the PUF accuracy may be quantified by Hamming Distance (HD) between the current PUF state and the reference PUF state, which reference PUF state may be referred to as GoldPUF. The HD may be calculated according to equation 1 :

[0047] According to some embodiments, the GoldPUF (or reference power-up state) may be generated for a given SRAM by taking a threshold number of consecutive power-up states from the same SRAM location and then performing majority voting to determine the value of each bit position. The threshold number of consecutive power-up states may be 20, 21, 25, 100, 101, or other suitable threshold number.

[0048] Majority voting may generate a final value for each bit of the GoldPUF based on the greatest number of occurrences of a corresponding bit value for that bit in the consecutive power-up states. In the example of FIG. 4, the fifth bit has bit values of 1, 1, 0, 1, and 1 in PUF 1-PUF 5 and majority voting results in the fifth bit taking on a bit value of 1 in the GoldPUF since the 1 -bit value has a greater number of occurrences for the fifth bit than the O-bit value.

[0049] With reference again to FIG. 3, each of the six transistors of the SRAM cell 300 includes a gate. Gamma rays interact with a SRAM cell, such as the SRAM cell 300, by ionizing gate insulators, generating electron-hole pairs within gate dielectric materials. Electrons being more mobile may escape through the gate or p-substrate, while holes may get trapped in the oxide layer of the transistors. V. Danchenko, “RADIATION DAMAGE IN MOS INTEGRATED CIRCUITS, Part I”, September 1971. The positive charge trapping in the oxide layers leads to a reduction in the NMOS threshold voltage and an increase in the PMOS threshold voltage. U. Surendranathan, H. Wilson, L. R. Cao, A. Milenkovic, and B. Ray, “Analysis of SRAM PUF Integrity Under Ionizing Radiation: Effects of Stored Data and Technology Node,” IEEE Transactions on Nuclear Science, vol. 71, no. 4, pp. 485-491, Apr. 2024. Additionally, TID effects may create oxide-silicon interface traps and reduce carrier mobility in the transistor channel. These changes in charge distribution may alter the threshold voltage (Vth ) and impact the power-up state of the SRAM cell, potentially leading to a different power-up state when the SRAM is powered back on after irradiation.

[0050] FIG. 5 conceptually illustrates effects of TID on the SRAM cell 300, arranged in accordance with at least one embodiment herein. To understand the impact of TID effects on the SRAM cell 300, assume a default (or initial or reference) power-up state of the SRAM cell 300 prior to exposure to radiation 502 is “1,” represented by Q = 1, and Q = 0 as shown in FIG. 5. This state is determined by a threshold voltage difference between NMOS transistors, where it is assumed that VtN2> VtN1before irradiation. After irradiation, depending on charge trapping, the threshold voltage mismatch may reverse to Ftw1> VtN2. This threshold voltage shift changes the power-up state from Q = 1, to Q = 0, as further illustrated in FIG. 5 (U. Surendranathan, H. Wilson, L. R. Cao, A. Milenkovic, and B. Ray, “Analysis of SRAM PUF Integrity Under Ionizing Radiation: Effects of Stored Data and Technology Node,” IEEE Transactions on Nuclear Science, vol. 71, no. 4, pp. 485-491, Apr. 2024.), leading to increased BER (specifically HD in this example) after irradiation.

[0051] FIG. 6 illustrates an example operating environment 600 in which one or more radiation dosimeters 602A-602F may be implemented, arranged in accordance with at least one embodiment herein. The radiation dosimeters 602A-602F may be referred to collectively as “radiation dosimeters 602” and / or generically as “radiation dosimeter 602”.

[0052] One or more of the radiation dosimeters 602 may be included or incorporated in a computing device 604A, 604B, 604C (hereinafter collectively “computing devices 604” and generically “computing device 604”). Each computing device 104 may be or include, for example, a mobile phone, a wearable electronic device, a drone (e.g., an unmanned aerial drone), or other suitable computing device.

[0053] Each of the radiation dosimeters 602 may include, be included in, or otherwise correspond to one or more other radiation dosimeters described herein. For example, each of the radiation dosimeters 602 may include a SRAM and processor such as described with respect to FIGS. 2A-2B. In some embodiments, one or more of the radiation dosimeters 602 may each be included in a different internet of things (loT) device (not illustrated in FIG. 6). In some embodiments, one or more of the radiation dosimeters 602 may be carried by a person, animal, drone, or the like to detect radiation exposure of the person, animal, or drone. In some embodiments, one or more of the radiation dosimeters 602 may be deployed within an area or region 606 to detect radiation within the area or region 606 and / or to localize a radiation source 608 within the area or region 606. For example, one or more of the radiation dosimeters 602 may be part of a static or fixed-location radiation monitoring network to detect radiation within the area or region 608 (e.g., a radiology department in a hospital, a nuclear power plant, or other area or region) on an ongoing basis. As another example, one or more of the radiation dosimeters 602 may be mobile (e.g., included in or attached to a drone, a robot, or other mobile system or device) and deployable within the area or region 608 (e.g., a nuclear cleanup or disaster site) to detect and localize the radiation source 608. Such mobile devices may remain at fixed locations while taking measurements to measure TID at the fixed location. Whether the radiation dosimeters 602 are static or mobile, in some embodiments TID detected by the radiation dosimeters 602 may be used to localize the radiation source 608, e.g., through triangulation based on signal strength (where the “signal” is TID or ATID) or other protocols.

[0054] The operating environment 600 may additionally include a network 610 and a server 612. The server 612 may be configured to collect measurements from the radiation dosimeters 602. In some embodiments, the server 612 may collect TID measurements from the radiation dosimeters 602. In some embodiments, the server 612 may collect raw data from the radiation dosimeters 602 and generate TID measurements from the raw data. Alternatively or additionally, the server 612 may analyze the TID measurements for one or more purposes, such as localizing the radiation source 608 within the area or region 606 or other purpose(s).

[0055] In general, the network 610 may include one or more wide area networks (WANs) and / or local area networks (LANs) that enable the server 612, the radiation dosimeters 602, and / or the computing devices 604 to communicate with each other. In some embodiments, the network 610 may include the Internet, including a global internetwork formed by logical and physical connections between multiple WANs and / or LANs. Alternately or additionally, the network 610 may include one or more cellular radio frequency (RF) networks and / or one or more wired and / or wireless networks such as 8O2.xx networks, Bluetooth access points, wireless access points, Internet Protocol (IP)-based networks, or other wired and / or wireless networks. The network 610 may also include servers that enable one type of network to interface with another type of network.

[0056] FIG. 7 illustrates a flowchart of an example method 700 to measure radiation dose, arranged in accordance with at least one embodiment described herein. The method 700 may be performed by any suitable system, apparatus, or device. For example, any one or more of the radiation dosimeters 200A, 200B, 602, processors 204A, 204B, computing devices 604, and / or the server 612 may perform or direct performance of one or more of the operations associated with the method 700. In these and other embodiments, the method 700 may be performed or controlled by one or more processors (such as processors 204A, 204B) based on one or more computer-readable instructions stored on one or more non- transitory computer-readable media. Alternatively or additionally, embodiments herein may include a non-transitory computer-readable medium having computer-readable instructions stored thereon that are executable by a processor to perform or control performance of the method 700 or one or more operations thereof. The method 700 may include one or more of blocks 702, 704, 706, and / or 708.

[0057] At block 702, the method 700 may include powering up a SRAM after radiation exposure. For example, block 702 may include the processor 204A, 204B of FIG. 2A, 2B powering up the SRAM 202, 202B. Block 702 may be followed by block 704.

[0058] At block 704, the method 700 may include reading a power-up state of the SRAM. Block 704 may include the processor 204 A, 204B reading the power-up state of the SRAM. The power-up state may include a current PUF of the SRAM. The PUF may be read from the same set of one or more SRAM cells of the SRAM each time the SRAM is powered up. Block 704 may be followed by block 706.

[0059] At block 706, the method 700 may include determining a BER of the read power- up state compared to a reference power-up state. In some embodiments in which the read power-up state includes the current PUF of the SRAM, determining the BER of the read power-up state may include determining a Hamming Distance between the current PUF and a GoldPUF of the SRAM, e.g., according to equation 1 above. Block 706 may be followed by block 708.

[0060] At block 708, the method 700 may include calculating a radiation dose based on the determined BER. Calculating the radiation dose at block 708 may include applying a preexisting model that relates BER to Total Ionizing Dose (TID). An example process to create such a pre-existing model is described below. The pre-existing model may be a linear model in a TID range from a first threshold TID to a second threshold TID. The first threshold TID may be 200 rad (Si) or lower. The second threshold TID may be 100 Krad (Si) or higher. In the pre-existing model, BER may change monotonically with TID across an entire detection range of the SRAM. In some embodiments, the entire detection range of the SRAM extends from 200 rad (Si) or lower to 350 Krad (Si) or higher. In some embodiments, the method 700 may further include creating the reference power-up state. In embodiments in which the reference power-up state includes the GoldPUF of the SRAM, creating the reference power-up state may include reading multiple consecutive power-up states of the SRAM prior to radiation exposure at block 702 and performing majority voting across the consecutive power-up states to create a reference Physical Unclonable Function (GoldPUF) as the reference power-up state, as discussed with respect to, e.g., FIG. 4. In this and other embodiments, reading the consecutive power- up states of the SRAM may include reading at least 20 consecutive power-up states.

[0061] The SRAM may be implemented as a passive radiation sensor. In particular, in some embodiments, it is not necessary that the SRAM be powered during radiation exposure to detect TID. However, the SRAM may be powered during radiation exposure in some embodiments.

[0062] In some embodiments, the method 700 may further include increasing sensitivity of the SRAM to radiation. Increasing sensitivity of the SRAM to radiation may include one or more of the following steps. The SRAM may be powered up prior to radiation exposure. A predetermined data pattern may be written to the SRAM prior to radiation exposure. The SRAM may remain powered up during the radiation exposure. The SRAM may be powered off prior to powering up the SRAM after radiation exposure at block 702. Writing the predetermined data pattern to the SRAM may include writing one of the following predetermined data patterns to the SRAM: the GoldPUF of the SRAM, an inverted GoldPUF of the SRAM, all zeroes, or all ones.

[0063] Reference will now be made to FIGS. 9A-13 to discuss the creation of various example pre-existing models that may be used in the method 700 of FIG. 7 to calculate the radiation dose based on determined BER. The discussion of FIGS. 9A-13 covers various experiments performed by the inventors using various Cypress COTS SRAM chips of different technology nodes. The specific SRAM chips and technology nodes implemented in the inventors’ experiments are representative only and it should be understood that the principles disclosed herein are equally applicable to other SRAM chips from other suppliers and / or having other technology nodes.

[0064] Table 1 provides a summary of chip specifications of three Cyprus COTS SRAM chips used by the inventors.

[0065] Table 1

[0066] Each of the SRAM chips is hereinafter referred to individually by its technology node, e.g., the 90 nm SRAM chip, the 150 nm SRAM chip, and the 250 nm SRAM chip. To interface the SRAM chips, the inventors used a Thin Small Outline Package (TSOP-54) socket to holding the SRAM chips. The TSOP-54 socket was connected to an Arduino DUE microcontroller to read SRAM power-up states. The Arduino DUE was connected to a workstation via its native Universal Serial Bus (USB) port. U. Surendranathan, H. Wilson, M. Wasiolek, K. Hattar, A. Milenkovic, and B. Ray, “Total Ionizing Dose Effects on the Power-Up State of Static Random-Access Memory,” IEEE Transactions on Nuclear Science, vol. 70, no. 4, pp. 641-647, Apr. 2023.

[0067] Radiation experiments for the 90 nm and 150 nm SRAM chips were performed at Ohio State University Gamma Irradiation Facility using a Cobalt-60 source with a dose rate of 3.25 rad (Si) / s. The radiation experiment for the 250 nm SRAM chip was performed at Colorado State University Irradiation Facility using a Cesium-137 source with a dose rate of 8.2 rad (Si) / s.

[0068] Gamma irradiation was performed on the packaged TSOP device with all pins of the corresponding SRAM chip grounded. The direction of the gamma rays during irradiation was perpendicular to a top surface of the corresponding SRAM chip. The step- by-step experimental flow was as follows. Before irradiating each SRAM chip, a GoldPUF of the SRAM chip was generated by taking a majority vote from 101 consecutive power- up states. Each SRAM chip was then exposed to gamma rays up to a certain dose. The power-up state of the radiated SRAM chip was then retrieved or read from the SRAM chip. The PUF generated after radiation by reading the SRAM chip was then compared with the GoldPUF of the SRAM chip to compute the HD as the BER of the irradiated SRAM chip.

[0069] A baseline characterization of the SRAM power-up state of each SRAM chip was conducted by computing HD of each SRAM chip’s power-up state with respect to the SRAM chip’s reference power-up state or the GoldPUF. In the experiments, 256 different PUFs were generated for each SRAM chip, each with a length of 16 kilobits (kb), denoted as “N” sourced from various memory address locations on the SRAM chip. The HD of each PUF for each SRAM chip was calculated as a percentage by comparing the PUF with the corresponding GoldPUF. FIG. 8A illustrates baseline characterization results 802, 804 respectively for the 90 nm SRAM chip and the 150 nm SRAM chip, arranged in accordance with at least one embodiment. It is apparent from FIG. 8 A that the 150 nm SRAM chip power-up states generally exhibit a lower pre-irradiation HD compared to the 90 nm SRAM chip. This discrepancy may be attributed to the higher gate area for the individual transistors in the 150 nm SRAM chip, rendering them more resilient to thermal noise. Consequently, the baseline HD of the 150 nm SRAM chip PUFs is smaller compared to that of the 90 nm SRAM chip PUFs.

[0070] It can also be seen from FIG. 8A that there is a significant variability in terms of HD for both of the 90 nm and 150 nm SRAM chips. This variability may be quantified as follows: Variance = HDmax- HDmm. FIG. 8B shows dependence of variance with PUF length 806, 808 respectively for the 90 nm SRAM chip and the 150 nm SRAM chip, arranged in accordance with at least one embodiment. It can be seen from FIG. 8B that variance decreases with higher PUF length. However, improvement in variance for PUF length beyond 16 kb is minimal and hence for the analysis that follows, 16 kb PUF length is used to evaluate total dose sensitivity.

[0071] The response of the SRAM dosimeters herein, and specifically of the 90 nm, 150 nm, and 250 nm SRAM chips in this example, to TID was measured using increased HD of the corresponding SRAM-PUF after irradiation. FIGS. 9A-9C includes various plots 902, 904, 906, 908, 910, and 912 that illustrate responses of the 90 nm, 150 nm, and 250 nm SRAM chips to TID, arranged in accordance with at least one embodiment herein. In particular, FIG. 9A illustrates responses of the 90 nm SRAM chip, FIG. 9B illustrates responses of the 150 nm SRAM chip, and FIG. 9C illustrates responses of the 250 nm SRAM chip.

[0072] The plot 902 of FIG. 9A is a scatter plot that shows HD of various SRAM PUFs of the 90 nm SRAM chip (e.g., the 256 PUFs of the 90 nm SRAM chip of FIG. 8A) at various TIDs, including at 0 krad (Si) 902A, at 0.5 krad (Si) 902B, at 25 krad (Si) 902C, at 50 krad (Si) 902D, and at 100 krad (Si) 902E.

[0073] The plot 904 of FIG. 9B is a scatter plot that shows HD of various SRAM PUFs of the 150 nm SRAM chip (e.g., the 256 PUFs of the 150 nm SRAM chip of FIG. 8A) at various TIDs, including at 0 krad (Si) 904A, at 0.5 krad (Si) 904B, at 25 krad (Si) 904C, at 50 krad (Si) 904D, and at 100 krad (Si) 904E.

[0074] The plot 906 of FIG. 9C is a scatter plot that shows HD of various SRAM PUFs of the 250 nm SRAM chip (e.g., 256 PUFs of the 250 nm SRAM chip) at various TIDs, including at 0 krad (Si) 906A, at 0.5 krad (Si) 906B, at 25 krad (Si) 906C, at 50 krad (Si) 906D, and at 100 krad (Si) 906E.

[0075] While the plots 902, 904, 906 of FIGS. 9A-9C illustrate the HD of various PUFs for each of the SRAM chips at various irradiation conditions with respect to the preirradiation condition, the corresponding change in HD (AHD) of the various PUFs for each of the SRAM chips from the pre-irradiation condition with respect to TID were also calculated (not shown in FIGS. 9A-9C). For all three SRAM chips, there was a monotonic increase in HD with TID. In addition, all of the SRAM chips demonstrate a discernible response to total dose of 0.5 krad (Si) indicating the lower limit of TID detectability. Finally, a significant variability in HD values between different PUFs was observed, and in particular for the 90 nm SRAM chip. The variability in HD may reduce accuracy of the dosimeter for lower range of TID. However, for higher TID ranges, the variability of HD is lower compared to the absolute change in HD indicating the suitability of the SRAM dosimeter for higher TID ranges.

[0076] To quantify HD variability, the HD variability of each of the SRAM chips was plotted as a distribution plot in FIGS. 9A-9C. In particular, the plot 908 of FIG. 9A is a distribution plot showing Probability Density Function (PDF) as a function of HD for the 90 nm SRAM chip, the plot 910 of FIG. 9B is a distribution plot showing PDF as a function of HD for the 150 nm SRAM chip, and the plot 912 of FIG. 9C is a distribution plot showing PDF as a function of HD for the 250 nm SRAM chip. Each of the plots 908, 910, 912 of FIGS. 9A-9C includes a different PDF at each irradiation level, including a first PDF 908A, 910A, 912A at 0 krad (Si), a second PDF 908B, 910B, 912B at 0.5 krad (Si), a third PDF 908C, 910C, 912C at 25 krad (Si), a fourth PDF 908D, 910D, 912D at 50 krad (Si), and a fifth PDF 908E, 910E, 912E at 100 krad (Si). The solid lines in each PDF 908A-908E, 910A-910E, 912A-912E represent fitted Gaussian distributions, and the symbols stand for HD data. It can be seen from the plots 908, 910, 912 that all three COTS SRAM chips across varying radiation doses closely follow a Gaussian distribution pattern. The plots 908, 910, 912 also show that the 90 nm SRAM chip has overlapping distributions for different radiation doses, whereas the 150 nm and 250 nm SRAM chips exhibit less overlap in HD for the same TID. These results underscore the reliability of SRAM power-up states for radiation dosimetry.

[0077] FIG. 10 includes various plots 1002 and 1004 that further illustrate responses of the 90 nm, 150 nm, and 250 nm SRAM chips to TID, arranged in accordance with at least one embodiment herein. FIG. 10 presents a summary of the scatter plot data depicted in FIGS. 9A-9C using a line plot, illustrating average HD values for each dose. A logarithmic scale for TID is utilized in the plot 1002 to clearly visualize all the data points while a linear seal for TID is utilized in the plot 1004. Further, the plots 1002, 1004 compare the TID response of the three different SRAM chips from the same manufacturer but with different technology nodes. In particular, the plot 1002 includes a first curve 1006 for the 90 nm SRAM chip, a second curve 1008 for the 150 nm SRAM chip, and a third curve 1010 for the 250 nm SRAM chip, while the plot 1004 includes a first curve 1012 for the 90 nm SRAM chip, a second curve 1014 for the 150 nm SRAM chip, and a third curve 1016 for the 250 nm SRAM chip.. The plots 1002, 1004 of FIG. 10 clearly shows a monotonic and non-linear trend at some range of radiation dose in HD for all of the SRAM chips as the radiation dose increases from 0 krad (Si) to 350 krad (Si). All three SRAM chips remained fully functional even after 350 krad(Si), indicating the applicability of SRAM dosimeter for higher TID ranges.

[0078] The sensitivity (S) of the SRAM dosimeters (e.g., the SRAM chips) is considered next. The sensitivity (S) of a given SRAM dosimeter is defined as follows: 5 = AHD / ATID.

[0079] To quantify the sensitivity of each SRAM dosimeter, the average AHD was plotted against TID on a linear scale as shown in FIG. 10B. It is evident from at least FIG. 10B that the 250 nm SRAM chip shows slightly greater sensitivity to TID compared to both the 90 nm and 150 nm SRAM chips. This trend continues in the high dose range (e.g., > 100 krad (Si)) where the 250 nm SRAM chip displays notably higher sensitivity to TID overall. This increased sensitivity of the 250 nm SRAM chip may be attributed to thicker gate dielectric of individual CMOS transistors of the 250 nm SRAM chip compared to that of the other two chips, which are more susceptible to charge trapping induced by TID.

[0080] The curves 1006, 1008, 1010, 1012, 1014, 1016 of the plots 1002, 1004 are examples of pre-existing models relating BER to TID that may be utilized to calculate radiation dose as described with respect to FIG. 7. For example, if a radiation dosimeter includes 250 nm Cyprus SRAM chip, the third curve 1010 of the plot 1002 and / or the third curve 1016 of the plot 1004 may be used to calculate radiation dose based on a BER (and particularly on a change in HD, or AHD, in this example). In this example, if the AHD of the SRAM chip is determined to be 5%, the third curve 1010, 1016 (and / or a numerical model thereof) may be used to calculate that the radiation dose was about 68 krad (Si).

[0081] Furthermore, a linear response of each SRAM dosimeter is observed in a low dose range from 5-100 krad (Si), particularly notable for the 150 nm and 250 nm SRAM chips. However, in a high dose range greater than 100 krad (Si), a saturating response in terms of AHD is observed for all three chips. A linear response is often a desirable characteristic for an ideal dosimeter. Since all the chips exhibit linearity in the 5-100 krad (Si) TID range, we perform further analysis error (%) calculations in this range in the next section.

[0082] FIG. 11 illustrates HD of the three SRAM chips as a function of radiation dose, spanning from 5 krad (Si) to 100 krad (Si), arranged in accordance with at least one embodiment herein. A first curve 1102 corresponds to the 90 nm SRAM chip, a second curve 1104 corresponds to the 150 nm SRAM chip, and a third curve 1106 corresponds to the 250 nm SRAM chip. An equation of a fitted linear model is represented as follows, y = ax + b, where ‘y’ represents the HD, ‘x ’ indicates the radiation dose, ‘a’ is the slope, and ‘b’ is the y-intercept. This equation effectively captures the trend observed in the data. The slope ‘a’ reflects the rate of change in HD per unit increase in radiation dose, while the intercept ‘b’ represents the baseline HD when the radiation dose is zero. Table 2 demonstrates that the linear equation differs across the different SRAM chips.

[0083] Table 2

[0084] For a precise prediction of radiation response using SRAM, the model may be customized for each specific technology (or SRAM chip). The curves 1102, 1104, 1106 and the linear equations of Table 2 are other examples of pre-existing models relating BER to TID that may be utilized to calculate radiation dose as described with respect to FIG. 7.

[0085] FIG. 12 presents error (%) as a function of radiation dose, ranging from 5 krad (Si) to 100 krad (Si) for all three technology nodes, arranged in accordance with at least one embodiment herein. A first plot 1202 presents error of the 90 nm SRAM chip, a second plot 1204 presents error of the 150 nm SRAM chip, and a third plot 1206 presents error of the 250 nm SRAM chip. The error percentage was determined by first estimating the radiation dose using the linear equation (see Table 2 above) applied to a measured HD. For each HD measurement, the estimated dose was calculated and then compared to the actual radiation dose to compute the error (%). The error (%) was derived using the following (estimated dose — actual dose formula: error(%) = - * 100.

[0086] (actual dose) It is observed from FIG. 12 that the discrepancy between estimated and actual doses varies with radiation exposure across all three SRAM chips. As the radiation dose increases, the error percentage decreases gradually. Notably, the 150 nm SRAM chip and the 250 nm SRAM chip demonstrate significantly lower error percentages ranging from 2% to 3% at higher TID levels of 100 krad(Si), compared to the 90 nm SRAM chip. This shows that the 150 nm and 250 nm SRAM chips provide greater accuracy in dose estimation, particularly at elevated radiation levels. These results indicate the applicability of embodiments of the SRAM dosimeter described herein for higher TID ranges.

[0087] The inventors’ findings open doors for further exploration using the power-up state of SRAM in dosimetry applications. The linear relationship observed between HD and medium radiation dose as described herein may or may not hold true for very high doses, and further experiments may be made to investigate this potential non-linear behavior. Additionally, relaxation phenomena within the irradiated SRAM chips may cause slight changes in HD values over time. Furthermore, this study focused on Cypress 90 nm, 150 nm, and 250 nm SRAM chips and future investigation may expand to SRAM from other vendors, such as IDT, and IS SI. Since temperature fluctuations can influence HD measurements, extended research may explore the impact of varying temperatures to ensure the applicability of SRAM-PUFs in diverse environments.

[0088] In summary, the power-up state of SRAM may be significantly changed with ionizing radiation. The HD increases with the TID. All the COTS SRAM chips (Cypress 90 nm, 150 nm, and 250 nm SRAM chips) are sensitive to low radiation dose i.e., 0.2 krad (Si). It was observed that the SRAM chips are operational even after the TID reaches 350 krad (Si). Since the HD changes monotonically with TID this confirms the sensitivity nature of SRAM towards irradiation. It was observed that even though there was a significant variability between individual PUF accuracy, the radiation-induced change in HD had significantly lower variability. The older technology node (250 nm SRAM chip) is more sensitive to irradiation at high dose (350 krad (Si)) than the new technology nodes (Cypress 90 nm SRAM chip and 150 nm SRAM chip). In addition to this, as described above, it was confirmed that all three SRAM chips follow a linear model for a specific range of radiation dose from 5 krad (Si) to 100 krad (Si). However, the 250 nm and 150 nm SRAM chips show better linearity and lower error (%) when compared to the 90 nm SRAM chip. Thus, the power-up state of SRAM may be used for dosimetry applications.

[0089] FIG. 13 illustrates a block diagram of an example computing system 1300, arranged in accordance with to at least one embodiment herein. The computing system 1300 may be configured to implement or direct one or more operations or methods described herein, such as the method 700 of FIG. 7, and / or may include or correspond to one or more of the computing devices described herein, such as the computing devices 604 of FIG. 6. The computing system 1300 may include a processor 1302, a memory 1304, a data storage 1306, and a communication unit 1308. The processor 1302, the memory 1304, the data storage 1306, and the communication unit 1308 may be communicatively coupled.

[0090] In general, the processor 1302 may include any suitable special-purpose or general- purpose computer, computing entity, or processing device including various computer hardware or software modules and may be configured to execute instructions stored on any applicable computer-readable storage media. For example, the processor 1302 may include a microprocessor, a microcontroller, a digital signal processor (DSP), an applicationspecific integrated circuit (ASIC), a Field-Programmable Gate Array (FPGA), or any other digital or analog circuitry configured to interpret and / or to execute program instructions and / or to process data. Although illustrated as a single processor in FIG. 13, the processor 1302 may include any number of processors configured to, individually or collectively, perform or direct performance of any number of operations described in the present disclosure. Additionally, one or more of the processors may be present on one or more different electronic devices, such as different servers. In addition, the processor 1302 may include SRAM that may be implemented as a radiation dosimeter as described herein.

[0091] In some embodiments, the processor 1302 may be configured to interpret and / or execute program instructions and / or process data stored in the memory 1304, the data storage 1306, or the memory 1304 and the data storage 1306. In some embodiments, the processor 1302 may fetch program instructions from the data storage 1306 and load the program instructions in the memory 1304. After the program instructions are loaded into memory 1304, the processor 1302 may execute the program instructions. In some embodiments, the processor 1302 may execute the program instructions to perform or control performance of the method 700 of FIG. 7.

[0092] The memory 1304 and the data storage 1306 may include computer-readable storage media for carrying or having computer-executable instructions or data structures stored thereon. Such computer-readable storage media may include any available media that may be accessed by a general -purpose or special-purpose computer, such as the processor 1302. By way of example, and not limitation, such computer-readable storage media may include tangible or non-transitory computer-readable storage media including Random Access Memory (RAM), Read-Only Memory (ROM), Electrically Erasable Programmable Read-Only Memory (EEPROM), Compact Disc Read-Only Memory (CD- ROM) or other optical disk storage, magnetic disk storage or other magnetic storage devices, flash memory devices (e.g., solid state memory devices), or any other storage medium which may be used to carry or store particular program code in the form of computer-executable instructions or data structures and which may be accessed by a general-purpose or special-purpose computer. Combinations of the above may also be included within the scope of computer-readable storage media. Computer-executable instructions may include, for example, instructions and data configured to cause the processor 1302 to perform a certain operation or group of operations.

[0093] The communication unit 1308 may include any component, device, system, or combination thereof that is configured to transmit or receive information over a network. In some embodiments, the communication unit 1308 may communicate with other devices at other locations, the same location, or even other components within the same system. For example, the communication unit 1308 may include a modem, a network card (wireless or wired), an infrared communication device, a wireless communication device (such as an antenna), and / or chipset (such as a Bluetooth® device, an 802.6 device (e.g., Metropolitan Area Network (MAN)), a WiFi device, a WiMax device, cellular communication facilities, etc.), and / or the like. The communication unit 1308 may permit data to be exchanged with a network and / or any other devices or systems described in the present disclosure. For example, when the computing system 1300 is included as any of the computing devices 604 of FIG. 6, the communication unit 1308 may allow the computing device 604 to communicate with the server 612 or other device via the network 610.

[0094] Modifications, additions, or omissions may be made to the computing system 1300 without departing from the scope of the present disclosure. For example, in some embodiments, the computing system 1300 may include any number of other components that may not be explicitly illustrated or described.

[0095] Terms used in the present disclosure and especially in the appended claims (e.g., bodies of the appended claims) are generally intended as “open terms” (e.g., the term “including” should be interpreted as “including, but not limited to.”).

[0096] Additionally, if a specific number of an introduced claim recitation is intended, such an intent will be explicitly recited in the claim, and in the absence of such recitation no such intent is present. For example, as an aid to understanding, the following appended claims may contain usage of the introductory phrases “at least one” and “one or more” to introduce claim recitations. However, the use of such phrases should not be construed to imply that the introduction of a claim recitation by the indefinite articles “a” or “an” limits any particular claim containing such introduced claim recitation to embodiments containing only one such recitation, even when the same claim includes the introductory phrases “one or more” or “at least one” and indefinite articles such as “a” or “an” (e.g., “a” and / or “an” should be interpreted to mean “at least one” or “one or more”); the same holds true for the use of definite articles used to introduce claim recitations.

[0097] In addition, even if a specific number of an introduced claim recitation is expressly recited, those skilled in the art will recognize that such recitation should be interpreted to mean at least the recited number (e.g., the bare recitation of “two recitations,” without other modifiers, means at least two recitations, or two or more recitations). Furthermore, in those instances where a convention analogous to “at least one of A, B, and C, etc.” or “one or more of A, B, and C, etc.” is used, in general such a construction is intended to include A alone, B alone, C alone, A and B together, A and C together, B and C together, or A, B, and C together, etc.

[0098] Further, any disjunctive word or phrase preceding two or more alternative terms, whether in the description, claims, or drawings, should be understood to contemplate the possibilities of including one of the terms, either of the terms, or both of the terms. For example, the phrase “A or B” should be understood to include the possibilities of “A” or “B” or “A and B.”

[0099] All examples and conditional language recited in the present disclosure are intended for pedagogical objects to aid the reader in understanding the present disclosure and the concepts contributed by the inventor to furthering the art, and are to be construed as being without limitation to such specifically recited examples and conditions. Although embodiments of the present disclosure have been described in detail, various changes, substitutions, and alterations could be made hereto without departing from the spirit and scope of the present disclosure.

Claims

CLAIMSWhat is claimed is:

1. A radiation dosimeter, comprising: a static random access memory (SRAM); a processor configured to: power up the SRAM; read a power-up state of the SRAM; determine a bit error rate (BER) of the read power-up state compared to a reference power-up state; and calculate a radiation dose based on the determined BER.

2. The radiation dosimeter of claim 1, wherein the SRAM is embedded in the processor.

3. The radiation dosimeter of claim 1, wherein the SRAM is external to and communicatively coupled to the processor.

4. The radiation dosimeter of claim 1, wherein the SRAM comprises a Commercial Off-The-Shelf (COTS) SRAM chip.

5. The radiation dosimeter of claim 1, wherein the SRAM has a technology node selected from the group consisting of 90 nanometer (nm), 150 nm, and 250 nm.

6. The radiation dosimeter of claim 1, wherein the radiation dosimeter is configured to measure Total Ionizing Dose (TID) in a range from 0.2 krad (Si) to 350 krad (Si).

7. The radiation dosimeter of claim 1, wherein the processor is further configured to increase sensitivity of the SRAM to radiation, including: powering up the SRAM prior to radiation exposure; writing a predetermined data pattern to the SRAM prior to radiation exposure, wherein the SRAM remains powered up during the radiation exposure; and powering off the SRAM prior to powering up the SRAM after radiation exposure.

8. A computing device comprising the radiation dosimeter of claim 1.

9. The computing device of claim 7, wherein the computing device comprises a mobile phone, a wearable electronic device, or a drone.

10. A method to measure radiation dose, comprising: powering up a static random access memory (SRAM) after radiation exposure; reading a power-up state of the SRAM; determining a bit error rate (BER) of the read power-up state compared to a reference power-up state; and calculating a radiation dose based on the determined BER.

11. The method of claim 10, further comprising creating the reference power-up state, including: reading a plurality of consecutive power-up states of the SRAM prior to radiation exposure; and performing majority voting across the plurality of consecutive power-up states to create a reference Physical Unclonable Function (GoldPUF) as the reference power-up state.

12. The method of claim 11, wherein reading the plurality of consecutive power-up states of the SRAM comprises reading at least 20 consecutive power-up states.

13. The method of claim 10, wherein the read power-up state of the SRAM comprises a current Physical Unclonable Function (PUF) of the SRAM and determining the BER of the read power-up state compared to the reference power-up state comprises determining a Hamming Distance between the current PUF and a GoldPUF of the SRAM.

14. The method of claim 10, wherein calculating the radiation dose comprises applying a pre-existing model that relates BER to Total Ionizing Dose (TID).

15. The method of claim 14, wherein the pre-existing model is a linear model in a TID range from a first threshold TID to a second threshold TID.

16. The method of claim 14, wherein in the pre-existing model, BER changes monotonically with TID across an entire detection range of the SRAM.

17. The method of claim 10, wherein the SRAM is not powered during radiation exposure to passively sense radiation exposure.

18. The method of claim 10, further comprising increasing sensitivity of the SRAM to radiation, including: powering up the SRAM prior to radiation exposure; writing a predetermined data pattern to the SRAM prior to radiation exposure, wherein the SRAM remains powered up during the radiation exposure; and powering off the SRAM prior to powering up the SRAM after radiation exposure.

19. The method of claim 18, wherein writing the predetermined data pattern to the SRAM comprises writing one of the following predetermined data patterns to the SRAM: a reference Physical Unclonable Function (GoldPUF) of the SRAM; an inverted GoldPUF of the SRAM; all zeroes; or all ones.

20. A non-transitory computer-readable medium having computer-readable instructions stored thereon that are executable by a processor to perform or control performance of operations comprising: powering up a static random access memory (SRAM) after radiation exposure; reading a power-up state of the SRAM; determining a bit error rate (BER) of the read power-up state compared to a reference power-up state; and calculating a radiation dose based on the determined BER.

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