Method and system for performance cost-based training dataset generation for mask prediction

Abstract

Described herein is a method and system for designing a mask pattern. A system may obtain a set of derived mask patterns and their associated cost data that is indicative of performance cost of the derived mask patterns. The set of derived mask patterns may be derived from (e.g., by perturbing) a reference mask pattern, which is an optimal mask pattern solution generated using a mask optimization process (e.g., inverse lithography solution). The cost data may include wafer-level key performance indicator (KPI) indicative of wafer imaging performance or mask-level KPI indicative of mask pattern evaluation. The set of target patterns to which the set of derived mask patterns correspond, the set of derived mask patterns, and a set of cost data thereof are used as training data to train a mask prediction model to generate a predicted mask pattern for an input target pattern and input cost data.

Description

METHOD AND SYSTEM FOR PERFORMANCE COST-BASED TRAINING DATASET GENERATION FOR MASK PREDICTIONCROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application claims priority of EP application 24172881.5 which was filed on April 26, 2024 and which is incorporated in its entirety by reference.TECHINCAL FIELD

[0002] The embodiments provided herein relate to semiconductor manufacturing, and more particularly to mask pattern design through computational lithography.BACKGROUND

[0003] A lithographic apparatus is a machine that applies a desired pattern onto a target portion of a substrate. The lithographic apparatus can be used, for example, in the manufacture of integrated circuits (ICs). For example, an IC chip in a smart phone can be as small as a person’s thumbnail, and may include over 2 billion transistors. Making an IC is a complex and time-consuming process, with circuit components in different layers and including hundreds of individual steps. Errors in even one step have the potential to result in problems with the final IC and can cause device failure. High process yield and high wafer throughput can be impacted by the presence of defects.BRIEF SUMMARY

[0004] In some embodiments, the techniques described herein relate to a method of mask pattern design. The method includes: obtaining a set of derived mask patterns corresponding to a set of target patterns; for each derived mask pattern of the set of derived mask patterns, obtaining cost data associated with each derived mask pattern, wherein the cost data indicates a performance cost associated with the corresponding derived mask pattern; and training a mask prediction model by using training data that comprises the set of target patterns, the set of derived mask patterns, and a set of cost data thereof, wherein the mask prediction model is configured to generate a mask pattern presentation for an input target pattern representation.

[0005] In some embodiments, the techniques described herein relate to a method of mask pattern design. The method includes: inputting a first target pattern and first cost data that is indicative of a performance cost to a mask prediction model; and executing the mask prediction model to obtain a first predicted mask pattern corresponding to the first target pattern and the first cost data.

[0006] In some embodiments, there is provided a non-transitory computer readable medium having instructions that, when executed by a computer, cause the computer to execute a method of any of the above embodiments.

[0007] In some embodiments, there is provided an apparatus includes a memory storing a set ofinstructions and a processor configured to execute the set of instructions to cause the apparatus to perform a method of any of the above embodiments.BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Embodiments will now be described, by way of example only, with reference to the accompanying drawings in which:

[0009] Figure 1 illustrates a block diagram of various subsystems of a lithographic projection apparatus, according to an embodiment.

[0010] Figure 2 is a schematic diagram of a lithographic projection apparatus, according to an embodiment.

[0011] Figure 3 illustrates an exemplary flow chart for simulating lithography in a lithographic projection apparatus, according to an embodiment.

[0012] Figure 4A is a block diagram illustrating prediction of a mask pattern using a mask prediction model based on target pattern and cost data associated with a predicted mask pattern, consistent with various embodiments.

[0013] Figure 4B is a block diagram illustrating prediction of a mask pattern using a mask prediction model, and prediction of cost data associated with the predicted mask pattern using a performance cost prediction model, consistent with various embodiments.

[0014] Figure 5 is a block diagram for training the mask prediction model by using derived mask patterns and their associated cost data, consistent with various embodiments.

[0015] Figures 6A and 6B are block diagrams for training data generation, which includes generation of derived mask patterns and their associated cost data, for training the mask prediction model, consistent with various embodiments.

[0016] Figure 7 is a flow diagram of a process for training the mask prediction model using training data including derived mask patterns and their associated cost data, consistent with various embodiments.

[0017] Figure 8 is a block diagram of an example computer system, according to an embodiment.

[0018] Embodiments will now be described in detail with reference to the drawings, which are provided as illustrative examples so as to enable those skilled in the art to practice the embodiments. Notably, the figures and examples below are not meant to limit the scope to a single embodiment, but other embodiments are possible by way of interchange of some or all of the described or illustrated elements. Wherever convenient, the same reference numbers will be used throughout the drawings to refer to same or like parts. Where certain elements of these embodiments can be partially or fully implemented using known components, only those portions of such known components that are necessary for an understanding of the embodiments will be described, and detailed descriptions of other portions of such known components will be omitted so as not to obscure the description of the embodiments. In the present specification, an embodiment showing a singular component should notbe considered limiting; rather, the scope is intended to encompass other embodiments including a plurality of the same component, and vice-versa, unless explicitly stated otherwise herein. Moreover, applicants do not intend for any term in the specification or claims to be ascribed an uncommon or special meaning unless explicitly set forth as such. Further, the scope encompasses present and future known equivalents to the components referred to herein by way of illustration.DETAILED DESCRIPTION

[0019] A lithographic apparatus is a machine that applies a designed pattern onto a target portion of a substrate. This process of transferring the designed pattern to the substrate is called a patterning process. The patterning process can include a patterning step to transfer a pattern from a patterning device (such as a mask) to the substrate. Various methods are used to design a mask pattern (e.g., continuous transmission mask (CTM)). A CTM technique is an inverse lithography solution that can generate a grayscale guidance map for a mask pattern (e.g., CTM image) for a given input design layout or a target pattern, at certain process condition values (e.g., CD, focus, dose values, etc.), source information (e.g., pupil), etc. More details regarding the CTM process may be found in U.S. Patent Nos. 8,584,056 and 10,025,201, the disclosure of which is hereby incorporated by reference in its entirety. As another example, prediction models, such as a machine learning (ML) model, are used to generate a mask pattern for a given target pattern. Typically, the ML model is trained using a training dataset of target patterns and corresponding “ground truth” mask patterns. Such conventional methods have drawbacks or limitations. For example, generating ground truth for a large number of mask patterns or the entire design layout is time consuming and compute intensive. Further, because the ground truth dataset provided by the inverse solution can be inconsistent, training the ML model with such ground truth may cause the ML model to produce inconsistent predicted mask patterns for the same target pattern, thereby impacting the accuracy of the ML model. These and other drawbacks exist.

[0020] Disclosed herein include a method of training a mask prediction model by using a training dataset that includes derived mask patterns and performance cost associated with such mask patterns. In some embodiments, the derived mask patterns may be derived from reference mask patterns, without requiring the simulation process as used to generate the reference mask patterns. In some embodiments, reference mask patterns are optimal mask pattern solutions that may result from a mask optimization process (e.g., CTM process), and the derived mask patterns may be derived from the reference mask pattern (e.g., by perturbing the reference mask patterns) are non-optimal mask patterns that deviate from an optimal solution. Note, in this context, the performance cost associated with reference mask patterns (e.g., optimal mask patterns) may be regarded as zero or ignorable, while the non-optimal mask patterns are associated with measurable performance cost.

[0021] In some embodiments, training data generation can include obtaining a set of derived mask patterns using a reference mask pattern corresponding to a target pattern, and obtaining cost data(e.g., performance cost described below) associated with each derived mask pattern of the set of derived mask patterns as a set of cost data. The set of derived mask patterns may be generated in a number of ways. For example, the set of derived mask patterns may be generated by perturbing the reference mask pattern (e.g., a mask pattern that is an optimal mask pattern solution that may be generated using a mask optimization process such as an inverse lithography solution (e.g., CTM process). In some embodiments, perturbing includes modifying a reference mask pattern (e.g., changing at least one of a location, shape, dimension, etc. of one or more features in the reference mask pattern). Different perturbations can be made to the reference mask pattern to derive different mask patterns of the set of derived mask patterns.

[0022] The cost data associated with a derived mask pattern may include a wafer-level key performance indicator (KPI) indicative of wafer imaging performance, a mask-level KPI indicative of mask pattern evaluation, or any other measurable KPIs (e.g., performance cost associated with a device having circuits manufactured using the mask pattern). The wafer-level KPI may include at least one of edge placement error (EPE)-based cost, sub-resolution assist features (SRAF) printability cost, pixel-based error, or other such KPIs computed in a wafer domain. The mask-level KPI may include at least one of mask rule check (MRC)-based cost that is indicative of compliance or non- compliance (e.g., a violation) of the rules specified in MRC by a mask pattern, manufacturability cost that is indicative of cost associated with type of features in the mask pattern, or other such KPIs computed in a mask domain. The cost data may be computed for each derived mask pattern in a number of ways, e.g., using a calibrated non-machine learning model or a trained machine learning model. For example, cost data, such as EPE-based cost, may be computed by using a computational lithography model to obtain a resist image corresponding to the mask pattern and comparing the resist image with a reference image of a pattern to be printed on a substrate (e.g., a resist image corresponding to the reference mask pattern) to obtain the EPE-based cost. The cost may be a cost map or a cost value, represented by an image or one or more metric values. For example, the cost data may be expressed as an image, where the value of each location of the image corresponds to a local EPE value. For another example, an MRC-based cost may be computed based on violation of the rules specified in the MRC by the mask pattern, which may be determined by executing an MRC process that determines whether the mask pattern violates any rules in the MRC. The cost data for other KPIs may be computed in any suitable method that is well-known in the art.

[0023] The training data includes the set of derived mask patterns generated using the reference mask pattern, cost data associated with each mask pattern of the set of derived mask patterns, and a set of target patterns to which the set of derived mask patterns correspond. In some embodiments, all the target patterns in the set of target patterns may be copies of the same target pattern, as the set of derived mask patterns is generated using the same reference mask pattern, which corresponds to a single target pattern. The mask prediction model is trained using the training data to predict a mask pattern for any given target pattern and cost data. The mask prediction model may be trained until aloss function is optimized to reduce (e.g., minimize) the mismatch between a predicted mask pattern and ground-truth mask pattern (e.g., a derived mask pattern from the set of derived mask patterns).

[0024] In some embodiments, a performance cost prediction model that predicts cost data associated with the predicted mask pattern (e.g., predicted using the mask prediction model) may be implemented. The mask prediction model and the performance cost prediction model may be trained until a loss function of the mask prediction model is optimized to reduce (e.g., minimize) the mismatch between a predicted mask pattern and a ground truth mask pattern (e.g., a mask pattern from the set of derived mask patterns) as well as the mismatch between the predicted cost data and the input cost data. The mask prediction model and the performance cost prediction model may be separate prediction models or may be integrated into a single prediction model.

[0025] Further disclosed are embodiments for predicting a mask pattern using a trained mask prediction model. A target pattern and cost data indicative of a desired performance cost for a predicted mask pattern (e.g., performance cost to be achieved in a lithography process in printing the desired target pattern on the substrate using the predicted mask pattern) are input to the trained mask prediction model. The trained masked prediction model is executed to generate a predicted mask pattern for the input target pattern and the desired performance cost. In some embodiments, the cost data input to the mask prediction model may be one or more of the KPIs mentioned above. The cost data may be input as an image or cost value that indicates an ideal performance cost (e.g., zero cost or no errors), or a predefined performance cost (e.g., predefined EPE-based cost). For the prediction of the mask pattern using the trained mask prediction model, the desired cost data may be input to the trained mask prediction model by a user, or the trained mask prediction model may be configured with a predefined value for the desired cost data (e.g., zero cost or no errors, predefined EPE-based cost, predefined MRC -based cost, etc.).

[0026] Such a method of training using the combination of derived mask patterns and the associated cost data provides various benefits. For example, the embodiments allow for generation of fast-to-compute ground truth (e.g., derived mask patterns) by performing perturbations in a reference mask pattern and evaluating the effect these perturbations have on the pattern printed on the substrate or on mask manufacturing, thereby, significantly reducing consumption of time and computing resources in generating the ground truth. Further, by using cost data as an input, the mask prediction model is trained to improve the prediction in localized areas of the mask pattern guided by the cost data (e.g., because the mask prediction model is trained to become aware of the performance deviation (e.g., from the reference mask pattern) given the perturbed mask pattern), thereby reducing any impact on the prediction accuracy due to inconsistencies in the training dataset.

[0027] In the present disclosure, although specific reference may be made to the manufacture of ICs, it should be explicitly understood that the description herein has many other possible applications. For example, it may be employed in the manufacture of integrated optical systems, guidance and detection patterns for magnetic domain memories, liquid crystal display panels, thinfilm magnetic heads, etc. The skilled artisan will appreciate that, in the context of such alternative applications, any use of the terms “reticle,” “wafer” or “die” in this text should be considered as interchangeable with the more general terms “mask,” “substrate” and “target portion,” respectively.

[0028] In the present document, the terms “radiation” and “beam” are used to encompass all types of electromagnetic radiation, including ultraviolet radiation (e.g., with a wavelength of 365, 248, 193, 157 or 126 nm) and EUV (extreme ultra-violet radiation, e.g., having a wavelength in the range of about 5-100 nm). In the present document, the term “radiation source” or “source” is used to encompass all types of sources of radiation, including laser sources, incandescent sources, etc. which may include treatment of the radiation between the radiation source and the target or other parts of the optics, including filtering, collimating, focusing, etc.

[0029] A patterning device can comprise, or can form, one or more design layouts. The design layout can be generated utilizing CAD (computer-aided design) programs. This process is often referred to as EDA (electronic design automation). Most CAD programs follow a set of predetermined design rules in order to create functional design layouts / patterning devices. These rules are set based processing and design limitations. For example, design rules define the space tolerance between devices (such as gates, capacitors, etc.) or interconnect lines, to ensure that the devices or lines do not interact with one another in an undesirable way. One or more of the design rule limitations may be referred to as a “critical dimension” (CD). A critical dimension of a device can be defined as the smallest width of a line or hole, or the smallest space between two lines or two holes. Thus, the CD regulates the overall size and density of the designed device. One of the goals in device fabrication is to faithfully reproduce the original design intent on the substrate (via the patterning device).

[0030] The term “mask” or “patterning device” as employed in this text may be broadly interpreted as referring to a generic patterning device that can be used to endow an incoming radiation beam with a patterned cross-section, corresponding to a pattern that is to be created in a target portion of the substrate. The term “light valve” can also be used in this context. Besides the classic mask (transmissive or reflective; binary, phase-shifting, hybrid, etc.), examples of other such patterning devices include a programmable mirror array. An example of such a device is a matrix-addressable surface having a viscoelastic control layer and a reflective surface. The basic principle behind such an apparatus is that (for example) addressed areas of the reflective surface reflect incident radiation as diffracted radiation, whereas unaddressed areas reflect incident radiation as undiffracted radiation. Using an appropriate filter, the said undiffracted radiation can be filtered out of the reflected beam, leaving only the diffracted radiation behind; in this manner, the beam becomes patterned according to the addressing pattern of the matrix-addressable surface. The required matrix addressing can be performed using suitable electronic means. Examples of other such patterning devices also include a programmable LCD array. An example of such a construction is given in U.S. Patent No. 5,229,872, which is incorporated herein by reference.

[0031] The term “projection optics” as used herein should be broadly interpreted as encompassing several types of optical systems, including refractive optics, reflective optics, apertures and catadioptric optics, for example. The term “projection optics” may also include components operating according to any of these design types for directing, shaping, or controlling the projection beam of radiation, collectively or singularly. The term “projection optics” may include any optical component in the lithographic projection apparatus, no matter where the optical component is located on an optical path of the lithographic projection apparatus. Projection optics may include optical components for shaping, adjusting and / or projecting radiation from the source before the radiation passes the patterning device, and / or optical components for shaping, adjusting and / or projecting the radiation after the radiation passes the patterning device. The projection optics generally exclude the source and the patterning device.

[0032] Figure 1 illustrates a block diagram of various subsystems of a lithographic projection apparatus 10A, according to an embodiment. Major components are a radiation source 12A, which may be a deep-ultraviolet excimer laser source or other type of source including an extreme ultra violet (EUV) source (the lithographic projection apparatus itself need not have the radiation source), illumination optics which, e.g., define the partial coherence (denoted as sigma) and which may include optics 14A, 16Aa and 16Ab that shape radiation from the source 12A; a patterning device (or mask) 18 A; and transmission optics 16Ac that project an image of the patterning device pattern onto a substrate plane 22A.

[0033] A pupil 20A can be included with transmission optics 16Ac. In some embodiments, there can be one or more pupils before and / or after mask 18 A. As described in further detail herein, pupil 20A can provide patterning of the light that ultimately reaches substrate plane 22A. An adjustable filter or aperture at the pupil plane of the projection optics may restrict the range of beam angles that impinge on the substrate plane 22A, where the largest possible angle defines the numerical aperture of the projection optics NA= n sin(0max), wherein n is the refractive index of the media between the substrate and the last element of the projection optics, and ©max is the largest angle of the beam exiting from the projection optics that can still impinge on the substrate plane 22A.

[0034] In a lithographic projection apparatus, a source provides illumination (i.e., radiation) to a patterning device and projection optics direct and shape the illumination, via the patterning device, onto a substrate. This is not to disclaim that the source does not itself provide patterning, directing, or shaping to the radiation or that patterning, directing, or shaping does not occur between the source and the projection optics. The projection optics may include at least some of the components 14A, 16Aa, 16Ab and 16Ac. An aerial image (Al) is the radiation intensity distribution at substrate level. A resist model can be used to calculate the resist image from the aerial image, an example of which can be found in U.S. Patent Application Publication No. US 2009-0157360, the disclosure of which is hereby incorporated by reference in its entirety. The resist model is related to properties of the resist layer (e.g., effects of chemical processes which occur during exposure, post-exposure bake (PEB) anddevelopment). Optical properties of the lithographic projection apparatus (e.g., properties of the illumination, the patterning device, and the projection optics) dictate the aerial image and can be defined in an optical model. Since the patterning device used in the lithographic projection apparatus can be changed, it is desirable to separate the optical properties of the patterning device from the optical properties of the rest of the lithographic projection apparatus including at least the source and the projection optics. Details of techniques and models used to transform a design layout into various lithographic images (e.g., an aerial image, a resist image, etc.), apply optical proximity correction (OPC) using those techniques and models and evaluate performance (e.g., in terms of process window) are described in U.S. Patent Application Publication Nos. US 2008-0301620, 2007-0050749, 2007-0031745, 2008-0309897, 2010-0162197, and 2010-0180251, the disclosure of each which is hereby incorporated by reference in its entirety.

[0035] One aspect of understanding a lithographic process is understanding the interaction of the radiation and the patterning device. The electromagnetic field of the radiation after the radiation passes the patterning device may be determined from the electromagnetic field of the radiation before the radiation reaches the patterning device and a function that characterizes the interaction. This function may be referred to as the mask transmission function (which can be used to describe the interaction by a transmissive patterning device and / or a reflective patterning device).

[0036] The mask transmission function may have a variety of different forms. One form is binary. A binary mask transmission function has either of two values (e.g., zero and a positive constant) at any given location on the patterning device. A mask transmission function in the binary form may be referred to as a binary mask. Another form is continuous. Namely, the modulus of the transmittance (or reflectance) of the patterning device is a continuous function of the location on the patterning device. The phase of the transmittance (or reflectance) may also be a continuous function of the location on the patterning device. A mask transmission function in the continuous form may be referred to as a continuous tone mask or a continuous transmission mask (CTM). For example, the CTM may be represented as a pixelated image, where each pixel may be assigned a value between 0 and 1 (e.g., 0.1, 0.2, 0.3, etc.) instead of binary value of either 0 or 1. In an embodiment, CTM may be a pixelated gray scale image, where each pixel has values (e.g., within a range [-255, 255], normalized values within a range [0, 1] or [-1, 1] or other appropriate ranges).

[0037] The thin-mask approximation, also called the Kirchhoff boundary condition, is widely used to simplify the determination of the interaction of the radiation and the patterning device. The thin-mask approximation assumes that the thickness of the structures on the patterning device is very small compared with the wavelength and that the widths of the structures on the mask are very large compared with the wavelength. Therefore, the thin-mask approximation assumes the electromagnetic field after the patterning device is the multiplication of the incident electromagnetic field with the mask transmission function. However, as lithographic processes use radiation of shorter and shorter wavelengths, and the structures on the patterning device become smaller and smaller, the assumptionof the thin-mask approximation can break down. For example, interaction of the radiation with the structures (e.g., edges between the top surface and a sidewall) because of their finite thicknesses (“mask 3D effect” or “M3D”) may become significant. Encompassing this scattering in the mask transmission function may enable the mask transmission function to better capture the interaction of the radiation with the patterning device. A mask transmission function under the thin-mask approximation may be referred to as a thin-mask transmission function. A mask transmission function encompassing M3D may be referred to as a M3D mask transmission function.

[0038] Figure 2 schematically depicts an exemplary lithographic projection apparatus whose illumination source could be optimized utilizing the methods described herein. The apparatus comprises:- an illumination system IL, to condition a beam B of radiation. In this particular case, the illumination system also comprises a radiation source SO;- a first object table (e.g., mask table, patterning device table or reticle stage) MT provided with a patterning device holder to hold a patterning device MA (e.g., a reticle), and connected to a first positioner to accurately position the patterning device with respect to item PS;- a second object table (substrate table or wafer stage) WT provided with a substrate holder to hold a substrate W (e.g., a resist-coated silicon wafer), and connected to a second positioner to accurately position the substrate with respect to item PS;- a projection system (“lens”) PS (e.g., a refractive, catoptric or catadioptric optical system) to image an irradiated portion of the patterning device MA onto a target portion C (e.g., comprising one or more dies) of the substrate W.

[0039] As depicted herein, the apparatus is of a transmissive type (i.e., has a transmissive mask). However, in general, it may also be of a reflective type, for example (with a reflective mask). Alternatively, the apparatus may employ another kind of patterning device as an alternative to the use of a classic mask; examples include a programmable mirror array or LCD matrix.

[0040] The source SO (e.g., a mercury lamp or excimer laser) produces a beam of radiation. This beam is fed into an illumination system (illuminator) IL, either directly or after having traversed conditioning means, such as a beam expander Ex, for example. The illuminator IL may comprise adjusting means AD for setting the outer or inner radial extent (commonly referred to as n-outer and n-inner, respectively) of the intensity distribution in the beam. In addition, it will generally comprise various other components, such as an integrator IN and a condenser CO. In this way, the beam B impinging on the patterning device MA has a desired uniformity and intensity distribution in its cross-section.

[0041] It should be noted with regard to Figure 2 that the source SO may be within the housing of the lithographic projection apparatus (as is often the case when the source SO is a mercury lamp, for example), but that it may also be remote from the lithographic projection apparatus, the radiationbeam that it produces being led into the apparatus (e.g., with the aid of suitable directing mirrors); this latter scenario is often the case when the source SO is an excimer laser (e.g., based on KrF, ArF or F2 lasing).

[0042] The beam B subsequently intercepts the patterning device MA, which is held on a patterning device table MT. Having traversed the patterning device MA, the beam B passes through the lens PS, which focuses the beam B onto a target portion C of the substrate W. With the aid of the second positioning means (and interferometric measuring means IF), the substrate table WT can be moved accurately, e.g., so as to position different target portions C in the path of the beam B. Similarly, the first positioning means can be used to accurately position the patterning device MA with respect to the path of the beam B, e.g., after mechanical retrieval of the patterning device MA from a patterning device library, or during a scan. In general, movement of the object tables MT, WT will be realized with the aid of a long-stroke module (coarse positioning) and a short-stroke module (fine positioning), which are not explicitly depicted in Figure 2. However, in the case of a wafer stepper (as opposed to a step-and-scan tool) the patterning device table MT may just be connected to a short stroke actuator, or may be fixed.

[0043] The depicted tool can be used in two different modes:- In step mode, the patterning device table MT is kept essentially stationary, and an entire patterning device image is projected in one go (i.e., a single “flash”) onto a target portion C. The substrate table WT is then shifted in the x or y directions so that the beam B can irradiate a different target portion C;- In scan mode, essentially the same scenario applies, except that a given target portion C is not exposed in a single “flash.” Instead, the patterning device table MT is movable in a given direction (the so-called “scan direction”, e.g., the y direction) with a speed v, so that the projection beam B is caused to scan over a patterning device image; concurrently, the substrate table WT is simultaneously moved in the same or opposite direction at a speed V = Mv, in which M is the magnification of the lens PS (typically, M = 1 / 4 or 1 / 5). In this manner, a relatively large target portion C can be exposed, without having to compromise on resolution.

[0044] Figure 3 illustrates an exemplary flow chart for simulating lithography in a lithographic projection apparatus, according to an embodiment. As will be appreciated, the models may represent a different patterning process and need not comprise all the models described below. A source model 300 represents optical characteristics (including radiation intensity distribution, bandwidth and / or phase distribution) of the illumination of a patterning device. The source model 300 can represent the optical characteristics of the illumination that include, but not limited to, numerical aperture settings, illumination sigma (o) settings as well as any particular illumination shape (e.g., off-axis radiation shape such as annular, quadrupole, dipole, etc.), where o (or sigma) is outer radial extent of the illuminator.

[0045] A projection optics model 310 represents optical characteristics (including changes to the radiation intensity distribution and / or the phase distribution caused by the projection optics) of the projection optics. The projection optics model 310 can represent the optical characteristics of the projection optics, including aberration, distortion, one or more refractive indexes, one or more physical sizes, one or more physical dimensions, etc.

[0046] The patterning device / design layout model module 320 captures how the design features are laid out in the pattern of the patterning device and may include a representation of detailed physical properties of the patterning device, as described, for example, in U.S. Patent No. 7,587,704, which is incorporated by reference in its entirety. In an embodiment, the patterning device / design layout model module 320 represents optical characteristics (including changes to the radiation intensity distribution and / or the phase distribution caused by a given design layout) of a design layout (e.g., a device design layout corresponding to a feature of an integrated circuit, a memory, an electronic device, etc.), which is the representation of an arrangement of features on or formed by the patterning device. Since the patterning device used in the lithographic projection apparatus can be changed, it is desirable to separate the optical properties of the patterning device from the optical properties of the rest of the lithographic projection apparatus including at least the illumination and the projection optics. The objective of the simulation is often to accurately predict, for example, edge placements and CDs, which can then be compared against the device design. The device design is generally defined as the pre-OPC patterning device layout, and will be provided in a standardized digital file format such as GDSII or OASIS.

[0047] An aerial image 330 can be simulated from the source model 300, the projection optics model 310 and the patterning device / design layout model module 320. An aerial image (Al) is the radiation intensity distribution at substrate level. Optical properties of the lithographic projection apparatus (e.g., properties of the illumination, the patterning device, and the projection optics) dictate the aerial image.

[0048] A resist layer on a substrate is exposed by the aerial image and the aerial image is transferred to the resist layer as a latent “resist image” (RI) therein. The resist image (RI) can be defined as a spatial distribution of solubility of the resist in the resist layer. A resist image 350 can be simulated from the aerial image 330 using a resist model 340. The resist model can be used to calculate the resist image from the aerial image, an example of which can be found in U.S. Patent Application No. 8,200,468, the disclosure of which is hereby incorporated by reference in its entirety. The resist model 340 typically describes the effects of chemical processes which occur during resist exposure, post exposure bake (PEB) and development, in order to predict, for example, contours of resist features formed on the substrate and so it typically related only to such properties of the resist layer (e.g., effects of chemical processes which occur during exposure, post-exposure bake and development). In an embodiment, the optical properties of the resist layer, e.g., refractive index, filmthickness, propagation, and polarization effects — may be captured as part of the projection optics model 310.

[0049] So, in general, the connection between the optical and the resist model is a simulated aerial image intensity within the resist layer, which arises from the projection of radiation onto the substrate, refraction at the resist interface and multiple reflections in the resist film stack. The radiation intensity distribution (aerial image intensity) is turned into a latent “resist image” by absorption of incident energy, which is further modified by diffusion processes and various loading effects. Efficient simulation methods that are fast enough for full-chip applications approximate the realistic 3-dimensional intensity distribution in the resist stack by a 3-dimensional aerial (and resist) image.

[0050] In an embodiment, the resist image 350 can be used as an input to a post-pattern transfer process model module 360. The post-pattern transfer process model module 360 defines performance of one or more post-resist development processes (e.g., etch, development, etc.).

[0051] Simulation of the patterning process can, for example, predict contours, CDs, edge placement (e.g., edge placement error), etc. in the resist and / or etched image. Thus, the objective of the simulation is to accurately predict, for example, edge placement, and / or aerial image intensity slope, and / or CD, etc. of the printed pattern. These values can be compared against an intended design to, e.g., correct the patterning process, identify where a defect is predicted to occur, etc. The intended design is generally defined as a pre-OPC design layout which can be provided in a standardized digital file format such as GDSII or OASIS or other file format.

[0052] Thus, the model formulation describes most, if not all, of the known physics and chemistry of the overall process, and each of the model parameters desirably corresponds to a distinct physical or chemical effect. The model formulation thus sets an upper bound on how well the model can be used to simulate the overall manufacturing process.

[0053] The following paragraphs describe a system and a method for predicting a mask pattern using a performance cost associated with a mask pattern.

[0054] Figure 4A is a block diagram illustrating prediction of a mask pattern using a mask prediction model based on target pattern and cost data associated with a predicted mask pattern, consistent with various embodiments. A mask prediction model may be configured to generate a predicted mask pattern for a target pattern and a cost data that is indicative of a desired performance cost associated with the predicted mask pattern. In some embodiments, the mask prediction model 450 may be implemented as a machine learning (ML) model, such as a neural network model. The mask prediction model 450 is trained to predict a mask pattern based on an input target pattern and one or more input cost data indicative of one or more performance cost associated with the predicted mask pattern. For example, a trained mask prediction model 450 generates a predicted mask pattern 410 given an input target pattern 402 and an input cost data 404. The cost data 404 is indicative of a performance cost, which may include a wafer-level KPI, a mask-level KPI or other KPIs. In someembodiments, the wafer-level KPI may include at least one of EPE-based cost, SRAF printability cost, or pixel -based error or other such costs computed in the wafer domain. The mask-level KPI may include at least one of MRC -based cost that is indicative of a violation of the rules specified in the MRC by a mask pattern, or manufacturability cost that is indicative of cost associated with type of features in the mask pattern. The cost data 404 may be represented in a number of ways. For example, the cost data 404 may be represented as a cost map, which is an image where locations with presence of an error (e.g., EPE or violation of MRC) may be represented with pixels of a first set of values (e.g., white colored pixels) and locations with absence of an error may represented with pixels of a second set of values (e.g., black colored pixels). In another example, the cost data 404 can be a cost value represented as one or more metric values.

[0055] In some embodiments, the cost data 404 that is input to the mask prediction model 450 for generating a predicted mask pattern 410 may be preset to, or predefined with, cost map that indicates (a) an ideal performance cost (e.g., zero cost or no errors) or (b) an allowed or predefined performance cost. For example, if the cost data 404 to be input is EPE-based cost, then the desired EPE may be zero, and therefore, an image that does not indicate any edge placement errors may be input as the desired cost data 404. In some embodiments, the cost data 404 may be set to a default value (e.g., zero cost, or predefined cost) so that the user does not have to input the cost data every time a prediction of the mask pattern is to be made. However, the default value of the cost data 404 may be changed by the user.

[0056] While Figure 4 A illustrates the prediction of the mask pattern 410 using a single cost data 404 as input to the mask prediction model 450, the number of performance cost that the prediction can be based on is not limited to a single performance cost and multiple performance cost may be input to the mask prediction model 450. For example, multiple performance costs such as EPE-based cost, EPE-based cost for different process window conditions, MRC -based cost, SRF printability cost, etc. may be input to the mask prediction model 450 as multiple cost data along with the target pattern 402, and the mask prediction model 450 generates the predicted mask pattern 410 based on the multiple cost data.

[0057] In some embodiments, the predicted mask pattern 410 may be further optimized using a mask optimization process, such as, source mask optimization (SMO), optical proximity correction (OPC) process, etc. to generate an updated mask pattern. The updated mask pattern may be used to manufacture a mask that may be used in a lithography process to print a pattern on a substrate.

[0058] Figure 4B is a block diagram illustrating prediction of a mask pattern using a mask prediction model, and prediction of cost data associated with the predicted mask pattern using a performance cost prediction model, consistent with various embodiments. While Figure 4A illustrates predicting of a mask pattern for a given target pattern and a given performance cost, Figure 4B illustrates prediction of a performance cost associated with the predicted mask pattern. In some embodiments, a performance cost prediction model 475 that generates a predicted cost data indicativeof a predicted performance cost associated with the predicted mask pattern may be implemented. The performance cost prediction model 475 may also be implemented as an ML model that is trained to predict performance cost associated with a mask pattern (e.g., a mask pattern predicted using the mask prediction model 450). For example, the predicted mask pattern 410 generated by the mask prediction model 450 may be provided as an input along with the target pattern 402 to the performance cost prediction model 475, which generates predicted cost data 424 that is indicative of a predicted performance cost (e.g., EPE-based cost, MRC-based cost, etc.) associated with the predicted mask pattern 410. In some embodiments, the target pattern (e.g., target pattern 402) is an optional input to the performance cost prediction model 475. For example, the target pattern 402 is provided as an input to the performance cost prediction model 475 for prediction of wafer-domain cost data, and may be provided as an optional input for prediction of the mask-domain cost data (in which case the prediction of cost data 424 is performed based on a single input - the predicted mask pattern 410).

[0059] The predicted cost data 424 may be used to further optimize the predicted mask pattern 410. In some embodiments, the predicted mask pattern 410 may be further optimized based on the predicted cost data 424 (e.g., using a mask optimization process, such as the SMO or OPC process) to generate an updated mask pattern. The updated mask pattern may be used to manufacture a mask that may be used in a lithography process to print a pattern on a substrate.

[0060] The mask prediction model 450 and the performance cost prediction model 475 may be implemented as separate prediction models, or implemented as a single prediction model. In some embodiments, the mask prediction model 450 and the performance cost prediction model 475 are implemented as separate prediction models.

[0061] Figures 5-7 illustrate performance cost-based generation of training data and training of the mask prediction model 450 using the training data to predict a mask pattern. While Figure 5 describes the training process at a high level, Figures 6A, 6B and 7 describe the generation of the training data including derived mask patterns and their associated cost data and the training process in greater detail.

[0062] Figure 5 is a block diagram for training the mask prediction model by using derived mask patterns and their associated cost data, consistent with various embodiments. In some embodiments, training dataset including a set of target patterns 502, derived mask patterns corresponding to the set of target patterns 502 such as a set of derived mask patterns 510 (e.g., 510a-510n), and a set of cost data 504 (e.g., 504a-504n) associated with the set of derived mask patterns (“ground truth”) 510 is generated. The set of derived mask patterns 510 may be derived from a reference mask pattern 606 corresponding to a target pattern 602 (e.g., as described in detail at least with reference to Figures 6A, 6B and 7 below). The set of target patterns 502 (e.g., copies of the target pattern 602) and the set of cost data 504 are used as model inputs to the mask prediction model 450 while the set of derived mask patterns 510 are used as ground truth for the training process. Each data sample in the training dataset, such as a first data sample, may include a target pattern, e.g., a first target pattern 502a, aderived mask pattern corresponding to the target pattern, e.g., a first derived mask pattern 510a corresponding to the first target pattern 502a, and one or more cost data associated with the mask pattern, for example, cost data 504a associated with the first derived mask pattern 510a. A second data sample may include a second target pattern 502b, a second derived mask pattern 510b corresponding to the second target pattern 502b, and cost data 504b associated with the second derived mask pattern 510b. The training data may include multiple such training datasets. Further, the training dataset may also include reference data samples in addition to the above derived data samples. For example, the training dataset may include a reference data sample such as the target pattern 602, the reference mask pattern 606 corresponding to the target pattern 602, and cost data associated with the reference mask pattern 606. The derived data samples such as a first derived data sample, which includes (a) the first target pattern 502a, (b) the first derived mask pattern 510a, which is derived from the reference mask pattern 606 in the reference data sample, and (c) the first cost data 504a associated with the first derived mask pattern 510a may be used to augment the reference data samples in the training dataset. The training data is used for training the mask prediction model 450 to generate a predicted mask pattern 508.

[0063] The mask prediction model 450 may be trained until a loss function 520 is optimized to reduce (e.g., minimize) the mismatch between a predicted mask pattern and a ground truth mask pattern. The training process may be an iterative process in which each iteration includes (i) executing the mask prediction model 450 by inputting (a) a target pattern, for example, the first target pattern 502a, and (b) a cost data 504a associated with the ground truth mask pattern 510a, (ii) generating a predicted mask pattern, for example, a predicted mask pattern 508 based on the first target pattern 502a and the cost data 504a, (iii) computing the loss function 520 (e.g., Eq. (1)) associated with the mask prediction model 450 based on a difference between the predicted mask pattern 508 and the ground truth mask pattern, e.g., the first derived mask pattern 510a, and (v) adjusting the parameters (e.g., weights and biases) of the mask prediction model 450 to reduce the loss function 520.

[0064] In some embodiments, a performance cost prediction model 475 that generates a predicted cost data 524 that is indicative of a performance cost associated with the predicted mask pattern 508 may be implemented. The mask prediction model 450 and the performance cost prediction model 475 may be trained until the loss functions 520 and 540 are optimized to reduce (e.g., minimize) the mismatch between the predicted mask pattern 508 and the input mask pattern (e.g., the first derived mask pattern 510a) as well as the mismatch between the predicted cost data 524 and the input cost data 504a. For example, the combined loss function (loss function 520 and loss function 540) may be represented as:argmin (... Eq. (1) where Tis an input target pattern, M is a corresponding input ground truth mask pattern, Clis cost data, the function (•) represents the mask prediction model 450 and the function $(•) represents the performance cost prediction model 475, the functions D and represent a fidelity loss term. Note that the function (•) predicts the mask pattern given the desired target pattern and one or more input cost data.

[0065] The training of the performance cost prediction model 475 includes: generating, along with the predicted mask pattern 508 in step (ii) of the training, a predicted cost data 524 that is indicative of a predicted performance cost associated with the predicted mask pattern 508, computing in step (iii) the loss function 540 (e.g., according to Eq. (1)) based on a difference between the predicted cost data 524 and the input cost data 504a, and in step (v) adjusting the parameters (e.g., weights and biases) of the mask prediction model 450 or the performance cost prediction model 475 to reduce (e.g., minimize) the loss function 520 or 540. Note that the prediction of cost data may be optional with respect to the prediction of mask pattern. That is, the performance cost prediction model 475 need not be implemented for predicting a mask pattern using the mask prediction model 450.

[0066] The training iterations may be continued until a specified training condition is satisfied. For example, the training process may be continued for a specified number of iterations. In another example, the training process may be continued until the loss function, that is, a difference between the predicted mask pattern (e.g., predicted mask pattern 508) and the ground truth mask pattern (e.g., the first derived mask pattern 510a), or a difference between the predicted cost data 524 and the input cost data 504a, is reduced (e.g., minimized). Once the training condition is satisfied, the mask prediction model 450 is considered to be trained, and the mask prediction model 450 may be deployed to predict a mask pattern for any new target pattern (e.g., unseen target pattern or a target pattern that the mask prediction model 450 is neither trained on, nor executed on to generate the predicted mask pattern) and any new cost data, as illustrated in Figures 4A and 4B above.

[0067] By using performance cost as an input in the training process, the mask prediction model 450 is trained to improve the prediction in localized areas of the mask pattern guided by the cost data, thereby reducing any impact on the prediction accuracy due to inconsistencies in the training dataset. By capturing the local behavior as an input to the mask prediction model 450 (e.g., as cost data), the impact on the training due to these inconsistencies is reduced. Such a training may increase thestability and prediction accuracy of the produced mask prediction model 450 due to local exploration of the perturbed mask structures.

[0068] Figures 6A and 6B are block diagrams for training data generation, which includes generation of derived mask patterns and their associated cost data, for training the mask prediction model, consistent with various embodiments. Figure 7 is a flow diagram of a process for training the mask prediction model using training data including derived mask patterns and their associated cost data, consistent with various embodiments.

[0069] At process P702, a set of derived mask patterns to be used as ground truth in training the mask prediction model is obtained. For example, the set of derived mask patterns 510 (e.g., 510a- 51 On) may be obtained. In some embodiments, the set of derived mask patterns 510 may be non- optimal mask patterns, which are derived from a reference mask pattern that is an optimal mask solution. Typically, optimal mask solution may result from a mask optimization process (e.g., an inverse lithography solution such as a CTM process). The reference mask pattern corresponding to a target pattern 602 is obtained and the set of derived mask patterns are derived from the reference mask pattern 606. The set of derived mask patterns 510 may be derived from the reference mask pattern 606 in a number of ways. For example, the first derived mask pattern 510a may be generated by performing a first perturbation on a reference mask pattern 606 (e.g., changing at least one of a location, shape, dimension, etc. of one or more features in the reference mask pattern 606), a second derived mask pattern 510b may be generated by performing a second perturbation on the reference mask pattern 606 (e.g., changing at least one of a location, shape, dimension, etc. of one or more features) and so on to generate n number of derived mask patterns.

[0070] At process P704, cost data associated with each derived mask pattern of the set of derived mask patterns 510 is computed using the corresponding mask pattern and the reference mask pattern 606. As mentioned above, the cost data is indicative of a performance cost associated with the mask pattern and may include a wafer-level KPI, a mask-level KPI, or any other measurable KPIs (e.g., performance cost associated with a device having circuits manufactured using the mask pattern). Figure 6A illustrates an example of computing the cost data 504 as EPE-based cost (e.g., wafer-level KPI), and Figure 6B illustrates an example computing the cost data 504 as MRC -based cost (e.g., a mask-level KPI). The wafer-level KPI may include at least one of EPE-based cost, SRAF printability cost, pixel-based error, manufacturing yield cost, or other such costs computed in the wafer domain. In some embodiments, a wafer-level KPI such as an EPE-based cost may be determined by comparing a first resist image 612a corresponding to the first derived mask pattern 510a with a reference image 622 having a desired pattern to be printed on the substrate. For example, an edge of a feature may be extracted from the first resist image 612a and the reference image 622 and compared to determine the EPE based on any difference between the locations of the edge in the images. Any EPE is recorded in the cost data 504a (e.g., EPE-based cost data 504a). In some embodiments, the reference image 622 may be a resist image corresponding to the reference mask pattern 606. A resist image may beobtained for any given mask pattern using a computer simulation of lithography process (e.g., using a wafer image prediction model such as a resist model 340 described at least with reference to Figure 3).

[0071] The cost data 504a may be expressed as a cost map, which is an image having different pixel values for indicating presence and absence of errors. For example, the image pixels in locations with a presence of an EPE may have a first value (e.g., white colored pixels) and the image pixels in the locations with an absence of an error may have a second value (e.g., black colored pixels). In some embodiments, the EPE-based cost may be determined for different process window conditions (e.g., focus and dose values) and multiple EPE-based cost data may be generated - one for each process window condition.

[0072] Other wafer-level KPIs such as SRAF printability cost may also be determined similarly. For example, the first resist image 612a may be compared with the reference image 622 to determine if any non-printable features such as SRAFs are present in the first resist image 612. If a non-printable feature is present in the first resist image 612a, then it may be considered as an error and indicated so in the cost data 504a at the corresponding location. Similarly, the pixel-based error may also be computed by comparing the first resist image 612a with the reference image 622 and indicating any difference between the corresponding pixels in the images as errors in the cost data 504a at the corresponding locations.

[0073] The mask-level KPI, which is computed in the mask domain, may include at least one of MRC-based cost that is indicative of a violation of the rules specified in MRC by a mask pattern, or manufacturability cost that is indicative of cost associated with type of features in the mask pattern. In some embodiments, as illustrated in Figure 6B, the MRC-based cost may be determined by executing an MRC process 650 on the set of derived mask patterns 510 to determine if the set of derived mask patterns 510 is violating any rules specified in the MRC. Some of the rules may include a minimum distance between two features, a minimum distance between a main feature and an SRAF, minimum size of a feature, etc. For example, a first derived mask pattern 510a may be provided as an input to the MRC process 650. The MRC process 650 may detect any violation of the MRC rules by obtaining the necessary attributes of the first derived mask pattern 510a (e.g., feature size, distance between features etc.) and checking them against the MRC rules. Any violation of the MRC may be indicated as an error in in the cost data 504a at the corresponding location. Similarly, the manufacturability cost, which is indicative of a manufacturing cost associated with manufacturing different types of features in the first derived mask pattern 510a may also be computed as cost data 504a. For example, rectangular features may be manufactured more easily than the curvilinear features. So, a first type of features (e.g., rectangular features) may be associated with a first manufacturing cost, which may be indicated using image pixels having a first value, and a second type of features (e.g., curvilinear features) may be associated with a second manufacturing cost greater than the first manufacturing cost, which may be indicated in the cost data 504a using imagepixels having a second value and so on. Various such performance cost may be computed for a mask pattern.

[0074] While the above examples illustrate computing the performance cost for the derived mask patterns 510a-510n using resist images such as resist images 612a-612n, respectively, other performance cost may be computed using other types of images associated with the pattern as well. For example, performance cost may be computed using an aerial image or an etch image of the pattern to be printed on the substrate.

[0075] At process P706, training data having a set of target patterns 502, the set of derived mask patterns 510, and the set of cost data 504 associated with the set of derived mask patterns 510 is generated. The set of target patterns 502 and the set of cost data 504 are used as model inputs and the set of derived mask patterns 510 is used as ground truth data for the training. In some embodiments, all the target patterns in the set of target patterns 502 may be copies of the same target pattern 602, as the derived mask patterns 510a-510n are generated from the same reference mask pattern 606, which corresponds to the target pattern 602. Each data sample in the training dataset may include a target pattern, e.g., the first target pattern 502a, a derived mask pattern corresponding to the target pattern, e.g., the first derived mask pattern 510a corresponding to the first target pattern 502a, and one or more cost data that is indicative of one or more performance costs associated with the derived mask pattern, e.g., first cost data 504a associated with the first derived mask pattern 510a. The training data may include multiple such data samples.

[0076] While Figure 5 illustrates the training of the mask prediction model 450 using a single cost data 504a as an input to the mask prediction model 450, the number of performance costs that the prediction can be based on is not limited to a single performance cost and multiple performance costs may be input to the mask prediction model 450. For example, multiple cost data that are indicative of multiple performance costs such as EPE-based cost, MRC-based cost, SRAF printability cost, etc. may be input to the mask prediction model 450 along with the first target pattern 502a, and the mask prediction model 450 may be trained to generate the predicted mask pattern 508 based on the multiple performance costs. Accordingly, the training dataset may include one or more performance costs for a ground truth mask pattern.

[0077] At process P708, the mask prediction model 450 is trained by using the training data to generate a predicted mask pattern, as described at least with reference to Figure 5 above.

[0078] Figure 8 is a block diagram that illustrates a computer system 100 which can assist in implementing various methods and systems disclosed herein. The computer system 100 may be used to implement any of the entities, components, modules, or services depicted in the examples of the figures (and any other entities, components, modules, or services described in this specification). The computer system 100 may be programmed to execute computer program instructions to perform functions, methods, flows, or services (e.g., of any of the entities, components, or modules) describedherein. The computer system 100 may be programmed to execute computer program instructions by at least one of software, hardware, or firmware.

[0079] Computer system 100 includes a bus 102 or other communication mechanism for communicating information, and a processor 104 (or multiple processors 104 and 105) coupled with bus 102 for processing information. Computer system 100 also includes a main memory 106, such as a random access memory (RAM) or other dynamic storage device, coupled to bus 102 for storing information and instructions to be executed by processor 104. Main memory 106 also may be used for storing temporary variables or other intermediate information during execution of instructions to be executed by processor 104. Computer system 100 further includes a read only memory (ROM) 108 or other static storage device coupled to bus 102 for storing static information and instructions for processor 104. A storage device 110, such as a magnetic disk or optical disk, is provided and coupled to bus 102 for storing information and instructions.

[0080] Computer system 100 may be coupled via bus 102 to a display 112, such as a cathode ray tube (CRT) or flat panel or touch panel display for displaying information to a computer user. An input device 114, including alphanumeric and other keys, is coupled to bus 102 for communicating information and command selections to processor 104. Another type of user input device is cursor control 116, such as a mouse, a trackball, or cursor direction keys for communicating direction information and command selections to processor 104 and for controlling cursor movement on display 112. This input device typically has two degrees of freedom in two axes, a first axis (e.g., x) and a second axis (e.g., y), that allows the device to specify positions in a plane. A touch panel (screen) display may also be used as an input device.

[0081] According to one embodiment, portions of one or more methods described herein may be performed by computer system 100 in response to processor 104 executing one or more sequences of one or more instructions contained in main memory 106. Such instructions may be read into main memory 106 from another computer-readable medium, such as storage device 110. Execution of the sequences of instructions contained in main memory 106 causes processor 104 to perform the process steps described herein. One or more processors in a multi-processing arrangement may also be employed to execute the sequences of instructions contained in main memory 106. In an alternative embodiment, hard-wired circuitry may be used in place of or in combination with software instructions. Thus, the description herein is not limited to any specific combination of hardware circuitry and software.

[0082] The term “computer-readable medium” as used herein refers to any medium that participates in providing instructions to processor 104 for execution. Such a medium may take many forms, including but not limited to, non-volatile media, volatile media, and transmission media. Nonvolatile media include, for example, optical or magnetic disks, such as storage device 110. Volatile media include dynamic memory, such as main memory 106. Transmission media include coaxial cables, copper wire and fiber optics, including the wires that comprise bus 102. Transmission mediacan also take the form of acoustic or light waves, such as those generated during radio frequency (RF) and infrared (IR) data communications. Common forms of computer-readable media include, for example, a floppy disk, a flexible disk, hard disk, magnetic tape, any other magnetic medium, a CD- ROM, DVD, any other optical medium, punch cards, paper tape, any other physical medium with patterns of holes, a RAM, a PROM, and EPROM, a FLASH-EPROM, any other memory chip or cartridge, a carrier wave as described hereinafter, or any other medium from which a computer can read.

[0083] Various forms of computer readable media may be involved in carrying one or more sequences of one or more instructions to processor 104 for execution. For example, the instructions may initially be borne on a magnetic disk of a remote computer. The remote computer can load the instructions into its dynamic memory and send the instructions over a telephone line using a modem. A modem local to computer system 100 can receive the data on the telephone line and use an infrared transmitter to convert the data to an infrared signal. An infrared detector coupled to bus 102 can receive the data carried in the infrared signal and place the data on bus 102. Bus 102 carries the data to main memory 106, from which processor 104 retrieves and executes the instructions. The instructions received by main memory 106 may optionally be stored on storage device 110 either before or after execution by processor 104.

[0084] Computer system 100 also preferably includes a communication interface 118 coupled to bus 102. Communication interface 118 provides a two-way data communication coupling to a network link 120 that is connected to a local network 122. For example, communication interface 118 may be an integrated services digital network (ISDN) card or a modem to provide a data communication connection to a corresponding type of telephone line. As another example, communication interface 118 may be a local area network (LAN) card to provide a data communication connection to a compatible LAN. Wireless links may also be implemented. In any such implementation, communication interface 118 sends and receives electrical, electromagnetic, or optical signals that carry digital data streams representing several types of information.

[0085] Network link 120 typically provides data communication through one or more networks to other data devices. For example, network link 120 may provide a connection through local network 122 to a host computer 124 or to data equipment operated by an Internet Service Provider (ISP) 126. ISP 126 in turn provides data communication services through the worldwide packet data communication network, now commonly referred to as the “Internet” 128. Local network 122 and Internet 128 both use electrical, electromagnetic, or optical signals that carry digital data streams. The signals through the various networks and the signals on network link 120 and through communication interface 118, which carry the digital data to and from computer system 100, are exemplary forms of carrier waves transporting the information.

[0086] Computer system 100 can send messages and receive data, including program code, through the network(s), network link 120, and communication interface 118. In the Internet example,a server 130 might transmit a requested code for an application program through Internet 128, ISP 126, local network 122 and communication interface 118. One such downloaded application may provide for the illumination optimization of the embodiment, for example. The received code may be executed by processor 104 as it is received, or stored in storage device 110, or other non-volatile storage for later execution. In this manner, computer system 100 may obtain application code in the form of a carrier wave.

[0087] While the concepts disclosed herein may be used for imaging on a substrate such as a silicon wafer, it shall be understood that the disclosed concepts may be used with any type of lithographic imaging systems, e.g., those used for imaging on substrates other than silicon wafers.

[0088] The terms “optimizing” and “optimization” as used herein refers to or means adjusting a patterning apparatus (e.g., a lithography apparatus), a patterning process, etc. such that results and / or processes have more desirable characteristics, such as higher accuracy of projection of a design pattern on a substrate, a larger process window, etc. Thus, the term “optimizing” and “optimization” as used herein refers to or means a process that identifies one or more values for one or more parameters that provide an improvement, e.g., a local optimum, in at least one relevant metric, compared to an initial set of one or more values for those one or more parameters. “Optimum” and other related terms should be construed accordingly. In an embodiment, optimization steps can be applied iteratively to provide further improvements in one or more metrics.

[0089] Aspects of the invention can be implemented in any convenient form. For example, an embodiment may be implemented by one or more appropriate computer programs which may be carried on an appropriate carrier medium which may be a tangible carrier medium (e.g., a disk) or an intangible carrier medium (e.g., a communications signal). Embodiments of the invention may be implemented using suitable apparatus which may specifically take the form of a programmable computer running a computer program arranged to implement a method as described herein. Thus, embodiments of the disclosure may be implemented in hardware, firmware, software, or any combination thereof. Embodiments of the disclosure may also be implemented as instructions stored on a machine -readable medium, which may be read and executed by one or more processors. A machine -readable medium may include any mechanism for storing or transmitting information in a form readable by a machine (e.g., a computing device). For example, a machine -readable medium may include read only memory (ROM); random access memory (RAM); magnetic disk storage media; optical storage media; flash memory devices; electrical, optical, acoustical, or other forms of propagated signals (e.g., carrier waves, infrared signals, digital signals, etc.), and others. Further, firmware, software, routines, instructions may be described herein as performing certain actions. However, it should be appreciated that such descriptions are merely for convenience and that such actions in fact result from computing devices, processors, controllers, or other devices executing the firmware, software, routines, instructions, etc.

[0090] Embodiments of the present disclosure can be further described by the following clauses.1. A method of mask pattern design, the method comprising: obtaining a set of derived mask patterns corresponding to a set of target patterns; for each derived mask pattern of the set of derived mask patterns, obtaining cost data associated with each derived mask pattern, wherein the cost data indicates a performance cost associated with the corresponding derived mask pattern; and training a mask prediction model by using training data that comprises the set of target patterns, the set of derived mask patterns, and a set of cost data thereof, wherein the mask prediction model is configured to generate a mask pattern presentation for an input target pattern representation.2. The method of clause 1 , wherein each derived mask pattern of the set of derived mask patterns is derived from a reference mask pattern corresponding to a target pattern.3. The method of clause 2, wherein each derived mask pattern of the set of derived mask patterns is generated by perturbing the reference mask pattern.4. The method of clause 3, wherein the reference mask pattern is perturbed by changing at least one of a location, shape, or dimension of one or more features in the reference mask pattern.5. The method of clause 2, wherein the reference mask pattern is generated using an optimization method that iteratively adjusts an initial mask pattern to obtain the reference mask pattern that produces a pattern corresponding to the target pattern on a substrate.6. The method of clause 1 , wherein the cost data includes a wafer-level key performance indicator (KPI) indicative of wafer imaging performance, or a mask-level KPI indicative of mask pattern evaluation.7. The method of clause 6, wherein the wafer-level KPI is computed for multiple process window conditions.8. The method of clause 6, wherein the wafer-level KPI includes at least one of edge placement error (EPE)-based cost, sub-resolution assist features (SRAF) printability cost, or pixel-based error.9. The method of clause 8, wherein obtaining the cost data includes: computing the EPE-based cost, the SRAF printability cost or the pixel -based error by comparing a first resist image corresponding to a first mask pattern of the set of derived mask patterns and a reference resist image representative of a pattern to be printed on a substrate.10. The method of clause 9, wherein the reference resist image is generated by applying a wafer image prediction model to a reference mask pattern.11. The method of clause 6, wherein the mask-level KPI includes at least one of mask rule check (MRC)-based cost that is indicative of compliance of the set of derived mask patterns with MRC rules, or manufacturability cost that is indicative of cost associated with type of features in the set of derived mask patterns.12. The method of clause 11, wherein obtaining the cost data includes: applying an MRC to determine compliance of a first derived mask pattern of the set of derived mask patterns with the MRC rules, andcomputing the MRC-based cost based on the compliance.13. The method of clause 1 further comprising: after training the mask prediction model, inputting a first target pattern and a first cost data to the mask prediction model, wherein the first cost data is set to a first value that is indicative of a desired performance cost to be achieved in a lithographic process; and executing the mask prediction model with the input to obtain a first predicted mask pattern.14. The method of clause 13, wherein the first cost data is set to the first value by default.15. The method of clause 13 further comprising: adjusting the first predicted mask pattern using a mask optimization process to generate an updated mask pattern for use in a lithography process to print a pattern corresponding to the updated mask pattern on a substrate.16. The method of clause 13 further comprising: providing the first predicted mask pattern as input to a performance cost prediction model; and executing the performance cost prediction model to obtain predicted cost data associated with the first predicted mask pattern.17. The method of clause 16, wherein the input further includes the first target pattern.18. The method of clause 16 further comprising: adjusting, based on the predicted cost data, the first predicted mask pattern using a mask optimization process to generate an updated mask pattern for use in a lithography process to print a pattern corresponding to the updated mask pattern on a substrate.19. The method of clause 16 further comprising: obtaining a training set of cost data associated with a training set of derived mask patterns; and training the performance cost prediction model by using the training set of derived mask patterns and the training set of cost data to generate predicted cost data.20. The method of clause 19 further comprising: training the performance cost prediction model by using a training set of target patterns in addition to the training set of derived mask patterns, wherein the training set of derived mask patterns corresponds to the training set of target patterns.21. A method of mask pattern design, the method comprising: inputting a first target pattern and first cost data that is indicative of a performance cost to a mask prediction model; and executing the mask prediction model to obtain a first predicted mask pattern corresponding to the first target pattern and the first cost data.22. The method of clause 21, wherein the first cost data includes a wafer-level key performance indicator (KPI) indicative of wafer imaging performance, or a mask-level KPI indicative of mask pattern evaluation.23. The method of clause 22, wherein the wafer-level KPI includes at least one of edge placement error (EPE)-based cost, sub-resolution assist features (SRAF) printability cost, or pixel-based error.24. The method of clause 22, wherein the mask-level KPI includes at least one of mask rule check (MRC)-based cost that is indicative of compliance of the first predicted mask pattern with MRC rules, or manufacturability cost that is indicative of cost associated with type of features in the first predicted mask pattern.25. The method of clause 21, wherein the first cost data is set to a first value that is indicative of a desired performance cost to be achieved in a lithographic process.26. The method of clause 21 further comprising: adjusting the first predicted mask pattern using a mask optimization process to generate an updated mask pattern for use in a lithography process to print a pattern corresponding to the updated mask pattern on a substrate.27. The method of clause 21 further comprising: obtaining a set of derived mask patterns corresponding to a set of target patterns; for each derived mask pattern of the set of derived mask patterns, obtaining cost data associated with each derived mask pattern, wherein the cost data indicates a performance cost associated with the corresponding derived mask pattern; and training the mask prediction model by using training data that comprises the set of target patterns, the set of derived mask patterns, and a set of cost data thereof, wherein the mask prediction model is configured to generate a mask pattern presentation for an input target pattern representation.28. The method of clause 27, wherein each derived mask pattern of the set of derived mask patterns is derived from a reference mask pattern corresponding to a target pattern.29. The method of clause 28, wherein each derived mask pattern of the set of derived mask patterns is generated by perturbing the reference mask pattern.30. The method of clause 28, wherein the reference mask pattern is perturbed by changing at least one of a location, shape, or dimension of one or more features in the reference mask pattern.31. The method of clause 28, wherein the reference mask pattern is generated using an optimization method that iteratively adjusts an initial mask pattern to obtain the reference mask pattern that produces a pattern corresponding to the target pattern on a substrate.32. The method of clause 28, wherein obtaining the cost data includes: computing at least one of an EPE-based cost, SRAF printability cost or pixel-based error by comparing a first resist image corresponding to a first derived mask pattern of the set of derived mask patterns and a reference resist image representative of a pattern to be printed on a substrate.33. The method of clause 32, wherein the reference resist image is generated by applying a wafer image prediction model to the reference mask pattern.34. The method of clause 28, wherein obtaining the cost data includes: applying an MRC to determine compliance of a first derived mask pattern of the set of derived mask patterns with MRC rules, and computing the MRC-based cost based on the compliance.35. The method of clause 21 further comprising: providing the first predicted mask pattern as an input to a performance cost prediction model; and executing the performance cost prediction model to obtain predicted cost data, which is indicative of a predicted performance cost associated with the first predicted mask pattern.36. The method of clause 35, wherein the input further includes the first target pattern.37. The method of clause 35 further comprising: adjusting, based on the predicted cost data, the first predicted mask pattern using a mask optimization process to generate an updated mask pattern for use in a lithography process to print a pattern corresponding to the updated mask pattern on a substrate.38. An apparatus, the apparatus comprising: a memory storing a set of instructions; and a processor configured to execute the set of instructions to cause the apparatus to perform a method of any of the above clauses.39. A non-transitory computer-readable medium having instructions recorded thereon, the instructions when executed by a computer implementing the method of any of the above clauses.

[0091] In block diagrams, illustrated components are depicted as discrete functional blocks, but embodiments are not limited to systems in which the functionality described herein is organized as illustrated. The functionality provided by each of the components may be provided by software or hardware modules that are differently organized than is presently depicted, for example such software or hardware may be intermingled, conjoined, replicated, broken up, distributed (e.g., within a data center or geographically), or otherwise differently organized. The functionality described herein may be provided by one or more processors of one or more computers executing code stored on a tangible, non-transitory, machine -readable medium. In some cases, third party content delivery networks may host some or all of the information conveyed over networks, in which case, to the extent information (e.g., content) is said to be supplied or otherwise provided, the information may be provided by sending instructions to retrieve that information from a content delivery network.

[0092] Unless specifically stated otherwise, as apparent from the discussion, it is appreciated that throughout this specification discussions utilizing terms such as “processing,” “computing,” “calculating,” “determining” or the like refer to actions or processes of a specific apparatus, such as a special purpose computer or a similar special purpose electronic processing / computing device.

[0093] The reader should appreciate that the present application describes several inventions. Rather than separating those inventions into multiple isolated patent applications, these inventions have been grouped into a single document because their related subject matter lends itself to economies in the application process. But the distinct advantages and aspects of such inventions should not be conflated. In some cases, embodiments address all of the deficiencies noted herein, but it should be understood that the inventions are independently useful, and some embodiments address only a subset of such problems or offer other, unmentioned benefits that will be apparent to those of skill in the art reviewing the present disclosure. Due to cost constraints, some inventions disclosed herein may not be presently claimed and may be claimed in later filings, such as continuation applications or by amending the present claims. Similarly, due to space constraints, neither the Abstract nor the Summary sections of the present document should be taken as containing a comprehensive listing of all such inventions or all aspects of such inventions.

[0094] It should be understood that the description and the drawings are not intended to limit the present disclosure to the particular form disclosed, but to the contrary, the intention is to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the inventions as defined by the appended claims.

[0095] Modifications and alternative embodiments of various aspects of the inventions will be apparent to those skilled in the art in view of this description. Accordingly, this description and the drawings are to be construed as illustrative only and are for the purpose of teaching those skilled in the art the general manner of carrying out the inventions. It is to be understood that the forms of the inventions shown and described herein are to be taken as examples of embodiments. Elements and materials may be substituted for those illustrated and described herein, parts and processes may be reversed or omitted, certain features may be utilized independently, and embodiments or features of embodiments may be combined, all as would be apparent to one skilled in the art after having the benefit of this description. Changes may be made in the elements described herein without departing from the spirit and scope of the invention as described in the following claims. Headings used herein are for organizational purposes only and are not meant to be used to limit the scope of the description.

[0096] As used herein, unless specifically stated otherwise, the term “or” encompasses all possible combinations, except where infeasible. For example, if it is stated that a component includes A or B, then, unless specifically stated otherwise or infeasible, the component may include A, or B, or A and B. As a second example, if it is stated that a component includes A, B, or C, then, unless specifically stated otherwise or infeasible, the component may include A, or B, or C, or A and B, or A and C, or B and C, or A and B and C. Expressions such as “at least one of’ do not necessarily modify an entirety of a following list and do not necessarily modify each member of the list, such that “at least one of A, B, and C” should be understood as including only one of A, only one of B, only one of C, or any combination of A, B, and C. The phrase “one of A and B” or “any one of A and B” shall be interpreted in the broadest sense to include one of A, or one of B.

[0097] The descriptions herein are intended to be illustrative, not limiting. Thus, it will be apparent to one skilled in the art that modifications may be made as described without departing from the scope of the claims set out below.

Claims

CLAIMS1. A method of mask pattern design, the method comprising: obtaining a set of derived mask patterns corresponding to a set of target patterns; for each derived mask pattern of the set of derived mask patterns, obtaining cost data associated with each derived mask pattern, wherein the cost data indicates a performance cost associated with the corresponding derived mask pattern; and training a mask prediction model by using training data that comprises the set of target patterns, the set of derived mask patterns, and a set of cost data thereof, wherein the mask prediction model is configured to generate a mask pattern presentation for an input target pattern representation.

2. The method of claim 1 , wherein each derived mask pattern of the set of derived mask patterns is derived from a reference mask pattern corresponding to a target pattern.

3. The method of claim 2, wherein each derived mask pattern of the set of derived mask patterns is generated by perturbing the reference mask pattern, and wherein the reference mask pattern is perturbed by changing at least one of a location, shape, or dimension of one or more features in the reference mask pattern.

4. The method of claim 2, wherein the reference mask pattern is generated using an optimization method that iteratively adjusts an initial mask pattern to obtain the reference mask pattern that produces a pattern corresponding to the target pattern on a substrate.

5. The method of claim 1, wherein the cost data includes a wafer-level key performance indicator (KPI) indicative of wafer imaging performance, or a mask-level KPI indicative of mask pattern evaluation.

6. The method of claim 5, wherein the wafer-level KPI is computed for multiple process window conditions, and wherein the wafer-level KPI includes at least one of edge placement error (EPE) -based cost, subresolution assist features (SRAF) printability cost, or pixel -based error.

7. The method of claim 6, wherein obtaining the cost data includes: computing the EPE-based cost, the SRAF printability cost or the pixel -based error by comparing a first resist image corresponding to a first mask pattern of the set of derived mask patterns and a reference resist image representative of a pattern to be printed on a substrate.

8. The method of claim 7, wherein the reference resist image is generated by applying a wafer image prediction model to a reference mask pattern.

9. The method of claim 5, wherein the mask-level KPI includes at least one of mask rule check (MRC)-based cost that is indicative of compliance of the set of derived mask patterns with MRC rules, or manufacturability cost that is indicative of cost associated with type of features in the set of derived mask patterns.

10. The method of claim 1 further comprising: after training the mask prediction model, inputting a first target pattern and a first cost data to the mask prediction model, wherein the first cost data is set to a first value that is indicative of a desired performance cost to be achieved in a lithographic process; and executing the mask prediction model with the input to obtain a first predicted mask pattern.

11. The method of claim 10 further comprising: adjusting the first predicted mask pattern using a mask optimization process to generate an updated mask pattern for use in a lithography process to print a pattern corresponding to the updated mask pattern on a substrate.

12. The method of claim 10 further comprising: providing the first predicted mask pattern as input to a performance cost prediction model; and executing the performance cost prediction model to obtain predicted cost data associated with the first predicted mask pattern, wherein the input further includes the first target pattern.

13. The method of claim 12 further comprising: adjusting, based on the predicted cost data, the first predicted mask pattern using a mask optimization process to generate an updated mask pattern for use in a lithography process to print a pattern corresponding to the updated mask pattern on a substrate.

14. The method of claim 12 further comprising: obtaining a training set of cost data associated with a training set of derived mask patterns; andtraining the performance cost prediction model by using the training set of derived mask patterns and the training set of cost data to generate predicted cost data.

15. The method of claim 14 further comprising: training the performance cost prediction model by using fa training set of target patterns in addition to the training set of derived mask patterns, wherein the training set of derived mask patterns corresponds to the training set of target patterns.

Images