Substrate processing apparatus and substrate processing method

Abstract

In one exemplary embodiment, the substrate processing apparatus comprises a chamber, a substrate support unit, a gas supply unit, a plasma generation unit, a bias power supply, and a control unit. The control unit is configured to control the gas supply unit, the plasma generation unit, and the bias power supply so as to implement a substrate processing method. The substrate processing method comprises: (a) a step for supplying a first processing gas into the chamber to process a substrate using a first plasma; and (b) a step for supplying a second processing gas containing an inert gas into the chamber to generate a second plasma. From (a) to (b), source high-frequency power for generating the first plasma and the second plasma is continuously supplied. An electric bias is supplied to the substrate support unit in (a), and no electric bias is supplied to the substrate support unit in (b).

Description

Substrate processing apparatus and substrate processing method

[0001] SUMMARY OF THE INVENTION Exemplary embodiments of the present disclosure relate to substrate processing apparatus and methods.

[0002] Patent Document 1 discloses a plasma processing method for forming multiple holes of different depths in a multilayer film. The multilayer film has an oxide layer and multiple etching stop layers that are arranged below the top surface of the oxide layer in the stacking direction and at different positions in the stacking direction. The multiple holes are formed by generating plasma from a process gas and etching from the top surface of the oxide layer down to the multiple etching stop layers. The process gas contains a fluorocarbon gas, a noble gas, and nitrogen.

[0003] JP 2014-90022 A

[0004] The present disclosure provides a technique that can generate stable plasma.

[0005] In one exemplary embodiment, a substrate processing apparatus includes a chamber, a substrate support for supporting a substrate in the chamber, a gas supply configured to supply a first process gas and a second process gas into the chamber, the second process gas comprising an inert gas, a plasma generator configured to generate a first plasma and a second plasma from the first process gas and the second process gas in the chamber, respectively, a bias power supply configured to supply an electrical bias to the substrate support, and a controller, the controller controlling the gas supply to perform a substrate processing method. The substrate processing method is configured to control a supply unit, the plasma generation unit, and the bias power supply, and the substrate processing method includes the steps of: (a) supplying the first process gas into the chamber and processing the substrate with the first plasma; and (b) supplying the second process gas into the chamber and generating the second plasma, wherein a source high frequency power for generating the first plasma and the second plasma is continuously supplied from (a) to (b), the electric bias is supplied to the substrate support part in (a), and no electric bias is supplied to the substrate support part in (b).

[0006] According to one exemplary embodiment, a technique is provided that allows for the generation of a stable plasma.

[0007] FIG. 1 is a diagram illustrating an example of the configuration of a plasma processing system. FIG. 2 is a diagram illustrating an example of the configuration of a capacitively coupled plasma processing apparatus. FIG. 3 is a flowchart of a substrate processing method according to an exemplary embodiment. FIG. 4 is a partially enlarged view of an example substrate to which the method of FIG. 3 can be applied. FIG. 5 is a cross-sectional view illustrating a process of a substrate processing method according to an exemplary embodiment. FIG. 6 is a cross-sectional view illustrating a process of a substrate processing method according to an exemplary embodiment. FIG. 7 is an example of a timing chart illustrating time changes in source high frequency power and electric bias. FIG. 8 is a graph illustrating an example of time changes in source high frequency power and electric bias in a first experiment. FIG. 9 is a graph illustrating an example of time changes in source high frequency power and electric bias in a second experiment. FIG. 10 is a graph illustrating an example of time changes in reflected power in the first experiment. FIG. 11 is a graph illustrating an example of time changes in reflected power in the second experiment.

[0008] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. In the description of the drawings, the same or equivalent elements are designated by the same reference numerals, and redundant description will be omitted.

[0009] FIG. 1 is a diagram illustrating an exemplary configuration of a plasma processing system. In one embodiment, the plasma processing system includes a plasma processing apparatus 1 and a control unit 2. The plasma processing system is an example of a substrate processing system, and the plasma processing apparatus 1 is an example of a substrate processing apparatus. The plasma processing apparatus 1 includes a plasma processing chamber 10, a substrate support 11, and a plasma generation unit 12. The plasma processing chamber 10 has a plasma processing space. The plasma processing chamber 10 also has at least one gas supply port for supplying at least one processing gas to the plasma processing space and at least one gas exhaust port for exhausting gas from the plasma processing space. The gas supply port is connected to a gas supply unit 20 (described later), and the gas exhaust port is connected to an exhaust system 40 (described later). The substrate support 11 is disposed in the plasma processing space and has a substrate support surface for supporting a substrate.

[0010] The plasma generating unit 12 is configured to generate plasma from at least one processing gas supplied into the plasma processing space. The plasma generated in the plasma processing space may be capacitively coupled plasma (CCP), inductively coupled plasma (ICP), electron-cyclotron-resonance plasma (ECR plasma), helicon wave plasma (HWP), surface wave plasma (SWP), or the like. Various types of plasma generators may be used, including alternating current (AC) plasma generators and direct current (DC) plasma generators. In one embodiment, the AC signal (AC power) used in the AC plasma generator has a frequency in the range of 100 kHz to 10 GHz. Thus, AC signals include radio frequency (RF) signals and microwave signals. In one embodiment, the RF signal has a frequency in the range of 100 kHz to 150 MHz.

[0011] The control unit 2 processes computer-executable instructions that cause the plasma processing apparatus 1 to perform various processes described in this disclosure. The control unit 2 may be configured to control each element of the plasma processing apparatus 1 to perform various processes described herein. In one embodiment, part or all of the control unit 2 may be included in the plasma processing apparatus 1. The control unit 2 may include a processing unit 2a1, a storage unit 2a2, and a communication interface 2a3. The control unit 2 may be implemented by, for example, a computer 2a. The processing unit 2a1 may be configured to read a program from the storage unit 2a2 and execute the read program to perform various control operations. This program may be stored in the storage unit 2a2 in advance or may be acquired via a medium when needed. The acquired program is stored in the storage unit 2a2 and read from the storage unit 2a2 by the processing unit 2a1 for execution. The medium may be various storage media readable by the computer 2a or a communication line connected to the communication interface 2a3. The processing unit 2a1 may be a CPU (Central Processing Unit). The storage unit 2a2 may include a random access memory (RAM), a read-only memory (ROM), a hard disk drive (HDD), a solid state drive (SSD), or a combination thereof. The communication interface 2a3 may communicate with the plasma processing apparatus 1 via a communication line such as a local area network (LAN).

[0012] The following describes a configuration example of a capacitively coupled plasma processing apparatus as an example of the plasma processing apparatus 1. Fig. 2 is a diagram for explaining a configuration example of a capacitively coupled plasma processing apparatus.

[0013] The capacitively coupled plasma processing apparatus 1 includes a plasma processing chamber 10, a gas supply 20, a power supply 30, and an exhaust system 40. The plasma processing apparatus 1 also includes a substrate support 11 and a gas inlet. The gas inlet is configured to introduce at least one process gas into the plasma processing chamber 10. The gas inlet includes a showerhead 13. The substrate support 11 is disposed within the plasma processing chamber 10. The showerhead 13 is disposed above the substrate support 11. In one embodiment, the showerhead 13 forms at least a portion of the ceiling of the plasma processing chamber 10. The plasma processing chamber 10 has a plasma processing space 10s defined by the showerhead 13, a sidewall 10a of the plasma processing chamber 10, and the substrate support 11. The plasma processing chamber 10 is grounded. The showerhead 13 and the substrate support 11 are electrically insulated from the housing of the plasma processing chamber 10.

[0014] The substrate support 11 includes a main body 111 and a ring assembly 112. The main body 111 has a central region 111a for supporting a substrate W and an annular region 111b for supporting the ring assembly 112. A wafer is an example of a substrate W. The annular region 111b of the main body 111 surrounds the central region 111a of the main body 111 in a plan view. The substrate W is disposed on the central region 111a of the main body 111, and the ring assembly 112 is disposed on the annular region 111b of the main body 111 so as to surround the substrate W on the central region 111a of the main body 111. Therefore, the central region 111a is also called a substrate support surface for supporting the substrate W, and the annular region 111b is also called a ring support surface for supporting the ring assembly 112.

[0015] In one embodiment, the main body 111 includes a base 1110 and an electrostatic chuck 1111. The base 1110 includes a conductive member. The conductive member of the base 1110 can function as a lower electrode. The electrostatic chuck 1111 is disposed on the base 1110. The electrostatic chuck 1111 includes a ceramic member 1111a and an electrostatic electrode 1111b disposed within the ceramic member 1111a. The ceramic member 1111a has a central region 111a. In one embodiment, the ceramic member 1111a also has an annular region 111b. Note that the annular region 111b may also be provided by another member surrounding the electrostatic chuck 1111, such as an annular electrostatic chuck or an annular insulating member. In this case, the ring assembly 112 may be disposed on the annular electrostatic chuck or the annular insulating member, or may be disposed on both the electrostatic chuck 1111 and the annular insulating member. Furthermore, at least one RF / DC electrode coupled to an RF power supply 31 and / or a DC power supply 32, which will be described later, may be disposed within the ceramic member 1111a. In this case, the at least one RF / DC electrode functions as a lower electrode. When a bias RF signal and / or a DC signal, which will be described later, is supplied to the at least one RF / DC electrode, the RF / DC electrode is also called a bias electrode. Note that the conductive member of the base 1110 and the at least one RF / DC electrode may function as multiple lower electrodes. Furthermore, the electrostatic electrode 1111b may function as a lower electrode. Therefore, the substrate support 11 includes at least one lower electrode.

[0016] The ring assembly 112 includes one or more annular members. In one embodiment, the one or more annular members include one or more edge rings and at least one cover ring. The edge rings are formed of a conductive or insulating material, and the cover rings are formed of an insulating material.

[0017] The substrate support 11 may also include a temperature adjustment module configured to adjust at least one of the electrostatic chuck 1111, the ring assembly 112, and the substrate to a target temperature. The temperature adjustment module may include a heater, a heat transfer medium, a flow passage 1110a, or a combination thereof. A heat transfer fluid such as brine or a gas flows through the flow passage 1110a. In one embodiment, the flow passage 1110a is formed in the base 1110, and one or more heaters are disposed in the ceramic member 1111a of the electrostatic chuck 1111. The substrate support 11 may also include a heat transfer gas supply configured to supply a heat transfer gas to a gap between the backside of the substrate W and the central region 111a.

[0018] The showerhead 13 is configured to introduce at least one process gas from the gas supply unit 20 into the plasma processing space 10s. The showerhead 13 has at least one gas supply port 13a, at least one gas diffusion chamber 13b, and multiple gas inlets 13c. The process gas supplied to the gas supply port 13a passes through the gas diffusion chamber 13b and is introduced into the plasma processing space 10s from the multiple gas inlets 13c. The showerhead 13 also includes at least one upper electrode. In addition to the showerhead 13, the gas inlet may also include one or more side gas injectors (SGIs) attached to one or more openings formed in the sidewall 10a.

[0019] The gas supply unit 20 may include at least one gas source 21 and at least one flow controller 22. In one embodiment, the gas supply unit 20 is configured to supply at least one process gas from a corresponding gas source 21 to the showerhead 13 via a corresponding flow controller 22. Each flow controller 22 may include, for example, a mass flow controller or a pressure-controlled flow controller. Additionally, the gas supply unit 20 may include at least one flow modulation device that modulates or pulses the flow rate of the at least one process gas.

[0020] The power supply 30 includes an RF power supply 31 coupled to the plasma processing chamber 10 via at least one impedance matching circuit. The RF power supply 31 is configured to supply at least one RF signal (RF power) to at least one lower electrode and / or at least one upper electrode. This generates a plasma from at least one processing gas supplied to the plasma processing space 10s. Therefore, the RF power supply 31 can function as at least a part of the plasma generation unit 12. Furthermore, by supplying a bias RF signal to the at least one lower electrode, a bias potential is generated on the substrate W, thereby attracting ion components in the formed plasma to the substrate W.

[0021] In one embodiment, the RF power supply 31 includes a first RF generating unit 31a and a second RF generating unit 31b. The first RF generating unit 31a is coupled to at least one lower electrode and / or at least one upper electrode via at least one impedance matching circuit and is configured to generate a source RF signal (source RF power) for plasma generation. In one embodiment, the source RF signal has a frequency in the range of 10 MHz to 150 MHz. In one embodiment, the first RF generating unit 31a may be configured to generate multiple source RF signals having different frequencies. The generated one or more source RF signals are supplied to at least one lower electrode and / or at least one upper electrode.

[0022] The second RF generator 31b is coupled to at least one lower electrode via at least one impedance matching circuit and is configured to generate a bias RF signal (bias RF power). The frequency of the bias RF signal may be the same as or different from the frequency of the source RF signal. In one embodiment, the bias RF signal has a frequency lower than the frequency of the source RF signal. In one embodiment, the bias RF signal has a frequency in the range of 100 kHz to 60 MHz. In one embodiment, the second RF generator 31b may be configured to generate multiple bias RF signals having different frequencies. The generated one or more bias RF signals are supplied to at least one lower electrode. In various embodiments, at least one of the source RF signal and the bias RF signal may be pulsed.

[0023] The power supply 30 may also include a DC power supply 32 coupled to the plasma processing chamber 10. The DC power supply 32 includes a first DC generator 32a and a second DC generator 32b. In one embodiment, the first DC generator 32a is connected to the at least one lower electrode and configured to generate a first DC signal. The generated first DC signal is applied to the at least one lower electrode. In one embodiment, the second DC generator 32b is connected to the at least one upper electrode and configured to generate a second DC signal. The generated second DC signal is applied to the at least one upper electrode.

[0024] In various embodiments, the first and second DC signals may be pulsed. In this case, a sequence of voltage pulses is applied to at least one lower electrode and / or at least one upper electrode. The voltage pulses may have a rectangular, trapezoidal, triangular, or combination thereof pulse waveform. In one embodiment, a waveform generator for generating the sequence of voltage pulses from the DC signal is connected between the first DC generator 32a and at least one lower electrode. Thus, the first DC generator 32a and the waveform generator constitute a voltage pulse generator. When the second DC generator 32b and the waveform generator constitute a voltage pulse generator, the voltage pulse generator is connected to at least one upper electrode. The voltage pulses may have either positive or negative polarity. Furthermore, the sequence of voltage pulses may include one or more positive voltage pulses and one or more negative voltage pulses within one period. The first and second DC generating units 32a and 32b may be provided in addition to the RF power supply 31, or the first DC generating unit 32a may be provided instead of the second RF generating unit 31b.

[0025] The exhaust system 40 may be connected to, for example, a gas exhaust port 10e provided at the bottom of the plasma processing chamber 10. The exhaust system 40 may include a pressure regulating valve and a vacuum pump. The pressure in the plasma processing space 10s is regulated by the pressure regulating valve. The vacuum pump may include a turbomolecular pump, a dry pump, or a combination thereof.

[0026] 3 is a flowchart of a substrate processing method according to one exemplary embodiment. The substrate processing method MT1 shown in FIG. 3 (hereinafter referred to as "method MT1") can be performed by the plasma processing apparatus 1 (substrate processing apparatus) of the above embodiment. The method MT1 can be applied to the substrate W of FIG. 4.

[0027] FIG. 4 is a cross-sectional view of an example substrate to which the method of FIG. 3 can be applied. As shown in FIG. 4, in one embodiment, the substrate W is a substrate for forming, for example, a three-dimensional NAND device. As shown in FIG. 4, the substrate W includes a silicon oxide film SF and multiple etch stop layers ES1 to ES4 disposed within the silicon oxide film SF. The substrate W may further include a mask MK and an underlayer region UR. The mask MK is provided on the silicon oxide film SF. The mask MK has multiple openings OP1 and multiple openings OP2 to OP4. Each of the openings OP1 to OP4 has, for example, a hole pattern. The mask MK may contain carbon. The silicon oxide film SF is provided on the underlayer region UR. The silicon oxide film SF may be formed of a single layer of silicon oxide or a multilayer film.

[0028] The positions of the multiple etching stop layers ES1 to ES4 in the thickness direction of the silicon oxide film SF may be different from one another. The positions of the etching stop layers ES1 to ES4 may become deeper in the order of the etching stop layers ES1 to ES4. The etching stop layer ES1 is closest to the mask MK. The silicon oxide film SF is arranged between the etching stop layer ES1 and the mask MK. The etching stop layer ES4 is closest to the underlying region UR. The silicon oxide film SF is arranged between the etching stop layer ES4 and the underlying region UR. The silicon oxide film SF is arranged between the etching stop layers adjacent to each other in the thickness direction of the silicon oxide film SF (e.g., the etching stop layer ES1 and the etching stop layer ES2). The multiple openings OP1 are located on the etching stop layer ES1. The opening OP2 is not located on the etching stop layer ES1 but on the etching stop layer ES2. The opening OP3 is not located on the etch stop layers ES1 and ES2, but is located on the etch stop layer ES3. The opening OP4 is not located on the etch stop layers ES1 to ES3, but is located on the etch stop layer ES4. The multiple etch stop layers ES1 to ES4 may include polysilicon.

[0029] A device region DR may be provided between the plurality of openings OP1 and the underlying region UR. The device region DR includes a columnar memory cell.

[0030] Method MT1 will be described below with reference to FIGS. 3 to 7, taking as an example a case where method MT1 is applied to a substrate W using the plasma processing apparatus 1 of the above embodiment. FIGS. 5 to 6 are cross-sectional views showing a step of a substrate processing method according to one exemplary embodiment. FIG. 7 is an example timing chart showing the time variations of the source RF power and the electrical bias. When the plasma processing apparatus 1 is used, method MT1 can be performed in the plasma processing apparatus 1 by controlling each part of the plasma processing apparatus 1 with the control unit 2. In method MT1, a substrate W on a substrate support 11 disposed in a plasma processing chamber 10 is processed, as shown in FIG. 2.

[0031] 3, the method MT1 may include steps ST1 to ST9. Steps ST1 to ST9 may be performed in order. The method MT1 may not include at least one of steps ST1 to ST3, steps ST5 to ST7, or step ST9. Steps ST1 to ST9 may be performed in situ within the same plasma processing chamber 10.

[0032] (Step ST1) In step ST1, as shown in FIG. 5, a plurality of shallow contact holes SCH are formed. The contact holes SCH may be formed as follows. First, an etching gas is supplied into the plasma processing chamber 10. Then, plasma is generated from the etching gas. The silicon oxide film SF is etched by the plasma through the plurality of openings OP1. The bottom of each contact hole SCH reaches the etching stop layer ES1.

[0033] 7 , in the process ST1, during a period PG, a source high frequency power SP for generating plasma and an electric bias EB supplied to the substrate support 11 are supplied. The electric bias EB attracts ions in the plasma to the substrate W. The electric bias EB may be high frequency power or a DC voltage such as a DC voltage pulse. The source high frequency power SP and the electric bias EB may be supplied by a power supply 30 of the plasma processing apparatus 1.

[0034] In the following, the level of the electric bias EB may be referred to. When the electric bias EB is bias RF power, the level of the electric bias EB is the power level of the bias RF power. When the electric bias EB includes a voltage pulse, the level of the electric bias EB is the absolute value of the negative voltage level of the voltage pulse. The level of the source RF power SP is the power level of the source RF power.

[0035] In step ST1, the source high frequency power SP has a level LVa. The level LVa may be greater than 0 W and less than 1000 W. The electric bias EB has a level LVb. The level LVb may be the same as or different from the level LVa. The level LVb may be greater than 0 W and less than 2000 W.

[0036] The duration of step ST1 may be longer than the duration of step ST8 (described later). The duration of step ST1 may be 10 seconds or more.

[0037] (Step ST2) Step ST2 is a transition step from step ST1 to the subsequent steps ST3 and ST4. A third process gas is supplied into the plasma processing chamber 10, and the substrate W is processed with a third plasma generated from the third process gas. The substrate W may be etched by the third plasma. The third process gas in step ST2 may be the same as or different from the third process gas in step ST3, which will be described later. In steps ST3 and ST4, contact holes CH2 to CH4 are formed as shown in FIG. 6. The contact holes CH2 to CH4 are examples of recesses. The bottoms of the contact holes CH2 to CH4 reach the etching stop layers ES2 to ES4, respectively. The depths of the contact holes CH2 to CH4 are deeper than the depth of the contact hole SCH. The depths of the contact holes CH2 to CH4 increase in this order.

[0038] In step ST2, as shown in FIG. 7 , a source high frequency power SP and an electric bias EB are supplied during a period PH. In step ST2, the source high frequency power SP has a level LV1 (first level). The level LV1 may be greater than the level LVa. The level LV1 may be greater than 500 W and less than 2000 W. The electric bias EB has a level LV4 (fourth level). The level LV4 may be greater than the level LVb or may be three times or more greater than the level LVb. The level LV4 may be greater than the level LV1. The level LV4 may be greater than 2000 W.

[0039] The duration of step ST2 may be shorter than the duration of step ST4 (described later), and may be 5 seconds or less.

[0040] (Step ST3) In step ST3, a third process gas is supplied into the plasma processing chamber 10, and the substrate W is processed with a third plasma generated from the third process gas. The substrate W may be etched with the third plasma. The third process gas may include a fluorine-containing gas. An example of the fluorine-containing gas includes a fluorocarbon gas. The process conditions for step ST3 are different from those for step ST2. The silicon oxide film SF may be etched with the third plasma through the openings OP2 to OP4. This may form a plurality of recesses in the silicon oxide film SF. At the end of step ST3, the bottom of at least one of the plurality of recesses does not reach the etching stop layers ES2 to ES4.

[0041] In step ST3, as shown in FIG. 7 , source high frequency power SP and electric bias EB are supplied during period PC. In step ST3, the source high frequency power SP has a level LV1. The level LV1 of the source high frequency power SP in step ST3 may be the same as or different from the level LV1 of the source high frequency power SP in step ST2. The electric bias EB has a level LV4. The level LV4 of the electric bias EB in step ST3 may be the same as or different from the level LV4 of the electric bias EB in step ST2.

[0042] The duration of step ST3 may be longer than the duration of step ST8 (described later). The duration of step ST3 may be 60 seconds or more.

[0043] (Step ST4) In step ST4, a first process gas is supplied into the plasma processing chamber 10, and the substrate W is processed with a first plasma generated from the first process gas. The process conditions for step ST4 are different from those for step ST3. Examples of the process conditions include the pressure in the plasma processing chamber 10, the type of gas contained in the process gas, and the flow rate of the gas contained in the process gas. The substrate W may be etched by the first plasma. The first process gas may be the same as or different from the third process gas. The first process gas may include a fluorine-containing gas. The silicon oxide film SF may be etched by the first plasma through the openings OP2 to OP4. This may form contact holes CH2 to CH4 that reach the etching stop layers ES2 to ES4.

[0044] In step ST4, as shown in FIG. 7 , source high frequency power SP and electric bias EB are supplied during period PA. In step ST4, the source high frequency power SP has a level LV1. The level LV1 of the source high frequency power SP in step ST4 may be the same as or different from the level LV1 of the source high frequency power SP in step ST3. The electric bias EB has a level LV4. The level LV4 of the electric bias EB in step ST4 may be the same as or different from the level LV4 of the electric bias EB in step ST3.

[0045] The duration of step ST4 may be longer than the duration of step ST3. The duration of step ST4 may be 120 seconds or more.

[0046] (Step ST5) In step ST5, a fourth process gas is supplied into the plasma processing chamber 10, and a fourth plasma is generated from the fourth process gas. The fourth process gas used in step ST5 may be the same as the first process gas used in step ST4. In this case, the fourth plasma generated in step ST5 is the same as the first plasma generated in step ST4.

[0047] In step ST5, as shown in FIG. 7 , a source high frequency power SP and an electric bias EB are supplied during a period PD1 included in the period PD. In step ST5, the source high frequency power SP has a level LV3 (third level). The level LV3 may be greater than 0 W and less than the level LV1 or less than the level LVa. The electric bias EB has a level LV5 (fifth level). The level LV5 may be greater than 0 W and less than the level LV4 or less than the level LVb. By reducing the levels LV3 and LV5, the progress of etching in step ST5 can be suppressed.

[0048] The duration of step ST5 may be shorter than the duration of step ST4, and may be 5 seconds or less.

[0049] (Step ST6) In step ST6, a fourth process gas is supplied into the plasma processing chamber 10, and a fourth plasma is generated from the fourth process gas. The fourth process gas used in step ST6 may be the same as the second process gas used in step ST7 or step ST8 described below. In this case, the fourth plasma generated in step ST6 is the same as the fifth plasma generated in step ST7 or the first plasma generated in step ST8.

[0050] In step ST6, as shown in FIG. 7 , a source high frequency power SP and an electric bias EB are supplied during a period PD2 included in the period PD. In step ST6, the source high frequency power SP has a level LV3. The level LV3 of the source high frequency power SP in step ST6 may be the same as or different from the level LV3 of the source high frequency power SP in step ST5. The electric bias EB has a level LV5. The level LV5 of the electric bias EB in step ST6 may be the same as or different from the level LV5 of the electric bias EB in step ST5.

[0051] The duration of step ST6 may be shorter than the duration of step ST4, and may be 5 seconds or less.

[0052] (Step ST7) In step ST7, a fifth process gas is supplied into the plasma processing chamber 10, and a fifth plasma is generated from the fifth process gas. The fifth process gas may be the same as the second process gas used in step ST8, which will be described later. In this case, the fifth plasma is the same as the first plasma generated in step ST8.

[0053] In process ST7, as shown in FIG. 7 , source high frequency power SP is supplied during period PE. In process ST7, no electrical bias is supplied to the substrate support 11. In process ST7, the source high frequency power SP monotonically increases from level LV3 to level LV2 (second level). Level LV2 is greater than level LV3. Level LV2 may be less than level LV1 or less than level LVa.

[0054] The duration of step ST7 may be shorter than the duration of step ST4, and may be 5 seconds or less.

[0055] (Step ST8) In step ST8, a second process gas is supplied into the plasma processing chamber 10 to generate a second plasma from the second process gas. The second process gas includes an inert gas. Examples of the inert gas include noble gases and nitrogen (N ２) gas. An example of a noble gas includes argon (Ar) gas. The second process gas may not include an etching gas, such as a fluorine-containing gas. The second process gas may include only an inert gas.

[0056] 7, in step ST8, source high frequency power SP is supplied during period PB. In step ST8, no electrical bias is supplied to the substrate support 11. In step ST8, the source high frequency power SP has a level LV2.

[0057] The duration of step ST8 may be shorter than the duration of step ST4, and may be 5 seconds or less.

[0058] (Step ST9) In step ST9, the substrate W is separated from the substrate support 11. In step ST9, the substrate W is lifted by lift pins or the like, and then separated from the substrate support 11 by the robot arm. Thereafter, the substrate W is transported out of the plasma processing chamber 10.

[0059] 7, in the process ST9, the source RF power is not supplied during the period PF. In the process ST9, the electric bias is not supplied to the substrate support 11. In the process ST9, the processing gas is not supplied into the plasma processing chamber 10. In the process ST9, the plasma is not generated.

[0060] In method MT1, as shown in FIG. 7 , source high frequency power SP is continuously supplied from step ST1 to step ST8. That is, source high frequency power SP is in an ON state from step ST1 to step ST8. At the end of step ST8, the supply of source high frequency power SP is stopped. Furthermore, in method MT1, electric bias EB is continuously supplied from step ST1 to step ST6. That is, electric bias EB is in an ON state from step ST1 to step ST6. At the end of step ST6, the supply of electric bias EB is stopped.

[0061] According to the method MT1, the source high frequency power SP is continuously supplied from step ST1 to step ST8. Therefore, the reflected power generated when the source high frequency power SP is stopped is reduced. Therefore, stable plasma can be generated in steps ST1 to ST8. For example, stable plasma can be generated between step ST1 and step ST2. Furthermore, when the electric bias EB is continuously supplied from step ST1 to step ST6, the reflected power generated when the electric bias EB is stopped is reduced. Therefore, stable plasma can be generated in steps ST1 to ST6. The generation of stable plasma is expected to reduce damage to the substrate W. For example, by reducing damage to the exposed etching stop layers ES2 to ES4, deterioration of the electrical properties of the etching stop layers ES2 to ES4 can be suppressed.

[0062] Various experiments performed to evaluate Method MT1 are described below, but the experiments described below are not intended to limit the present disclosure.

[0063] (First Experiment) First, the substrate W shown in FIG. 4 was provided on the substrate support 11 in the plasma processing chamber 10. Then, the method MT1 was applied to the substrate W. The silicon oxide film SF was etched to form a shallow contact hole SCH in the silicon oxide film SF, as shown in FIG. 5 (step ST1).

[0064] 8 is a graph showing an example of changes over time in the source high frequency power SP and the electric bias EB in the first experiment. In this example, the period from 0 to 80 seconds in FIG. 8 corresponds to step ST1. In step ST1, as shown in FIG. 8, the level LVa of the source high frequency power SP was changed between 0 W and 750 W. The level LVb of the electric bias EB was changed between 0 W and 1500 W.

[0065] Next, an etching gas (third process gas) was supplied into the plasma processing chamber 10, and the substrate W was etched by the third plasma generated from the etching gas (steps ST2 and ST3). In steps ST2 and ST3, the level LV1 of the source high frequency power SP was 1000 W. The level LV4 of the electric bias EB was 4500 W.

[0066] Next, an etching gas (first processing gas) was supplied into the plasma processing chamber 10, and the substrate W was etched by a first plasma generated from the etching gas (step ST4). In step ST4, the level LV1 of the source high frequency power SP was 1000 W. The level LV4 of the electric bias EB was 4500 W. The process conditions for step ST4 (the pressure in the plasma processing chamber 10, the type and flow rate of the etching gas) were different from those for step ST3. By etching the silicon oxide film SF in steps ST3 and ST4, contact holes CH1 to CH4 were formed in the silicon oxide film SF, as shown in FIG. 6 .

[0067] Next, the same etching gas (fourth processing gas) as the etching gas in step ST4 was supplied into the plasma processing chamber 10, and a fourth plasma was generated from the etching gas (step ST5). In step ST5, the level LV3 of the source high frequency power SP was 200 W. The level LV5 of the electrical bias EB was 50 W.

[0068] Next, argon gas (fourth process gas) was supplied into the plasma processing chamber 10 to generate a fourth plasma from the argon gas (step ST6). In step ST6, the level LV3 of the source high frequency power SP was 200 W. The level LV5 of the electric bias EB was 50 W.

[0069] Next, argon gas (fifth process gas) was supplied into the plasma processing chamber 10 to generate a fifth plasma from the argon gas (step ST7). In step ST7, the level of the source high frequency power SP was monotonically increased from 200 W to 450 W. The level of the electrical bias EB was 0 W.

[0070] Next, argon gas (second process gas) was supplied into the plasma processing chamber 10 to generate a second plasma from the argon gas (step ST8). In step ST8, the level LV2 of the source high frequency power SP was 450 W. The level of the electrical bias EB was 0 W.

[0071] Next, the substrate W was separated from the substrate support 11 (step ST9). In step ST9, the level of the source high frequency power SP was 0 W. The level of the electric bias EB was 0 W.

[0072] (Second Experiment) The substrate W was processed in the same manner as in the first experiment, except for the following points: In step ST2, the level of the source high frequency power SP and the level of the electric bias EB were set to 0 W; Between steps ST3 and ST4, the level of the source high frequency power SP and the level of the electric bias EB were set to 0 W; In steps ST5 to ST7, the level of the source high frequency power SP and the level of the electric bias EB were set to 0 W. Figure 9 is a graph showing an example of the changes over time of the source high frequency power SP and the electric bias EB in the second experiment.

[0073] (Evaluation of Reflected Power) In the first and second experiments, the reflected power of the source high frequency power SP and the reflected power of the electric bias EB were measured. Fig. 10 is a graph showing an example of the change in the reflected power over time in the first experiment. Fig. 11 is a graph showing an example of the change in the reflected power over time in the second experiment.

[0074] As shown in Fig. 10, the reflected power RSP of the source high frequency power SP and the reflected power REB of the electric bias EB were relatively small in regions R1 to R3. On the other hand, as shown in Fig. 11, the reflected power RSP of the source high frequency power SP and the reflected power REB of the electric bias EB were relatively large in regions R4 to R6. This shows that the reflected power can be reduced by continuously supplying the source high frequency power SP and the electric bias EB.

[0075] Although various exemplary embodiments have been described above, the present invention is not limited to the above-described exemplary embodiments, and various additions, omissions, substitutions, and modifications may be made. Furthermore, elements in different embodiments may be combined to form other embodiments.

[0076] Various exemplary embodiments included in the present disclosure will now be described below.

[0077] [E1] A method for manufacturing a substrate processing apparatus, comprising: a chamber; a substrate support for supporting a substrate in the chamber; a gas supply configured to supply a first process gas and a second process gas into the chamber, the second process gas including an inert gas; a plasma generation unit configured to generate a first plasma and a second plasma from the first process gas and the second process gas in the chamber, respectively; a bias power supply configured to supply an electric bias to the substrate support; and a controller, wherein the controller is configured to control the gas supply unit, the plasma generation unit, and the bias power supply to perform a substrate processing method, the substrate processing method comprising: (a) supplying the first process gas into the chamber and processing the substrate with the first plasma; and (b) supplying the second process gas into the chamber and generating the second plasma, wherein a source high frequency power for generating the first plasma and the second plasma is continuously supplied from (a) to (b), The substrate processing apparatus, wherein the electric bias is supplied to the substrate support part in (a), and the electric bias is not supplied to the substrate support part in (b).

[0078] [E2] The substrate processing apparatus according to [E1], wherein the gas supply unit is further configured to supply a third process gas into the chamber, and the plasma generation unit is further configured to generate a third plasma from the third process gas in the chamber, and the substrate processing method further includes the step of (c) before (a), supplying the third process gas into the chamber under process conditions different from those of (a) to process the substrate with the third plasma, and the third plasma is generated by the source high frequency power, and the source high frequency power is continuously supplied from (c) to (a).

[0079] [E3] The substrate processing apparatus according to [E2], wherein the electric bias is supplied to the substrate support part in (c), and the electric bias is supplied continuously from (c) to (a).

[0080] [E4] The substrate processing apparatus according to any one of [E1] to [E3], wherein the source high frequency power has a first level in (a) and a second level in (b), the second level being lower than the first level.

[0081] [E5] The substrate processing apparatus according to [E4], wherein the gas supply unit is further configured to supply a fourth process gas into the chamber, and the plasma generation unit is further configured to generate a fourth plasma from the fourth process gas in the chamber, and the substrate processing method further includes the step of: (d) before steps (a) and (b), supplying the fourth process gas into the chamber to generate the fourth plasma, and the fourth plasma is generated by the source high frequency power, and the source high frequency power has a third level in step (d), the third level being lower than the first level.

[0082] [E6] The substrate processing apparatus according to [E5], wherein the third level is lower than the second level.

[0083] [E7] The substrate processing apparatus according to [E6], wherein the gas supply unit is further configured to supply a fifth process gas into the chamber, and the plasma generation unit is further configured to generate a fifth plasma from the fifth process gas in the chamber, and the substrate processing method further includes, before steps (d) and (b), a step of supplying the fifth process gas into the chamber to generate the fifth plasma, and the fifth plasma is generated by the source high frequency power, and the source high frequency power monotonically increases from the third level to the second level in step (e).

[0084] [E8] The substrate processing apparatus according to any one of [E5] to [E7], wherein the electric bias is supplied to the substrate support part in (d), and the electric bias has a fourth level in (a) and a fifth level in (d), the fifth level being lower than the fourth level.

[0085] [E9] The substrate processing apparatus according to any one of [E5] to [E8], wherein the step (d) includes the step (d1) in which the fourth process gas is the same as the first process gas.

[0086] [E10] The substrate processing apparatus according to any one of [E5] to [E9], wherein the step (d) includes the step (d2) in which the fourth process gas is the same as the second process gas.

[0087] [E11] The substrate processing apparatus according to any one of [E1] to [E10], further comprising: (f) after (b), separating the substrate from the substrate support.

[0088] [E12] The substrate processing apparatus according to any one of [E1] to [E11], wherein in (a), the substrate is etched by the first plasma.

[0089] [E13] The substrate processing apparatus according to [E12], wherein the substrate comprises a silicon oxide film and a plurality of etching stop layers disposed within the silicon oxide film, and the positions of the plurality of etching stop layers in a thickness direction of the silicon oxide film are different from each other.

[0090] [E14] The substrate processing apparatus according to [E13], wherein in (a), the silicon oxide film is etched to form a plurality of recesses in the silicon oxide film, each of which reaches the plurality of etching stop layers.

[0091] [E15] The substrate processing apparatus according to [E13] or [E14], wherein each of the plurality of etching stop layers contains polysilicon.

[0092] [E16] A substrate processing method comprising the steps of: (a) supplying a first process gas into a chamber and processing a substrate with a first plasma generated from the first process gas; and (b) supplying a second process gas containing an inert gas into the chamber and generating a second plasma from the second process gas, wherein a source high frequency power for generating the first plasma and the second plasma is continuously supplied from (a) to (b), and an electric bias is supplied to a substrate support part for supporting the substrate in (a), and no electric bias is supplied to the substrate support part in (b).

[0093] 1...plasma processing apparatus (substrate processing apparatus), 2...control section, 10...plasma processing chamber, 11...substrate support section, 12...plasma generation section, 20...gas supply section, 30...power supply (bias power supply), EB...electrical bias, SP...source high frequency power, W...substrate

Claims

1. A device comprising: a chamber; a substrate support for supporting a substrate within the chamber; a gas supply configured to supply a first process gas and a second process gas into the chamber, the second process gas including an inert gas; a plasma generation unit configured to generate a first plasma and a second plasma from the first process gas and the second process gas within the chamber, respectively; a bias power supply configured to supply an electric bias to the substrate support; and a controller, wherein the controller is configured to control the gas supply unit, the plasma generation unit, and the bias power supply to perform a substrate processing method, the substrate processing method comprising: (a) supplying the first process gas into the chamber and processing the substrate with the first plasma; and (b) supplying the second process gas into the chamber and generating the second plasma, wherein a source high frequency power for generating the first plasma and the second plasma is continuously supplied from (a) to (b), The substrate processing apparatus, wherein the electric bias is supplied to the substrate support part in (a), and the electric bias is not supplied to the substrate support part in (b).

2. The substrate processing apparatus of claim 1, wherein the gas supply unit is further configured to supply a third process gas into the chamber, and the plasma generation unit is further configured to generate a third plasma from the third process gas in the chamber, and the substrate processing method further includes: (c) before (a), supplying the third process gas into the chamber under process conditions different from those in (a) to process the substrate with the third plasma, and the third plasma is generated by the source high frequency power, and the source high frequency power is continuously supplied from (c) to (a).

3. The substrate processing apparatus according to claim 2, wherein the electric bias is supplied to the substrate support part in (c), and the electric bias is supplied continuously from (c) to (a).

4. A substrate processing apparatus according to any one of claims 1 to 3, wherein the source high frequency power has a first level in (a) and a second level in (b), the second level being less than the first level.

5. The substrate processing apparatus of claim 4, wherein the gas supply unit is further configured to supply a fourth process gas into the chamber, and the plasma generation unit is further configured to generate a fourth plasma from the fourth process gas in the chamber, and the substrate processing method further includes: (d) before (a) and (b), supplying the fourth process gas into the chamber to generate the fourth plasma, and the fourth plasma is generated by the source high frequency power, and the source high frequency power has a third level in (d), the third level being lower than the first level.

6. The substrate processing apparatus of claim 5, wherein the third level is lower than the second level.

7. The substrate processing apparatus of claim 6, wherein the gas supply unit is further configured to supply a fifth process gas into the chamber, and the plasma generation unit is further configured to generate a fifth plasma from the fifth process gas in the chamber, and the substrate processing method further comprises: (e) before (d) and (b), supplying the fifth process gas into the chamber to generate the fifth plasma, and the fifth plasma is generated by the source high frequency power, and the source high frequency power monotonically increases from the third level to the second level in (e).

8. The substrate processing apparatus of claim 5, wherein the electrical bias is supplied to the substrate support in (d), and the electrical bias has a fourth level in (a) and a fifth level in (d), the fifth level being less than the fourth level.

9. The substrate processing apparatus according to claim 5, wherein the step (d) includes the step (d1) in which the fourth process gas is the same as the first process gas.

10. The substrate processing apparatus according to claim 5, wherein the step (d) includes the step (d2) in which the fourth process gas is the same as the second process gas.

11. The substrate processing apparatus according to any one of claims 1 to 3, wherein the substrate processing method further comprises: (f) after (b), a step of separating the substrate from the substrate support.

12. The substrate processing apparatus according to any one of claims 1 to 3, wherein in (a), the substrate is etched by the first plasma.

13. The substrate processing apparatus according to claim 12, wherein the substrate comprises a silicon oxide film and a plurality of etching stop layers disposed in the silicon oxide film, and the positions of the etching stop layers in the thickness direction of the silicon oxide film are different from one another.

14. The substrate processing apparatus according to claim 13, wherein in step (a), a plurality of recesses reaching the plurality of etching stop layers are formed in the silicon oxide film by etching the silicon oxide film.

15. The substrate processing apparatus of claim 13, wherein each of the plurality of etch stop layers comprises polysilicon.

16. A substrate processing method comprising the steps of: (a) supplying a first process gas into a chamber and processing a substrate with a first plasma generated from the first process gas; and (b) supplying a second process gas containing an inert gas into the chamber and generating a second plasma from the second process gas, wherein source high frequency power for generating the first plasma and the second plasma is continuously supplied from (a) to (b), and an electric bias is supplied to a substrate support part for supporting the substrate in (a), and no electric bias is supplied to the substrate support part in (b).

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