Imaging element and imaging device

Abstract

This imaging element comprises: a first photoelectric conversion unit which converts light into electrical charge; a second photoelectric conversion unit which converts light into electrical charge; and a storage unit which stores first information relating to the number of times the accumulated amount of charge converted by the first photoelectric conversion unit exceeded a threshold value, and second information relating to the number of times the accumulated amount of charge converted by the second photoelectric conversion unit exceeded a threshold value.

Description

Image pickup element and image pickup device

[0001] This application claims priority to Japanese Patent Application No. 2024-072185, filed April 26, 2024, the contents of which are incorporated herein by reference.

[0002] An image sensor including a plurality of photoelectric conversion elements is known (see, for example, Japanese Patent Application Laid-Open No. 2003-121999). Conventionally, there has been a problem in that the circuit scale of the image sensor becomes large.

[0003] JP 2013-34179 A

[0004] One aspect of the present invention is an imaging element comprising a first photoelectric conversion unit that converts light into electric charges, a second photoelectric conversion unit that converts light into electric charges, and a memory unit that stores first information regarding the number of times that the accumulated amount of electric charges converted by the first photoelectric conversion unit has exceeded a threshold value, and second information regarding the number of times that the accumulated amount of electric charges converted by the second photoelectric conversion unit has exceeded a threshold value.

[0005] One aspect of the present invention is an imaging device including the imaging element described above.

[0006] FIG. 1 is a diagram illustrating an example of the structure of an imaging element according to an embodiment; FIG. 2 is a diagram illustrating an example of the arrangement of photoelectric conversion elements and microlenses according to an embodiment; FIG. 3 is a diagram illustrating an example of the configuration of an imaging element according to a first embodiment; FIG. 4 is a diagram illustrating an example of the circuit configuration of a comparator, etc. according to the first embodiment; FIG. 5 is a diagram illustrating a modified example of the circuit configuration of a comparator, etc. according to the first embodiment; FIG. 6 is a timing chart of the operation of each part of the imaging element according to the first embodiment; FIG. 7 is a diagram illustrating an example of the configuration of an imaging element according to a second embodiment; FIG. 8 is a diagram illustrating an example of the configuration of an imaging element of a modified example according to the second embodiment; and FIG. 9 is a diagram illustrating an example of the configuration of an imaging device according to an embodiment.

[0007] Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the drawings used in the following description, the scale of each component is appropriately changed so that each component can be recognized.

[0008] (Structural Example of Image Sensor) Next, a structural example of an image sensor 1 according to an embodiment will be described. FIG. 1 is a diagram illustrating a structural example of an image sensor according to an embodiment. As illustrated in FIG. 1, the image sensor 1 includes a first semiconductor substrate 11 and a second semiconductor substrate 12. The first semiconductor substrate 11 is stacked on the second semiconductor substrate 12. The first semiconductor substrate 11 includes a pixel array section 13. The pixel array section 13 includes a plurality of pixels arranged in rows and columns. Each pixel arranged in the pixel array section 13 is also referred to as a unit pixel 21. The unit pixel 21 includes a photoelectric conversion section that converts light into electric charges. The second semiconductor substrate 12 includes a readout section 22 provided for each unit pixel 21, and a peripheral circuit section 23. The readout section 22 includes a control circuit for controlling the unit pixels 21 and an AD conversion section (analog-to-digital conversion section) for converting pixel signals output from the unit pixels 21 into digital signals. The peripheral circuit section 23 includes a data bus to which signals read from the unit pixels 21 by the readout section 22 are output.

[0009] (Example of Arrangement of Photoelectric Conversion Elements) Next, an example of the arrangement of photoelectric conversion elements will be described. FIG. 2 is a diagram showing an example of the arrangement of photoelectric conversion elements and microlenses according to an embodiment. [A] in the same figure shows an example of the arrangement of photoelectric conversion elements and microlenses in a region g20, which is a part of the pixel array section 13. [B] in the same figure shows an example of the arrangement of photoelectric conversion elements and microlenses focusing on a region of one unit pixel 21 (i.e., region g10) within the region g20. The unit pixel 21 includes a plurality of photoelectric conversion elements (e.g., a first photoelectric conversion unit PD-1 and a second photoelectric conversion unit PD-2) and a plurality of microlenses (e.g., a first microlens 71 and a second microlens 72). As shown in [A] in the same figure, the first photoelectric conversion unit PD-1 and the second photoelectric conversion unit PD-2 are arranged side by side in the row direction and the column direction of the pixel array section 13. As shown in Fig. 1B, the center position of the first photoelectric conversion unit PD-1 is arranged to coincide with the center position of the first microlens 71. The center position of the second photoelectric conversion unit PD-2 is arranged to coincide with the center position of the second microlens 72. In the following description, of the unit pixel 21, a portion including the first photoelectric conversion unit PD-1 and the first microlens 71 will also be referred to as a first portion 211, and a portion including the second photoelectric conversion unit PD-2 and the second microlens 72 will also be referred to as a second portion 212.

[0010] The multiple photoelectric conversion units included in the unit pixel 21 are designed so that their areas (light-receiving areas) and saturation electron counts are equal to each other. For example, the first photoelectric conversion unit PD-1 and the second photoelectric conversion unit PD-2 have the same areas and the same saturation electron counts. That is, the first photoelectric conversion unit PD-1 and the second photoelectric conversion unit PD-2 have the same saturation electron counts. The multiple microlenses included in the unit pixel 21 are designed so that their sizes (e.g., radii) are different from each other. For example, the first microlens 71 and the second microlens 72 have different sizes. As a result, the sensitivity of the first photoelectric conversion unit PD-1 is m (m is an integer greater than or equal to 2) times the sensitivity of the second photoelectric conversion unit PD-2. Note that the configuration and arrangement shown in FIG. 2 are merely examples and are not limited thereto. For example, the areas of the first photoelectric conversion unit PD-1 and the second photoelectric conversion unit PD-2 may be designed to be different from each other.

[0011] 3 is a diagram showing an example of the configuration of an image sensor according to this embodiment. As shown in Fig. 3, the image sensor 1 includes a first photoelectric conversion unit PD-1, a first transfer transistor Tx-1, a first floating diffusion FD-1, switches SW1 to SW4, capacitors C2 and C3, a switch RST1, a switch FDTST1, a first comparator COMP-1, a second photoelectric conversion unit PD-2, a second transfer transistor Tx-2, a second floating diffusion FD-2, switches SW5 to SW8, capacitors C4 to C6, a switch RST2, a switch FDTST2, a second comparator COMP-2, a control circuit 2, a storage unit 3, a switching control circuit 4, and a signal line 5.

[0012] Note that, for example, the first photoelectric conversion unit PD-1, the first transfer transistor Tx-1, the first floating diffusion FD-1, the capacitor C1, a part of the first comparator COMP-1, the second photoelectric conversion unit PD-2, the second transfer transistor Tx-2, the second floating diffusion FD-2, the capacitor C4, and a part of the second comparator COMP-2 are arranged on the first semiconductor substrate 11. The second semiconductor substrate 12 is arranged with the other components of the above-mentioned components excluding the components arranged on the first semiconductor substrate 11.

[0013] The switching control circuit 4 may be provided in the imaging element 1, or in the imaging device 10 that includes the imaging element 1. In this case, the imaging device 10 includes, for example, the imaging element 1 and the switching control circuit 4. The imaging device 10 also includes an optical system, a power supply, a drive unit for the optical system, an image processing unit, an operation unit, an image display unit, a control unit, a storage unit, etc. An example configuration of the imaging device 10 will be described later.

[0014] The first photoelectric conversion unit PD-1 is a first photoelectric conversion unit that converts light into electric charges. In this embodiment, the sensitivity of the first photoelectric conversion unit PD-1 is referred to as the first sensitivity. The second photoelectric conversion unit PD-2 is a second photoelectric conversion unit that converts light into electric charges. In this embodiment, the sensitivity of the second photoelectric conversion unit PD-2 is referred to as the second sensitivity. The second sensitivity is, for example, smaller than the first sensitivity, for example, 1 / m (m is an integer greater than or equal to 2).

[0015] The first transfer transistor Tx-1 is a first transfer unit that transfers the charge obtained by the first photoelectric conversion unit PD-1 to the first floating diffusion FD-1. The second transfer transistor Tx-2 is a second transfer unit that transfers the charge obtained by the second photoelectric conversion unit PD-2 to the second floating diffusion FD-2.

[0016] The first floating diffusion FD-1 receives the charges converted by the first photoelectric conversion unit PD-1. The first floating diffusion FD-1 is a first accumulation unit that accumulates the charges converted by the first photoelectric conversion unit PD-1. The second floating diffusion FD-2 receives the charges converted by the second photoelectric conversion unit PD-2. The second floating diffusion FD-2 is a second accumulation unit that accumulates the charges converted by the second photoelectric conversion unit PD-2. The capacitances of the first floating diffusion FD-1 and the second floating diffusion FD-2 are, for example, the same.

[0017] The first portion 211 of the unit pixel 21 and the readout unit 22 corresponding to the unit pixel 21 will now be described. The first comparator COMP-1 is a first conversion unit (AD conversion unit) that converts an analog signal into a digital signal. The first comparator COMP-1 converts a first signal based on the charge of the first photoelectric conversion unit PD-1 into a digital signal and outputs the digital signal in response to control by the control circuit 2 and the switching control circuit 4. The first comparator COMP-1 outputs, for example, a high-level signal (first signal) when the charge (amount of accumulated charge) stored in the first floating diffusion FD-1 exceeds a threshold in response to control by the control circuit 2 and the switching control circuit 4.

[0018] The switch SW4 (first switch) has one end connected to the output of the first comparator COMP-1 and the other end connected to the other end of the switch SW8 and the input end of the control circuit, and the control terminal is switched by the switching control circuit 4.

[0019] The second portion 212 of the unit pixel 21 and the readout unit 22 corresponding to the unit pixel 21 will now be described. The second comparator COMP-2 is a second conversion unit (AD conversion unit) that converts an analog signal into a digital signal. The second comparator COMP-2 converts a second signal based on the charge of the second photoelectric conversion unit PD-2 into a digital signal and outputs the digital signal in response to control by the control circuit 2 and the switching control circuit 4. The second comparator COMP-2 outputs, for example, a high-level signal (second signal) when the charge (amount of accumulated charge) stored in the second floating diffusion FD-2 exceeds a threshold in response to control by the control circuit 2 and the switching control circuit 4.

[0020] The switch SW8 (second switch) has one end connected to the output of the second comparator COMP-2 and the other end connected to the other end of the switch SW4 and the input end of the control circuit, and the control terminal is switched by the switching control circuit 4.

[0021] The following describes a common portion 213 of the unit pixel 21 and the readout unit 22 corresponding to the unit pixel 21. The control circuit 2 stores in the memory unit 3 either a first signal based on the charge of the first photoelectric conversion unit PD-1 or a second signal based on the charge of the second photoelectric conversion unit PD-2.

[0022] The memory unit 3 stores either a first signal based on the charge of the first photoelectric conversion unit PD-1 or a second signal based on the charge of the second photoelectric conversion unit PD-2 in accordance with the control of the control circuit 2. The memory unit 3 includes a counter, which counts the number of times the charge (accumulated amount of charge) accumulated in the first floating diffusion FD-1 exceeds a threshold, counts the number of times the charge (accumulated amount of charge) accumulated in the second floating diffusion FD-2 exceeds a threshold, and outputs information indicating the counted value to the switching control circuit 4.

[0023] When the count value output by the storage unit 3 exceeds a predetermined value, the switching control circuit 4 switches the switches SW4, SW8, etc. to switch the photoelectric conversion unit PD to be read.

[0024] The signal line 5 outputs either the first signal or the second signal stored in the storage unit 3 .

[0025] As shown in FIG. 3, in the image sensor 1 of this embodiment, the control circuit 2 and the storage unit 3 are shared between the first portion 211 and the second portion 212 of each pixel 21 .

[0026] (Configuration Example of Comparator COMP Circuit) Here, an example of the circuit configuration of the comparator COMP and the like in the circuit configuration of FIG. 3 will be described. FIG. 4 is a diagram showing an example of the circuit configuration of the comparator and the like according to this embodiment. As shown in FIG. 4, the first comparator COMP-1 includes a first common-source amplifier circuit SR-1 and a first load resistor CR-1. The second comparator COMP-2 includes a second common-source amplifier circuit SR-2 and a second load resistor CR-2. The first common-source amplifier circuit SR-1 and the second common-source amplifier circuit SR-2 are fabricated, for example, with NMOS and disposed on the second semiconductor substrate 12. The first load resistor CR-1 and the second load resistor CR-2 are fabricated, for example, with PMOS and disposed on the first semiconductor substrate 11. Note that the configuration shown in FIG. 4 is merely an example and is not limiting. As such, the configuration of FIG. 4 includes a common-source amplifier circuit and a load resistor for each combination of a photoelectric conversion unit PD and a floating diffusion FD.

[0027] (Modification of the Comparator COMP Circuit) Next, a modification of the comparator circuit shown in FIG. 4 will be described. FIG. 5 is a diagram showing a modification of the circuit configuration of the comparator COMP and the like according to this embodiment. As shown in FIG. 5, the first comparator COMP-1A provided in the image sensor 1A includes a first source-grounded amplifier circuit SR-1. The second comparator COMP-2 includes a second source-grounded amplifier circuit SR-2 and a second load resistor CR-2. Note that the configuration shown in FIG. 5 is merely an example and is not limiting. In this configuration, the PMOS load resistor is shared by the photoelectric conversion unit PD and the floating diffusion FD. This configuration allows for fewer circuits to be arranged on the second semiconductor substrate 12 compared to the configuration of FIG. 4.

[0028] (Processing Timing) Next, an example of processing timing will be described. Fig. 6 is a timing chart of the operation of each part of the image sensor according to this embodiment. In Fig. 6, the horizontal axis represents time, and the vertical axis represents potential, or the output level (high level or low level) of the comparator.

[0029] As indicated by symbols g11 to g14 in FIG. 6 , the first comparator COMP-1 outputs a high level each time the potential of the first floating diffusion FD-1, which is based on the amount of charge accumulated in the highly sensitive first floating diffusion FD-1, exceeds a threshold. When the threshold is exceeded, the control circuit 2 turns on switch RST1 or RST2 to reset the first comparator COMP-1. The storage unit 3 counts the number of high-level outputs from the first comparator COMP-1. At time t11, when the count value exceeds a predetermined value (9 in FIG. 6 ), as indicated by symbol g16, the switching control circuit 4 switches the readout path to the second photoelectric conversion unit PD-2. As indicated in FIG. 6 , no readout from the second photoelectric conversion unit PD-2 is performed on the second floating diffusion FD-2 until time t11, when the switchover occurs. For example, if the sensitivity ratio between the first photoelectric conversion unit PD-1 and the second photoelectric conversion unit PD-2 is 10:1, it is necessary to set a threshold value such that the number of times the accumulation in the first floating diffusion FD-1 overflows is less than 10. For this reason, the image sensor 1 may be configured, for example, so that when the number of times the accumulation in the first floating diffusion FD-1 overflows exceeds 8, the readout path is switched to the circuit connected to the second photoelectric conversion unit PD-2. In this way, the threshold value for the count value may be set based on the saturation electron number of the photoelectric conversion unit and the capacitance of the first floating diffusion FD-1 and the second floating diffusion FD-2.

[0030] Note that, during the period up to time t11, the second photoelectric conversion unit PD-2 also receives light, and therefore charge accumulates in the second floating diffusion FD-2, causing it to overflow in the same way as the first floating diffusion FD-1. For this reason, during the period when the first floating diffusion FD-1 is being used, a circuit (not shown) is connected that works to discard charge from the second photoelectric conversion unit PD-2 or the second floating diffusion FD-2.

[0031] After the readout path is switched, accumulation from the first photoelectric conversion unit PD-1 to the first floating diffusion FD-1 stops, and accumulation from the second photoelectric conversion unit PD-2 to the second floating diffusion FD-2 begins. Therefore, from time t11 onwards, the second comparator COMP-2 outputs a high level each time the potential of the second floating diffusion FD-2, which is based on the amount of charge accumulated in the second floating diffusion FD-2, which has a lower sensitivity than the first floating diffusion FD-1, exceeds a threshold. The storage unit 3 counts the number of high levels output by the second comparator COMP-2 while adding this to the count value of the first comparator COMP-1.

[0032] If AD conversion is started from the low-sensitivity second photoelectric conversion unit PD-2, and the charge accumulated in the low-sensitivity second floating diffusion FD-2 overflows even once, the charge will overflow and be discarded on the first photoelectric conversion unit PD-1 side (first floating diffusion FD-1) 10 or more times, making it impossible to accurately measure the amount of light. Therefore, as described with reference to Figure 6, switching from the high-sensitivity first photoelectric conversion unit PD-1 to the low-sensitivity second photoelectric conversion unit PD-2 is preferable because it improves readout efficiency. Note that, depending on the application, it may also be possible to switch from the low-sensitivity second photoelectric conversion unit PD-2 to the high-sensitivity first photoelectric conversion unit PD-1.

[0033] The image sensor 1 may capture images under the same conditions regardless of whether the image capture timing is a single shot or continuous shooting. During continuous shooting, the image sensor 1 may start AD conversion using the readout path (second photoelectric conversion unit PD-2) of the previous frame as the basic setting.

[0034] As described above, according to this embodiment, the control circuit and memory can be shared by switching the read path depending on the count value. As a result, according to this embodiment, the dynamic range can be expanded while suppressing an expansion of the circuit size. Furthermore, according to this embodiment, the number of bits of the counter can be reduced while maintaining the dynamic range, thereby reducing the circuit area.

[0035] 7 is a diagram showing an example of the configuration of an image sensor according to this embodiment. As shown in Fig. 7, the image sensor 1B includes a first photoelectric conversion unit PD-1, a first transfer transistor Tx-1, a first floating diffusion FD-1, switches SW11 to SW14, a second photoelectric conversion unit PD-2, a second transfer transistor Tx-2, a second floating diffusion FD-2, a first comparator COMP, capacitors C11 to C13, switches RST, switch FDRST, a control circuit 2, a storage unit 3, a switching control circuit 4B, and a signal line 5.

[0036] For example, the first photoelectric conversion unit PD-1, the first transfer transistor Tx-1, the first floating diffusion FD-1, the second photoelectric conversion unit PD-2, the second transfer transistor Tx-2, the second floating diffusion FD-2, the capacitor C11, the switches SW13 and SW14, and part of the comparator COMP are arranged on the first semiconductor substrate 11. Other components are arranged on the second semiconductor substrate 12.

[0037] The switching control circuit 4B may be provided in the image sensor 1B, or in the image capturing apparatus 10B that includes the image sensor 1B. In this case, the image capturing apparatus 10B includes, for example, the image sensor 1B and the switching control circuit 4B.

[0038] The difference between the image sensor 1B and the image sensor 1 of the first embodiment shown in Fig. 3 will be described. In this embodiment, the path is switched on the input side of the comparator. The timing chart for switching, etc. is the same as that shown in Fig. 6.

[0039] The switch SW11 is connected between one end of the first floating diffusion FD-1 and the input of the comparator COMP. The switch SW12 is connected between one end of the second floating diffusion FD-2 and the input of the comparator COMP. The switch SW13 is connected to one end of the first floating diffusion FD-1. The switch SW14 is connected to one end of the second floating diffusion FD-2.

[0040] When the number of times that the second floating diffusion FD-2 has accumulated and overflowed reaches a predetermined number or more, the switching control circuit 4B controls the switches SW11 and SW12 on the input side of the comparator COMP to switch the path. Note that the switches SW13 and SW14 are switches that discard the charge accumulated in the floating diffusion FD of the path that is not being used. For example, the switching control circuit 4B controls the switching of the switches SW13 and SW14, and switches the switches SW13 and SW14 to the enabled state after the switching of the switches SW11 and SW12 is completed.

[0041] As shown in FIG. 7, in the image sensor 1B, the comparator COMP (including peripheral circuits), the control circuit 2, and the storage unit 3 are shared between the first portion 211 and the second portion 212 of each pixel 21.

[0042] (Modification) Fig. 8 is a diagram showing an example of the configuration of an image sensor according to a modification of the present embodiment. The difference from the configuration in Fig. 7 is that a switch SW13 is connected to one end of the first photoelectric conversion unit PD-1, and a switch SW14 is connected to one end of the second photoelectric conversion unit PD-2. In other words, the switches SW13 and SW14 are switches that discard the charge accumulated in the photoelectric conversion unit PD of the path that is not being used.

[0043] 7 and 8 are merely examples, and the present invention is not limited to these. The image sensor 1 of the first embodiment may also be provided with a configuration similar to that of the switches SW13 and SW14 shown in FIGS.

[0044] As described above, according to this embodiment, the control circuit and the storage unit can be shared by switching the read path depending on the count value. As a result, according to this embodiment, the dynamic range can be expanded while suppressing an increase in the circuit size. Furthermore, according to this embodiment, the number of bits of the counter can be reduced while maintaining the dynamic range, thereby reducing the circuit area.

[0045] <Configuration Example of Imaging Device> Here, a configuration example of an imaging device (10, 10A, 10B, 10C) including the imaging element (1, 1A, 1B, 1C) of each embodiment will be described. FIG. 9 is a diagram showing a configuration example of an imaging device according to an embodiment. As shown in FIG. 9, the imaging device (10, 10A, 10B, 10C) includes, for example, an imaging element (1, 1A, 1B, 1C), an imaging optical system 101, an image processing unit 103, a work memory 104, an operation unit 105, a display unit 106, a control unit 107, and a storage unit 108. Note that the imaging device 10 includes the imaging element 1, the imaging device 10A includes the imaging element 1A, the imaging device 10B includes the imaging element 1B, and the imaging device 10C includes the imaging element 1C. Note that the configuration of the imaging device shown in FIG. 9 is an example and is not limited to this.

[0046] The imaging optical system 101 is composed of multiple lenses and guides a light beam from a subject field to an imaging element (1, 1A, 1B, 1C). The imaging optical system 101 may be configured integrally with the imaging device (10, 10A, 10B, 10C) or may be configured to be replaceable with respect to the imaging device (10, 10A, 10B, 10C). The imaging optical system 101 may also include a built-in focus lens or a built-in zoom lens.

[0047] The image processing unit 103 cooperates with the work memory 104 to perform image processing on image data captured by the image sensors (1, 1A, 1B, 1C).

[0048] The work memory 104 temporarily stores image data before and after image compression, and is also used as a buffer memory for images captured by the image sensors (1, 1A, 1B, 1C).

[0049] The operation unit 105 detects the result of the user's operation and outputs it to the control unit 107. The operation unit 105 is, for example, a touch panel sensor or a mechanical switch provided on the display unit 106.

[0050] The display unit 106 is configured, for example, by a liquid crystal display panel 51, and displays images (still images, moving images) captured by the imaging elements (1, 1A, 1B, 1C) and various information, as well as a screen for operation input.

[0051] The control unit 107 is, for example, a CPU (Central Processing Unit) and controls each unit. The control unit 107 may include a switching control circuit (4, 4B, 4C).

[0052] The storage unit 108 stores various data such as image data acquired in response to an image capture instruction in a storage medium such as a memory card.

[0053] The above describes the form for carrying out the present invention using an embodiment, but the present invention is not limited to such an embodiment, and various modifications and substitutions can be made within the scope that does not deviate from the gist of the present invention.

[0054] <Appendix A> (Appendix A1) An imaging element comprising: a first photoelectric conversion unit that converts light into electric charges; a second photoelectric conversion unit that converts light into electric charges; and a memory unit that stores first information on the number of times an accumulated amount of electric charges converted by the first photoelectric conversion unit has exceeded a threshold, and second information on the number of times an accumulated amount of electric charges converted by the second photoelectric conversion unit has exceeded a threshold.

[0055] (Appendix A2) The image sensor according to (Appendix A1), wherein the first photoelectric conversion unit has a higher sensitivity to light than the second photoelectric conversion unit.

[0056] (Appendix A3) The image sensor according to (Appendix A1) or (Appendix A2), wherein a light receiving area of ​​the first photoelectric conversion unit is larger than a light receiving area of ​​the second photoelectric conversion unit.

[0057] (Appendix A4) In the imaging element described in any one of (Appendix A1) to (Appendix A3), the imaging element comprises: a first connection unit that controls the electrical connection between the first photoelectric conversion unit and the memory unit; a second connection unit that controls the electrical connection between the second photoelectric conversion unit and the memory unit; and a control unit that controls the first connection unit and the second connection unit.

[0058] (Appendix A5) The image sensor according to (Appendix A4), wherein the control unit controls the first connection unit and the second connection unit within one frame period.

[0059] (Appendix A6) The imaging element according to any one of (Appendix A1) to (Appendix A5), wherein the storage unit outputs a signal based on the first information and the second information to a signal line.

[0060] (Appendix A7) In the imaging element described in any one of (Appendix A1) to (Appendix A6), the imaging element is provided with a first comparison unit that outputs a result of comparing the accumulated amount of charge converted by the first photoelectric conversion unit with a threshold value to the memory unit.

[0061] (Appendix A8) The imaging element according to (Appendix A7), further comprising a second comparison unit that compares the amount of accumulated charge converted by the second photoelectric conversion unit with a threshold value and outputs the result to the memory unit.

[0062] (Appendix A9) In the imaging element described in (Appendix A8), the first connection portion is arranged between the first comparison portion and the memory portion, and the second connection portion is arranged between the second comparison portion and the memory portion.

[0063] (Appendix A10) In the imaging element described in (Appendix A8), the first connection portion is arranged between the first photoelectric conversion portion and the first comparison portion, and the second connection portion is arranged between the second photoelectric conversion portion and the second comparison portion.

[0064] (Appendix A11) In the imaging element described in (Appendix A7), the first connection portion is arranged between the first photoelectric conversion portion and the first comparison portion, and the second connection portion is arranged between the second photoelectric conversion portion and the first comparison portion.

[0065] (Appendix A12) In the imaging element described in any one of (Appendix A1) to (Appendix A11), the first photoelectric conversion unit and the second photoelectric conversion unit are arranged on a first semiconductor substrate, and the memory unit is arranged on a second semiconductor substrate stacked together with the first semiconductor substrate.

[0066] (Appendix A13) The image sensor according to (Appendix A12), wherein the first comparison section and the second comparison section are disposed on the second semiconductor substrate.

[0067] (Appendix A14) An imaging device including the imaging element according to any one of (Appendix A1) to (Appendix A13).

[0068] <Appendix B> (Appendix B1) An imaging element comprising: a first photoelectric conversion unit that converts light into an electric charge; a second photoelectric conversion unit that converts light into an electric charge; a memory unit that stores either a first signal based on the electric charge of the first photoelectric conversion unit or a second signal based on the electric charge of the second photoelectric conversion unit; and a signal line that outputs either the first signal or the second signal stored in the memory unit.

[0069] (Appendix B2) In the imaging element described in (Appendix B1), the first photoelectric conversion unit and the second photoelectric conversion unit are arranged on a first semiconductor substrate, and the memory unit is arranged on a second semiconductor substrate connected to the first semiconductor substrate.

[0070] (Appendix B3) The image sensor according to (Appendix B1) or (Appendix B2), wherein the second photoelectric conversion unit is arranged adjacent to the first photoelectric conversion unit.

[0071] (Appendix B4) The image sensor according to (Appendix B1) or (Appendix B2), wherein the first photoelectric conversion unit and the second photoelectric conversion unit have the same number of saturation electrons.

[0072] (Appendix B5) An imaging element described in any one of (Appendix B1) to (Appendix B4), comprising: a first transfer section that transfers electric charges converted by the first photoelectric conversion section; a second transfer section that transfers electric charges converted by the second photoelectric conversion section; a first accumulation section that accumulates electric charges transferred by the first transfer section; and a second accumulation section that accumulates electric charges transferred by the second transfer section; wherein the memory section counts the number of times that electric charges accumulated in the first accumulation section or the second accumulation section exceed a threshold; and wherein the signal line outputs either the first signal or the second signal stored in the memory section when the counted value becomes equal to or greater than the threshold.

[0073] (Appendix B6) An imaging element according to (Appendix B5), comprising: a first comparator that detects whether the charge accumulated in the first storage unit exceeds a threshold; and a second comparator that detects whether the charge accumulated in the second storage unit exceeds a threshold; wherein the memory unit stores either a first signal based on the charge of the first photoelectric conversion unit or a second signal based on the charge of the second photoelectric conversion unit based on the count value of one of the first comparator and the second comparator.

[0074] (Appendix B7) The image sensor according to (Appendix B6), wherein the first comparator and the second comparator share a load resistance.

[0075] (Appendix B8) (Appendix B5) The imaging element is provided with a comparator that detects whether the charge accumulated in the first storage unit exceeds a threshold value or whether the charge accumulated in the second storage unit exceeds a threshold value, and the memory unit stores either a first signal based on the charge of the first photoelectric conversion unit or a second signal based on the charge of the second photoelectric conversion unit based on the count value of the comparator.

[0076] (Appendix B9) The image sensor according to any one of (Appendix B1) to (Appendix B8), further comprising: a switching control circuit configured to switch between the first signal and the second signal stored in the storage unit and output the first signal and the second signal to the signal line.

[0077] (Appendix B10) An imaging device including the imaging element according to any one of (Appendix B1) to (Appendix B9).

[0078] REFERENCE SIGNS LIST 1, 1A, 1B, 1C...imaging element, 10, 10A, 10B, 10C...imaging device, PD-1...first photoelectric conversion unit, PD-2...second photoelectric conversion unit, Tx-1...first transfer transistor, Tx-2...second transfer transistor, FD-1...first floating diffusion, FD-2...second floating diffusion, SW1 to SW8, SW11 to SW14, RST1, RST2, RST, FDRST1, FDRST2, FDRST switches, C1 to C6, C11 to C13...capacitors, COMP...comparator, COMP-1...first comparator, COMP-2...second comparator, 2...control circuit, 3...storage unit, 4, 4A, 4B, 4C...switching control circuit, 5...signal line

Claims

1. An imaging element comprising: a first photoelectric conversion unit that converts light into electric charges; a second photoelectric conversion unit that converts light into electric charges; and a memory unit that stores first information regarding the number of times the accumulated amount of electric charges converted by the first photoelectric conversion unit has exceeded a threshold, and second information regarding the number of times the accumulated amount of electric charges converted by the second photoelectric conversion unit has exceeded a threshold.

2. An imaging device according to claim 1, wherein the sensitivity of the first photoelectric conversion section to light is greater than the sensitivity of the second photoelectric conversion section to light.

3. An image pickup device according to claim 2, wherein the light receiving area of ​​the first photoelectric conversion section is larger than the light receiving area of ​​the second photoelectric conversion section.

4. An imaging element according to claim 1, comprising: a first connection section that controls the electrical connection between the first photoelectric conversion section and the memory section; a second connection section that controls the electrical connection between the second photoelectric conversion section and the memory section; and a control section that controls the first connection section and the second connection section.

5. An imaging device according to claim 4, wherein the control unit controls the first connection unit and the second connection unit within one frame period.

6. An imaging device according to claim 5, wherein the storage section outputs a signal based on the first information and the second information to a signal line.

7. An imaging device according to claim 4, further comprising a first comparison section that compares the amount of accumulated charge converted by said first photoelectric conversion section with a threshold value and outputs the result to said storage section.

8. An imaging device according to claim 7, further comprising a second comparison section that compares the amount of accumulated charge converted by the second photoelectric conversion section with a threshold value and outputs the result to the memory section.

9. An imaging element according to claim 8, wherein the first connection section is disposed between the first comparison section and the memory section, and the second connection section is disposed between the second comparison section and the memory section.

10. An imaging element according to claim 8, wherein the first connection section is disposed between the first photoelectric conversion section and the first comparison section, and the second connection section is disposed between the second photoelectric conversion section and the second comparison section.

11. An imaging element according to claim 7, wherein the first connection portion is disposed between the first photoelectric conversion portion and the first comparison portion, and the second connection portion is disposed between the second photoelectric conversion portion and the first comparison portion.

12. An imaging element according to claim 8, wherein the first photoelectric conversion unit and the second photoelectric conversion unit are arranged on a first semiconductor substrate, and the memory unit is arranged on a second semiconductor substrate that is stacked together with the first semiconductor substrate.

13. An imaging device according to claim 12, wherein the first comparison section and the second comparison section are disposed on the second semiconductor substrate.

14. An imaging device comprising the imaging element according to any one of claims 1 to 13.

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