Method and apparatus for providing active cell balancing in a battery energy storage system

Abstract

An active cell balancing circuit for a battery having a plurality of cells comprises a transformer having a plurality of stacked inductors circumscribing a common core; and a plurality of balancing circuits comprising a transistor coupled in series with a first inductor and second inductor of the plurality of stacked inductors, where each balancing circuit is connected across a battery cell.

Description

METHOD AND APPARATUS FOR PROVIDING ACTIVE CELL BALANCING IN A BATTERY ENERGY STORAGE SYSTEMBACKGROUNDField

[0001] Embodiments of the present invention generally relate to battery energy storage systems (BESS) and, more specifically, to a method and apparatus for providing active cell balancing in a BESS.Description of the Related Art

[0002] Battery energy storage systems (BESS) generally comprise a battery formed of a plurality of battery cells, an energy conversion unit or units and a battery management unit (BMU). The BMU controls battery charging and discharging via the energy conversion unit(s). The energy conversion unit(s) are typically at least one DC / AC bidirectional microinverter that converts stored DC power to AC power to discharge the battery and converts AC power to DC power to charge the battery.

[0003] The battery is typically manufactured using series connected strings of lithium-ion cells. Unfortunately, lithium-ion cells are subject to thermal runaway that can lead to a fire within the battery. To reduce the probability of thermal runaway, the battery requires the cell voltages to be balanced across all the cells. Balancing is typically performed by a cell balancing circuit.

[0004] Balancing circuits may be either passive or active. Passive balancing circuits typically comprise a field effect transistor (FET) coupled across the terminals of each cell. The FET operates as a variable load such that higher voltage cells are loaded to reduce the cell voltage. This results in the cell voltages being adjusted to match the cell with the lowest voltage. There is no mechanism for increasing the voltage on low voltage cells. Consequently, passive balancing circuits are inefficient.

[0005] Furthermore, active balancing circuits generally require constant monitoring of the state of charge (SoC) of each battery cell. Such monitoring creates a largecomputational burden that is typically performed by the BMU. This computational burden increases costs and energy use.

[0006] Active balancing circuits use complex and expensive circuitry to divert energy from high voltage cells to low voltage cells to balance the cell voltages. Such circuits require monitoring of the cell voltages and a control circuit to control the flow of energy from cell to cell.

[0007] Therefore, there is a need in the art for improved active cell balancing techniques.SUMMARY

[0008] Embodiments of the present invention comprise a method and apparatus for providing active cell balancing in a battery energy storage system substantially as shown in and / or described in connection with at least one of the figures, as set forth more completely in the claims.

[0009] Various features and advantages of the present disclosure may be appreciated from a review of the following detailed description of the present disclosure, along with the accompanying figures in which like reference numerals refer to like parts throughout.BRIEF DESCRIPTION OF THE DRAWINGS

[0010] So that the manner in which various features of the present invention can be understood in detail, a more particular description of the invention, briefly summarized above, may be had by reference to embodiments, some of which are illustrated in the appended drawings. It is to be noted, however, that the appended drawings illustrate only typical embodiments of this invention and are therefore not to be considered limiting of its scope, for the invention may admit to other equally effective embodiments.

[0011] FIG. 1 is a schematic diagram of an active cell balancing circuit in accordance with at least one embodiment of the present invention;

[0012] FIG. 2 is a block diagram of a controller for controlling the active cell balancing circuits of FIG. 1 and FIG. 2 in accordance with at least one embodiment of the present invention;

[0013] FIG. 3 is a schematic diagram of an active cell balancing circuit in accordance with at least one alternative embodiment of the present invention;

[0014] FIG. 4 is a flow diagram of a method of controlling the active cell balancing circuits of FIGs. 1 or 3 in accordance with at least one embodiment of the present invention;

[0015] FIG. 5 is a schematic diagram of an active cell balancing circuit that may be used with capacity-based balancing or open circuit voltage (OCV) based balancing in accordance with at least one alternative embodiment of the present invention;

[0016] FIG. 6 is a flow diagram of a method of producing zero cell current to facilitate OCV measurements in accordance with at least one embodiment of the present invention;

[0017] FIG. 7 is a flow diagram of a method of providing capacity-based cell balancing in accordance with at least one embodiment of the present invention;

[0018] FIG. 8 is a graph of battery capacity vs battery charge / discharge cycles when no active cell balancing is used;

[0019] FIG. 9 is a graph of battery capacity vs battery charge / discharge cycles when capacity-based active cell balancing is used in accordance with at least one embodiment of the present invention;

[0020] FIG. 10 is a graph of average battery life measured in cycles for batteries without active cell balancing and with capacity-based cell balancing in accordance with at least one embodiment of the present invention; and

[0021] FIG. 11 is a functional block diagram of the battery model used to determine active cell balancer maximum drift boundary conditions in accordance with at least one embodiment of the present invention.DETAILED DESCRIPTION

[0022] Embodiments of the invention provide methods and apparatus that facilitate active cell balancing for a battery in a battery energy storage system (BESS). The embodiments include active balancing circuitry as well as various methods controlling the circuitry, applying capacity-based cell balancing, measuring cell open circuit voltage and determining active cell balancer maximum drift boundary conditions.

[0023] In one embodiment, a cell balancing circuit comprises a series connected inductor and field effect transistor (FET) connected across each battery cell in a multicell battery. In one exemplary embodiment, the inductor is implemented as a winding in a stacked planar transformer that uses a single core for all the windings. In this manner, all the cells are inductively coupled to one another. The FETs are activated on a 50% duty cycle with the FET for alternating cells being “on” while other FETs are “off”, i.e., neighboring (adjacent) cell FETs alternate being on (conducting) or off (not conducting). To avoid hard switching losses, there is a small dead time at the transition from on to off and vice versa to implement zero volt switched (ZVS) commutation.

[0024] Embodiments of the invention may be used during both discharging and charging of the battery. By connecting a transformer winding across all the cells, the transformer automatically balances the voltages across the cells - weak cells receive additional charge and strong cells have charge removed.

[0025] In other embodiments, capacity-based cell balancing is used where the capacity of each cell is determined and the currents flowing through each cell are adjusted based upon the relative capacity of each cell. Capacity-based balancing substantially increases the life of a battery.

[0026] In still further embodiments, a method of measuring open circuit voltage (OCV) of a cell is provided that facilitates measuring OCV while a battery is being charged or discharged. Typically, measuring cell OCV requires the battery to be quiescent (neither charging or discharging) which may require very long periods between times when cell OCV can be measured, i.e., batteries in a BESS are typicallycharging or discharging most of the time. The embodiments allow the cell OCV to be measured at any time, i.e. , when the battery is charging or discharging.

[0027] In another embodiment, a method is used to determine the maximum drift boundary condition of an active balancing circuit. The method estimates an expected cell-to-cell capacity imbalance such that an active charge balancing circuit may be designed to accommodate the expected capacity imbalance. The expected cell-to- cell capacity imbalance depends upon thermal gradients within a battery, cell-to-cell degradation rate, and other factors that are modeled by various embodiments of the invention.

[0028] FIG. 1 is a schematic diagram of an active cell balancing circuit 100 in accordance with at least one embodiment of the present invention. The circuit 100 comprises a plurality of balancing circuits 102-1 , 102-2, 102-3 ... 102-N connected across each battery cell 104-1 , 104-2, 104-3 ...104-N. The balancing circuit 102-1 comprises first and second inductors 106-1 and 106-2 and a field effect transistor 110- 1 connected in series. The series connection is made with a first terminal of first inductor 106-1 being coupled to one cell terminal (e.g., positive) of cell 104-1 and a second terminal of the first inductor 106-1 being coupled to a drain terminal of the FET 110-1. Similarly, a first terminal of the second inductor 106-2 is connected to the other cell terminal (e.g., negative) of cell 104-1 and a second terminal of the second inductor 106-2 is connected to the source terminal of the FET 110-1. In addition, the second terminal of the second inductor 106-2 is connected to the drain terminal of the neighboring (adjacent) FET 110-2. In this manner each balancing circuit 102-N comprises two inductors 106-N and 106-N+1 connected in series with a FET 110-N. Each circuit 102-N shares an inductor with a neighboring (adjacent) balancing circuit 102-N±1.

[0029] The circuit 102-N is duplicated across each cell 104-N in the battery 1 12. Each circuit 102-N shares an inductor (e.g., 106-N) with a neighboring (adjacent) circuit 102-N±1 . The depicted embodiment comprises eight cells (numbered 1 through 8) coupled to 8 balancing circuits 102-1 through 102-8. In other embodiments, more or less cells may be used. In the embodiment shown, the cells 104-N are connectedin series to provide a high voltage, low current battery output. In other embodiments, the cells may be connected in parallel to create a high current, low voltage battery. In some embodiments, some cells may be connected in parallel and the parallel connected cells may be connected in series with other parallel connected cells.

[0030] The inductors 106-N in adjacent circuits 102-N and 102-N±1 are wound in opposite directions (as indicated by the dot next to each inductor drawing to indicate the direction of winding) onto a common core to form a transformer 114 (i.e., a stacked transformer) that couples energy from cell to cell. The counter-wound windings of each inductor circumscribe the common core (represented by the parallel lines next to each inductor 106-N in FIG. 1 ). Consequently, during charging of the battery 1 12, charge will flow from “weak” cells to “healthy” cells and, during discharging of the battery, charge flows from “healthy” cells to “weak” cells. Healthy cells have cell voltages equal to or greater than a nominal cell voltage, while weak cells have a cell voltage below the nominal voltage. In this embodiment, the balancing function occurs automatically without the need to monitor individual cell voltages.

[0031] To achieve cell balance, the gates of each FET 110-N are switched in an alternating pattern, i.e., when all the X gates are “on” and all the Y gates are “off” and vice versa. Such switching results in a 50% duty cycle. The concept relies upon the inherent volt-second balancing inherent with any inductor / transformer 114 to keep the cell voltages balanced (i.e., the +ve volt-second integral = the -ve volt-second integral). With each switching cycle, a pair of counter-wound transformer coils (indictors) are coupled across every other cell in the battery. The transformer action maintains the cell voltage balanced (i.e., each winding voltage must be equal). Consequently, during charging of the battery, more charge flows from “weak” cells (cells having comparatively lower voltage) to “healthy” cells (cells having comparatively higher voltage) and, during discharging of the battery, more charge flows from “healthy” cells to “weak” cells.

[0032] The active cell balancing circuit 100 works based on the following theory:1 ) The X Gates and Y Gates are driven with a 50:50 two phase clock signal (180° phase difference between X and Y gates);2) There is a small ‘dead-time’ used at the transitions (both X and Y gates are off) - during this dead-time the naturally occurring transformer current will drive a Zero-Volt-Switched (ZVS) commutation (eliminating any ‘Hard’ switching losses); and3) The cell voltages will remain at the same voltage and any imbalance between the apparent capacity of the cells is resolved as differential currents that flow through the transformer windings (inductors 106-N).

[0033] In one embodiment, the transformer design is based on well-known planar, printed circuit board (PCB) winding construction techniques:1 ) A single core couples the individual windings that are spread over a multi-layer PCB (e.g., 4-layer);2) From an analysis perspective, the balancing circuit 100 makes the series connected cells 104-N act as if they are connected in parallel;3) The FETs 110-N only require a voltage rating equal to two times the maximum cell voltage, e.g., 12V FETs will be more than adequate for Li-Ion cells (where Li-Ion maximum voltage = 4.2V).

[0034] With an active cell balancing circuit 100, there is a design cost optimization that drives to a design of a balancer that only processes a fraction of the total battery current. Such a design can extend the usable service life that can be extracted out of a battery to a maximum, but requires the active cell balancing circuit 100 being sized so that it can process the total battery current. This allows the battery to still deliver full output voltage and current even with some completely ‘dead’ cells. However, it is statistically improbable to have a battery which has some cells completely ‘dead’ while others have the ‘health’ of a brand-new cell. Statistically, it is expected that all the cells of a battery deteriorate at substantially the same rate. There are diminishing returnswhen increasing the power rating of the balancing circuit versus the additional service life that can be extracted from the battery.

[0035] The design philosophy for cell balancing circuit 100 is:1 ) The total cell balancing circuit power rating equals maximum charge / discharge power rating;2) Cells will never become imbalanced during charging and discharging;3) During charging: all cells (weak and strong) are fully charged by applying the appropriate charge rate to each individual cell;4) During discharging: all cells (weak and strong) are fully discharged by applying the appropriate discharge rate to each individual cell;5) A cell ‘balancing’ algorithm is managing the balancing hardware to ensure it transferring sufficient power to ensure that cell imbalance will not ever start to occur in the first place;6) The cell balancing hardware works on the basis of ensuring that cell voltage imbalance is never allowed to occur during charging and discharging; and7) A special 'Recovery Mode’ allows the initial balancing of a battery during commissioning, i.e. , the cell balancing circuit should be made inoperable during transportation of a battery product.

[0036] Overall battery performance is determined by the average performance of all the cells 104-N in the battery 1 12. The cell balancing circuit 100 optimally manages all the cells 104-N in the battery 112.

[0037] FIG. 2 is a block diagram of a controller 200 for controlling the active cell balancing circuit 100 of FIG. 1 in accordance with at least one embodiment of the present invention. The controller 200 provides the switching signals (X and Y signals) to the cell balancing circuit 100 of FIG. 1 . The controller 200 comprises at least one processor 202, support circuits 204 and memory 206. The at least one processor 202may be any form of processor or combination of processors including, but not limited to, central processing units, microprocessors, microcontrollers, field programmable gate arrays, graphics processing units, and the like. The support circuits 204 may comprise well-known circuits and devices facilitating functionality of the processor(s). The support circuits 204 may comprise one or more of, or a combination of, power supplies, clock circuits, communications circuits, cache, gate drivers, and / or the like.

[0038] The memory 206 comprises one or more forms of non-transitory computer readable media including one or more of, or any combination of, read-only memory or random-access memory. The memory 206 stores software and data including, for example control software 212 that, when executed by the processor 202, causes the controller 200 to produce the 180 degrees out of phase X and Y gate control signals 208. The control software 212 may also control the duration of the “dead” time that occurs at the zero crossing of the switching. In one embodiment, timing of when the controller 200 activates the balancing circuit may be controlled by a signal 210 from the battery management unit (BMU). The BMU may maintain the balancing circuit in an off state (deactivated) during shipping. In addition, the BMU may control activation of the balancing circuit depending on the state of health (SoH) of the battery, i.e., a new battery may not need the balancing circuit until the cells age and are cycled over a period. At a certain level of SoH, the BMU may activate the balancing circuit. Operation of the control software 212 is described in detail with respect to FIG. 4.

[0039] The memory 212 may optionally include additional or alternative software such as an open circuit voltage (OCV) measuring software to control a balancing circuit to facilitate measuring OCV of a cell while the battery is charging or discharging. The operation of the OCV measuring software is described in detail with respect to FIGs. 5 and 6 below.

[0040] The memory 212 may optionally include additional or alternative software such as a capacity-based balancing software to control a balancing circuit to balance cell voltage based upon cell capacity. The operation of the capacity-based balancing software is described in detail with respect to FIGs. 5, 7, 8, 9 and 10.

[0041] The memory 212 may optionally include additional or alternative software such as maximum drift boundary condition software to estimate a maximum cell-to- cell capacity imbalance that must be accommodated by the balancing circuit. The operation of the software is described in detail with respect to FIG. 11 .

[0042] FIG. 3 is a schematic diagram of an active cell balancing circuit 300 in accordance with at least one alternative embodiment of the present invention. In this embodiment, the number of FETs 304 and inductors 306 and 308 in the transformer 310 are doubled compared to the embodiment of FIG. 1. The added complexity reduces ripple current and facilitates the use of a gapless transformer, i.e., the transformer does not need to store any energy. In this embodiment, each cell 104-N of the battery 112 is coupled to a balancing circuit 302-1 , 302-2, 302-3 ... 302-N. Each balancing circuit 302-N comprises a first FET 302-NA (where N is an integer 1 , 2, 3, ...N) and a first inductor 306-NA (where N is an integer 1 , 2, 3, ... N) connected in series and connected across the terminals of a battery cell 104-N. Additionally, a second FET 304-NB and a second inductor 308-1 are connected in series and also connected across the terminals of the cell 104-N (e.g., the inductors are connected to the positive terminal of the cell and the source terminals of each FET are connected to the negative terminal of the cell). This arrangement is repeated for each cell 104-N of the battery 112. The inductors 306-N and 308-N are wound on a common core to produce a transformer 310.

[0043] As with the embodiment of FIG. 1 , the X gate of FET 304-NB and the Y gate of FET 304-NA are driven by a 180 degrees out of phase switching signal that turns all the X gates “on” when the Y gates are “off” and vice versa - with dead zones at the switching point. Consequently, the embodiment of FIG. 3 operates in the same manner as the embodiment of FIG. 1. However, this embodiment eliminates the dependance on using volt-second integral balancing provided by the inductive nature of the transformer. As a result, no energy needs to be stored in the transformer and the transformer can, therefore, be gapless which reduces the magnitude of the ripple current.

[0044] FIG. 4 is a flow diagram of a method 400 of controlling the active cell balancing circuits 100 and 300 of FIGs. 1 or 3 in accordance with at least one embodiment of the present invention. The method 400 starts at 402. As mentioned above, the activation of the balancing circuit may be controlled by the BMU to selectively activate the balancing circuit as needed. The method 400 proceeds from 402 to 404 where the dead time durations are established. During the dead time, both X and Y FETs are off (deactivated) to establish zero volt switching (ZVS) commutations. The dead time duration may be actively managed to avoid partial hard switching when the dead time is too short or excessive FET body diode conduction when the dead time is too long. The optimum dead time duration may vary with battery cell voltage and current. As such, the switching frequency of the control signals may be adjusted to change the ZVS commutation current.

[0045] At 406, the method 400 generates the control signals using the dead time duration established in 404 (e.g., set the switching frequency of each signal). The control signals are 180 degrees out of phase with one another to ensure the X and Y gates are alternatingly activated.

[0046] At 408, the method 400 queries if the method should continue. If the query is affirmatively answered, the method 400 continues along path 410 to 404 where the dead time durations are established. In this manner, after each control signal pulse, the dead time duration may be changed to optimize the duration. In other embodiments, the dead time duration may not be dynamic and may be established at start-up and remain the same during operation of the balancing circuits. If the query at 408 is negatively answered, the method 400 proceeds to 412 and ends.

[0047] FIG. 5 is a schematic diagram of another form of active cell balancing circuit 500 that may be used with capacity-based balancing or open circuit voltage (OCV) based balancing in accordance with at least one alternative embodiment of the present invention. The active cell balancing circuit 500 comprises a well-known, commercially available balancer 502 (e.g., LTC3300-2 available from Analog Devices Inc.) and a balancing circuit 508 coupled to each cell 506 of a battery 504. The balancer 502 may be controlled by a controller such as controller 200 of FIG. 2, e.g.,the balancer 502 is a support circuit 204 that is controlled by the processor 202. The controller sends signals to the balancer 502 to facilitate charge transfer between cells 506. The balancer 502 and balancing circuits 508, working together, can selectively transfer charge (i.e., charge or discharge cells) to or from any cell as directed by the controller. Such control allows for the active cell balancing circuit 500 to facilitate measuring OCV while the battery is being charged or discharged and / or use capacitybased balancing. The process for performing OCV measurements in accordance with at least one embodiment of the invention is described in detail with respect to FIG. 6 below. The process for performing capacity-based balancing in accordance with at least one embodiment of the invention is described in detail with respect to FIGs. 7, 8, 9 and 10 below.

[0048] FIG. 6 is a flow diagram of a method 600 of producing zero cell current to facilitate OCV measurements in accordance with at least one embodiment of the present invention. In one embodiment, the controller 200 of FIG. 2 causes the method 600 to be performed upon executing the OCV measuring software 216. The method 600 begins at 602 and proceeds to 604 where the battery current is measured and provided to the controller (e.g., controller 200 of FIG. 2). The controller may measure the current itself or the current may be provided by the BMU. At 606, a cell is selected that is to have its OCV measured while the battery is being charged or discharged (i.e., current is flowing through the cell).

[0049] At 608, the active cell balancing circuit (e.g., circuit 500 of FIG. 5) is controlled to inject a current into the selected cell, where the injected current is equal to the battery current. This will drive the cell current to zero.

[0050] At 610, while the selected cell current is zero (e.g., operating as an open circuit), the cell voltage is measured to determine the OCV for the selected cell. The OCV may then be used for battery health or state of charge analysis (e.g., if the OCV decays at a faster rate than usual, the cell or battery may be defective). Also, since cell SOC is proportional to OCV, the measured OCV may be used to determine the cell SOC.

[0051] At 612, the method 600 queries if the method should continue. If the query is affirmatively answered, the method 600 continues along path 612 to 604 where the battery current is measured and another cell OCV may be measured. If the query at 612 is negatively answered, the method 600 proceeds to 616 and ends.

[0052] FIG. 7 is a flow diagram of a method 700 of providing capacity-based cell balancing in accordance with at least one embodiment of the present invention. In one embodiment, the controller 200 of FIG. 2 causes the method 700 to be performed upon executing the capacity-based balancing software 214. The method 700 begins at 702 and proceeds to 704 where the charge capacity of each cell is determined. The charge capacity may be determined by monitoring the charge and discharge cycles of each cell. Such monitoring may be performed by the BMU and the BMU communicates the cell capacity values to the controller (e.g., controller 200 of FIG. 2). Alternatively, the controller may monitor the charge / discharge characteristics of each cell and compute the cell capacities. In either instance, each cell is assigned a capacity value (e.g., milli-amp-hour (mAh)).

[0053] At 706, the controller controls the active cell balancing circuit (e.g., circuit 500 in FIG. 5) to adjust current flow through each cell in view of each cell’s capacity. For example, assume that one cell has a capacity that is 10% larger than all of the other cells. Embodiments of the invention would increase the discharging and charging rate of this cell by 10% using the active balancing circuit. This ensures that the cells are balanced based on cell capacity during charging and discharging. Alternatively, capacity-based balancing may be accomplished by having all the cells that are above the average capacity to charge and discharge with a higher current, for example, 10A, than the cells below the average capacity.

[0054] At 708, the method 700 queries if the method should continue. If the query is affirmatively answered, the method 700 continues along path 710 to 704 where the battery cell capacity is determined, and capacity-based balancing is performed. If the query at 708 is negatively answered, the method 700 proceeds to 712 and ends.

[0055] FIG. 8 is a graph 800 of battery capacity versus battery charge / discharge cycles when no active cell balancing is used. The graph is formed by determining capacity loss (Qioss) using Wang’s equation:where,B is a factor that depends on SoC;R is the gas constant;T is battery temperature; andAh is the battery capacity in amp-hours.

[0056] As a battery is charged and discharge (i.e., cycled), the charge capacity of each cell degrades with the number of cycles. Due to a number of factors including, but not limited to, manufacturing variations (mechanical tolerance variations, impurities, etc.), cell to cell temperature variations, variations in shelf duration, etc., the capacity of each cell can be different than other cells in the battery stack. Graph 800 shows this degradation with cycles and variation across the cells.

[0057] FIG. 9 is a graph 900 of battery capacity vs battery charge / discharge cycles when capacity-based active cell balancing is used in accordance with at least one embodiment of the present invention. As can be seen in graph 900, with capacitybased balancing, the cell capacities eventually equalize as the battery is cycled. The stronger cells degrade faster and the weaker cells degrade slower until the capacities converge resulting in a longer life battery.

[0058] FIG. 10 is a graph 1000 of average battery life measured in cycles for batteries without active cell balancing (1002) and with capacity-based cell balancing (1004) in accordance with at least one embodiment of the present invention. The graph 1000 was generated by modelling capacity-based balancing on 3000 batteries and found that the technique improves the average battery life from 6400 cycles tomore than 7500 cycles. At the end of life, all of the cells had the same capacity and needed no balancing during charge and discharge.

[0059] FIG. 11 is a diagram of the battery model 1100 used to determine active cell balancer maximum drift boundary conditions in accordance with at least one embodiment of the present invention. The battery model 1100 is used to determine boundary conditions, such as, but not limited to, maximum cell balancing current for each cell, time necessary to balance all the cells of a battery, maximum cell-to-cell imbalance an active balancer must correct, and the like. Such boundary conditions are used to design an active cell balancer that is able to cell balance within the boundary conditions.[ooeo] In one embodiment, the model 1100 comprises a degradation model 1102, electrical model 1104 and a lumped thermal model 1106 that interact with one another as represented by the arrows 1108. The degradation model 1102 computes the change in battery capacity as a function of charge / discharge rate, temperature SOO, SOH, charge / discharge cycles and the like (see block 1110). The thermal model 1106 computes the capacity of cells within a battery as a function of charge / discharge rate, temperature, voltage, and the rate of change of the open circuit voltage (see block 1112). The thermal model generates a cell capacity contour across the battery. The electrical model 1104 is an electrical equivalent circuit that uses information from the degradation model 1102 and the thermal model 1106 to model the electrical characteristics of the battery (see blocks 1114 and 1116) over temperature changes and operational duration.

[0061] Executing the model 1100 repeatedly using different sets of operation variables enables the model 1100 to predict the life of the battery. The model 1100 determines the growth of cell imbalance over the life of a battery when operating a battery without cell balancing and determines the growth of cell imbalance over a charging cycle without cell balancing. Identifying the cell imbalance growth without cell balancing determines the maximum amount of cell balancing current necessary to eliminate cell imbalance growth.

[0062] The model 1100 is based upon empirical data generated by measuring initial cell-to-cell imbalance over a number of batteries (e.g., 2000). The measured imbalance is typically, for example, 1.5%. Thus, an active balancer design must accommodate this 1-5% imbalance. Next, utilize the degradation and thermal models 1110 and 1112 to find cell-to-cell imbalance growth dependent upon temperature and operational duration (time). This determines a boundary condition of, for example, 2 to 4% of additional imbalance growth over time. Consequently, an active balancer must accommodate a 3.5 to 5.5% long term imbalance (i.e. , the initial imbalance plus the imbalance growth over time).

[0063] The model 1100 also must consider short term imbalance growth that occurs over a charge / discharge cycle. Over a cycle there will be an increase in the capacity imbalance. The balancing circuit must also accommodate this imbalance. The model 1100 computes various active balancing currents that will bring cell-to-cell imbalance into balance with specific time periods. Thus, the model is useful for determining an optimal balancing circuit current to achieve balance in a particular amount of time, e.g., less than a cycle.

[0064] Here multiple examples have been given to illustrate various features and are not intended to be so limiting. Any one or more of the features may not be limited to the particular examples presented herein, regardless of any order, combination, or connections described. In fact, it should be understood that any combination of the features and / or elements described by way of example above are contemplated, including any variation or modification which is not enumerated, but capable of achieving the same. Unless otherwise stated, any one or more of the features may be combined in any order.

[0065] As above, figures are presented herein for illustrative purposes and are not meant to impose any structural limitations, unless otherwise specified. Various modifications to any of the structures shown in the figures are contemplated to be within the scope of the invention presented herein. The invention is not intended to be limited to any scope of claim language.

[0066] Where “coupling” or “connection” is used, unless otherwise specified, no limitation is implied that the coupling or connection be restricted to a physical coupling or connection and, instead, should be read to include communicative couplings, including wireless transmissions and protocols.

[0067] Any block, step, module, or otherwise described herein may represent one or more instructions which can be stored on a non-transitory computer readable media as software and / or performed by hardware. Any such block, module, step, or otherwise can be performed by various software and / or hardware combinations in a manner which may be automated, including the use of specialized hardware designed to achieve such a purpose. As above, any number of blocks, steps, or modules may be performed in any order or not at all, including substantially simultaneously, i.e., within tolerances of the systems executing the block, step, or module.

[0068] Where conditional language is used, including, but not limited to, “can,” “could,” “may” or “might,” it should be understood that the associated features or elements are not required. As such, where conditional language is used, the elements and / or features should be understood as being optionally present in at least some examples, and not necessarily conditioned upon anything, unless otherwise specified.

[0069] Where lists are enumerated in the alternative or conjunctive (e.g., one or more of A, B, and / or C), unless stated otherwise, it is understood to include one or more of each element, including any one or more combinations of any number of the enumerated elements (e.g. A, AB, ABC, ABB, etc.). When “and / or” is used, it should be understood that the elements may be joined in the alternative or conjunctive.

[0070] While the foregoing is directed to embodiments of the present invention, other and further embodiments of the invention may be devised without departing from the basic scope thereof, and the scope thereof is determined by the claims that follow.

Claims

Claims:

1. An active cell balancing circuit for a battery having a plurality of cells comprising: a transformer having a plurality of stacked inductors circumscribing a common core; and a plurality of balancing circuits comprising a transistor coupled in series with a first inductor and second inductor of the plurality of stacked inductors, where each balancing circuit is connected across a battery cell.

2. The active cell balancing circuit of claim 1 further comprising: a controller for controlling each transistor in each balancing circuit such that transistors within adjacent balancing circuits are alternately activated and deactivated.

3. The active cell balancing circuit of claim 2 wherein alternating activation and deactivation is produced by driving each transistor with a 50% duty cycle switching signal that is 180 degrees out of phase with a switching signal applied to an adjacent transistor.

4. The active cell balancing circuit of claim 3 wherein adjacent switching signals comprise a dead time where neither adjacent transistor is activated.

5. The active cell balancing circuit of claim 1 wherein cell balancing occurs during battery charging and discharging.

6. The active cell balancing circuit of claim 1 wherein the first and second inductors are oppositely wound.

7. The active cell balancing circuit of claim 1 wherein during charging of the battery, charge flows from weak cells to healthy cells and, during discharging of the battery, charge flows from healthy cells to weak cells.

8. The active cell balancing circuit of claim 1 wherein adjacent balancing circuits share either the first or second inductor.

9. The active cell balancing circuit of claim 1 wherein the plurality of cells are connected in series, parallel or both.

10. An active cell balancing circuit for a battery having a plurality of cells comprising: a transformer having a plurality of stacked inductors circumscribing a common core; a plurality of balancing circuits comprising a first transistor coupled in series with a first inductor of the plurality of stacked inductors and a second transistor coupled in series with a second inductor, where each series connected transistor and inductor is connected across a battery cell.

11. The active cell balancing circuit of claim 10 further comprising: a controller for controlling the first and second transistors in each balancing circuit such that the first and second transistors are alternately activated and deactivated.

12. The active cell balancing circuit of claim 11 wherein alternating activation and deactivation is produced by driving the first and second transistors with a 50% duty cycle switching signal, where the switching signal applied to the first transistor is 180 degrees out of phase with a switching signal applied to the second transistor.

13. The active cell balancing circuit of claim 12 wherein the two switching signals comprise a dead time where neither transistor is activated.

14. The active cell balancing circuit of claim 10 wherein cell balancing occurs during battery charging and discharging.

15. The active cell balancing circuit of claim 10 wherein during charging of the battery, charge flows from weak cells to healthy cells and, during discharging of the battery, charge flows from healthy cells to weak cells.

16. The active cell balancing circuit of claim 10 wherein the plurality of cells are connected in series, parallel or both.

17. A method of operating an active cell balancing circuit for a battery having a plurality of cells, where the active cell balancing circuit comprises a transformer having a plurality of stacked inductors circumscribing a common core, and a plurality of balancing circuits comprising at least one transistor coupled in series with at least one inductor of the plurality of stacked inductors, where each balancing circuit is connected across a battery cell, the method comprising: switching the at least one transistor on and off to periodically connect the at least one inductor across the cell.

18. The method of claim 17 wherein switching causes cell balancing during battery charging and discharging.

19. The method of claim 17 wherein during charging of the battery, charge flows from weak cells to healthy cells and, during discharging of the battery, charge flows from healthy cells to weak cells.

20. The method of claim 17 wherein the plurality of cells are connected in series, parallel or both.

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