Method and boolean logic computing system utilizing deep learning network

Abstract

A method for use for deep learning network in Boolean logic computing system comprises receiving first and second branch signal, wherein branch signals are logic signals which can take one out of first and second value, merging two branch signals into feedforward signal utilizing logic function, determining learning signal, and unmerging learning signal by backpropagating a backpropagating signal through logic function into first and second branch learning signal, wherein method further comprises determining learning signal by determining variation of feedforward signal and applying predetermined function to variation of feedforward signal, and wherein backpropagating the backpropagating signal through logic function into first and second branch learning signal comprises determining variation of first and second branch signal and applying predetermined function to variation of the first and second branch signal becoming first and second branch learning signal.

Description

[0001] METHOD AND BOOLEAN LOGIC COMPUTING SYSTEM UTILIZING DEEP LEARNING NETWORK

[0002] TECHNICAL FIELD

[0003] The present disclosure relates generally to the field of deep learning systems and more specifically, to a method for use for a deep learning network in a Boolean logic computing system and a Boolean logic computing system utilizing deep learning network.

[0004] BACKGROUND

[0005] Logic-based deep learning system is an advanced deep learning technology that operates using principles of Boolean logic. Advancements in the field of logic-based deep learning systems have gained popularity over time due to the vast potential of the logic based deep learning systems for reducing computational complexity and their applicability in various domains, such as pattern recognition, natural language processing, image classification, and the like. Traditionally, the deep learning systems have relied on fundamental arithmetic principles for both merging and backpropagation processes. However, the traditional methods for merging and backpropagation of signals are limited to continuous values and may not be suitable for handling logic signals with discrete values like TRUE and FALSE or 0 and 1.

[0006] Conventionally, certain attempts have been made to overcome the limitations posed by traditional methods and systems for merging and backpropagation of logic-based signals. However, such attempts failed due to various reasons, such as the method relies on mathematical functions, like addition, that can be differentiated or derivable. Moreover, the conventional method is only suitable for deep learning methods and systems dealing with real numbers, not binary or logic-based systems, and the like. Furthermore, conventional techniques fail to accommodate the unique requirements of logic-based deep learning systems, leading to a decrease in the effectiveness and accuracy while performing the merging and backpropagation. As a result, there exists a technical problem of how to perform the merging and backpropagation of the logic-based signals with reduced computational complexity and memory footprint.

[0007] Therefore, in light of the foregoing discussion, there exists a need to overcome the aforementioned drawbacks associated with the conventional method for use for a deep learning network in a Boolean logic computing system and conventional Boolean logic computing system utilizing a deep learning network.

[0008] SUMMARY

[0009] The present disclosure provides a method for use for a deep learning network in a Boolean logic computing system and a Boolean logic computing system utilizing deep learning network. The present disclosure provides a solution to the existing problem of how to perform the merging and backpropagation of the logic-based signals with reduced computational complexity and memory footprint. An objective of the present disclosure is to provide a solution that overcomes at least partially the problems encountered in the prior art and provides an improved method and an improved system for merging and backpropagating the logic signals in the deep learning network.

[0010] In one aspect, the present disclosure provides a method for use for a deep learning network in a Boolean logic computing system. The method includes receiving a first branch signal and receiving a second branch signal. Moreover, the branch signals are logic signals, and a logic signal can take one out of a first value and a second value, the method further includes merging the two branch signals into a feedforward signal and the two branch signals are merged utilizing a logic function. Furthermore, the method includes determining a learning signal and unmerging the learning signal by backpropagating the backpropagating signal through the logic function into a first branch learning signal and a second branch learning signal. Moreover, the method is characterized in that the method further includes determining the learning signal by determining a variation of the feedforward signal and applying a predetermined function to the variation of the feedforward signal. Further, backpropagating the backpropagating signal through the logic function into a first branch learning signal and a second branch learning signal includes determining a variation of the first branch signal, applying the predetermined function to the variation of the first branch signal becoming the first branch learning signal, determining a variation of the second branch signal and applying the predetermined function to the variation of the second branch signal becoming the second branch learning signal.

[0011] Advantageously, the seamless integration of Boolean logic principles into the method used for a deep learning network in a Boolean logic computing system, offering compatibility, reduced complexity, enhanced flexibility, and improved performance. Further, by utilizing logic functions for signal merging and backpropagation, the method enables efficient handling of logic signals with discrete values, such as TRUE and FALSE. The compatibility of deep neural network with Boolean logic computing systems allows for tailored operations that can potentially reduce computational complexity compared to traditional methods relying on real arithmetic principles.

[0012] In another aspect, the present disclosure provides a Boolean logic computing system utilizing a deep learning network comprising a controller configured to receive a first branch signal, receive a second branch signal and the branch signals are logic signals, wherein a logic signal can take one out of a first value and a second value, merge the two branch signals into a feedforward signal. Moreover, the two branch signals are merged utilizing a logic function, determine learning signal, and unmerge the learning signal by backpropagating the backpropagating signal through the logic function into a first branch learning signal and a second branch learning signal. Furthermore, the system is characterized in that the controller is further configured to determine the learning signal by determining a variation of the feedforward signal and applying a predetermined function to the variation of the feedforward signal. Moreover, backpropagating the backpropagating signal through the logic function into a first branch learning signal and a second branch learning signal comprises determining a variation of the first branch signal and applying the predetermined function to the variation of the first branch signal becoming the first branch learning signal, and determining a variation of the second branch signal and applying the predetermined function to the variation of the second branch signal becoming the second branch learning signal.

[0013] The Boolean logic computing system achieves all the advantages and technical effects of the method of the present disclosure.

[0014] It is to be appreciated that all the aforementioned implementation forms can be combined. It has to be noted that all devices, elements, circuitry, units, and means described in the present application could be implemented in the software or hardware elements or any kind of combination thereof. All steps which are performed by the various entities described in the present application as well as the functionalities described to be performed by the various entities are intended to mean that the respective entity is adapted to or configured to perform the respective steps and functionalities. Even if, in the following description of specific embodiments, a specific functionality or step to be performed by external entities is not reflected in the description of a specific detailed element of that entity that performs that specific step or functionality, it should be clear for a skilled person that these methods and functionalities can be implemented in respective software or hardware elements, or any kind of combination thereof. It will be appreciated that features of the present disclosure are susceptible to being combined in various combinations without departing from the scope of the present disclosure as defined by the appended claims.

[0015] Additional aspects, advantages, features, and objects of the present disclosure would be made apparent from the drawings and the detailed description of the illustrative implementations construed in conjunction with the appended claims that follow.

[0016] BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The summary above, as well as the following detailed description of illustrative embodiments, is better understood when read in conjunction with the appended drawings. For the purpose of illustrating the present disclosure, exemplary constructions of the disclosure are shown in the drawings. However, the present disclosure is not limited to specific methods and instrumentalities disclosed herein. Moreover, those in the art will understand that the drawings are not to scale. Wherever possible, like elements have been indicated by identical numbers.

[0018] Embodiments of the present disclosure will now be described, by way of example only, with reference to the following diagrams wherein:

[0019] FIG. 1 is a diagram that depicts a flow chart of a method for use for a deep learning network in a Boolean logic computing system, in accordance with an embodiment of the present disclosure;

[0020] FIG. 2 is a block diagram that depicts a Boolean logic computing system utilizing deep learning network, in accordance with an embodiment of the present disclosure;

[0021] FIG. 3 A is a diagram that depicts an execution of a merge operation of two logic signals by using logic gate, in accordance with an embodiment of the present disclosure;

[0022] FIG. 3B is a diagram that depicts an execution of a merge operation of two logic signals by using an OR logic gate, in accordance with an embodiment of the present disclosure; and

[0023] FIG. 4 is a diagram that depicts a b ackpropagation of merged signals, in accordance with an embodiment of the present disclosure.

[0024] In the accompanying drawings, an underlined number is employed to represent an item over which the underlined number is positioned or an item to which the underlined number is adjacent. A non-underlined number relates to an item identified by a line linking the nonunderlined number to the item. When a number is non-underlined and accompanied by an associated arrow, the non-underlined number is used to identify a general item at which the arrow is pointing.

[0025] DETAILED DESCRIPTION OF EMBODIMENTS

[0026] The following detailed description illustrates embodiments of the present disclosure and ways in which they can be implemented. Although some modes of carrying out the present disclosure have been disclosed, those skilled in the art would recognize that other embodiments for carrying out or practicing the present disclosure are also possible.

[0027] FIG. l is a diagram that depicts a flow chart of a method for use for a deep learning network in a Boolean logic computing system, in accordance with an embodiment of the present disclosure. With reference to FIG. 1, there is shown a flowchart of method 100 for use for a deep learning network in a Boolean logic computing system. The method 100 includes steps 102 to 122.

[0028] There is provided the method 100 for use for the deep learning network in the Boolean logic computing system. The method 100 utilizes binary values (e.g., "True" or "False", "0" or "1", and “-1” or “+1”) for computing the input signals through logic functions, such as an AND operation, an OR operation, an XOR operation, and a NOT operation to process and merge signals within the deep learning network while reducing the computational complexity. In addition, the method 100 backpropagate errors through the deep learning network and update parameters based on Boolean logic operations.

[0029] At step 102, the method 100 includes receiving a first branch signal. Moreover, the first branch signal refers to an electrical or digital signal that represents binary information that can be further processed and transformed through various layers of the deep learning network. Moreover, the first branch signal is received by the Boolean computing system from an external source, such as a sensor, input device, or another computational process. Once received, the first branch signal undergoes various logical operations and transformations in order to merge multiple branch signals and further backpropagate through the same with reduced computational complexity. At step 104, the method 100 includes receiving a second branch signal. The second branch signal is another logic signal, representing binary information using binary values, such as "0" and "1" or "FALSE" and "TRUE." Moreover, the second branch signal is processed to merge the second branch signal with the first branch signal in order to enhance the learning capabilities of the deep learning network. In an implementation, the second branch signal is obtained from an external source, such as a different sensor, input device, or computational process. Moreover, the second branch signal is captured, digitized, and then fed into the deep learning network's layers in order to ensure that both the branch signals (i.e., the first branch signal and the second branch signal) are merged and can be further utilized to perform complex logical operations with efficiency, accuracy, and reduce overall data processing time.

[0030] At step 106, the method 100 includes merging two branch signals into a feedforward signal. In an example, the first branch signal is merged with the second branch signal in order to form the feedforward signal. Moreover, the two branch signals are merged by utilizing a logic function. The feedforward signal refers to a signal that is configured to carry an information extracted from the input data as it traverses through the deep learning network and a logic function refers to a mathematical operation that is executed for processing the branch signals within the deep learning network. In addition, the logic function may include, but are not limited to operations, such as AND operation, OR operation, XOR operation, NOT operation, and the like without affecting the scope of the present disclosure. Moreover, the feedforward signal incorporates features from both branches (i.e., the first branch and the second branch) thereby enhancing the ability of the deep learning network to capture complex patterns and relationships in the data with reduced computational overhead. In addition, the feedforward signal is propagated through the deep learning network for further processing, learning, and decision-making.

[0031] At step 108, the method 100 includes determining the learning signal. The learning signal refers to a signal that is used to provide information of the deep learning network which can be further utilized to facilitate backpropagation and training of the deep learning network. Moreover, the learning signal provides the adjustment of the parameters of the deep learning network in order to minimize the loss function, thereby improving the accuracy and performance of the method 100. In accordance with an embodiment, the learning signal is a logic signal. Further, the logic signal refers to the signal that represents information using discrete values, such as "0" and "1" or "FALSE" and "TRUE". Advantageously, by using the learning signal as a logic signal, the method 100 maintains a consistency with the Boolean logic nature of the computational method. Additionally, the learning signal is used to ensure compatibility of the deep learning network with Boolean logic operations, leading to reduced computational complexity and reduced overall processing times.

[0032] In accordance with an embodiment, the method 100 further includes determining the learning signal based on the variation of the predetermined function. In other words, the method 100 includes determining the learning signal based on the variation of the predetermined function, such as a loss function, for example, by calculating the derivative of the predetermined function with respect to the output of the deep learning network. Moreover, the determined learning signal is further used for backpropagation with reduced data loss and improved overall efficiency and effectiveness of the deep learning network.

[0033] In accordance with an embodiment, the predetermined function is based on a truth table for the logic function. In other words, the method 100 uses a truth table to define the mapping of input values (i.e., the first branch signal and the second branch signal) to the logic function map with output values, which is further utilized to calculate the learning signal. Firstly, a truth table for the logic function is created. Moreover, the truth table outlines the output (i.e., feedforward signal) for every possible combination of the input values. Thereafter, during the backpropagation, the variation of the learning signal is calculated by using the created truth table. Finally, the calculation is used to determine the learning signal based on the exact behaviour of the logic function. As a result, the truth table for the logic function provides an accurate and efficient mapping of input values with the output values for the method 100 in which the behaviour of logic gates, for example AND, OR, and XOR logic gate are required to be explicitly defined in order to enhance the robustness and predictability of the deep learning network.

[0034] In accordance with an embodiment, the predetermined function is a loss function for the variation the function is applied to. The predetermined function, which is the loss function is used to measure the discrepancy between the predicted output and the actual target values along with the variation. In an implementation, the method 100 includes execution of the predetermined function that is the loss function, such as by comparing the predicted outputs of the deep learning network with actual target values. As a result, the loss function is used to provide a precise error metric for efficient gradient-based optimization, ensuring rapid convergence and enhanced accuracy of the deep learning network. In accordance with an embodiment, indicator for the sign is TRUE if the learning signal is larger or equal to 0, i.e. positive, and FALSE otherwise. In an implementation, if the learning signal is larger than 0, then, in that case, the indicator of the sign is TRUE. In another implementation, if the learning signal is equal to 0, then, in that case, the indicator of the sign is TRUE. In yet another implementation, if the learning signal is less than 0, then, in that case, the indicator of the sign is FALSE. Moreover, such indicator is used to perform further computations with reduced overall processing time and enhanced resource-efficient processing.

[0035] In accordance with an embodiment, the learning signal is a real-valued signal. The method 100 further includes representing the learning signal as a tuple comprising the magnitude of the learning signal and an indicator for the sign of the learning signal representing the first branch learning signal as a tuple including the magnitude of the learning signal and an indicator for the sign of the first branch learning signal. The method 100 further includes representing the second branch learning signal as a tuple comprising the magnitude of the learning signal and an indicator for the sign of the second branch learning signal. As a result, the representation of the learning signal as the tuple is required for backpropagation and also ensures that the deep learning network parameters are updated accurately leading to an efficient computation in Boolean logic computing systems.

[0036] At step 110, the method 100 includes unmerging the learning signal by backpropagating the backpropagating signal through the logic function into the first branch learning signal and the second branch learning signal. Firstly, the first branch signal and the second branch signal are received. Thereafter, the first branch signal and the second branch signals are merged into the feedforward signal. After that, the learning signal is determined and is unmerged by backpropagating the backpropagating signal through the logic function into the first branch learning signal and the second branch learning signal. In an implementation, the unmerging of the learning signal includes passing the learning signal through a logic function, which is used during the merging of the first branch signal and the second branch signal. Moreover, such logic function is applied in reverse order to allow the splitting of the learning signal back into the component signals for each branch (i.e., the first branch signal and the second branch signal). As a result, by unmerging the learning signal by backpropagating the backpropagating signal through the logic function into the first branch learning signal and the second branch learning signal ensures that the gradient information is correctly assigned to each branch, enabling precise parameter updates during backpropagation and enables the Boolean computing system to learn complex patterns with reduced the likelihood of gradient vanishing or explosion problems.

[0037] At step 112, the method 100 includes determining the learning signal by determining a variation of the feedforward signal and applying a predetermined function to the variation of the feedforward signal, such as at step 114. Firstly, the variation of the feedforward signal is calculated, for example, by measuring the changes in the feedforward signal. After that, the variation is passed through a predetermined function, which is a derivative of a loss function that maps the predetermined function to the learning signal. Moreover, the determination of the variation of the feedforward signal is used to further determine the relationship between the feedforward signal and the learning signal in order to reduce overall error or loss that ensures the overall consistency and reliability of the deep learning network.

[0038] At step 116, the backpropagating the backpropagating signal through the logic function into the first branch learning signal and the second branch learning signal includes determining a variation of the first branch signal and applying the predetermined function to the variation of the first branch signal becoming the first branch learning signal, such as at step 118. In other words, the variation of the first branch signal is determined. After that, the predetermined function, such as the derivative of the loss function with respect to the first branch signal is applied to the variation of the first branch signal. Finally, the first branch learning signal is converted to the first branch learning signal. As a result, by determining the variation of the first branch signal and applying a predetermined function, the method 100 is used to ensure that the first branch signal receives an accurate and relevant gradient information that leads to an effective parameter update thereby enhancing the overall performance, convergence speed, and generalization capabilities of the deep learning network. Similarly, at step 120, the method 100 includes determining the variation of the second branch signal and at step 122 the method 100 includes applying the predetermined function to the variation of the second branch signal becoming second branch learning signal. The determination of the variation of the second branch signal and applying the predetermined function to the variation of the second branch signal becoming second branch learning signal is used to ensure that the first branch signal receives an accurate and relevant gradient information that leads to an effective parameter update thereby enhancing the overall performance, convergence speed, and generalization capabilities of the deep learning network. In accordance with an embodiment, the predetermined function is based on a truth table for the logic function. Further, analysing the predetermined function on the truth table of the logic function ensures that the computation of the learning signal is aligned with the underlying Boolean logic operations employed in the merging process. Advantageously, by using a predetermined function based on the truth table of the logic function, the method 100 ensures consistency with the Boolean logic operations employed, improves interpretability and explainability, allows for tailored computation of the learning signal, maintains compatibility with backpropagation, and provides flexibility in selecting different logic functions for merging branch signals.

[0039] In accordance with an embodiment, the predetermined function is a loss function for the variation the function is applied to. Further, by utilizing the loss function as the predetermined function, the method 100 ensures that the computed learning signal is directly related to the objective of minimizing the loss or error, enabling effective optimization and parameter updates. Advantageously, by the use of the loss function, the method aligns the learning signal computation with deep learning objectives, provides flexibility in loss function selection, improves interpretability and explainability, maintains compatibility with backpropagation, and supports the development of tailored optimization strategies for the method 100.

[0040] In accordance with an embodiment, the logic function is an OR function and the method 100 includes determining the first branch learning signal to be the learning signal if the second branch signal is false, and if not, then the first branch learning signal is not determined, and determining the second branch learning signal to be the learning signal if the first branch signal is false, and if not, then the second branch learning signal is not determined. Utilizing the logic function, which is the OR function for determining the branch learning signals is used to effectively distribute the learning signal based on the state of the branch signals, ensuring efficient signal propagation in Boolean logic computing systems. In other words, when the OR function is applied and if the second branch signal is false, then, in that case, the first branch learning signal is set to the value of the learning signal. Conversely, if the first branch signal is false, then, in that case, the second branch learning signal is set to the learning signal. In addition, if either branch signal (i.e., the first branch signal and the second branch signal) is true, the corresponding learning signal is not determined. As a result, the utilization of the logic function enhances the performance of deep learning network, such as by reducing complex computations with enhanced overall processing time.

[0041] Advantageously, the method 100 is used for the deep learning network in the Boolean logic computing system with reduced computational complexity and resource utilization. The merging and unmerging of the first branch signal and the second ranch signal, such as by using the logic function allows an efficient signal processing and propagation thereby enhancing the robustness and compatibility of the Boolean logic computing system. In addition, the method 100 is used by the Boolean logic computing system to handle large-scale computations concurrently with reduced data movement requirements that eliminates the requirement to access 32-bit pre-activation values. Furthermore, the inclusion of backpropagation through the logic function ensures accurate gradient calculations, enabling effective learning and enhances the overall performance and scalability of the Boolean logic computing system.

[0042] The steps 102 to 122 are only illustrative, and other alternatives can also be provided where one or more steps are added, one or more steps are removed, or one or more steps are provided in a different sequence without departing from the scope of the claims herein.

[0043] There is provided a computer program comprising instructions that, when executed by a computer system, cause the computer system to implement the method 100. In an example, the instructions are implemented on the computer-readable media, which include, but are not limited to, Electrically Erasable Programmable Read-Only Memory (EEPROM), Random Access Memory (RAM), Read-Only Memory (ROM), Hard Disk Drive (HDD), Flash memory, a Secure Digital (SD) card, Solid-State Drive (SSD), a computer-readable storage medium, and / or CPU cache memory. In an example, the instructions are generated by a computer program, which is implemented in view of the method 100 for use for the deep learning network in the Boolean logic computing system.

[0044] FIG. 2 is a block diagram that depicts a Boolean logic computing system utilizing deep learning network, in accordance with an embodiment of the present disclosure. With reference to FIG. 2, there is shown a block diagram 200 that includes a Boolean logic computing system 202 and a deep learning network 204. Furthermore, the Boolean logic computing system 202 includes a controller 204, a memory 206, and a network interface 208. The controller 204 is configured to receive a first branch signal and a second branch signal input and facilitate further signal processing of the branch signals. Examples of the controller 204 may include but are not limited to a central data processing device, a microprocessor, a microcontroller, a complex instruction set computing (CISC) processor, an application-specific integrated circuit (ASIC) processor, a reduced instruction set (RISC) processor, a very long instruction word (VLIW) processor, a central processing unit (CPU), a state machine, a data processing unit, and other processors or circuitry.

[0045] The memory 206 is configured to store the instructions for the signal processing. Examples of implementation of the memory 206 may include, but are not limited to, Electrically Erasable Programmable Read-Only Memory (EEPROM), Dynamic Random-Access Memory (DRAM), Random Access Memory (RAM), Read-Only Memory (ROM), Hard Disk Drive (HDD), Flash memory, a Secure Digital (SD) card, Solid-State Drive (SSD), and / or CPU cache memory.

[0046] The network interface 208 includes hardware or software that is configured to establish communication between the controller 204 and the memory 206. Examples of the network interface card 208 may include, but are not limited to, a computer port, a network socket, a network interface controller (NIC), and any other network interface device.

[0047] There is provided the Boolean logic computing system 202 utilizing the deep learning network 208. The Boolean logic computing system 202 utilizes binary values (e.g., "True" or "False" and "0" or "1") for computing the input signals through logic functions, such as an AND operation, an OR operation, an XOR operation, and a NOT operation to process and merge signals within the deep learning network with reduced the computational complexity. In addition, the Boolean logic computing system 202 is configured to backpropagate errors through the deep learning network and update parameters based on Boolean logic operations. Moreover, the Boolean logic computing system 202 includes the controller 204 that is configured to receive a first branch signal. Once received, the first branch signal undergoes various logical operations and transformations in order to merge multiple branch signals and further backpropagate through the same with reduced computational complexity.

[0048] Furthermore, the controller 204 is configured to receive the second branch signal and the branch signals are logic signals. Moreover, a logic signal can take one out of a first value and a second value. Moreover, the second branch signal is captured, digitized, and then fed into the deep learning network's layers in order to ensure that both the branch signals (i.e., the first branch signal and the second branch signal) are merged and can be further utilized to perform complex logical operations with efficiency, accuracy, and reduced overall data processing time. Furthermore, the controller 204 is configured to merge the two branch signals into a feedforward signal and the two branch signals are merged utilizing a logic function. Moreover, the feedforward signal incorporates features from both branches (i.e., the first branch and the second branch) thereby enhancing the ability of the deep learning network to capture complex patterns and relationships in the data with reduced computational overhead. In addition, the feedforward signal is propagated through the deep learning network for further processing, learning, and decision-making.

[0049] The controller 204 is further configured to determine learning signal and unmerge the learning signal by backpropagating the backpropagating signal through the logic function into a first branch learning signal and a second branch learning signal. As a result, by unmerging the learning signal by backpropagating the backpropagating signal through the logic function into the first branch learning signal and the second branch learning signal ensures that the gradient information is correctly assigned to each branch, enabling precise parameter updates during backpropagation and enables the Boolean computing system to learn complex patterns with reduced the likelihood of gradient vanishing or explosion problems. Moreover, the Boolean logic computing system 202 is characterized in that the controller 204 is further configured to determine the learning signal by determining a variation of the feedforward signal and applying a predetermined function to the variation of the feedforward signal. Firstly, the variation of the feedforward signal is calculated, for example, by measuring the changes in the feedforward signal. After that, the variation is passed through a predetermined function, which is a derivative of a loss function that maps the predetermined function to the learning signal. Moreover, the determination of the variation of the feedforward signal is used to further determine the relationship between the feedforward signal and the learning signal in order to reduce overall error or loss that ensures the overall consistency and reliability of the deep learning network. Furthermore, backpropagating the backpropagating signal through the logic function into a first branch learning signal and a second branch learning signal comprises determining a variation of the first branch signal and applying the predetermined function to the variation of the first branch signal becoming the first branch learning signal and determining a variation of the second branch signal and applying the predetermined function to the variation of the second branch signal becoming the second branch learning signal. Advantageously, the Boolean logic computing system is configured to reduce computational complexity and resource utilization. The merging and unmerging of the first branch signal and the second ranch signal, such as by using the logic function allows an efficient signal processing and propagation thereby enhancing the robustness and compatibility of the Boolean logic computing system. In addition, the Boolean logic computing system 202 is configured to handle large-scale computations concurrently with reduced data movement requirements that eliminates the requirement to access 32-bit pre-activation values. Furthermore, the inclusion of backpropagation through the logic function ensures accurate gradient calculations, enabling effective learning and enhances the overall performance and scalability of the Boolean logic computing system 202.

[0050] FIG. 3A is a diagram that depicts an execution of a merge operation of two logic signals by using logic gate, in accordance with an embodiment of the present disclosure. With reference to FIG. 3 A, there is shown a diagram 300A depicting the execution of the merge operation.

[0051] In an implementation scenario, a first branch 302 and a second branch 304 having a first logic signal (SI) and a second logic signal (S2) is fed into a logic gate (L) 310, that gives output as a feedforward signal (S3). Moreover, the first logic signal and the second logic signal refer to discrete signals that take on two values representing binary states, such as "TRUE" / "FALSE" or "l" / "0". Moreover, such binary values allow the data and operations in the Boolean logic computing system 202 to be encoded and computed using efficient Boolean logic and logical operations. At operation 306, the first logic signal from the first branch 302 is fed to the logic gate 310. Similarly, at operation 308, the second logic signal from the second branch 304 is fed to the logic gate 310. Moreover, the logic gate (L) 310 executes specific logical operations, such as an AND operation, an OR operation, an XOR operation, an XNOR operation, and the like. Furthermore, the Logic Gate (L) 310 merges the first logic signal with the second logic signal and provides a feedforward signal (S3), such as at operation 312. In an implementation, the merging operation can be extended to handle more than two input signals by recursively applying the same merging process using multiple instances of the logic gates, which allows merging an arbitrary number of input logic signals using the efficient logic operations that are implemented using logic gates. Advantageously, by utilizing logic gates the merging operation can seamlessly combine binary values representing logical information in a discrete manner. Additionally, the merging operation is versatile, capable of handling more than two input signals by recursively applying the merging operation with multiple instances of logic gates.

[0052] FIG. 3B is a diagram that depicts an execution of a merge operation of two logic signals by using an OR logic gate, in accordance with an embodiment of the present disclosure. FIG. 3B is described in conjunction with elements from FIGs. 2 and 3 A. With the reference to FIG. 3B, there is shown a diagram 300B that depicts the execution of the merge operation by using the OR logic gate 318.

[0053] In an exemplary scenario, the first logic signal from the first branch 302 is passed to the OR gate 318, such as at operation 314 and the second logic signal from the second branch 304 is passed to the OR gate 318 at operation 316. Moreover, the OR gate 318 refers to a fundamental logic gate, which takes logic signals and produces a single output signal. In an implementation, the logic signals can be represented as "True" or "False", "0" or "1", and "+1" or "-1". Moreover, the various outputs for the execution of the merge operation on the first logic signal and the second logic signal having various possible binary values are given in the table given below: -

[0054] Table 1

[0055] As a result, the use of the OR logic gate 318 for the merge operation ensures an efficient combination of two logic signals (i.e., the first logic signal and the second logic signal) with reduced complexity and memory footprint.

[0056] FIG. 4 is a diagram that depicts a backpropagation of merged signals, in accordance with an embodiment of the present disclosure. With the reference to FIG. 4, there is given the backpropagation of the merged signals. In an implementation scenario, a logic signal (i.e., G) expressing the variation of a predefined function such as a loss function with respect to the variation of the feedforward signal (i.e., S) is fed to a logic gate 404, such as at operation 402. Thereafter, at operation 406, a first backpropagation signal (Gl) and at operation 408, a second b ackpropagation signal (G2) is obtained as an output of the logic gate 404. Moreover, such backpropagation signals, for example, the first backpropagation signal and the second backpropagation signal are computed as the variation of a predefined function, such as a loss function with respect to a variation of feedforward signal, considering the utilized gate L. Alternatively, a real-valued signal can also be fed to the logic gate 404 to obtain the backpropagation signals. Moreover, the real-valued signal (i.e., X) can be represented by a logic component "X_LOGIC" having a magnitude "|X|". Moreover, if the real-valued signal is equal to or greater than "0", then, in that case, the value of the logic component (X LOGIC) will be "TRUE". However, if the real-valued signal is not equal to or is less than "0", then, in that case, the value of the logic component (X LOGIC) will be "FALSE".

[0057] In an exemplary scenario, the first branch learning signal (i.e., Gl) is defined as the variation of the predefined function with respect to a variation of the first branch signal (i.e., SI), which is determined by the variation of the predefined function with respect to a variation of the feedforward signal (i.e., S) and the variation of feedforward signal with respect to a variation of the first branch signal. The variation of the predefined function with respect to the feedforward signal is the backpropagated signal. For the utilized logic (i.e., L), the variation of the feedforward signal with respect to a variation of the first branch signal can be determined by means of a truth table. Moreover, the first branch signal and the second branch signal are logic signals that takes two values. Thus, the truth table includes four possible cases of the first branch signal and the second branch signal. Firstly, the Boolean logic computing system 202 is configured to compute the corresponding value of the feedforward signal for each case. Thereafter, the inverse the value of the first ranch signal of each of the case is used to compute the new values of the feedforward signal. After that, the variation of the feedforward signal to the variation of the first branch signal is compared with each other. If the feedforward signal and the first branch signal vary in the same direction, then the variation of feedforward signal with respect to the first branch signal is set to "TRUE". However, of the feedforward signal varies in the opposite direction of that of the first branch signal, then, in that case, the variation of the feedforward signal with respect to the first branch signal is set to "FALSE". Finally, the first branch learning signal is set to XNOR and an example of truth table with XOR logic gate is given below in Table 2: -

[0058] Table 2 In addition, another example of truth table with OR logic gate is given below in Table 3 : -

[0059] Table 3

[0060] As a result, the method 100 is used for determining backpropagation signals (i.e., the first backpropagation signal and the second backpropagation signal) in order to ensure precise error propagation in deep learning network 210 thereby facilitating an improved performance and reliability of the Boolean logic computing system 202.

[0061] Modifications to embodiments of the present disclosure described in the foregoing are possible without departing from the scope of the present disclosure as defined by the accompanying claims. Expressions such as “including”, “comprising”, “incorporating”, “have”, “is” used to describe, and claim the present disclosure are intended to be construed in a non-exclusive manner, namely allowing for items, components or elements not explicitly described also to be present. Reference to the singular is also to be construed to relate to the plural. The word “exemplary” is used herein to mean “serving as an example, instance, or illustration”. Any embodiment described as “exemplary” is not necessarily to be construed as preferred or advantageous over other embodiments or to exclude the incorporation of features from other embodiments. The word “optionally” is used herein to mean “is provided in some embodiments and not provided in other embodiments”. It is appreciated that certain features of the present disclosure, which are, for clarity, described in the context of separate embodiments, may also be provided in combination in a single embodiment. Conversely, various features of the invention, which are, for brevity, described in the context of a single embodiment, may also be provided separately or in any suitable combination or as suitable in any other described embodiment of the disclosure.

Claims

CLAIMS1. A method (100) for use for a deep learning network (210) in a Boolean logic computing system (202), wherein the method (100) comprises receiving a first branch signal (302) receiving a second branch signal (304), wherein the branch signals are logic signals, wherein a logic signal can take one out of a first value and a second value , merging the two branch signals (306) into a feedforward signal (312), wherein the two branch signals are merged utilizing a logic function (310), determining a learning signal (402), and unmerging the learning signal (402) by backpropagating the backpropagating signal (402) through the logic function (404) into a first branch learning signal (406) and a second branch learning signal (408), wherein the method is characterized in that the method further comprises determining the learning signal by determining a variation of the feedforward signal (312) and applying a predetermined function to the variation of the feedforward signal (312), and wherein backpropagating the backpropagating signal (402) through the logic function (404) into a first branch learning signal and a second branch learning signal comprises determining a variation of the first branch signal (306) and applying the predetermined function to the variation of the first branch signal (SI (306)) becoming the first branch learning signal, and determining a variation of the second branch signal (308) and applying the predetermined function to the variation of the second branch signal (S2) becoming the second branch learning signal.

2. The method (100) according to claim 1, wherein the method (100) further comprises determining the learning signal (402) based on the variation of the predetermined function.

3. The method (100) according to claim 1 or 2, wherein the predetermined function is based on a truth table for the logic function.

4. The method (100) according to claim 3, wherein the predetermined function is a loss function for the variation the function is applied to.

5. The method (100) according to any preceding claim, wherein the learning signal (402) is a logic signal.

6. The method (100) according to any of claims 1 to 4, wherein the learning signal (402) is a real-valued signal, wherein the method (100) further comprises representing the learning signal as a tuple comprising the magnitude of the learning signal (402) and an indicator for the sign of the learning signal (402), and representing the first branch learning signal as a tuple comprising the magnitude of the learning signal (402) and an indicator for the sign of the first branch learning signal, and representing the second branch learning signal (408) as a tuple comprising the magnitude of the learning signal (402) and an indicator for the sign of the second branch learning signal.

7. The method (100) according to claim 6, indicator for the sign is TRUE if the learning signal (402) is larger or equal to 0, i.e. positive, and FALSE otherwise.

8. The method (100) according to any preceding claim, wherein the logical function is an OR function and wherein the method (100) comprises determining the first branch learning signal to be the learning signal if the second branch signal (308) is false, and if not, then the first branch learning signal is not determined, and determining the second branch learning signal to be the learning signal if the first branch signal (306) is false, and if not, then the second branch learning signal is not determined.

9. A computer program product comprising program instructions for performing the method according to any preceding claim, when executed by one or more processors in a Boolean logic computing system (202) utilizing deep learning network (210).

10. A Boolean logic computing system (202) utilizing a deep learning network (210), comprising a controller (204) configured to: receive a first branch signal (302), receive a second branch signal (304), wherein the branch signals are logic signals, wherein a logic signal can take one out of a first value (VI) and a second value (V2),merge the two branch signals into a feedforward signal (312), wherein the two branch signals are merged utilizing a logic function (310), determine learning signal and unmerge the learning signal (402) by backpropagating the backpropagating signal through the logic function (404) into a first branch learning signal and a second branch learning signal (408), wherein the Boolean logic computing system is characterized in that the controller is further configured to determine the learning signal by determining a variation of the feedforward signal (310) and applying a predetermined function to the variation of the feedforward signal (S (310)), and wherein backpropagating the backpropagating signal (402) through the logic function(404) into a first branch learning signal and a second branch learning signal comprises determining a variation of the first branch signal (306) and applying the predetermined function to the variation of the first branch signal (SI (306)) becoming the first branch learning signal, and determining a variation of the second branch signal (308) and applying the predetermined function to the variation of the second branch signal (308) becoming the second branch learning signal.

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