Touch panel and touch device
By designing the insulating boundary of the touch insulating layer and the electrical connection method of the conductive pattern, the short circuit problem caused by residual conductive material during the touch panel manufacturing process is solved, thereby improving the yield of the touch panel and the bonding effect of the flexible circuit board.
Patent Information
- Application Number
- PCT/CN2024/096574
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-05-31
- Publication Date
- 2025-12-04
AI Technical Summary
In the manufacturing process of existing flexible multilayer on-cell touch panels, the relatively thick thickness of the touch insulation layer leads to residual conductive material at the connection interface, which can easily cause short circuits and affect the yield of the touch panel.
The insulation boundary of the touch insulating layer is located on the side of the connection interface closer to the display area. The electrical connection of the conductive patterns is achieved through the vias of the first insulating layer and the touch insulating layer to avoid short circuits caused by residual conductive material. Different conductive pattern groups are set at intervals to ensure the reliability of the connection interface.
This effectively avoids short circuits in the connection interface, improves the yield rate of the touch panel, and ensures the bonding effect between the flexible circuit board and the connection interface.
Smart Images

Figure CN2024096574_04122025_PF_FP_ABST
Abstract
Description
Touch panel and touch device Technical Field
[0001] This application relates to the field of display technology, and in particular to a touch panel and touch device. Background Technology
[0002] To make display panels lighter and thinner to fit foldable and rollable products, flexible multi-layer on cell (FMLOC) touch panels were developed.
[0003] Summary of the Invention
[0004] This application provides a touch panel and a touch device, the technical solution of which is as follows:
[0005] On one hand, a touch panel is provided, the touch panel comprising: a display substrate and a touch substrate stacked together; the display substrate comprising:
[0006] A substrate having a display area and a peripheral area surrounding the display area, the peripheral area including at least a bonding area;
[0007] A plurality of pixel units located on one side of the substrate, the plurality of pixel units being located in the display area;
[0008] A plurality of first conductive pattern groups are located on one side of the substrate and spaced apart, and a plurality of second conductive patterns are corresponding one-to-one with the plurality of first conductive pattern groups, wherein the plurality of first conductive pattern groups and the plurality of second conductive patterns are located in the bonding area;
[0009] And a first insulating layer located on the side of the plurality of first conductive pattern groups away from the substrate, the first insulating layer having a plurality of openings, each of the openings being for exposing at least a portion of one of the first conductive pattern groups;
[0010] The touch substrate includes: a first touch wiring layer, a touch insulating layer, and a second touch wiring layer stacked sequentially along a side away from the display substrate; the orthographic projections of the first touch wiring layer, the touch insulating layer, and the second touch wiring layer on the substrate are at least located in the display area and the peripheral area;
[0011] The second touch trace layer includes a plurality of second conductive pattern groups corresponding to the plurality of first conductive pattern groups. Each second conductive pattern group includes a third conductive pattern and a fourth conductive pattern spaced apart. The third conductive pattern is electrically connected to the first conductive pattern group through the opening. Each third conductive pattern and the corresponding first conductive pattern group form a connection interface. The connection interface is used to connect to the driving circuit in the touch panel. The fourth conductive pattern is connected to the touch traces located in the peripheral area, or the fourth conductive pattern is connected to the touch electrode located in the display area.
[0012] The orthographic projection of the touch insulation boundary of the touch insulation layer on the substrate is located between the orthographic projections of the third conductive pattern and the fourth conductive pattern on the substrate.
[0013] The boundary of the second conductive pattern near the display area is closer to the display area than the touch insulation boundary. The fourth conductive pattern is electrically connected to the second conductive pattern at least through the touch insulation layer and the first via in the first insulation layer. The third conductive pattern is electrically connected to the second conductive pattern.
[0014] Optionally, each of the first conductive pattern groups includes a plurality of first conductive patterns stacked sequentially.
[0015] The second conductive pattern and the target first conductive pattern among the plurality of first conductive patterns are located on the same layer and are an integral structure. The target first conductive pattern is the first conductive pattern that is furthest from the substrate among the plurality of first conductive patterns. The third conductive pattern is electrically connected to the target first conductive pattern through the opening.
[0016] Optionally, the first insulating layer includes a first insulating portion and a second insulating portion; the distance between the surface of the first insulating portion away from the substrate and the bearing surface of the substrate is smaller than the distance between the surface of the second insulating portion away from the substrate and the bearing surface of the substrate.
[0017] The first insulating portion includes: an opening electrically connecting the third conductive pattern and the second conductive pattern, and a first via electrically connecting the fourth conductive pattern and the second conductive pattern;
[0018] At least a portion of the orthographic projection of the second insulating portion on the substrate is located between the orthographic projections of the third conductive pattern and the fourth conductive pattern on the substrate, and at least a portion of the orthographic projection of the second insulating portion on the substrate is located on the side of the orthographic projection of the touch insulating boundary on the substrate away from the display area.
[0019] Optionally, there is a first gap between the orthographic projection of the second insulating portion on the substrate and the orthographic projection of the opening on the substrate, and the first insulating portion is located at least at the first gap.
[0020] Optionally, each of the first conductive pattern groups includes a plurality of first conductive patterns stacked sequentially.
[0021] The second conductive pattern and the target first conductive pattern among the plurality of first conductive patterns are located on the same layer and are spaced apart. The target first conductive pattern is the first conductive pattern that is furthest from the substrate among the plurality of first conductive patterns. The third conductive pattern is electrically connected to the second conductive pattern at least through a second via in the first insulating layer. The second via in the first insulating layer is closer to the display area than the opening in the first insulating layer.
[0022] Optionally, the first insulating layer includes a first insulating portion and a second insulating portion; the distance between the surface of the first insulating portion away from the substrate and the bearing surface of the substrate is smaller than the distance between the surface of the second insulating portion away from the substrate and the bearing surface of the substrate.
[0023] The first insulating portion includes: an opening electrically connecting the third conductive pattern and the target first conductive pattern, a second via electrically connecting the third conductive pattern and the second conductive pattern, and a first via electrically connecting the fourth conductive pattern and the second conductive pattern;
[0024] At least a portion of the orthographic projection of the second insulating portion on the substrate is located between the orthographic projections of the third conductive pattern and the fourth conductive pattern on the substrate, and at least a portion of the orthographic projection of the second insulating portion on the substrate is located on the side of the orthographic projection of the touch insulating boundary on the substrate away from the display area.
[0025] Optionally, there is a gap between the orthographic projection of the second insulating portion on the substrate and the orthographic projection of the second via on the substrate, and the first insulating portion is located at least at the second gap.
[0026] Optionally, the third conductive pattern includes a first pattern portion and a second pattern portion;
[0027] The side of the first patterned portion closest to the substrate is electrically connected to the side of the target first conductive pattern furthest from the substrate through the opening;
[0028] The second patterned portion is in contact with the side of the substrate closer to the substrate and the first insulating portion is in contact with the side of the substrate farther away from the substrate.
[0029] Optionally, the third conductive pattern further includes a third pattern portion;
[0030] At least a portion of the third patterned portion is located on the side of the second insulating portion away from the substrate.
[0031] Optionally, when the second conductive pattern and the target first conductive pattern are located on the same layer and spaced apart, the second pattern portion is also electrically connected to the second conductive pattern through the second via.
[0032] Optionally, the first insulating layer further includes a third insulating portion, the third insulating portion being in contact with the surface of the substrate and the surface of the second insulating portion being away from the substrate;
[0033] The orthographic projection of the third insulating portion on the substrate is located within the orthographic projection of the second insulating portion on the substrate.
[0034] Optionally, the boundary of the orthographic projection of the third insulating portion on the substrate does not overlap with the boundary of the orthographic projection of the second insulating portion on the substrate.
[0035] Optionally, the first insulating portion and the second insulating portion are integrally formed using the same material.
[0036] Optionally, the first insulating part and the second insulating part are made of different materials, and the first insulating part and the second insulating part are prepared separately using two processes.
[0037] Optionally, the touch panel further includes: a protective layer located between the display substrate and the touch substrate; the first touch trace layer includes a touch trace pattern;
[0038] The protective layer has a protective boundary, and the orthographic projection of the protective boundary on the substrate is located between the orthographic projection of the opening on the substrate and the display area.
[0039] At least a portion of the boundary of the orthographic projection of the touch trace pattern on the substrate lies within the orthographic projection of the protective layer on the substrate.
[0040] Optionally, the touch panel further includes a second insulating layer located on the side of the touch substrate away from the display substrate;
[0041] The second insulating layer has an insulating layer boundary, the orthographic projection of which lies between the orthographic projection of the opening on the substrate and the orthographic projection of the touch insulating boundary on the substrate.
[0042] Optionally, the second insulating layer includes: a fourth insulating portion, a fifth insulating portion, and a sixth insulating portion;
[0043] The orthographic projection of the fourth insulating portion on the substrate covers the boundary of the third conductive pattern near the display area;
[0044] The orthographic projection of the fifth insulating portion on the substrate is located between the orthographic projections of the third conductive pattern and the fourth conductive pattern on the substrate.
[0045] The orthographic projection of the sixth insulating portion onto the substrate covers the boundary of the fourth conductive pattern away from the display area.
[0046] On the other hand, a touch panel is provided, the touch panel comprising: a display substrate and a touch substrate stacked together; the display substrate comprising:
[0047] A substrate having a display area and a peripheral area surrounding the display area, the peripheral area including at least a bonding area;
[0048] A plurality of pixel units located on one side of the substrate, the plurality of pixel units being located in the display area;
[0049] A plurality of first conductive pattern groups are located on one side of the substrate and are spaced apart, the plurality of first conductive pattern groups being located in the bonding area;
[0050] And a first insulating layer located on the side of the plurality of first conductive pattern groups away from the substrate, the first insulating layer having a plurality of first openings, each of the first openings being used to expose at least a portion of one of the first conductive pattern groups;
[0051] The touch substrate includes: a first touch wiring layer, a touch insulating layer, and a second touch wiring layer stacked sequentially along a side away from the display substrate; the orthographic projections of the first touch wiring layer, the touch insulating layer, and the second touch wiring layer on the substrate are at least located in the display area and the peripheral area;
[0052] The touch insulating layer includes a first touch insulating portion and a second touch insulating portion. The distance between the surface of the first touch insulating portion away from the substrate and the bearing surface of the substrate is smaller than the distance between the surface of the second touch insulating portion away from the substrate and the bearing surface of the substrate.
[0053] The orthographic projection of the boundary of the first touch insulating portion away from the display area on the substrate is located on the side of the orthographic projection of the first opening on the substrate away from the display area. The first touch insulating portion includes a second opening corresponding to the plurality of first openings. Each second opening communicates with the corresponding first opening, and each second opening is also used to expose at least a portion of a first conductive pattern group.
[0054] The orthographic projection of the boundary of the second touch insulating portion away from the display area on the substrate is located between the orthographic projection of the first opening on the substrate and the display area;
[0055] The second touch trace layer includes a plurality of fifth conductive patterns corresponding to the plurality of first conductive pattern groups. Each fifth conductive pattern is electrically connected to the corresponding first conductive pattern group through the second opening and the first opening. Each fifth conductive pattern and the corresponding first conductive pattern group are used to form a connection interface. The fifth conductive pattern is connected to the touch trace located in the peripheral area, or the fourth conductive pattern is connected to the touch electrode located in the display area. The connection interface is used to connect to the driving circuit in the touch panel to receive the driving signal provided by the driving circuit.
[0056] Optionally, the orthographic projection of the second opening on the substrate covers the orthographic projection of the first opening on the substrate, and the second opening is also used to expose a portion of the first insulating layer.
[0057] Optionally, the plurality of fifth conductive patterns and the plurality of first conductive pattern groups of the touch panel constitute a plurality of the connection interfaces;
[0058] The first touch-insulating portion is present between two adjacent connection interfaces.
[0059] In another aspect, a touch device is provided, the touch device comprising: a power supply component and a touch panel as described above;
[0060] The power supply component is connected to the touch panel and is used to supply power to the touch panel. Attached Figure Description
[0061] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0062] Figure 1 is a partial schematic diagram of the touch panel in one embodiment;
[0063] Figure 2 is a cross-sectional view of Figure 1 along the AA' direction;
[0064] Figure 3 is a schematic diagram of the structure of a touch panel provided in an embodiment of this application;
[0065] Figure 4 is a schematic diagram of another touch panel provided in an embodiment of this application;
[0066] Figure 5 is a partial cross-sectional schematic diagram of a touch panel provided in an embodiment of this application;
[0067] Figure 6 is a partial top view of a touch panel provided in an embodiment of this application;
[0068] Figure 7 is a cross-sectional view of Figure 6 along the BB' direction;
[0069] Figure 8 is a partial schematic diagram of a touch panel provided in an embodiment of this application;
[0070] Figure 9 is a cross-sectional view of Figure 8 along the CC' direction;
[0071] Figure 10 is a partial schematic diagram of another touch panel provided in an embodiment of this application;
[0072] Figure 11 is a cross-sectional view of Figure 10 along the DD' direction;
[0073] Figure 12 is a partial schematic diagram of another touch panel provided in an embodiment of this application;
[0074] Figure 13 is a cross-sectional view of Figure 12 along the EE' direction;
[0075] Figure 14 is a partial schematic diagram of another touch panel provided in an embodiment of this application;
[0076] Figure 15 is a cross-sectional view of Figure 14 along the FF' direction;
[0077] Figure 16 is a partial schematic diagram of another touch panel provided in an embodiment of this application;
[0078] Figure 17 is a cross-sectional view of Figure 16 along the GG' direction;
[0079] Figure 18 is a partial schematic diagram of another touch panel provided in an embodiment of this application;
[0080] Figure 19 is a cross-sectional view of Figure 18 along the HH' direction;
[0081] Figure 20 is a partial schematic diagram of another touch panel provided in an embodiment of this application;
[0082] Figure 21 is a cross-sectional view of Figure 20 along direction II';
[0083] Figure 22 is a partial schematic diagram of another touch panel provided in an embodiment of this application;
[0084] Figure 23 is a partial schematic diagram of another touch panel provided in an embodiment of this application;
[0085] Figure 24 is a cross-sectional view of Figure 23 along the JJ' direction;
[0086] Figure 25 is a schematic diagram of the process of forming a protective layer, a first touch wiring layer, a touch insulating layer, a second touch wiring layer and a second insulating layer according to an embodiment of this application.
[0087] Figure 26 is a schematic diagram of the structure of a touch device provided in an embodiment of this application. Detailed Implementation
[0088] To make the objectives, technical solutions, and advantages of this application clearer, the embodiments of this application will be described in further detail below with reference to the accompanying drawings.
[0089] In some embodiments, a touch panel generally includes a stacked display substrate and a touch substrate. The display substrate has a display area and a peripheral area surrounding the display area. The peripheral area includes at least a bonding area. The touch substrate includes a first touch wiring layer, a touch insulating layer, and a second touch wiring layer. The touch panel also includes a plurality of connection interfaces located in the bonding area, which are used for bonding with a flexible circuit board. To avoid affecting the bonding between the flexible circuit board and the connection interfaces due to the thickness of the touch insulating layer, the touch insulating layer in the area where the connection interfaces are located can usually be removed. That is, the touch insulating boundary is located on the side of the connection interface closer to the display area. The connection interface includes at least a pattern located in the second touch wiring layer.
[0090] However, during the fabrication of the first touch trace layer, conductive material from the first touch trace layer is easily left at the touch insulation boundary. Adjacent connection interfaces may short-circuit due to the residual conductive material, resulting in a poor yield of the touch panel.
[0091] Figure 1 is a partial schematic diagram of a touch panel in one embodiment. Figure 2 is a cross-sectional view of Figure 1 along the AA' direction. Referring to Figures 1 and 2, the touch panel 00 includes a display substrate 01 and a touch substrate 02 located on one side of the display substrate 01. The display substrate 01 includes at least a substrate 011, a first conductive layer 012, a first insulating layer 013, a second conductive layer 014, and a second insulating layer 015. The first conductive layer 012 includes multiple block-shaped first conductive patterns 0121, and the second conductive layer 014 includes multiple block-shaped second conductive patterns 0141. The touch substrate 02 includes a first touch wiring layer (not shown), a touch insulating layer 021, and a second touch wiring layer 022. The second touch wiring layer 022 includes multiple strip-shaped third conductive patterns 0221.
[0092] Each third conductive pattern 0221 is electrically connected to its corresponding second conductive pattern 0141 via a via in the second insulating layer 015, and each second conductive pattern 0141 is electrically connected to its corresponding first conductive pattern 0121 via a via in the first insulating layer 013. The locations where the first conductive pattern 0121, the second conductive pattern 0141, and the third conductive pattern 0231 are electrically connected constitute the connection interface 00a of the touch panel 00. The boundary of the touch insulating layer 021 is closer to the display area than the connection interface 00a; that is, there is no touch insulating layer 021 at the location of the connection interface 00a. This design is primarily because the relatively thick touch insulating layer 021 might affect the bonding between the connection interface 00a and the flexible circuit board.
[0093] When fabricating multiple third conductive patterns 0221, a single-layer touch trace film is first formed. Then, a photomask is used to pattern the touch trace film (patterning includes photoresist coating, exposure, development, etching, and photoresist removal) to obtain multiple third conductive patterns 0221. Because the touch insulating layer 021 is relatively thick and has a large profile angle, incomplete exposure occurs at the boundaries of the touch insulating layer 021 during the exposure process. Consequently, during the etching process, conductive material residue remains at the boundaries of the touch insulating layer 021. As shown in Figure 1, this design causes adjacent third conductive patterns 0221 to short-circuit through the residual conductive material, leading to a short circuit at the connection interface 00a and resulting in poor yield of the touch panel 00.
[0094] Figure 3 is a schematic diagram of the structure of a touch panel provided in an embodiment of this application. Figure 4 is a schematic diagram of the structure of another touch panel provided in an embodiment of this application. Figure 5 is a partial cross-sectional schematic diagram of a touch panel provided in an embodiment of this application. Figure 6 is a partial top view of a touch panel provided in an embodiment of this application. Figure 7 is a cross-sectional view of Figure 6 along the BB' direction. Referring to Figures 3 to 7, the touch panel 100 (touch screen panel, TSP) includes: a display substrate 101 and a touch substrate 102 stacked together.
[0095] The display substrate 101 includes: a substrate 1011, a plurality of pixel units 1012 located on one side of the substrate 1011, a plurality of first conductive pattern groups 1013 located on one side of the substrate 1011 and spaced apart, a plurality of second conductive patterns 1014 located on one side of the substrate 1011 and corresponding to the plurality of first conductive pattern groups 1013, and a first insulating layer 1015 located on the side of the first conductive pattern groups 1013 away from the substrate 1011.
[0096] Referring to Figure 3, the substrate 1011 has a display area 1011a and a peripheral area 1011b surrounding the display area 1011a. The peripheral area 1011b includes at least a bonding area 1011b1. The bonding area 1011b1 can be a region in the peripheral area 1011b located on one side of the display area 1011a, such as a region in the peripheral area 1011b located below the display area 1011a.
[0097] Referring to Figures 3 to 7, a plurality of pixel units 1012 are located in display area 1011a. A plurality of first conductive pattern groups 1013 are located in bonding area 1011b1, each first conductive pattern group 1013 including at least one first conductive pattern 10131. The first insulating layer 1015 has a plurality of openings K, each opening K for exposing at least a portion of a first conductive pattern group 1031.
[0098] Referring to Figure 7, the touch substrate 102 includes a first touch wiring layer 1021, a touch insulating layer 1022, and a second touch wiring layer 1023, sequentially stacked along the side away from the display substrate 101. The orthographic projections of the first touch wiring layer 1021, the touch insulating layer 1022, and the second touch wiring layer 1023 onto the substrate 1011 are located at least in the display area 1011a and the peripheral area 1011b. The first touch wiring layer may also be referred to as the first touch metal layer (TSP metal layer A, TMA) of the touch panel, and the second touch wiring layer 1022 may also be referred to as the second touch metal layer (TSP metal layer B, TMB) of the touch panel.
[0099] In this embodiment, referring to Figures 4 and 5, one of the first touch electrode layers 1021 and 1023 includes bridging electrodes s12 of multiple first touch electrodes s1, and the other touch electrode layer includes main electrodes s11 of multiple first touch electrodes s1 and multiple second touch electrodes s2. The bridging electrodes and main electrodes are electrically connected through vias in the touch insulating layer 1022. The touch insulating layer 1022 can be made of an organic material, facilitating the bending of the touch panel 100. Optionally, the touch insulating layer 1022 can be made of polyimide (PI).
[0100] Optionally, one of the first touch electrode s1 and the second touch electrode s2 is a transmitting (TX) electrode and the other is a sensing (RX) electrode.
[0101] Referring to Figure 4, the touch panel 100 includes a plurality of first touch electrodes s1 arranged along a first direction X, and a plurality of second touch electrodes s2 arranged along a second direction Y. Furthermore, the bridging electrode s12 of the first touch electrodes s1 is located in the region where the orthographic projections of the second touch electrodes s2 overlap.
[0102] Referring to Figure 4, the touch substrate 102 may further include: multiple touch traces s3. Each touch trace s3 has one touch electrode. For example, a portion of the multiple touch traces s3 are connected to a first touch electrode s1, and another portion of the touch traces are connected to a second touch electrode s2.
[0103] In this embodiment, the second touch trace layer 1023 includes a plurality of second conductive pattern groups 10231 corresponding to a plurality of first conductive pattern groups 1013. Each second conductive pattern group 10231 includes a third conductive pattern 102311 and a fourth conductive pattern 102312 spaced apart. The third conductive pattern 102311 is electrically connected to the first conductive pattern group 1013 through an opening K, and each third conductive pattern 102311 and the corresponding first conductive pattern group 1013 constitute a connection interface 100a. The connection interface 100a is used to connect to the driving circuit in the touch panel 100 to receive driving signals provided by the driving circuit.
[0104] In addition, the fourth conductive pattern 102312 is connected to the touch trace s3 located in the peripheral area 1011b. In this case, the fourth conductive pattern 102312 can be understood as a pattern connected to the touch trace s3.
[0105] Alternatively, the fourth conductive pattern 102312 can be connected to the touch electrode located in the display area 1011a. In this case, the fourth conductive pattern 102312 can be understood as part of the touch trace s3. The touch trace s3 is connected to the touch electrode located in the display area 1011a and extends to the bonding area 1011b1. The portion of the touch trace located in the bonding area 1011b1 is the fourth conductive pattern 102312.
[0106] The touch insulating layer 1022 has a touch insulating boundary 1022a, the orthographic projection of which onto the substrate 1011 lies between the orthographic projections of the third conductive pattern 102311 and the fourth conductive pattern 102312. That is, the touch insulating boundary 1022a of the touch insulating layer 1022 can be located at the interval between the third conductive pattern 102311 and the fourth conductive pattern 102312, and the touch insulating boundary 1022a is spaced apart from both the third and fourth conductive patterns 102311 and 102312. Furthermore, the second conductive pattern 1014 has a conductive pattern boundary 1014a closer to the display area 1011a, and this conductive pattern boundary 1014a is closer to the display area 1011a than the touch insulating boundary 1022a. That is, the orthographic projection of the touch insulating layer 1022 on the substrate 1011 covers the conductive pattern boundary 1014a of the second conductive pattern 1014, meaning that the touch insulating layer 1022 covers at least a portion of the second conductive pattern 1014.
[0107] In this embodiment, the fourth conductive pattern 102312 is electrically connected to the second conductive pattern 1014 at least through the first via G1 in the touch insulating layer 1022 and the first insulating layer 1015. That is, the portion of the touch insulating layer 1022 and the first insulating layer 1015 covering the second conductive pattern 1014 has the first via G1. The first via G1 is closer to the display area 1011a than the touch insulating boundary 1022a of the touch insulating layer 1022, and closer to the display area 1011a than the boundary of the first insulating layer 1015. This allows the first via G1 to expose at least a portion of the second conductive pattern 1014, thereby enabling the fourth conductive pattern 102312 to be electrically connected to at least a portion of the second conductive pattern 1014 exposed by the first via G1. Furthermore, the third conductive pattern 102311 is also electrically connected to the second conductive pattern 1014. That is, the third conductive pattern 102311 can be connected through the second conductive pattern 1014 and the fourth conductive pattern 102312.
[0108] In this embodiment, the driving circuit and the connection interface 100a (composed of the third conductive pattern 102311 and the corresponding first conductive pattern group 1013) are connected. The third conductive pattern 102311 is conductive through the second conductive pattern 1014 and the fourth conductive pattern 102312. The fourth conductive pattern 102312 is connected to the touch trace s3 located in the peripheral area 1011b, or the fourth conductive pattern 102312 is connected to the touch electrode located in the display area 1011a. Thus, the driving circuit can sequentially provide driving signals to the touch electrode through the connection interface 100a composed of the third conductive pattern 102311 and the first conductive pattern group 1013, the second conductive pattern 1014, and the fourth conductive pattern 102312, thereby realizing the touch function.
[0109] Optionally, the driving circuit can be integrated onto a flexible circuit board. The flexible circuit board can be connected to the third conductive pattern 102311 of the connection interface 100a, and then transmit driving signals to the touch electrodes through the third conductive pattern 102311, the second conductive pattern 1014, and the fourth conductive pattern 102312. The connection interface 100a is used to bond the flexible circuit board to the touch panel 100, and the area where the connection interface 100a is located can be referred to as FOP (flexible printed circuit on panel).
[0110] In this embodiment, if residual conductive material exists at the touch insulation boundary 1022a of the touch insulation layer 1022 during the fabrication of the second touch wiring layer 1023, then, since the third conductive pattern 102311 and the fourth conductive pattern 102312 are spaced apart, and the touch insulation boundary 1022a of the touch insulation layer 1022 is located at the interval between the third conductive pattern 102311 and the fourth conductive pattern 102312, the residual conductive material at the touch insulation boundary 1022a can be disconnected from the third conductive pattern 102311 and the fourth conductive pattern 102312. Therefore, the fourth conductive pattern 102312 in different second conductive pattern groups 10231 will not short-circuit through the residual conductive material, and the third conductive pattern 102311 in different second conductive pattern groups 10231 will not short-circuit through the residual conductive material. That is, short-circuiting between different connection interfaces 100a can be avoided, ensuring the yield rate of the touch panel.
[0111] In summary, this application provides a touch panel comprising a display substrate and a touch substrate stacked together. The display substrate includes a substrate, multiple pixel units, multiple first conductive pattern groups, multiple second conductive patterns, and a first insulating layer. The touch substrate includes a first touch wiring layer, a touch insulating layer, and a second touch wiring layer. A third conductive pattern in the second touch wiring layer is connected to the first conductive pattern group through an opening in the first insulating layer, and the third conductive pattern is also connected to the second conductive pattern. A fourth conductive pattern in the second touch wiring layer is connected to the touch electrode through a touch insulating layer, a first via in the first insulating layer, and the second conductive pattern, and the fourth conductive pattern is also connected to the touch electrode. This allows the driving circuit to sequentially connect to the touch electrode through the third conductive pattern, the second conductive pattern, and the fourth conductive pattern, providing a driving signal to the touch electrode. Furthermore, since the touch insulating boundary of the touch insulating layer is located between the third and fourth conductive patterns, even if residual conductive material exists at the touch insulating boundary during the fabrication of the second touch wiring layer, it will not cause short circuits between different fourth conductive patterns, nor will it cause short circuits between different third conductive patterns. This avoids short circuits between different connection interfaces and ensures a high yield rate for the touch panel.
[0112] In this embodiment of the application, referring to FIG7, each first conductive pattern group 1013 includes a plurality of first conductive patterns 10131 stacked sequentially, and the first conductive pattern 10131 furthest from the substrate 1011 among the plurality of first conductive patterns 10131 is the target first conductive pattern 10131a. The second conductive pattern 1014 and the target first conductive pattern 10131a are located in the same layer and are an integral structure, and the third conductive pattern 102311 is electrically connected to the second conductive pattern 1014 through the opening K.
[0113] The phrase "the second conductive pattern 1014 and the target first conductive pattern 10131a are located in the same layer" can mean that the second conductive pattern 1014 and the target first conductive pattern 10131a are made of the same material and prepared by the same patterning process. The phrase "the second conductive pattern 1014 and the target first conductive pattern 10131a are an integral structure" can mean that the second conductive pattern 1014 and the target first conductive pattern 10131a form a complete conductive structure, and the target first conductive pattern 10131a is equivalent to the second conductive pattern 1014. In this case, the target first conductive pattern 10131a and the second conductive pattern 1014 can be referred to as either the target first conductive pattern 10131a or the second conductive pattern 1014.
[0114] For example, in this embodiment of the application, the boundary 1014a of the second conductive pattern 1014 near the display area 1011a is the boundary of the target first conductive pattern 10131a near the display area 1011a. The third conductive pattern 102311 is electrically connected to the first conductive pattern group 1013 through the opening K, that is, the third conductive pattern 102311 is electrically connected to the second conductive pattern 1014 through the opening K.
[0115] That is, the driving circuit can sequentially provide driving signals to the touch electrode through the third conductive pattern 102311, the second conductive pattern 1014 (target first conductive structure), and the fourth conductive pattern 102312. Furthermore, the electrical connection between the third conductive pattern 102311 and the second conductive pattern 1014 can be achieved through the opening K in the first insulating layer 1015, without the need to provide vias in the first insulating layer 1015 to achieve the electrical connection.
[0116] In this embodiment, the boundary of the first insulating layer 1015 away from the display area 1011a is located on the side of the opening K away from the display area 1011a. That is, the first insulating layer 1015 is still disposed around the opening K on the first insulating layer 1015. Since the opening K is for the purpose of electrically connecting the third conductive pattern 102311 and the first conductive pattern group 1013 to form a connection interface 100a, in order to ensure the bonding effect between the flexible circuit board and the connection interface 100a, the thickness of the first insulating layer 1015 located around the opening K needs to be designed to be relatively thin.
[0117] Optionally, the first insulating layer 1015 includes at least a planarization layer (PLN) in the display substrate 101. The planarization layer can be prepared using a half-tone mask, such that the thickness of the portion of the planarization layer located in the display area 1011a is greater than the thickness of the portion of the planarization layer located around the opening K. That is, the distance between the portion of the planarization layer located in the display area 1011a away from the surface of the substrate 1011 and the bearing surface of the substrate 1011 is greater than the distance between the portion of the planarization layer located around the opening K away from the surface of the substrate 1011 and the bearing surface of the substrate 1011.
[0118] Furthermore, the fabrication process of the second touch wiring layer 1023 includes: forming a complete touch wiring film layer, and patterning the touch wiring film layer using a photomask to obtain the second touch wiring layer 1023. The patterning process includes: photoresist coating, exposure, development, etching, and photoresist removal. To form the gap between the third conductive pattern 102311 and the fourth conductive pattern 102312, the photoresist at this location needs to be exposed during the exposure process, followed by etching of the touch wiring film layer at this location during the etching process.
[0119] To ensure etching performance, over-etching is typically performed during the etching process. Therefore, to prevent the planar layer at the interval between the third conductive pattern 102311 and the fourth conductive pattern 102312 from becoming thinner after over-etching, referring to Figures 6 and 7, the first insulating layer 1015 includes a first insulating portion 10151 and a second insulating portion 10152. The distance between the surface of the first insulating portion 10151 away from the substrate 1011 and the bearing surface of the substrate 1011 is less than the distance between the surface of the second insulating portion 10152 away from the substrate 1011 and the bearing surface of the substrate 1011. That is, the thickness of the first insulating layer 1015 in the region where the first insulating portion 10151 is located is less than the thickness of the second insulating portion 10152 in the region where the second insulating portion 10152 is located.
[0120] The first insulating portion 10151 includes: an opening K electrically connecting the third conductive pattern 102311 and the second conductive pattern 1014, and a first via G1 electrically connecting the fourth conductive pattern 102312 and the second conductive pattern 1014. That is, both the opening K and the first via G1 are located in the first insulating portion 10151 of the first insulating layer 1015.
[0121] At least a portion of the orthographic projection of the second insulating portion 10152 on the substrate 1011 lies between the orthographic projections of the third conductive pattern 102311 and the fourth conductive pattern 102312 on the substrate 1011. At least a portion of the orthographic projection of the second insulating portion 10152 on the substrate 1011 lies on the side of the orthographic projection of the touch insulating boundary 1022a on the substrate 1011 that is away from the display area 1011a.
[0122] Because the thickness of the first insulating layer 1015 in the area where the second insulating portion 10152 is located is relatively thick, even if over-etching occurs between the third conductive pattern 102311 and the fourth conductive pattern 102312 when the second touch trace layer 1023 is formed, the thickness of the first insulating layer 1015 in the area where the second insulating portion 10152 is located will not be too thin, thus reducing the impact of over-etching on other film layers (such as the first conductive pattern group 1013).
[0123] Referring to Figure 7, the third conductive pattern 102311 includes a first pattern portion 1023111 and a second pattern portion 1023112. The side of the first pattern portion 1023111 closest to the substrate 1011 is electrically connected to the side of the target first conductive pattern 10131a furthest from the substrate 1011 through an opening K. The side of the second pattern portion 1023112 closest to the substrate 1011 is in contact with the side of the first insulating portion 10151 furthest from the substrate 1011. In this case, a portion of the first insulating portion 10151 (the first insulating portion 10151 not covered by the third conductive pattern 102311 in the figure) may be over-etched, but the impact is minimal.
[0124] Optionally, the thickness of the first insulating layer 1015 in the region where the first insulating portion 10151 is located is approximately 8000 angstroms (Å). However, due to the presence of the first conductive pattern group 1013, which has a certain thickness (approximately 7000 Å), the thickness of the first insulating layer 1015 in the region directly above the first conductive pattern group 1013 will be very small (e.g., less than 5000 Å). Consequently, the first insulating layer 1015 in the region directly above the first conductive pattern group 1013 will have a very low over-etching capacity, which may etch the underlying first conductive pattern group 1013, potentially affecting the yield of the connection interface 100a.
[0125] For the reasons stated above, Figure 8 is a partial schematic diagram of another touch panel provided in an embodiment of this application. Figure 9 is a cross-sectional view of Figure 8 along the CC' direction. Referring to Figures 8 and 9, the third conductive pattern 102311 further includes a third pattern portion 1023113. At least a portion of the third pattern portion 1023113 is located on the side of the second insulating portion 10152 away from the substrate 1011. That is, in the cross-section shown in Figure 9, the third conductive pattern 102311 completely covers the first insulating portion 10151, preventing the first insulating portion 10151 from being over-etched.
[0126] Referring to Figures 7 and 9, there is a first gap J1 between the orthographic projection of the second insulating portion 10152 on the substrate 1011 and the orthographic projection of the opening K on the substrate 1011, and the first insulating portion 10151 is located at least at the first gap J1. That is, there is a first insulating portion 10151 between the opening K and the second insulating portion 10152.
[0127] In this case, when forming the third conductive pattern 102311 of the second touch wiring layer 1023, the third conductive pattern 102311 can be electrically connected to the first conductive pattern group 1013 exposed by the opening K, and climb along the sidewall of the opening K to the surface of the first insulating portion 10151 away from the substrate 1011 (the climbing height can be the thickness of the first insulating portion 10151), and then climb along the sidewall of the second insulating portion 10152 to the surface of the second insulating portion 10152 away from the substrate 1011 (the climbing height can be the thickness of the second insulating portion 10152). That is, the third conductive pattern 102311 can undergo two climbings in sequence, avoiding the single climbing height being too high and affecting the yield of the third conductive pattern 102311.
[0128] Figure 10 is a partial schematic diagram of another touch panel provided in an embodiment of this application. Figure 11 is a cross-sectional view of Figure 10 along the DD' direction. Referring to Figures 10 and 11, each first conductive pattern group 1013 includes a plurality of first conductive patterns 10131 stacked sequentially, and the first conductive pattern 10131 furthest from the substrate 1011 among the plurality of first conductive patterns 10131 is the target first conductive pattern 10131a.
[0129] The second conductive pattern 1014 and the target first conductive pattern 10131a are located on the same layer and are spaced apart. The third conductive pattern 102311 is electrically connected to the second conductive pattern 1014 at least through the second via G2 in the first insulating layer 1015. The second via G2 in the first insulating layer 1015 is closer to the display area 1011a than the opening K in the first insulating layer 1015.
[0130] It should be noted that the second conductive pattern 1014 and the target first conductive pattern 10131a being in the same layer can mean that the second conductive pattern 1014 and the target first conductive pattern 10131a are made of the same material and prepared by the same patterning process. The second conductive pattern 1014 and the target first conductive pattern 10131a being spaced apart can mean that the second conductive pattern 1014 and the target first conductive pattern 10131a are two different patterns. In this case, the second conductive pattern 1014 can be a jumper pattern used to connect the third conductive pattern 102311 and the fourth conductive pattern 102312.
[0131] That is, the driving circuit can provide driving signals to the touch electrode through the third conductive pattern 102311, the second conductive pattern 1014, and the fourth conductive pattern 102312 in sequence. Furthermore, the electrical connection between the third conductive pattern 102311 and the second conductive pattern 1014 needs to be achieved by designing a second via G2 in the first insulating layer 1015.
[0132] In this embodiment of the application, referring to FIG11, the first insulating layer 1015 includes a first insulating portion 10151 and a second insulating portion 10152. The distance between the surface of the first insulating portion 10151 away from the substrate 1011 and the bearing surface of the substrate 1011 is less than the distance between the surface of the second insulating portion 10152 away from the substrate 1011 and the bearing surface of the substrate 1011. That is, the thickness of the first insulating layer 1015 in the region where the first insulating portion 10151 is located is less than the thickness of the first insulating layer 1015 in the region where the second insulating portion 10152 is located.
[0133] The first insulating portion 10151 includes: an opening K electrically connecting the third conductive pattern 102311 and the first conductive pattern group 1013, a second via G2 electrically connecting the third conductive pattern 102311 and the second conductive pattern 1014, and a first via G1 electrically connecting the fourth conductive pattern 102312 and the second conductive pattern 1014.
[0134] At least a portion of the orthographic projection of the second insulating portion 10152 on the substrate 1011 is located between the orthographic projections of the third conductive pattern 102311 and the fourth conductive pattern 102312 on the substrate 1011. At least a portion of the orthographic projection of the second insulating portion 10152 on the substrate 1011 is located on the side of the orthographic projection of the touch insulating boundary 1022a on the substrate 1011 that is away from the display area 1011a.
[0135] Compared to the scheme shown in Figure 9, the scheme shown in Figure 11 requires an additional second via G2 in the first insulating portion 10151 because the second conductive pattern 1014 and the target first conductive pattern 10131a are spaced apart, so that the third conductive pattern 102311 can be electrically connected to the second conductive pattern 1014 through the second via G2.
[0136] Because the thickness of the first insulating layer 1015 in the area where the second insulating portion 10152 is located is relatively thick, even if over-etching occurs between the third conductive pattern 102311 and the fourth conductive pattern 102312 when the second touch trace layer 1023 is formed, the thickness of the first insulating layer 1015 in the area where the second insulating portion 10152 is located will not be too thin, thus reducing the impact of over-etching on other film layers (such as the first conductive pattern group 1013).
[0137] Referring to Figure 11, the third conductive pattern 102311 includes a first pattern portion 1023111 and a second pattern portion 1023112. The side of the first pattern portion 1023111 closest to the substrate 1011 is electrically connected to the side of the target first conductive pattern 10131a furthest from the substrate 1011 through an opening K. The side of the second pattern portion 1023112 closest to the substrate 1011 is in contact with the side of the first insulating portion 10151 furthest from the substrate 1011. In this case, a portion of the first insulating portion 10151 (the first insulating portion 10151 not covered by the third conductive pattern 102311 in the figure) may be over-etched, but the impact is minimal.
[0138] Furthermore, referring to FIG11, the third conductive pattern 102311 also includes a third pattern portion 1023113. At least a portion of the third pattern portion 1023113 is located on the side of the second insulating portion 10152 away from the substrate 1011. That is, in the cross-section shown in FIG11, the third conductive pattern 102311 completely covers the first insulating portion 10151, preventing the first insulating portion 10151 from being over-etched.
[0139] Referring to Figure 11, there is a second interval J2 between the orthographic projection of the second insulating portion 10152 on the substrate 1011 and the orthographic projection of the second via G2 on the substrate 1011, and the first insulating portion 10151 is located at least at the second interval J2. That is, there is a first insulating portion 10151 between the second via G2 and the second insulating portion 10152.
[0140] In this case, when forming the third conductive pattern 102311 of the second touch wiring layer 1023, the third conductive pattern 102311 can be electrically connected to the first conductive pattern 10131 exposed by the second via G2, and climb along the sidewall of the second via G2 to the surface of the first insulating portion 10151 away from the substrate 1011 (the climbing height can be the thickness of the first insulating portion 10151), and then climb along the sidewall of the second insulating portion 10152 to the surface of the second insulating portion 10152 away from the substrate 1011 (the climbing height can be the thickness of the second insulating portion 10152). That is, the third conductive pattern 102311 can undergo two climbings in sequence, avoiding the single climbing height being too high and affecting the yield of the third conductive pattern 102311.
[0141] In this embodiment of the application, FIG12 is a partial schematic diagram of another touch panel provided in this embodiment of the application. FIG13 is a cross-sectional view of FIG12 along the EE' direction. FIG14 is a partial schematic diagram of another touch panel provided in this embodiment of the application. FIG15 is a cross-sectional view of FIG14 along the FF' direction. Referring to FIG12 to FIG15, the first insulating layer 1015 further includes a third insulating portion 10153. The third insulating portion 10153 is in contact with the surface of the substrate 1011 near the substrate and the second insulating portion 10152 is in contact with the surface of the substrate 1011 away from the substrate. The orthographic projection of the third insulating portion 10153 on the substrate 1011 lies within the orthographic projection of the second insulating portion 10152 on the substrate 1011.
[0142] Since the area containing the second insulating portion 10152 needs to withstand over-etching during the formation of the second touch wiring layer 1023, a third insulating portion 10153 can be provided on the side of the second insulating portion 10152 away from the substrate 1011 to further increase its over-etching capability. In this case, when the second touch wiring layer 1023 is formed, the third insulating portion 10153 is over-etched first. After the third insulating portion 10153 has been over-etched, the second insulating portion 10152 can continue to withstand over-etching. This design can further avoid the impact of over-etching on other film layers.
[0143] Optionally, the boundary of the orthographic projection of the third insulating portion 10153 onto the substrate 1011 does not overlap with the boundary of the orthographic projection of the second insulating portion 10152 onto the substrate 1011.
[0144] Referring to Figure 13, when a portion of the third conductive pattern 102311 is located on the surface of the third insulating portion 10153 away from the substrate 1011, the third conductive pattern 102311 can be electrically connected to the first conductive pattern group 1013 exposed by the opening K, and climb along the sidewall of the opening K to the surface of the first insulating portion 10151 away from the substrate 1011 (the climbing height can be the thickness of the first insulating portion 10151), then climb along the sidewall of the second insulating portion 10152 to the surface of the second insulating portion 10152 away from the substrate 1011 (the climbing height can be the thickness of the second insulating portion 10152), and finally climb along the sidewall of the third insulating portion 10153 to the surface of the third insulating portion 10153 away from the substrate 1011 (the climbing height can be the thickness of the third insulating portion 10153). In other words, the third conductive pattern 102311 can go through three ramps in sequence to avoid the yield of the third conductive pattern 102311 being affected by the excessive height of a single ramp.
[0145] Referring to Figure 15, when a portion of the third conductive pattern 102311 is located on the surface of the third insulating portion 10153 away from the substrate 1011, the third conductive pattern 102311 can be electrically connected to the second conductive pattern 1014 exposed by the second via G2, and climb along the sidewall of the second via G2 to the surface of the first insulating portion 10151 away from the substrate 1011 (the climbing height can be the thickness of the first insulating portion 10151), then climb along the sidewall of the second insulating portion 10152 to the surface of the second insulating portion 10152 away from the substrate 1011 (the climbing height can be the thickness of the second insulating portion 10152), and finally climb along the sidewall of the third insulating portion 10153 to the surface of the third insulating portion 10153 away from the substrate 1011 (the climbing height can be the thickness of the third insulating portion 10153). In other words, the third conductive pattern 102311 can go through three ramps in sequence to avoid the yield of the third conductive pattern 102311 being affected by the excessive height of a single ramp.
[0146] In this embodiment, the first insulating portion 10151 and the second insulating portion 10152 can be fabricated using the same material and based on a halftone mask. For example, both the first insulating portion 10151 and the second insulating portion 10152 belong to the planarization layer in the display substrate 101. As shown in Figures 7, 9, 13, and 15, the first insulating portion 10151 and the second insulating portion 10152 are represented by the same fill pattern. In this case, the first insulating portion 10151 can be referred to as a halftone planarization layer (HPLN), and the second insulating portion 10152 can be referred to as a planarization layer (PLN).
[0147] Alternatively, the first insulating portion 10151 and the second insulating portion 10152 can be made of different materials, and the first insulating portion 10151 and the second insulating portion 10152 are prepared separately using two processes. For example, the first insulating portion 10151 belongs to the planarization layer in the display substrate 101. The second insulating portion 10152 belongs to the pixel defining layer or support layer in the display substrate 101. As shown in FIG11, the first insulating portion 10151 and the second insulating portion 10152 are represented by different filling patterns.
[0148] Optionally, when both the first insulating portion 10151 and the second insulating portion 10152 are planarization layers, as shown in Figures 13 and 15, a third insulating portion 10153 can be provided on the side of the second insulating portion 10152 away from the substrate 1011. The third insulating portion 10153 can belong to the pixel definition layer in the display substrate 101. This pixel definition layer can be prepared using a halftone mask. The third insulating portion 10153 can be a halftone pixel definition layer (HPDL), meaning the thickness of the third insulating portion 10153 can be less than the thickness of the pixel definition layer located in the display area 1011a. When the first insulating portion 10151 is a planarization layer and the second insulating portion 10152 is a support layer, since there is usually no suitable film layer in the display substrate 101 located in the support layer away from the substrate 1011 to prepare the third insulating portion 10153, the third insulating portion 10153 does not need to be provided in Figure 11.
[0149] In this embodiment, referring to Figures 7, 9, 11, 13, and 15, the touch panel 100 further includes a protective layer 103 located between the display substrate 101 and the touch substrate 102. The main function of the protective layer 103 is to improve the reliability of the stacked connection between the touch substrate 102 and the display substrate 101. Additionally, the first touch wiring layer 1021 includes a touch wiring pattern 10211. Furthermore, the protective layer 103 also has a first via G1 for electrically connecting the fourth conductive pattern 102312 and the second conductive pattern 1014.
[0150] The protective layer 103 has a protective boundary 103a, the orthographic projection of which onto the substrate 1011 lies between the orthographic projection of the opening K onto the substrate 1011 and the display area 1011a. Optionally, the protective layer 103 and the touch insulating layer 1022 can be formed using the same mask and the same patterning process. That is, the orthographic projections of the protective boundary 103a of the protective layer 103 onto the substrate 1011 and the touch insulating boundary 1022a of the touch insulating layer 1022 onto the substrate 1011 can be formed in a single process. In this case, the orthographic projection of the touch wiring pattern 10211 onto the substrate 1011 lies within the orthographic projection of the protective layer 103 onto the substrate 1011. This avoids affecting the touch wiring pattern 10211 of the first touch wiring layer 1021 when fabricating the second touch wiring layer 1023.
[0151] Figure 16 is a partial schematic diagram of another touch panel provided in an embodiment of this application. Figure 17 is a cross-sectional view of Figure 16 along the GG' direction. Figure 18 is a partial schematic diagram of another touch panel provided in an embodiment of this application. Figure 19 is a cross-sectional view of Figure 18 along the HH' direction. Referring to Figures 16 to 19, the touch panel 100 further includes a second insulating layer 104 located on the side of the touch substrate 102 away from the display substrate 101. The second insulating layer 104 has an insulating layer boundary 104a, the orthographic projection of the insulating layer boundary 104a on the substrate 1011 being located between the orthographic projection of the opening K on the substrate 1011 and the orthographic projection of the touch insulating boundary 1022a on the substrate 1011.
[0152] Optionally, referring to Figures 17 and 19, the orthographic projection of the insulating layer boundary 104a onto the substrate 1011 lies between the orthographic projection of the boundary of the third conductive pattern 102311 near the substrate 1011 onto the substrate 1011 and the orthographic projection of the opening K onto the substrate 1011. That is, the orthographic projection of the second insulating layer 104 onto the substrate 1011 can cover the boundary of the third conductive pattern 102311 near the substrate 1011 and the boundary of the fourth conductive pattern 102312 away from the substrate 1011. This design allows the second insulating layer 104 to protect both the third conductive pattern 102311 and the fourth conductive pattern 102312.
[0153] Figure 20 is a partial schematic diagram of another touch panel provided in an embodiment of this application. Figure 21 is a cross-sectional view of Figure 20 along the II' direction. Referring to Figures 20 and 21, the second insulating layer 104 includes: a fourth insulating portion 1041, a fifth insulating portion 1042, and a sixth insulating portion 1043. The orthographic projection of the fourth insulating portion 1041 on the substrate 1011 covers the boundary of the third conductive pattern 102311 near the display area 1011a. The orthographic projection of the fifth insulating portion 1042 on the substrate 1011 is located between the orthographic projections of the third conductive pattern 102311 and the fourth conductive pattern 102312 on the substrate 1011. The orthographic projection of the sixth insulating portion 1043 on the substrate 1011 covers the boundary of the fourth conductive pattern 102312 away from the display area 1011a.
[0154] The fourth insulating portion 1041 can be used to protect the third conductive pattern 102311 near the boundary of the display area 1011a, and the sixth insulating portion 1043 can be used to protect the fourth conductive pattern 102312 away from the boundary of the display area 1011a. Furthermore, the orthographic projection of the fifth insulating portion 1042 on the substrate 1011 can lie within the orthographic projection of the second insulating portion 10152 of the first insulating layer 1015 on the substrate 1011. In this case, the fifth insulating portion 1042 can be used to form a dam in the touch panel. The main function of the dam is to prevent the overflow of organic materials in the touch panel 100.
[0155] Optionally, the touch panel 100 also includes an encapsulation film layer (not shown) located on the side of the second insulating layer 104 away from the display substrate 101. The encapsulation film layer includes a first film layer, a second film layer, and a third film layer stacked sequentially in a direction away from the display substrate 101.
[0156] Optionally, the first and third films can be made of inorganic materials, and the second film can be made of organic materials. For example, the first and third films can be made of one or more inorganic oxides such as SiNx (silicon nitride), SiOx (silicon oxide), and SiOxNy (silicon oxynitride). The second film can be made of a resin material. The resin can be a thermoplastic resin or a thermosetting resin, where the thermoplastic resin can include acrylic (PMMA) resin and the thermosetting resin can include epoxy resin.
[0157] It should be noted that the second film layer can be located on the side of the barrier dam (fifth insulating portion 1042) near the display area 1011a. The barrier dam can be an annular dam surrounding the display area 1011a, and the first and third film layers can cover the area enclosed by the barrier dam, and cover the barrier dam itself. That is, the orthographic projection of the barrier dam on the substrate 1011 is located within the area covered by the encapsulation film layer, thereby ensuring the effective encapsulation of the various structures located within the area enclosed by the barrier dam.
[0158] In this embodiment, the second film layer can be fabricated using inkjet printing (IJP). The first and third film layers can be fabricated using chemical vapor deposition (CVD).
[0159] In the embodiments of this application, each first conductive pattern group 1013 includes a plurality of first conductive patterns 10131 which may be located in different conductive film layers in the display substrate 101.
[0160] Referring to Figure 22, the display substrate 101 includes: a first barrier layer n1, a light-shielding layer (BSM) n2, a second barrier layer n3, a first buffer layer n4, an active layer n5, a first gate insulator n6 (GI1), a first gate layer n7 (gate1), a second gate insulator n8 (GI2), a second gate layer n9 (gate2), a first inter-level dielectric layer n10 (ILD1), a second buffer layer n11 (buffer2), an oxide layer n12, a third gate insulator n13 (GI3), a third gate layer n14 (gate3), a second inter-level dielectric layer n15 (ILD2), a first source-drain layer n16 (SD1), a passivation layer n17 (PVX), and a first planarization layer n18. The layers are: n19 (SD2), n20 (PLN2), n21 (SD3), n22 (PLN3), n23 (anode layer), n24 (pixel definition layer, PDL), n25 (Supporting layer, PS), n26 (light-emitting layer), and n27 (cathode layer).
[0161] The first buffer layer n4 may include a first sub-buffer layer and a second sub-buffer layer sequentially stacked along a direction away from the substrate 1011. The material of the first sub-buffer layer may be SiN (silicon nitride), and the material of the second sub-buffer layer may be (SiO) silicon oxide. The active layer n5 may be made of single-crystal silicon (P-Si). The oxide layer n12 may be made of indium gallium zinc oxide (IGZO).
[0162] The display substrate 101 includes a plurality of pixel units 1012, each of which may include a pixel circuit and a light-emitting unit. The pixel circuit may include a plurality of thin-film transistors and at least one storage capacitor C. As shown in FIG22, some of the thin-film transistors may be low-temperature poly-silicon (LTPS) thin-film transistors T1, and the other portion of the thin-film transistors may be low-temperature polycrystalline oxide (LTPO) thin-film transistors T2.
[0163] The active layer n5 includes multiple active patterns, each active pattern including a source region and a drain region. Each LTPS thin-film transistor T1 may include one active pattern. The first gate layer n7 includes multiple first gate patterns and multiple second gate patterns. Each LTPS thin-film transistor T1 may include one first gate pattern. The storage capacitor C may include one second gate pattern, which can serve as a capacitor plate of the storage capacitor C. The first source-drain layer n16 includes a first source pattern and a first drain pattern. The first source pattern and the source region of the active pattern are connected, and the first drain pattern and the drain region of the active pattern are connected. Each LTPS thin-film transistor T1 may include a first source pattern and a first drain pattern.
[0164] The second gate layer n9 includes multiple third gate patterns and multiple fourth gate patterns. Each LTPO thin-film transistor T1 may include a third gate pattern, which serves as the bottom gate of the LTPO thin-film transistor. The storage capacitor C may include a fourth gate pattern, which can serve as another capacitor plate of the storage capacitor C. The oxide layer n12 includes multiple oxide patterns, and each LTPO thin-film transistor T1 may include one oxide pattern. The third gate layer n14 includes multiple fifth gate patterns, and each LTPO thin-film transistor T1 may include one fifth gate pattern, which serves as the top gate of the LTPO thin-film transistor. The first source-drain layer n16 includes a second source pattern and a second drain pattern. The second source pattern is connected to the oxide pattern, and the second drain pattern is connected to the oxide pattern. Each LTPO thin-film transistor T2 may include a second source pattern and a second drain pattern.
[0165] Furthermore, the second source-drain layer n19 includes multiple first connection patterns, and the third source-drain layer n21 includes multiple second connection patterns. At least one of the multiple thin-film transistors included in the pixel circuit is connected to the anode pattern in the anode layer n23 via the first and second connection patterns. Additionally, the light-emitting pattern included in the light-emitting layer n26 can be connected to the anode pattern, and the cathode layer n27 can be connected to the light-emitting pattern.
[0166] As can be seen from Figures 3 to 21, the first conductive pattern group 1013 includes two first conductive patterns 10131. For the display substrate shown in Figure 22, in each first conductive pattern group 1013 in Figures 3 to 21, one of the first conductive patterns 10131 is located in the second source-drain layer n19, and the other first conductive pattern 10131 is located in the third source-drain layer n21.
[0167] At least a first insulating portion 10151 in the first insulating layer 1015 is located in the third planarization layer n22. As shown in Figures 7, 9, 13, 15, and 17, a second insulating portion 10152 in the first insulating layer 1015 is also located in the third planarization layer n22. As shown in Figures 11, 19, and 21, the second insulating portion 10152 in the first insulating layer 1015 may be located in the pixel defining layer n24 or the support layer n25.
[0168] If the display substrate includes two source-drain layers, then in each first conductive pattern group 1013 of Figures 3 to 21, one first conductive pattern 10131 is located in the first source-drain layer, and the other first conductive pattern 10131 is located in the second source-drain layer. If the display substrate includes one source-drain layer, then in each first conductive pattern group 1013 of Figures 3 to 21, one first conductive pattern 10131 is located in the gate layer, and the other first conductive pattern 10131 is located in the source-drain layer. Alternatively, the two first conductive patterns 10131 included in the first conductive pattern group 1013 can be located in any two conductive layers.
[0169] Alternatively, the first conductive pattern group 1013 may include a first conductive pattern 10131, which may be located in any conductive layer of the display substrate shown in FIG. 22. For example, it may be located in the first gate layer, the second gate layer, the third gate layer, the first source-drain layer, the second source-drain layer, or the third source-drain layer.
[0170] Alternatively, the first conductive pattern group 1013 may include three first conductive patterns 10131, which may be located in the first source-drain layer, the second source-drain layer, and the third source-drain layer of the display substrate shown in FIG22, respectively. Or the three first conductive patterns 10131 included in the first conductive pattern group 1013 may be located in any three conductive layers.
[0171] Optionally, the substrate 1011 in the display substrate 101 may include a first substrate 10111, a second substrate 10112, and a third substrate 10113 stacked sequentially. The first substrate 10111 and the third substrate 10113 may be flexible substrates, for example, the material of the first substrate 10111 and the third substrate 10113 may be polyimide (PI). The second substrate 10112 may serve as a barrier layer, and its material may be amorphous silicon (a-Pi).
[0172] In this embodiment, the display substrate 101 included in the touch panel 100 can be an organic light-emitting diode (OLED) display substrate. The touch insulating layer 1022 can also be referred to as an overcoating (OC). The second insulating layer 104 can also be referred to as a touch overcoating (OC).
[0173] Referring to Figure 22, it can also be seen that the peripheral region 1011b of the substrate 101 does not require an inorganic material layer, but instead has an organic material layer such as the first planarization layer n18 and the second planarization layer n20. Since this region only has an organic material layer, it is easy to bend. Meanwhile, the display substrate 101 also includes a wiring pattern F. The wiring pattern F in Figure 22 is located in the second source / drain layer n19.
[0174] In summary, this application provides a touch panel comprising a display substrate and a touch substrate stacked together. The display substrate includes a substrate, multiple pixel units, multiple first conductive pattern groups, multiple second conductive patterns, and a first insulating layer. The touch substrate includes a first touch wiring layer, a touch insulating layer, and a second touch wiring layer. A third conductive pattern in the second touch wiring layer is connected to the first conductive pattern group through an opening in the first insulating layer, and the third conductive pattern is also connected to the second conductive pattern. A fourth conductive pattern in the second touch wiring layer is connected to the touch electrode through a touch insulating layer, a first via in the first insulating layer, and the second conductive pattern, and the fourth conductive pattern is also connected to the touch electrode. This allows the driving circuit to sequentially connect to the touch electrode through the third conductive pattern, the second conductive pattern, and the fourth conductive pattern, providing a driving signal to the touch electrode. Furthermore, since the touch insulating boundary of the touch insulating layer is located between the third and fourth conductive patterns, even if residual conductive material exists at the touch insulating boundary during the fabrication of the second touch wiring layer, it will not cause short circuits between different fourth conductive patterns, nor will it cause short circuits between different third conductive patterns. This avoids short circuits between different connection interfaces and ensures a high yield rate for the touch panel.
[0175] Figure 23 is a partial schematic diagram of another touch panel provided in an embodiment of this application. Figure 24 is a cross-sectional view of Figure 23 along the JJ' direction. Referring to Figures 23 and 24, the touch panel 100 includes a display substrate 101 and a touch substrate 102 stacked together.
[0176] Referring to Figures 3, 23 and 24, the display substrate 101 includes: a substrate 1011, a plurality of pixel units 1012 located on one side of the substrate 1011, a plurality of first conductive pattern groups 1013 located on one side of the substrate 1011 and spaced apart, and a first insulating layer 1015 located on the side of the first conductive pattern group 1013 away from the substrate 1011.
[0177] Referring to Figure 3, the substrate 1011 has a display area 1011a and a peripheral area 1011b surrounding the display area 1011a. The peripheral area 1011b includes at least a bonding area 1011b1. The bonding area 1011b1 can be a region in the peripheral area 1011b located on one side of the display area 1011a, such as a region in the peripheral area 1011b located below the display area 1011a.
[0178] Referring to Figures 3, 4, and 24, a plurality of pixel units 1012 are located in display area 1011a. A plurality of first conductive pattern groups 1013 are located in bonding area 1011b1, each first conductive pattern group 1013 including at least one first conductive pattern 10131. A first insulating layer 1015 has a plurality of first openings K1, each first opening K1 for exposing at least a portion of a first conductive pattern group 1013.
[0179] Referring to Figure 24, the touch substrate 102 includes a first touch wiring layer 1021, a touch insulating layer 1022, and a second touch wiring layer 1023, sequentially stacked along the side away from the display substrate 101. The orthographic projections of the first touch wiring layer 1021, the touch insulating layer 1022, and the second touch wiring layer 1023 onto the substrate 1011 are located at least in the display area 1011a and the peripheral area 1011b. The first touch wiring layer may also be referred to as the first touch metal layer (TSP metal layer A, TMA) of the touch panel, and the second touch wiring layer 1022 may also be referred to as the second touch metal layer (TSP metal layer B, TMB) of the touch panel.
[0180] In this embodiment of the application, referring to Figures 4 and 5, one of the first touch electrode layers 1021 and 1023 includes bridging electrodes s12 of multiple first touch electrodes s1, and the other touch electrode layer includes main electrodes s11 of multiple first touch electrodes s1 and multiple second touch electrodes s2. The bridging electrodes and main electrodes are electrically connected through vias in the touch insulating layer 1022. The touch insulating layer 1022 can be made of an organic material, facilitating the bending of the touch panel 100.
[0181] Optionally, one of the first touch electrode s1 and the second touch electrode s2 is a transmitting (TX) electrode and the other is a sensing (RX) electrode.
[0182] Referring to Figure 4, the touch panel 100 includes a plurality of first touch electrodes s1 arranged along a first direction X, and a plurality of second touch electrodes s2 arranged along a second direction Y. Furthermore, the bridging electrode s12 of the first touch electrodes s1 is located in the region where the orthographic projections of the second touch electrodes s2 overlap.
[0183] Referring to Figure 4, the touch substrate 102 may further include: multiple touch traces s3. Each touch trace s3 has one touch electrode. For example, a portion of the multiple touch traces s3 are connected to a first touch electrode s1, and another portion of the touch traces are connected to a second touch electrode s2.
[0184] The touch insulating layer 1022 includes a first touch insulating portion 10221 and a second touch insulating portion 10222. The distance between the surface of the first touch insulating portion 10221 away from the substrate 1011 and the bearing surface of the substrate 1011 is less than the distance between the surface of the second touch insulating portion 10222 away from the substrate 1011 and the bearing surface of the substrate 1011. That is, the thickness of the first touch insulating portion 10221 is less than the thickness of the second touch insulating portion 10222.
[0185] The orthographic projection of the boundary of the first touch insulating portion 10221 away from the display area 1011a on the substrate 1011 is located on the side of the first opening K1 on the substrate 1011 away from the display area 1011a. The first touch insulating portion 10221 includes a second opening K2, which is connected to the first opening K1, and the second opening K2 is also used to expose at least a portion of at least one first conductive pattern 10131.
[0186] The orthographic projection of the boundary of the second touch insulating portion 10222 away from the display area 1011a onto the substrate 1011 lies between the orthographic projection of the first opening K1 onto the substrate 1011 and the display area 1011a. That is, the touch insulating layer 1022 is thinner in the area surrounding the first opening K1, while the touch insulating layer 1022 is thicker in the area relatively far from the first opening K1.
[0187] This design avoids the bonding process between the connection interface 100a and the flexible circuit board being affected by the thickness of the touch insulating layer 1022 in the peripheral area 1011b of the first opening K1. Furthermore, it avoids the first touch wiring layer 1021 and the second touch wiring layer 1023 being too close in the direction perpendicular to the substrate 1011 due to the thinner thickness of the touch insulating layer 1022 in a location far from the first opening K1 (such as the display area 1011a), thus preventing them from interfering with each other.
[0188] Optionally, the touch insulating layer 1022 can be prepared using a halftone mask.
[0189] The second touch wiring layer 1023 includes a plurality of fifth conductive patterns 10232 corresponding to a plurality of first conductive pattern groups 1013. Each fifth conductive pattern 10232 is connected to the corresponding first conductive pattern group 1013 through a second opening K2 and a first opening K1. Each fifth conductive pattern 10232 and the corresponding first conductive pattern group 1013 are used to form a connection interface 100a.
[0190] Furthermore, the fifth conductive pattern 10232 is connected to the touch trace s3 located in the peripheral area 1011b. In this case, the fifth conductive pattern 10232 can be understood as a pattern connected to the touch trace s3.
[0191] Alternatively, the fifth conductive pattern 10232 can be connected to the touch electrode located in the display area 1011a. In this case, the fifth conductive pattern 10232 can be understood as part of the touch trace s3. The touch trace s3 is connected to the touch electrode located in the display area 1011a and extends to the bonding area 1011b1, with the fifth conductive pattern 10232 forming a portion of the touch trace within the bonding area.
[0192] Optionally, multiple fifth conductive patterns 10232 and corresponding multiple first conductive pattern groups 1013 can constitute multiple connection interfaces G. Each connection interface 100a is used to connect to the driving circuit in the touch panel 100 to receive driving signals provided by the driving circuit.
[0193] In other words, the driving circuit can provide a driving signal to the touch electrode through the fifth conductive pattern 10232, thereby enabling the touch panel to achieve touch function.
[0194] Optionally, the driving circuit can be integrated on a flexible circuit board, which can be connected to the fifth conductive pattern 10232 of the connection interface 100a, thereby transmitting driving signals to the touch electrode through the fifth conductive pattern 10232.
[0195] In this embodiment, the orthographic projection of the boundary of the touch insulating layer 1022 (first touch insulating portion 10221) away from the display area 1011a onto the substrate 1011 is located on the side of the first opening K1 on the substrate 1011 away from the display area 1011a, and a second opening K2 communicating with the first opening K1 is designed. That is, except for the area with the second opening K2, which is a hollow area, the portion of the touch insulating layer 1022 located in the bonding area 1011b1 is covered with insulating material. For example, there is also insulating material between adjacent second openings K2. Optionally, the first touch insulating portion 10221 is provided between adjacent connection interfaces G.
[0196] Therefore, different second openings K2 can be separated by the insulating material of the touch insulating layer 1022, acting as isolation pillars. Furthermore, a first touch insulating portion 10221 (with a certain thickness, but less than the thickness of the second touch insulating portion 10222) is designed within the touch insulating layer 1022, and the step difference between the second touch insulating portion 10222 and the first touch insulating portion 10221 is small. Therefore, when preparing the second touch wiring layer 1023, the exposure process can be more complete, avoiding the presence of conductive material residue at the junction of the first touch insulating portion 10221 and the second touch insulating portion 10222 during the etching process. This prevents short circuits between adjacent fifth conductive patterns 10232, thereby preventing short circuits between different connection interfaces 100a and ensuring the yield of the touch panel 100.
[0197] In summary, this application provides a touch panel comprising a display substrate and a touch substrate stacked together. The display substrate includes a substrate, multiple pixel units, multiple first conductive pattern groups, and a first insulating layer. The touch substrate includes a first touch wiring layer, a touch insulating layer, and a second touch wiring layer. The touch insulating layer includes a first touch insulating portion and a second touch insulating portion. A fifth conductive pattern in the second touch wiring layer is electrically connected to the first conductive pattern group through a second opening in the first touch insulating portion and a first opening in the first insulating layer. Because the step difference between the second touch insulating portion and the first touch insulating portion is small, the exposure process can be more complete when preparing the second touch wiring layer, avoiding residual conductive material at the junction of the first and second touch insulating portions during the etching process. This prevents short circuits between adjacent fifth conductive patterns, thereby preventing short circuits between different connection interfaces and ensuring the yield of the touch panel.
[0198] Optionally, the thickness of the first touch insulating portion 10221 may be less than or equal to 1 μm (micrometer), and the thickness of the second touch insulating portion 10222 may range from 2 μm to 3 μm, for example, 2.4 μm.
[0199] Because the first touch insulation part 10221 is thin, there will be no problem of poor module (MDL) crimping during the subsequent bonding process of the flexible circuit board and the connection interface 100a, thus avoiding crimping risks.
[0200] In this embodiment, the orthographic projection of the second opening K2 on the substrate 1011 covers the orthographic projection of the first opening K1 on the substrate 1011. The second opening K2 is also used to expose a portion of the first insulating layer 1015. That is, the first touch insulating portion 10221 does not enclose the first insulating layer 1015, avoiding an excessively large slope angle of the first touch insulating portion 10221, thereby avoiding the risk of breakage in the fifth conductive pattern 10232 due to the setting of the first touch insulating portion 10221.
[0201] Referring to Figure 24, the touch panel 100 further includes a protective layer 103 located between the display substrate 101 and the touch substrate 102. The main function of the protective layer 103 is to improve the reliability of the stacked connection between the touch substrate 102 and the display substrate 101. In addition, the first touch wiring layer 1021 includes a touch wiring pattern 10211.
[0202] The protective layer 103 has a protective boundary 103a, the orthographic projection of which onto the substrate 1011 lies between the orthographic projection of the opening K onto the substrate 1011 and the display area 1011a. Optionally, the protective layer 103 and the touch insulating layer 1022 can be formed using the same mask and the same patterning process. That is, the orthographic projections of the protective boundary 103a of the protective layer 103 onto the substrate 1011 and the touch insulating boundary 1022a of the touch insulating layer 1022 onto the substrate 1011 can be formed in a single process. In this case, the orthographic projection of the touch wiring pattern 10211 onto the substrate 1011 lies within the orthographic projection of the protective layer 103 onto the substrate 1011. This avoids affecting the touch wiring pattern 10211 of the first touch wiring layer 1021 when fabricating the second touch wiring layer 1023.
[0203] In the embodiments of this application, the layer stack diagram of the display substrate 101 shown in Figures 23 and 24 can be found in Figure 22. Accordingly, in Figure 24, of the two first conductive patterns 10131 included in the first conductive pattern group 1013, one first conductive pattern 10131 is located in the second source-drain layer, and the other first conductive pattern 10131 is located in the third source-drain layer. The first insulating layer 1015 can be a third planarization layer.
[0204] Alternatively, of the two first conductive patterns 10131 included in the first conductive pattern group 1013, one first conductive pattern 10131 is located in the first source-drain layer, and the other first conductive pattern 10131 is located in the second source-drain layer. Or, of the two first conductive patterns 10131 included in the first conductive pattern group 1013, one first conductive pattern 10131 is located in the first source-drain layer, and the other first conductive pattern 10131 is located in the third source-drain layer.
[0205] If the display substrate includes two source-drain layers, then one of the first conductive patterns 10131 in the first conductive pattern group 1013 is located in the first source-drain layer, and the other first conductive pattern 10131 is located in the second source-drain layer. If the display substrate includes one source-drain layer, then one of the first conductive patterns 10131 in the first conductive pattern group 1013 is located in the gate layer, and the other first conductive pattern 10131 is located in the source-drain layer. Alternatively, the two first conductive patterns 10131 included in the first conductive pattern group 1013 can be located in any two conductive layers.
[0206] Alternatively, the first conductive pattern group 1013 may include a first conductive pattern 10131, which may be located in any conductive layer of the display substrate shown in FIG. 22. For example, it may be located in the first gate layer, the second gate layer, the third gate layer, the first source-drain layer, the second source-drain layer, or the third source-drain layer.
[0207] Alternatively, the first conductive pattern group 1013 may include three first conductive patterns 10131, in which case the three first conductive patterns 10131 are located in the first source-drain layer, the second source-drain layer, and the third source-drain layer, respectively. Or, the three first conductive patterns 10131 included in the first conductive pattern group 1013 may be located in any three conductive layers.
[0208] It should be noted that, in the schemes shown in Figures 23 and 24, the touch panel 100 may also include a second insulating layer located on the side of the touch substrate 102 away from the display substrate 101. The design of the second insulating layer can refer to the above embodiments, and the boundary of the second insulating layer away from the display area 1011a is located between the second opening K2 and the display area 1011a.
[0209] In summary, this application provides a touch panel comprising a display substrate and a touch substrate stacked together. The display substrate includes a substrate, multiple pixel units, multiple first conductive pattern groups, and a first insulating layer. The touch substrate includes a first touch wiring layer, a touch insulating layer, and a second touch wiring layer. The touch insulating layer includes a first touch insulating portion and a second touch insulating portion. A fifth conductive pattern in the second touch wiring layer is electrically connected to the first conductive pattern group through a second opening in the first touch insulating portion and a first opening in the first insulating layer. Because the step difference between the second touch insulating portion and the first touch insulating portion is small, the exposure process can be more complete when preparing the second touch wiring layer, avoiding residual conductive material at the junction of the first and second touch insulating portions during the etching process. This prevents short circuits between adjacent fifth conductive patterns, thereby preventing short circuits between different connection interfaces and ensuring the yield of the touch panel.
[0210] It should be noted that the protective layer 103, the first touch trace layer 1021, the touch insulating layer 1022, the second touch trace layer 1023, and the second insulating layer 104 in the embodiments provided in this application can be prepared using four photomasks. Referring to Figure 25, the process includes: forming a protective film layer (only coating, the protective film layer is a whole film layer); preparing the first touch trace layer using a first photomask (the first photomask can be called a TMA mask); preparing the touch insulating layer using a second photomask (the second photomask can be called an OC mask), and simultaneously etching the protective film layer to form the protective layer 103; preparing the third touch trace layer 1023 using a third photomask (the second photomask can be called a TMB mask); and preparing the second insulating layer 104 using a fourth photomask (the fourth photomask can be called a TOC mask).
[0211] Figure 26 is a schematic diagram of a touch device provided in an embodiment of this application. Referring to Figure 26, the touch device includes a power supply component 200 and a touch panel 100 as provided in the above embodiment. The power supply component 200 is connected to the touch panel 100 and is used to supply power to the touch panel 100.
[0212] Optionally, the touch device can be an organic light-emitting diode (OLED) display device. The touch device can be any suitable display device, including but not limited to mobile phones, tablets, televisions, monitors, laptops, digital photo frames, navigators, and e-readers—any product or component with a display function.
[0213] Since the touch device can have essentially the same technical effects as the touch panel described in the previous embodiments, for the sake of brevity, the technical effects of the touch device will not be described again here.
[0214] The terminology used in the embodiments section of this application is for explaining the embodiments of this application only and is not intended to limit this application. Unless otherwise defined, the technical or scientific terms used in the embodiments of this application should have the ordinary meaning understood by one of ordinary skill in the art to which this application pertains.
[0215] The terminology used in the embodiments section of this application is for illustrative purposes only and is not intended to limit the application. Unless otherwise defined, the technical or scientific terms used in the embodiments of this application should have the ordinary meaning understood by one of ordinary skill in the art to which this application pertains. The terms "first," "second," "third," and similar words used in the patent application specification and claims do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Similarly, "an" or "a" and similar words do not indicate a quantity limitation, but rather indicate the presence of at least one. The terms "comprising" or "including" and similar words mean that the elements or objects preceding "comprising" or "including" encompass the elements or objects listed following "comprising" or "including" and their equivalents, and do not exclude other elements or objects. The terms "connected" or "linked" and similar words are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. "Up," "down," "left," "right," etc., are used only to indicate relative positional relationships; when the absolute position of the described object changes, the relative positional relationship may also change accordingly.
[0216] The above description is merely an optional embodiment of this application and is not intended to limit this application. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.
Claims
1. A touch panel, characterized in that, The touch panel includes: a display substrate and a touch substrate stacked together; the display substrate includes: A substrate having a display area and a peripheral area surrounding the display area, the peripheral area including at least a bonding area; A plurality of pixel units located on one side of the substrate, the plurality of pixel units being located in the display area; A plurality of first conductive pattern groups are located on one side of the substrate and spaced apart, and a plurality of second conductive patterns are corresponding one-to-one with the plurality of first conductive pattern groups, wherein the plurality of first conductive pattern groups and the plurality of second conductive patterns are located in the bonding area; And a first insulating layer located on the side of the plurality of first conductive pattern groups away from the substrate, the first insulating layer having a plurality of openings, each of the openings being for exposing at least a portion of one of the first conductive pattern groups; The touch substrate includes: a first touch wiring layer, a touch insulating layer, and a second touch wiring layer stacked sequentially along a side away from the display substrate; the orthographic projections of the first touch wiring layer, the touch insulating layer, and the second touch wiring layer on the substrate are at least located in the display area and the peripheral area; The second touch trace layer includes a plurality of second conductive pattern groups corresponding to the plurality of first conductive pattern groups. Each second conductive pattern group includes a third conductive pattern and a fourth conductive pattern spaced apart. The third conductive pattern is electrically connected to the first conductive pattern group through the opening. Each third conductive pattern and the corresponding first conductive pattern group form a connection interface. The connection interface is used to connect to the driving circuit in the touch panel. The fourth conductive pattern is connected to the touch traces located in the peripheral area, or the fourth conductive pattern is connected to the touch electrode located in the display area. The orthographic projection of the touch insulation boundary of the touch insulation layer on the substrate is located between the orthographic projections of the third conductive pattern and the fourth conductive pattern on the substrate. The boundary of the second conductive pattern near the display area is closer to the display area than the touch insulation boundary, and the fourth conductive pattern passes through at least the touch insulation layer and the... The first via in the first insulating layer is electrically connected to the second conductive pattern, and the third conductive pattern is electrically connected to the second conductive pattern.
2. The touch panel according to claim 1, characterized in that, Each of the first conductive pattern groups includes a plurality of first conductive patterns stacked sequentially; The second conductive pattern and the target first conductive pattern among the plurality of first conductive patterns are located on the same layer and are an integral structure. The target first conductive pattern is the first conductive pattern that is furthest from the substrate among the plurality of first conductive patterns. The third conductive pattern is electrically connected to the target first conductive pattern through the opening.
3. The touch panel according to claim 2, characterized in that, The first insulating layer includes a first insulating portion and a second insulating portion; the distance between the surface of the first insulating portion away from the substrate and the bearing surface of the substrate is smaller than the distance between the surface of the second insulating portion away from the substrate and the bearing surface of the substrate. The first insulating portion includes: an opening electrically connecting the third conductive pattern and the second conductive pattern, and a first via electrically connecting the fourth conductive pattern and the second conductive pattern; At least a portion of the orthographic projection of the second insulating portion on the substrate is located between the orthographic projections of the third conductive pattern and the fourth conductive pattern on the substrate, and at least a portion of the orthographic projection of the second insulating portion on the substrate is located on the side of the orthographic projection of the touch insulating boundary on the substrate away from the display area.
4. The touch panel according to claim 3, characterized in that, The second insulating portion has a first gap between its orthographic projection on the substrate and the orthographic projection of the opening on the substrate, and the first insulating portion is located at least at the first gap.
5. The touch panel according to claim 1, characterized in that, Each of the first conductive pattern groups includes a plurality of first conductive patterns stacked sequentially; The second conductive pattern and the target first conductive pattern among the plurality of first conductive patterns are located on the same layer and are spaced apart. The target first conductive pattern is the first conductive pattern among the plurality of first conductive patterns that is furthest from the substrate. The third conductive pattern passes through at least the first insulating layer. The second via and the second conductive pattern are electrically connected; the second via in the first insulating layer is close to the display area relative to the opening in the first insulating layer.
6. The touch panel according to claim 5, characterized in that, The first insulating layer includes a first insulating portion and a second insulating portion; the distance between the surface of the first insulating portion away from the substrate and the bearing surface of the substrate is smaller than the distance between the surface of the second insulating portion away from the substrate and the bearing surface of the substrate. The first insulating portion includes: an opening electrically connecting the third conductive pattern and the target first conductive pattern, a second via electrically connecting the third conductive pattern and the second conductive pattern, and a first via electrically connecting the fourth conductive pattern and the second conductive pattern; At least a portion of the orthographic projection of the second insulating portion on the substrate is located between the orthographic projections of the third conductive pattern and the fourth conductive pattern on the substrate, and at least a portion of the orthographic projection of the second insulating portion on the substrate is located on the side of the orthographic projection of the touch insulating boundary on the substrate away from the display area.
7. The touch panel according to claim 6, characterized in that, There is a gap between the orthographic projection of the second insulating portion on the substrate and the orthographic projection of the second via on the substrate, and the first insulating portion is located at least at the second gap.
8. The touch panel according to claim 3 or 6, characterized in that, The third conductive pattern includes a first pattern portion and a second pattern portion; The side of the first patterned portion closest to the substrate is electrically connected to the side of the target first conductive pattern furthest from the substrate through the opening; The second patterned portion is in contact with the side of the substrate closer to the substrate and the first insulating portion is in contact with the side of the substrate farther away from the substrate.
9. The touch panel according to claim 8, characterized in that, The third conductive pattern also includes a third pattern portion; At least a portion of the third patterned portion is located on the side of the second insulating portion away from the substrate.
10. The touch panel according to claim 8, characterized in that, When the second conductive pattern and the target first conductive pattern are located on the same layer and spaced apart, the second pattern portion is also electrically connected to the second conductive pattern through the second via.
11. The touch panel according to claim 3 or 6, characterized in that, The first insulating layer further includes a third insulating portion, which is in contact with the surface of the substrate and the surface of the second insulating portion away from the substrate. The orthographic projection of the third insulating portion on the substrate is located within the orthographic projection of the second insulating portion on the substrate.
12. The touch panel according to claim 11, characterized in that, The boundary of the orthographic projection of the third insulating portion onto the substrate does not overlap with the boundary of the orthographic projection of the second insulating portion onto the substrate.
13. The touch panel according to claim 3 or 6, characterized in that, The first insulating portion and the second insulating portion are integrally formed using the same material.
14. The touch panel according to claim 3 or 6, characterized in that, The first insulating part and the second insulating part are made of different materials, and the first insulating part and the second insulating part are prepared separately using two processes.
15. The touch panel according to claim 1, characterized in that, The touch panel further includes: a protective layer located between the display substrate and the touch substrate; the first touch wiring layer includes a touch wiring pattern; The protective layer has a protective boundary, and the orthographic projection of the protective boundary on the substrate is located between the orthographic projection of the opening on the substrate and the display area. At least a portion of the boundary of the orthographic projection of the touch trace pattern on the substrate lies within the orthographic projection of the protective layer on the substrate.
16. The touch panel according to claim 1, characterized in that, The touch panel further includes a second insulating layer located on the side of the touch substrate away from the display substrate; The second insulating layer has an insulating layer boundary, the orthographic projection of which lies between the orthographic projection of the opening on the substrate and the orthographic projection of the touch insulating boundary on the substrate.
17. The touch panel according to claim 16, characterized in that, The second insulating layer includes: a fourth insulating portion, a fifth insulating portion, and a sixth insulating portion; The orthographic projection of the fourth insulating portion on the substrate covers the boundary of the third conductive pattern near the display area; The orthographic projection of the fifth insulating portion on the substrate is located between the orthographic projections of the third conductive pattern and the fourth conductive pattern on the substrate. The orthographic projection of the sixth insulating portion onto the substrate covers the boundary of the fourth conductive pattern away from the display area.
18. A touch panel, characterized in that, The touch panel includes: a display substrate and a touch substrate stacked together; the display substrate includes: A substrate having a display area and a peripheral area surrounding the display area, the peripheral area including at least a bonding area; A plurality of pixel units located on one side of the substrate, the plurality of pixel units being located in the display area; A plurality of first conductive pattern groups are located on one side of the substrate and are spaced apart, the plurality of first conductive pattern groups being located in the bonding area; And a first insulating layer located on the side of the plurality of first conductive pattern groups away from the substrate, the first insulating layer having a plurality of first openings, each of the first openings being used to expose at least a portion of one of the first conductive pattern groups; The touch substrate includes: a first touch wiring layer, a touch insulating layer, and a second touch wiring layer stacked sequentially along a side away from the display substrate; the orthographic projections of the first touch wiring layer, the touch insulating layer, and the second touch wiring layer on the substrate are at least located in the display area and the peripheral area; The touch insulating layer includes a first touch insulating portion and a second touch insulating portion. The distance between the surface of the first touch insulating portion away from the substrate and the bearing surface of the substrate is smaller than the distance between the surface of the second touch insulating portion away from the substrate and the bearing surface of the substrate. The orthographic projection of the boundary of the first touch insulating portion away from the display area on the substrate is located on the side of the orthographic projection of the first opening on the substrate away from the display area. The first touch insulating portion includes a second opening corresponding to the plurality of first openings. Each second opening communicates with the corresponding first opening, and each second opening is also used to expose at least a portion of a first conductive pattern group. The orthographic projection of the boundary of the second touch insulating portion away from the display area on the substrate is located between the orthographic projection of the first opening on the substrate and the display area; The second touch trace layer includes a plurality of fifth conductive patterns corresponding to the plurality of first conductive pattern groups. Each fifth conductive pattern is electrically connected to the corresponding first conductive pattern group through the second opening and the first opening. Each fifth conductive pattern and the corresponding first conductive pattern group are used to form a connection interface. The fifth conductive pattern is connected to the touch trace located in the peripheral area, or the fourth conductive pattern is connected to the touch electrode located in the display area. The connection interface is used to connect to the driving circuit in the touch panel to receive the driving signal provided by the driving circuit.
19. The touch panel according to claim 18, characterized in that, The orthographic projection of the second opening on the substrate covers the orthographic projection of the first opening on the substrate, and the second opening is also used to expose a portion of the first insulating layer.
20. The touch panel according to claim 18, characterized in that, The multiple fifth conductive patterns and the multiple first conductive pattern groups of the touch panel constitute multiple connection interfaces; The first touch-insulating portion is present between two adjacent connection interfaces.
21. A touch device, characterized in that, The touch device includes: a power supply component and a touch panel as described in any one of claims 1 to 20; The power supply component is connected to the touch panel and is used to supply power to the touch panel.
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