Germanium-silicon multiple avalanche layer-based germanium-on-insulator spads sensor structure and preparation method therefor

Abstract

The present application belongs to the technical field of semiconductors, and discloses a germanium-silicon multiple avalanche layer-based germanium-on-insulator SPADs sensor structure and a preparation method therefor. The structure comprises: a sensor wafer, a passivation layer, N-type electrodes, P-type electrodes, and a readout circuit. The sensor wafer comprises a thermal oxide layer, a reflector, an aluminum oxide layer, a P-type heavily doped germanium layer, an intrinsic germanium sensing layer, an intrinsic germanium quantum well sensing layer, a P-type charge layer, an intrinsic germanium-silicon multiple avalanche layer, and an N-type heavily doped germanium layer which are sequentially stacked. The sensor wafer further comprises multiple rectangular trenches distributed at preset intervals. The passivation layer covers the N-type heavily doped germanium layer and inner walls of each rectangular trench. Each N-type electrode is disposed within a rectangular trench, and penetrates through the passivation layer to connect to the P-type heavily doped germanium layer. Each P-type electrode penetrates through the passivation layer to connect to the N-type heavily doped germanium layer. The readout circuit is separately connected to the N-type electrodes and the P-type electrodes. According to the present application, lattice mismatch defects can be removed, thereby reducing the dark current, dark count rate, and avalanche breakdown voltage of a sensor.

Description

A germanium-silicon multi-avalanche layer-based Ge-on-insulator SPADs sensor structure and a preparation method thereof TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductors, in particular to a germanium-silicon multi-avalanche layer-based Ge-on-insulator SPADs sensor structure and a preparation method thereof. BACKGROUND

[0002] Single Photon Avalanche Photodetectors (SPADs) are a kind of high-sensitivity devices that can detect the energy of a single photon. According to the wavelength range, SPADs are divided into near-infrared (NIR, 0.78-1.1 μm), short-wave infrared (SWIR, 1.1-3 μm), mid-wave infrared (MWIR, 3-5 μm) and long-wave infrared (LWIR, 8-14 μm). Short-wave infrared SPADs sensors play an important role in many emerging applications such as optical communication, quantum information, ranging, coherent sensing, medical diagnosis, analytical instruments, laser radar (LIDAR), life sciences and over-the-horizon imaging. Although commercial indium gallium arsenide (InGaAs) short-wave infrared SPADs sensors have been widely used in applications such as laser radar, optical communication, quantum communication, etc., they usually use small-size and expensive indium phosphide (InP) wafers as substrates, the manufacturing process of the sensors is expensive, not compatible with standard CMOS process production lines, the number of SPADs sensors formed on a single wafer is limited, the yield of the formed SPADs sensors is low, the price of a single chip is expensive, and mass production is not possible.

[0003] Compared with III-V semiconductor materials, germanium-based semiconductor materials have the advantages of silicon-based epitaxy (large size, 8 inches, even 12 inches), high compatibility with CMOS process production lines, excellent photoelectric response in the short-wave infrared band, etc., and are considered as one of the important technical solutions for mass production of short-wave infrared SPADs sensors. However, known germanium SPADs sensors are directly formed on a silicon substrate, such as existing patents 202110440484.1 (a manufacturing method of a germanium avalanche photodetector based on a gallium arsenide substrate) and 202111026530.X (a silicon-on-germanium avalanche photodetector in a silicon photonics platform and a manufacturing method thereof), there is a large lattice mismatch between the germanium absorption layer and the silicon avalanche layer in the entire device layer structure, resulting in poor performance indicators such as dark count rates (DCRs) and avalanche breakdown voltage of the germanium SPADs sensor.

[0004] SUMMARY

[0005] The application provides a germanium-silicon multi-avalanche layer-based Ge-based SPADs sensor structure on an insulator and a preparation method thereof, which can remove lattice mismatch defects, reduce the dark current, dark count rate and avalanche breakdown voltage of the Ge-based SPADs sensor.

[0006] In a first aspect, the application provides a germanium-silicon multi-avalanche layer-based Ge-based SPADs sensor structure on an insulator, comprising: a sensor wafer, a passivation layer, an N-type electrode, a P-type electrode and a readout circuit.

[0007] The sensor wafer comprises, in sequence, a thermal oxygen layer, a mirror, an aluminum oxide layer, a P-type heavily doped germanium layer, an intrinsic germanium sensing layer, an intrinsic germanium quantum well sensing layer, a P-type charge layer, an intrinsic germanium-silicon multi-avalanche layer and an N-type heavily doped germanium layer.

[0008] The P-type charge layer is a P-type germanium charge layer or a P-type germanium-silicon charge layer.

[0009] The sensor wafer further comprises a plurality of rectangular grooves which are identical in shape and distributed at a preset interval.

[0010] The rectangular grooves sequentially pass through the N-type heavily doped germanium layer, the intrinsic germanium-silicon multi-avalanche layer, the P-type charge layer, the intrinsic germanium quantum well sensing layer, the intrinsic germanium sensing layer and the P-type heavily doped germanium layer.

[0011] The passivation layer uniformly covers the N-type heavily doped germanium layer and the inner walls of the rectangular grooves.

[0012] The N-type electrode is arranged in the rectangular groove and connects the P-type heavily doped germanium layer through the passivation layer.

[0013] The P-type electrode connects the N-type heavily doped germanium layer through the passivation layer.

[0014] The readout circuit is connected to the N-type electrode and the P-type electrode, respectively.

[0015] Further, the sensor wafer further comprises a second substrate; the second substrate is stacked below the thermal oxygen layer.

[0016] Further, the material of the second substrate is silicon, SOI, FD-SOI, Silicon on Sapphire, sapphire or glass.

[0017] Further, the material of the mirror is monocrystalline silicon, amorphous silicon or silicon oxide.

[0018] Further, the mirror is a periodic structure, and the number of periods is 1-6.

[0019] Further, the intrinsic germanium-silicon multi-avalanche layer is a germanium-silicon superlattice layer structure or a germanium-silicon multi-quantum well structure.

[0020] Further, the total thickness of the intrinsic germanium-silicon multi-avalanche layer ranges from 0.1 to 3 microns.

[0021] Further, the intrinsic germanium-silicon multi-avalanche layer has a period number of 60-400, and a single period thickness of 8-40 nm.

[0022] Further, the intrinsic germanium-silicon multi-avalanche layer has a barrier layer thickness of 3-10 nm and a well layer thickness of 5-30 nm; and the intrinsic germanium-silicon multi-avalanche layer has a silicon content of 0-30%.

[0023] Further, the intrinsic germanium quantum well sensing layer has a total thickness of 0.1-3 microns.

[0024] Further, the intrinsic germanium quantum well sensing layer has a period number of 10-300, and a single period thickness of greater than or equal to 15 nm.

[0025] Further, the intrinsic germanium quantum well sensing layer has a barrier layer thickness of greater than or equal to 10 nm and a well layer thickness of 5-30 nm; and the intrinsic germanium sensing layer and the intrinsic germanium quantum well sensing layer each have a silicon content of 0-30%.

[0026] In a second aspect, the embodiments of the present application provide a preparation method of a germanium-silicon multi-avalanche layer-based Ge-on-insulator SPADs sensor structure, which comprises:

[0027] The first substrate, the intrinsic germanium buffer layer, the intrinsic germanium layer, the intrinsic germanium-silicon multi-avalanche layer, the P-type charge layer, the intrinsic germanium quantum well sensing layer, the intrinsic germanium sensing layer, the P-type heavily doped germanium layer, and the aluminum oxide layer are sequentially stacked to obtain a donor substrate;

[0028] The P-type charge layer is a P-type germanium charge layer or a P-type germanium-silicon charge layer.

[0029] The second substrate, the thermal oxide layer, and the mirror are sequentially stacked to obtain an acceptor substrate;

[0030] The donor substrate and the acceptor substrate are wafer bonded, and the first substrate and the intrinsic germanium buffer layer are removed;

[0031] The intrinsic germanium layer is subjected to ion implantation to form an N-type heavily doped germanium layer, thereby obtaining a sensor wafer;

[0032] A plurality of rectangular grooves with the same shape are arranged on the sensor wafer at a preset interval;

[0033] The rectangular grooves sequentially pass through the N-type heavily doped germanium layer, the intrinsic germanium-silicon multi-avalanche layer, the P-type charge layer, the intrinsic germanium quantum well sensing layer, the intrinsic germanium sensing layer, and the P-type heavily doped germanium layer.

[0034] A passivation layer is formed on the N-type heavily doped germanium layer and the inner wall of the rectangular grooves.

[0035] An N-type electrode is placed at the bottom of a rectangular groove; a P-type electrode is placed on the N-type heavily doped germanium layer.

[0036] Connect the readout circuit to the N-type electrode and the P-type electrode respectively, and remove the second substrate.

[0037] Furthermore, the first substrate is removed by machine polishing or dry etching.

[0038] Furthermore, the readout circuit connects the N-type and P-type electrodes using flip-chip bonding technology.

[0039] In summary, compared with the prior art, the beneficial effects of the technical solution provided in this application include at least the following:

[0040] This application provides a germanium-on-insulator SPADs sensor structure based on a germanium-silicon multi-avalanche layer. Firstly, the germanium-on-insulator SPADs sensor of this application has a simple construction method, is very easy to implement in terms of process flow, is highly compatible with standard CMOS manufacturing processes, and is easy to mass-produce. Secondly, the germanium-on-insulator structure of this application removes the lattice mismatch defects existing at the germanium-silicon interface. The germanium-silicon multi-avalanche layer, P-type germanium or germanium-silicon charge layer, intrinsic germanium sensing layer, and intrinsic germanium quantum well sensing layer of the germanium-based SPADs sensor have highly matched lattices. The entire device layer structure has small lattice mismatch and thermal mismatch, good heteromaterial interface quality, and excellent electrical performance, reducing the dark current, dark count rate, and avalanche breakdown voltage of the germanium-based SPADs sensor. Simultaneously, silicon in the germanium-silicon multi-avalanche layer has an excellent ionization coefficient, solving the problem of low ionization coefficient in germanium semiconductor materials, making the sensor structure of this application have a strong carrier avalanche multiplication effect. Attached Figure Description

[0041] Figure 1 is a structural diagram of a germanium-based SPADs sensor structure on an insulator based on a germanium-silicon multi-avalanche layer provided in an exemplary embodiment of this application.

[0042] Figure 2 is a schematic diagram of the formation of a donor substrate provided in an exemplary embodiment of this application.

[0043] Figure 3 is a schematic diagram of the formation of a host substrate provided in an exemplary embodiment of this application.

[0044] Figure 4 is a schematic diagram of wafer bonding provided in an exemplary embodiment of this application.

[0045] Figure 5 is an illustration of the effect of machine polishing or dry etching provided in an exemplary embodiment of this application.

[0046] Figure 6 is a structural diagram of a sensor wafer provided in an exemplary embodiment of this application.

[0047] Figure 7 is a schematic diagram of a rectangular groove provided in an exemplary embodiment of this application.

[0048] Figure 8 is a schematic diagram of a passivation layer provided in an exemplary embodiment of this application.

[0049] Figure 9 is an illustration of the effect of adding N-type and P-type electrodes according to an exemplary embodiment of this application.

[0050] Explanation of reference numerals in the attached figures:

[0051] 001, First substrate; 002, Intrinsic germanium buffer layer; 003, Intrinsic germanium layer; 100, Second substrate; 101, Thermal oxide layer; 102, Mirror; 103, Alumina layer; 104, P-type heavily doped germanium layer; 105, Intrinsic germanium sensing layer; 106, Intrinsic germanium quantum well sensing layer; 107, P-type charge layer; 108, Intrinsic germanium-silicon multi-avalanche layer; 109, N-type heavily doped germanium layer; 201, Passivation layer; 202, N-type electrode; 203, P-type electrode; 204, Readout circuit. Detailed Implementation

[0052] The technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments.

[0053] Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0054] Please refer to Figure 1. This application embodiment provides a germanium-on-insulator SPADs sensor structure based on a germanium-silicon multi-avalanche layer, which may specifically include the following structure:

[0055] The sensor consists of a wafer, a passivation layer 201, an N-type electrode 202, a P-type electrode 203, and a readout circuit 204. The readout circuit 204, short for Read-Out Integrated Circuit, is a circuit that exports images from an infrared imaging chip. It integrates various functions of the focal plane into a semiconductor chip, thereby enabling the conversion, amplification, and multiplexing of infrared detector signals.

[0056] The sensor wafer comprises, in sequence, a thermal oxide layer 101, a mirror 102, an aluminum oxide layer 103, a P-type heavily doped germanium layer 104, an intrinsic germanium sensing layer 105, an intrinsic germanium quantum well sensing layer 106, a P-type charge layer 107, an intrinsic germanium-silicon multi-avalanche layer 108, and an N-type heavily doped germanium layer 109. The intrinsic germanium-silicon multi-avalanche layer can be a germanium-silicon superlattice structure or a germanium-silicon multi-quantum well structure.

[0057] The main reason why conventional germanium SPADs sensors use silicon as the avalanche layer is that silicon has an excellent ionization coefficient (the ionization coefficients of silicon and germanium are 10 and 0.75, respectively), which varies greatly with the intensity of the built-in electric field.

[0058] This application proposes using a germanium-silicon multi-quantum-well structure, a germanium-silicon superlattice layer, or a non-periodic combination structure composed of germanium-silicon materials as the avalanche layer of germanium-based SPADs sensors (which has a strong carrier avalanche multiplication effect). This can achieve lattice matching between the germanium-silicon multi-avalanche layer, the P-type germanium / germanium-silicon charge layer, the intrinsic germanium sensing layer 105, and the intrinsic germanium quantum well sensing layer 106, while solving the problem of low ionization coefficient of germanium semiconductor materials.

[0059] In addition, in the design of the sensing layer, this application uses intrinsic germanium sensing layer 105 and intrinsic germanium quantum well sensing layer 106 as the optical sensing layer of germanium-based SPADs sensor, which can improve the light absorption efficiency of germanium-based SPADs sensor in the 1310nm and 1550nm bands, thereby further improving the dark count rate and avalanche breakdown voltage of germanium SPADs sensor.

[0060] The P-type charge layer 107 is a P-type germanium charge layer or a P-type germanium-silicon charge layer.

[0061] The sensor wafer also includes multiple rectangular grooves of the same shape, distributed at preset intervals.

[0062] The rectangular grooves sequentially penetrate the N-type heavily doped germanium layer 109, the intrinsic germanium-silicon multi-avalanche layer 108, the P-type charge layer 107, the intrinsic germanium quantum well sensing layer 106, the intrinsic germanium sensing layer 105, and the P-type heavily doped germanium layer 104.

[0063] A passivation layer 201 is uniformly covered on the N-type heavily doped germanium layer 109 and the inner walls of each rectangular groove; an N-type electrode 202 is disposed in the rectangular groove, passes through the passivation layer 201 and connects to the P-type heavily doped germanium layer 104; a P-type electrode 203 passes through the passivation layer 201 and connects to the N-type heavily doped germanium layer 109; a readout circuit 204 is connected to the N-type electrode 202 and the P-type electrode 203 respectively.

[0064] The above embodiments provide a germanium-on-insulator SPADs sensor structure based on a germanium-silicon multi-avalanche layer. First, the germanium-on-insulator SPADs sensor of this application has a simple construction method and is very easy to implement in terms of process flow. It is highly compatible with standard CMOS manufacturing processes and is easy to mass-produce. Second, the germanium-on-insulator structure of this application removes the lattice mismatch defects existing at the germanium-silicon interface. The intrinsic germanium-silicon multi-avalanche layer 108, the P-type germanium or germanium-silicon charge layer, the intrinsic germanium sensing layer 105, and the intrinsic germanium quantum well sensing layer 106 of the germanium-based SPADs sensor have a high degree of lattice matching. The entire device layer structure has small lattice mismatch and thermal mismatch, good heteromaterial interface quality, and excellent electrical performance, reducing the dark current, dark count rate, and avalanche breakdown voltage of the germanium-based SPADs sensor. At the same time, silicon in the germanium-silicon multi-avalanche layer has an excellent ionization coefficient, which solves the problem of low ionization coefficient of germanium semiconductor materials, making the sensor structure of this application have a strong carrier avalanche multiplication effect.

[0065] In some embodiments, the sensor wafer further includes a second substrate 100; the second substrate 100 is superimposed on the thermo-oxidative layer 101.

[0066] Furthermore, the material of the second substrate 100 can be silicon, SOI, FD-SOI, Silicon on Sapphire, sapphire, or glass. Among them, SOI stands for Silicon-On-Insulator, which introduces a buried oxide layer between the top silicon layer and the back substrate; FD-SOI is a fully depleted silicon on insulator technology, which involves devices such as fully depleted field-effect transistors (FETs). Its characteristic is that the silicon film is very thin, much smaller than the gate length. This structure can significantly reduce parasitic capacitance and improve the electrical performance of transistors; Silicon on Sapphire, abbreviated as SOS, is a technology that epitaxially grows a single-crystal silicon thin film material on a sapphire substrate.

[0067] In some embodiments, the reflector 102 is made of monocrystalline silicon, amorphous silicon, or silicon oxide. A periodic structure with 1-6 periods is more effective. The periodic structure can enhance the interaction between the germanium-based sensing material on insulator and the 1550nm optical signal, which can significantly improve the single-photon detection efficiency of germanium-based SPADs sensors in the 1550nm band, thereby promoting the important application of germanium-based SPADs sensors in the field of human eye safety.

[0068] In some embodiments, the total thickness of the intrinsic germanium-silicon multi-avalanche layer 108 ranges from 0.1 to 3 micrometers.

[0069] The intrinsic germanium-silicon multi-avalanche layer 108 has 60-400 cycles, with a single cycle thickness ranging from 8-40 nanometers; the barrier layer thickness of the intrinsic germanium-silicon multi-avalanche layer 108 ranges from 3-10 nanometers, and the well layer thickness ranges from 5-30 nanometers.

[0070] The silicon content of the intrinsic germanium-silicon multi-avalanche layer 108 is 0-30%. When the intrinsic germanium-silicon multi-avalanche layer 108 is constructed within this composition range, the lattice of the germanium layer and the germanium-silicon layer are well matched, making it easy to form a high-quality germanium / germanium-silicon multi-avalanche layer.

[0071] In some embodiments, the total thickness of the intrinsic germanium quantum well sensing layer 106 ranges from 0.1 to 3 micrometers.

[0072] The intrinsic germanium quantum well sensing layer 106 has 10-300 periods, and the thickness of a single period is greater than or equal to 15 nanometers; the barrier layer thickness of the intrinsic germanium quantum well sensing layer 106 is greater than or equal to 10 nanometers, and the well layer thickness ranges from 5-30 nanometers.

[0073] The intrinsic germanium sensing layer 105 and the intrinsic germanium quantum well sensing layer 106 both contain 0-30% silicon. Within this composition range, the optical sensing layer is constructed, and the resulting germanium layer has a relatively good lattice match with the germanium-silicon layer, making it easy to form a high-quality germanium / germanium-silicon optical sensing layer.

[0074] Please refer to Figures 2-9. Embodiments of this application also provide a method for fabricating a germanium-based SPADs sensor structure on an insulator based on a germanium-silicon multi-avalanche layer, which specifically includes the following steps:

[0075] Step S1: First substrate 001, intrinsic germanium buffer layer 002, intrinsic germanium layer 003, intrinsic germanium-silicon multi-avalanche layer 108, P-type charge layer 107, intrinsic germanium quantum well sensing layer 106, intrinsic germanium sensing layer 105, P-type heavily doped germanium layer 104 and aluminum oxide layer 103 are sequentially stacked to obtain donor substrate; wherein, P-type charge layer 107 is P-type germanium charge layer or P-type germanium-silicon charge layer.

[0076] Furthermore, the first substrate 001 is made of the same material as the second substrate 100, and can also be one of silicon, SOI, FD-SOI, Silicon on Sapphire, sapphire or glass.

[0077] The intrinsic germanium-silicon multi-avalanche layer structure used in this application has the advantage of a strong avalanche effect, which can significantly improve the avalanche gain of germanium-based SPADs devices, greatly reduce the operating voltage of the devices, avoid introducing a large amount of excessive noise when the devices are working, thereby reducing the dark current of the devices, and also reducing the dark count rate of the devices.

[0078] Step S2: The second substrate 100, the thermal oxide layer 101 and the reflector 102 are stacked sequentially to obtain the host substrate.

[0079] Step S3: Bond the donor substrate and the acceptor substrate wafers together, and remove the first substrate 001 and the intrinsic germanium buffer layer 002.

[0080] Step S4: Ion implantation is performed on the intrinsic germanium layer 003 to form an N-type heavily doped germanium layer 109, thus obtaining the sensor wafer.

[0081] Step S5: Set multiple rectangular grooves of the same shape on the sensor wafer at preset intervals.

[0082] The rectangular groove sequentially penetrates the N-type heavily doped germanium layer 109, the intrinsic germanium-silicon multi-avalanche layer 108, the P-type charge layer 107, the intrinsic germanium quantum well sensing layer 106, the intrinsic germanium sensing layer 105, and the P-type heavily doped germanium layer 104.

[0083] Step S6: A passivation layer 201 is formed on the N-type heavily doped germanium layer 109 and the inner wall of the rectangular groove.

[0084] Step S7: An N-type electrode 202 is disposed at the bottom of the rectangular groove; a P-type electrode 203 is disposed on the N-type heavily doped germanium layer 109. Referring to Figure 9, the N-type electrode 202 passes through the passivation layer and is connected to the P-type heavily doped germanium layer 104, and the P-type electrode 203 passes through the passivation layer and is connected to the N-type heavily doped germanium layer 109.

[0085] Step S8: Connect the readout circuit 204 to the N-type electrode 202 and the P-type electrode 203 respectively, and remove the second substrate 100.

[0086] Specifically, a first substrate 001 is first provided, on which an intrinsic germanium buffer layer 002 (100-500nm), an intrinsic germanium layer 003 (100-500nm), an intrinsic germanium-silicon multi-avalanche layer 108 (0.1-3μm), a p-type germanium-silicon or germanium charge layer (100nm), an intrinsic germanium quantum well sensing layer 106 (0.1-3μm), an intrinsic germanium sensing layer 105 (500-1400nm), a p-type heavily doped germanium layer 104, and an aluminum oxide layer 103 are sequentially formed to form a donor substrate. Next, a second substrate 100 is provided, on which a thermal oxide layer 101 (SiO2 layer) and an amorphous silicon or silicon oxide reflector 102 are sequentially formed to form an acceptor substrate. Then, the donor substrate and the acceptor substrate are directly wafer-bonded. The first substrate 001 is thinned sequentially by mechanical grinding or dry etching. The high-defect-density intrinsic germanium buffer layer 002 is removed by a combination of TMAH and CMP (chemical mechanical polishing). Finally, an N-type heavily doped germanium layer 109 is formed by ion implantation of the intrinsic germanium layer 003, forming a sensor wafer. Finally, a mesa structure (with rectangular grooves), a passivation layer 201, an N-type electrode 202, and a P-type electrode 203 are sequentially formed on the sensor wafer. The readout circuit 204 is bonded to the germanium-on-insulator (SPADs) focal plane array chip using flip-chip technology with In bump or Cu bump bonding. All or part of the second substrate 100 is removed to obtain the germanium-on-insulator (SPADs) sensor.

[0087] The above embodiments form germanium-based SPADs sensors on insulators through wafer bonding, eliminating lattice mismatch defects at the germanium-silicon interface. Therefore, germanium-based SPADs sensors formed on insulator substrates exhibit low dark current and low dark count rate, laying the foundation for their development in civilian fields such as automotive electronics and food safety testing.

[0088] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0089] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A GeSi multi-avalanche layer based Ge-on-insulator SPADs sensor structure, characterized in that, Comprise: Sensor wafer, passivation layer, N-type electrode, P-type electrode and readout circuit; The sensor wafer comprises a thermal oxygen layer, a mirror, an aluminum oxide layer, a P-type heavily doped germanium layer, an intrinsic germanium sensing layer, an intrinsic germanium quantum well sensing layer, a P-type charge layer, an intrinsic germanium silicon multi avalanche layer and an N-type heavily doped germanium layer which are sequentially stacked; The P-type charge layer is a P-type germanium charge layer or a P-type germanium silicon charge layer; The sensor wafer further comprises a plurality of rectangular grooves which are the same in shape and are distributed at a predetermined interval; The rectangular grooves sequentially pass through the N-type heavily doped germanium layer, the intrinsic germanium silicon multi avalanche layer, the P-type charge layer, the intrinsic germanium quantum well sensing layer, the intrinsic germanium sensing layer and the P-type heavily doped germanium layer; The passivation layer uniformly covers the N-type heavily doped germanium layer and the inner wall of each rectangular groove; The N-type electrode is arranged in the rectangular groove and connects the P-type heavily doped germanium layer through the passivation layer; The P-type electrode connects the N-type heavily doped germanium layer through the passivation layer; The readout circuit is connected to the N-type electrode and the P-type electrode respectively.

2. The GeSi multi-avalanche layer based Ge-based-on-insulator SPADs sensor structure of claim 1, wherein, The sensor wafer further comprises a second substrate; the second substrate is stacked below the thermal oxygen layer.

3. The GeSi multi-avalanche layer based Ge-based-on-insulator SPADs sensor structure of claim 2, wherein, The material of the second substrate is silicon, SOI, FD-SOI, Silicon on Sapphire, sapphire or glass.

4. The GeSi multi-avalanche layer based Ge-based-on-insulator SPADs sensor structure of claim 1, wherein, The material of the mirror is monocrystalline silicon, amorphous silicon or silicon oxide.

5. The GeSi multi-avalanche layer based Ge-based-on-insulator SPADs sensor structure of claim 4, wherein, The mirror is a periodic structure, and the number of periods is 1-6.

6. The GeSi multi-avalanche layer based Ge-based-on-insulator SPADs sensor structure of claim 1, wherein, The intrinsic germanium silicon multi avalanche layer is a germanium silicon superlattice layer structure or a germanium silicon multi quantum well structure.

7. The GeSi multi-avalanche layer based Ge-based-on-insulator SPADs sensor structure according to claim 6, wherein, The total thickness of the intrinsic germanium silicon multi avalanche layer ranges from 0.1 to 3 microns.

8. The GeSi multi-avalanche layer based Ge-based-on-insulator SPADs sensor structure of claim 7, wherein, The number of periods of the intrinsic germanium silicon multi avalanche layer is 60-400, and the thickness of a single period ranges from 8 to 40 nanometers.

9. The GeSi multi-avalanche layer based Ge-based-on-insulator SPADs sensor structure of claim 8, wherein, The barrier layer thickness of the intrinsic germanium silicon multi avalanche layer ranges from 3 to 10 nanometers, and the well layer thickness ranges from 5 to 30 nanometers; the silicon content of the intrinsic germanium silicon multi avalanche layer is 0-30%.

10. The GeSi multi-avalanche layer based Ge-based-on-insulator SPADs sensor structure of claim 1, wherein, The total thickness of the intrinsic germanium quantum well sensing layer ranges from 0.1 to 3 microns.

11. The GeSi multi-avalanche layer based Ge-based-on-insulator SPADs sensor structure of claim 10, wherein, The number of periods of the intrinsic germanium quantum well sensing layer is 10-300, and the thickness of a single period is greater than or equal to 15 nanometers.

12. The germanium-on-insulator SPADs sensor structure based on a germanium-silicon multi-avalanche layer according to claim 11, characterized in that, The barrier layer thickness of the intrinsic germanium quantum well sensing layer is greater than or equal to 10 nanometers, and the well layer thickness ranges from 5 to 30 nanometers; the silicon content of the intrinsic germanium sensing layer and the intrinsic germanium quantum well sensing layer is 0-30%.

13. A method for fabricating a germanium-based SPADs sensor structure on an insulator based on a germanium-silicon multi-avalanche layer, characterized in that, Comprise: Stack a first substrate, an intrinsic germanium buffer layer, an intrinsic germanium layer, an intrinsic germanium silicon multi avalanche layer, a P-type charge layer, an intrinsic germanium quantum well sensing layer, an intrinsic germanium sensing layer, a P-type heavily doped germanium layer and an aluminum oxide layer in sequence to obtain a donor substrate; The P-type charge layer is a P-type germanium charge layer or a P-type germanium silicon charge layer; Stack a second substrate, a thermal oxygen layer and a mirror in sequence to obtain an acceptor substrate; Wafer bond the donor substrate and the acceptor substrate, and remove the first substrate and the intrinsic germanium buffer layer; Ion implantation is performed on the intrinsic germanium layer to form an N-type heavily doped germanium layer to obtain a sensor wafer; A plurality of rectangular grooves which are the same in shape are arranged on the sensor wafer at a predetermined interval; The rectangular recesses pass through the N-type heavily doped germanium layer, the intrinsic germanium-silicon multi-avalanche layer, the P-type charge layer, the intrinsic germanium quantum well sensing layer, the intrinsic germanium sensing layer and the P-type heavily doped germanium layer in sequence. A passivation layer is formed on the N-type heavily doped germanium layer and the inner wall of the rectangular recesses; An N-type electrode is arranged at the bottom of the rectangular recesses, and a P-type electrode is arranged on the N-type heavily doped germanium layer; A readout circuit is connected to the N-type electrode and the P-type electrode respectively, and the second substrate is removed.

14. The method of fabricating a GeSi multi-avalanche layer based Ge-on-insulator SPADs sensor structure according to claim 13, wherein, The first substrate is removed by machine grinding and polishing or dry etching.

15. The method of fabricating a GeSi multi-avalanche layer based Ge-on-insulator SPADs sensor structure according to claim 13, wherein, The readout circuit is connected to the N-type electrode and the P-type electrode by flip-chip technology.

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