Liquid crystal grating and stereoscopic display device

Abstract

A liquid crystal grating and a stereoscopic display device. The liquid crystal grating comprises a plurality of electrode units (100), and each electrode unit (100) comprises N electrodes (30) sequentially spaced apart in a first direction. In a reset phase, the voltage differences between two pairs of adjacent electrodes (30) are different; and / or the working period of the liquid crystal grating comprises a data writing phase and the reset phase which are arranged in temporal order. In the same electrode unit (100), in the data writing phase, a first data voltage is applied to an i-th electrode (30) in the electrode unit (100), a second data voltage is applied to a j-th electrode (30) in the electrode unit (100), and the absolute value of the first data voltage is less than that of the second data voltage; and in the reset phase, a first reset voltage is applied to the i-th electrode (30), a second reset voltage is applied to the j-th electrode (30), and the absolute value of the first reset voltage is less than that of the second reset voltage, wherein i and j are not equal, 1≤i≤N, and 1≤j≤N.

Description

Liquid crystal grating and stereoscopic display equipment

[0001] This application claims priority to Chinese Patent Application No. 202410706120.7, filed with the Chinese Patent Office on May 31, 2024, the entire contents of which are incorporated herein by reference. Technical Field

[0002] This application relates to the field of display technology, such as liquid crystal gratings and stereoscopic display devices. Background Technology

[0003] A liquid crystal grating is formed by writing a specific data voltage signal to drive liquid crystal molecules to flip and form a sawtooth grating.

[0004] The electrodes in a liquid crystal grating are currently divided into odd-numbered and even-numbered arrays. An odd number of electrodes forms the odd array, and an even number forms the even array. During reset, positive and negative high voltages are applied to the electrodes in the odd and even arrays, respectively. For example, a voltage of 15 volts (V) is applied to the electrodes in the odd array, and a voltage of -15V is applied to the electrodes in the even array. Then, adjacent electrodes are subjected to voltages of 15V and -15V, respectively, creating a transverse electric field between them, which restores the liquid crystal molecules in the liquid crystal grating to their initial state.

[0005] Summary of the Invention

[0006] This application provides a liquid crystal grating and a stereoscopic display device, which avoids the disorder of liquid crystal molecules in some areas of the liquid crystal grating, shortens the time for liquid crystal molecules to reach the preset deflection angle in the next data writing stage after the reset stage, and improves the liquid crystal response speed.

[0007] In a first aspect, embodiments of this application provide a liquid crystal grating, including a plurality of electrode units, wherein the electrode units include N electrodes arranged sequentially at intervals along a first direction;

[0008] The voltage relationship between the electrodes in the electrode unit includes at least one of the following:

[0009] During the reset phase, the voltage difference between the two pairs of adjacent electrodes is different;

[0010] or,

[0011] The working period of the liquid crystal grating includes a time-sequential data writing phase and a reset phase. In the same electrode unit, during the data writing phase, a first data voltage is applied to the i-th electrode and a second data voltage is applied to the j-th electrode, where the absolute value of the first data voltage is less than the absolute value of the second data voltage. During the reset phase, a first reset voltage is applied to the i-th electrode and a second reset voltage is applied to the j-th electrode, where the absolute value of the first reset voltage is less than the absolute value of the second reset voltage. Wherein, i and j are not equal, 1≤i≤N, 1≤j≤N, i and j are positive integers, and N is a positive integer greater than 1.

[0012] Secondly, embodiments of this application provide a stereoscopic display device, including a light source, a spatial light modulator, a field lens, and a grating assembly arranged sequentially, wherein the grating assembly includes at least one liquid crystal grating as described in the first aspect. Attached Figure Description

[0013] Figure 1 is a schematic cross-sectional view of a liquid crystal grating.

[0014] Figure 2 is a schematic diagram of the cross-sectional structure of another type of liquid crystal grating;

[0015] Figure 3 is a timing diagram of a liquid crystal grating provided in an embodiment of this application;

[0016] Figure 4 is a timing diagram of another liquid crystal grating provided in an embodiment of this application;

[0017] Figure 5 is a timing diagram of another liquid crystal grating provided in an embodiment of this application;

[0018] Figure 6 is a timing diagram of another liquid crystal grating provided in an embodiment of this application;

[0019] Figure 7 is a timing diagram of another liquid crystal grating provided in an embodiment of this application;

[0020] Figure 8 is a timing diagram of another liquid crystal grating provided in an embodiment of this application;

[0021] Figure 9 is a timing diagram of another liquid crystal grating provided in an embodiment of this application;

[0022] Figure 10 is a timing diagram of another liquid crystal grating provided in an embodiment of this application;

[0023] Figure 11 is a schematic cross-sectional view of another type of liquid crystal grating;

[0024] Figure 12 is a timing diagram of another liquid crystal grating provided in an embodiment of this application;

[0025] Figure 13 is a timing diagram of another liquid crystal grating provided in an embodiment of this application;

[0026] Figure 14 is a timing diagram of another liquid crystal grating provided in an embodiment of this application;

[0027] Figure 15 is a timing diagram of another liquid crystal grating provided in an embodiment of this application;

[0028] Figure 16 is a timing diagram of another liquid crystal grating provided in an embodiment of this application;

[0029] Figure 17 is a schematic diagram of the circuit structure of a liquid crystal grating provided in an embodiment of this application;

[0030] Figure 18 is a schematic diagram of another liquid crystal grating circuit structure provided in an embodiment of this application;

[0031] Figure 19 is a schematic diagram of another liquid crystal grating circuit structure provided in an embodiment of this application;

[0032] Figure 20 is a schematic diagram of another liquid crystal grating circuit structure provided in an embodiment of this application;

[0033] Figure 21 is a schematic diagram of another liquid crystal grating circuit structure provided in an embodiment of this application;

[0034] Figure 22 is a schematic diagram of another liquid crystal grating circuit structure provided in an embodiment of this application;

[0035] Figure 23 is a schematic diagram of another liquid crystal grating circuit structure provided in an embodiment of this application;

[0036] Figure 24 is a schematic diagram of the structure of a stereoscopic display device provided in an embodiment of this application. Detailed Implementation

[0037] The present application will now be described in conjunction with the accompanying drawings and embodiments. The embodiments described herein are used to explain the present application. Furthermore, for ease of description, the accompanying drawings show some structures related to the present application.

[0038] Figure 1 is a schematic cross-sectional view of a liquid crystal grating. Referring to Figure 1, the liquid crystal grating includes a first substrate 10, a second substrate 20, and a liquid crystal layer 50. The liquid crystal layer 50 is located between the first substrate 10 and the second substrate 20. The liquid crystal layer 50 includes a plurality of liquid crystal molecules, which can be positive or negative liquid crystal molecules. The liquid crystal grating includes a plurality of electrode units 100. Each electrode unit 100 includes N electrodes 30 arranged sequentially at intervals along a first direction L1. In a direction perpendicular to the plane of the first substrate 10, the electrodes 30 are located between the first substrate 10 and the liquid crystal layer 50. Along the first direction L1, there is a certain distance between two adjacent electrodes 30. N is a positive integer greater than 1.

[0039] The liquid crystal grating also includes a counter electrode 40. The counter electrode 40 is located between the second substrate 20 and the liquid crystal layer 50 in a direction perpendicular to the plane of the first substrate 10. The counter electrode 40 can be a full-surface electrode. When a voltage difference exists between the electrode 30 and the counter electrode 40, a longitudinal electric field is formed between them, which drives the liquid crystal molecules in the liquid crystal layer 50 to rotate. Consequently, the liquid crystal grating is formed as a sawtooth grating.

[0040] The study found that during reset, applying positive and negative high voltages to the electrodes in the odd-numbered array and even-numbered arrays, respectively, results in a slight reduction in the time it takes for the liquid crystal molecules at electrode 30 (e.g., the liquid crystal molecules in region S1 in Figure 1) to reach the reset state during the reset phase. In the next data writing phase following the reset phase, due to the frictional and interaction forces of different liquid crystal molecules, the time it takes for the liquid crystal molecules to reach the preset deflection angle in the next data writing phase actually increases significantly.

[0041] Figure 2 is a schematic cross-sectional view of another liquid crystal grating structure. Referring to Figures 1 and 2, the liquid crystal grating includes multiple electrode units 100. Each electrode unit 100 includes N electrodes 30 arranged sequentially along a first direction L1. Adjacent electrodes 30 are spaced a certain distance apart. The multiple electrodes 30 are arranged along the first direction L1 and extend along a second direction (perpendicular to the plane of the paper) to form a grating electrode. The second direction intersects the first direction. During the reset phase, the voltage difference between two pairs of adjacent electrodes 30 is different. Therefore, during the reset phase, the reset voltage signal is selectively set based on the data voltage signal before the reset phase. For example, one value is set for the voltage difference between a pair of adjacent electrodes 30 corresponding to region S1, and another value is set for the voltage difference between a pair of adjacent electrodes 30 corresponding to region S1. This avoids the disorder of liquid crystal molecules in region S1, shortens the time for liquid crystal molecules to reach the preset deflection angle in the next data writing phase after the reset phase, and improves the liquid crystal response speed.

[0042] Referring to Figure 2, electrodes 30 in the same electrode unit 100 are arranged sequentially along a first direction L1. The plurality of electrodes 30 includes a first type of electrode 31 and a second type of electrode 32. The first type of electrode 31 and the second type of electrode 32 are alternately arranged along the first direction L1. The plurality of electrodes 30 arranged sequentially along the first direction L1 are: first type of electrode 31, second type of electrode 32, first type of electrode 31, second type of electrode 32, ..., first type of electrode 31 and second type of electrode 32. The electrode unit 100 includes at least two electrode groups 300 arranged sequentially along the first direction L1. The electrode group 300 includes adjacent and paired first type of electrode 31 and second type of electrode 32. During the reset phase, the voltage difference between the electrodes 30 in at least two electrode groups 300 is different.

[0043] For example, referring to FIG2, the electrode unit 100 includes four electrode groups 300 arranged sequentially along a first direction L1. The four electrode groups 300 are a first electrode group 301, a second electrode group 302, a third electrode group 303, and a fourth electrode group 304. The electrode group 300 includes a first type electrode 31 and a second type electrode 32 arranged adjacent to each other. During the reset phase, the voltage difference between the first type electrode 31 and the second type electrode 32 in the first electrode group 301 is different from the voltage difference between the first type electrode 31 and the second type electrode 32 in the third electrode group 303.

[0044] Figure 3 is a timing diagram of a liquid crystal grating provided in an embodiment of this application. Referring to Figures 2 and 3, the working period of the liquid crystal grating includes a data writing stage and a reset stage arranged in a timing sequence. The reset stage is located after the data writing stage. In the same electrode unit 100, during the data writing stage, a first data voltage is applied to the i-th electrode 30 in the electrode unit 100, and a second data voltage is applied to the j-th electrode 30 in the electrode unit 100. The absolute value of the first data voltage is less than the absolute value of the second data voltage. In the same electrode unit 100, during the reset stage, a first reset voltage is applied to the i-th electrode 30, and a second reset voltage is applied to the j-th electrode 30. The absolute value of the first reset voltage is less than the absolute value of the second reset voltage. Wherein, i and j are not equal, 1≤i≤N, 1≤j≤N, i and j are positive integers, and N is a positive integer greater than 1.

[0045] Optionally, during the data writing phase, voltages of the same polarity are applied to multiple electrodes 30 in the same electrode unit 100, with the absolute value of the voltage increasing or decreasing sequentially. That is, along the first direction L1, the absolute values ​​of the voltages of multiple electrodes 30 in the same electrode unit 100 increase or decrease sequentially during the data writing phase. Consequently, the liquid crystal grating is formed as a sawtooth grating. During the data writing phase, the absolute value of the first data voltage applied to the i-th electrode 30 is smaller, resulting in a smaller deflection angle of the liquid crystal molecules at the i-th electrode 30; the absolute value of the second data voltage applied to the j-th electrode 30 is larger, resulting in a larger deflection angle of the liquid crystal molecules at the j-th electrode 30. During the reset phase, for the i-th electrode 30, a lower absolute value reset voltage is applied to rotate the liquid crystal molecules to the initial state, achieving reset; for the j-th electrode 30, a higher absolute value reset voltage is applied to rotate the liquid crystal molecules to the initial state, achieving reset. Therefore, during the reset phase, the reset voltage signal in the reset phase is selectively set based on the data voltage signal prior to the reset phase. This avoids applying an excessively large absolute reset voltage to the electrode 30, which has a low absolute voltage during the data writing phase, during the reset phase. This prevents the liquid crystal molecules at the electrode 30, which has a low absolute voltage during the data writing phase, from becoming disordered. It also shortens the time it takes for the liquid crystal molecules to reach the preset deflection angle in the next data writing phase after the reset phase, thereby improving the liquid crystal response speed.

[0046] Referring to Figures 2 and 3, the electrode unit 100 includes an Xth electrode group and a Yth electrode group arranged sequentially along a first direction L1. During the data writing phase, the absolute value of the voltage applied to the electrode 30 in the Xth electrode group is less than the absolute value of the voltage applied to the electrode 30 in the Yth electrode group. During the reset phase, the absolute value of the voltage difference between a pair of adjacent electrodes 30 in the Xth electrode group is less than the absolute value of the voltage difference between a pair of adjacent electrodes 30 in the Yth electrode group. X and Y are positive integers. The absolute value of the voltage applied to the electrode group 300 refers to the absolute value of the voltage applied to the electrode 30 in the electrode group 300. In this embodiment, during the data writing phase, the absolute values ​​of the voltages applied to multiple electrode groups 300 in the same electrode unit 100 gradually increase. For the Xth electrode group, a lower absolute voltage difference during the reset phase allows the liquid crystal molecules to rotate to their initial state, thus achieving reset; for the Yth electrode group, a higher absolute voltage difference during the reset phase allows the liquid crystal molecules to rotate to their initial state, thus achieving reset. Therefore, during the reset phase, the reset voltage signal is selectively set based on the data voltage signal prior to the reset phase, thereby improving the liquid crystal response speed. A stronger lateral electric field formed by the two electrodes 30 in the electrode group 300 corresponds to the recovery of liquid crystal molecules with larger rotation angles to their initial state. Conversely, a weaker lateral electric field formed by the two electrodes 30 in the electrode group 300 corresponds to the recovery of liquid crystal molecules with smaller rotation angles to their initial state. During the reset phase, the two electrodes 30 in the electrode group 300 form a lateral electric field, which causes the liquid crystal molecules to rotate in order to recover to their initial state as quickly as possible.

[0047] For example, referring to Figures 2 and 3, taking X=2 and Y=3 as an example, the second electrode group 302 and the third electrode group 303 are arranged sequentially along the first direction L1. During the data writing phase, the voltage applied to the first type electrode 31 in the second electrode group 302 is denoted as V3, and the voltage applied to the second type electrode 32 in the second electrode group 302 is denoted as V4. During the data writing phase, the voltage applied to the first type electrode 31 in the third electrode group 303 is denoted as V5, and the voltage applied to the second type electrode 32 in the third electrode group 303 is denoted as V6. During the reset phase, the voltage applied to the first type electrode 31 in the second electrode group 302 is denoted as U3, and the voltage applied to the second type electrode 32 in the second electrode group 302 is denoted as U4. During the reset phase, the voltage applied to the first type electrode 31 in the third electrode group 303 is denoted as U5, and the voltage applied to the second type electrode 32 in the third electrode group 303 is denoted as U6. |V3| and |V4| are less than |V5|, |V3| and |V4| are less than |V6|, and |U3-U4| < |U5-U6|.

[0048] Optionally, referring to Figures 2 and 3, the electrode unit 100 includes a first electrode group 301, a second electrode group 302, ..., an Mth electrode group arranged sequentially along a first direction L1. The electrode unit 100 includes M electrode groups 300, which are the first electrode group 301 to the Mth electrode group, respectively. During the reset phase, the absolute value gradient of the voltage difference between the first electrode group 301 and the Mth electrode group increases. Where 2M≤N, X, Y, and M are positive integers; X and Y are less than M. The voltage difference of the electrode group 300 refers to the voltage difference between the first type of electrode 31 and the second type of electrode 32 in the electrode group 300. In this embodiment, during the data writing phase, the absolute value gradient of the voltage difference between each electrode group 30 increases. Correspondingly, the deflection angle of the liquid crystal molecules gradually increases. During the reset phase, a larger absolute value voltage difference needs to be applied to the electrode group 300 corresponding to the large deflection angle of the liquid crystal molecules to reset the liquid crystal molecules. At electrode group 300, which corresponds to a small deflection angle of the liquid crystal molecules, a small absolute voltage difference needs to be applied to reset the liquid crystal molecules, thereby saving power consumption.

[0049] For example, referring to Figures 2 and 3, taking M=4 as an example, during the data writing phase, the voltages applied to the electrodes 30 in the first electrode group 301 to the fourth electrode group 304 are sequentially recorded as: V1, V2, V3, V4, V5, V6, V7, V8. During the reset phase, the voltages applied to the electrodes 30 in the first electrode group 301 to the fourth electrode group 304 are sequentially recorded as: U1, U2, U3, U4, U5, U6, U7, U8. 0 < V1 < V2 < V3 < V4 < V5 < V6 < V7 < V8. |U1-U2| < |U3-U4| < |U5-U6| < |U7-U8|.

[0050] Figure 4 is a timing diagram of another liquid crystal grating provided in an embodiment of this application. Referring to Figures 2 and 4, during the reset phase, the voltage difference of the Xth electrode group is 0V. The first type electrode 31 and the second type electrode 32 in the Xth electrode group have the same voltage, and the voltage difference between the first type electrode 31 and the second type electrode 32 in the Xth electrode group is 0V. Therefore, during the reset phase, no transverse electric field is generated between the first type electrode 31 and the second type electrode 32 in the Xth electrode group, and the liquid crystal molecules will not reset under the drive of the Xth electrode group. The liquid crystal molecules maintain the deflection angle in the data writing phase before the reset phase. During the reset phase, the absolute value of the voltage difference between a pair of adjacent electrodes 30 in the Xth electrode group is less than the absolute value of the voltage difference between a pair of adjacent electrodes 30 in the Yth electrode group. Therefore, during the reset phase, the voltage difference between the first type electrode 31 and the second type electrode 32 in the Yth electrode group is non-zero, and a transverse electric field is generated between the first type electrode 31 and the second type electrode 32 in the Yth electrode group, and the liquid crystal molecules will reset under the drive of the Yth electrode group. In one embodiment, the reset method is as follows: the liquid crystal molecules at the positions of the first electrode group 300 are not reset, while the liquid crystal molecules at the positions of the second electrode group 300 are reset.

[0051] For example, referring to Figures 2 and 4, taking X=2 and Y=3 as an example. During the reset phase, the voltage applied to the first type electrode 31 in the second electrode group 302 is denoted as U3, and the voltage applied to the second type electrode 32 in the second electrode group 302 is denoted as U4. |U3-U4|=0V. During the reset phase, the voltage applied to the first type electrode 31 in the third electrode group 303 is denoted as U5, and the voltage applied to the second type electrode 32 in the third electrode group 303 is denoted as U6. |U5-U6|>0.

[0052] For example, referring to Figures 2 and 4, during the reset phase, the absolute value of the voltage difference of the first electrode group 301 is greater than the absolute value of the voltage difference of the second electrode group 302. During the reset phase, the voltage difference of the second electrode group 302 is 0V. During the reset phase, the absolute value of the voltage difference of the third electrode group 303 is greater than the absolute value of the voltage difference of the second electrode group 302. That is, |U1-U2|>|U3-U4|, |U5-U6|>|U3-U4|, |U3-U4|=0V. Therefore, a second electrode group 302, which is not used to reset liquid crystal molecules, is provided between the first electrode group 301 and the third electrode group 303 to avoid the generation of a transverse interference electric field between the first electrode group 301 and the third electrode group 303.

[0053] Optionally, referring to Figures 2 and 3, the electrode unit 100 includes a first electrode group 301, ..., a P-th electrode group, ..., an M-th electrode group arranged sequentially along the first direction L1. During the reset phase, the absolute value of the voltage difference of the P-th electrode group is greater than the voltage difference of the first electrode group 301, and the absolute value of the voltage difference of the M-th electrode group is greater than the absolute value of the voltage difference of the P-th electrode group. Where 2M≤N, 2≤P<M, Y, P, and M are positive integers, and Y<M. During the reset phase, the voltage difference of the first electrode group 301 is 0V. During the data writing phase, the liquid crystal molecules at the P-th electrode group have a smaller deflection angle, while those at the M-th electrode group have a larger deflection angle. Correspondingly, during the reset phase, the absolute value of the voltage difference of the P-th electrode group is smaller, achieving a weak reset, corresponding to a smaller deflection angle of the liquid crystal molecules at the P-th electrode group, meaning it can return to the initial state. During the reset phase, the absolute value of the voltage difference of the Mth electrode group is relatively large, achieving a strong reset. This corresponds to a larger deflection angle of the liquid crystal molecules at the position of the Mth electrode group, meaning they can return to their initial state. In one embodiment, the reset method is as follows: the liquid crystal molecules at the position of the first electrode group 300 do not reset, the liquid crystal molecules at the position of the second electrode group 300 undergo a weak reset, and the liquid crystal molecules at the position of the third electrode group 300 undergo a strong reset.

[0054] Figure 5 is a timing diagram of another liquid crystal grating provided in an embodiment of this application. Referring to Figures 2 and 5, the electrode unit 100 includes M electrode groups 300 arranged sequentially along the first direction L1. There are at least two adjacent electrode groups 300, and the voltage difference between adjacent electrodes 30 in adjacent electrode groups 300 is 0V. Wherein, 2M≤N, 2≤P<M, and P and M are positive integers. In this embodiment of the application, there are at least two adjacent electrode groups 300 with a voltage difference of 0V, and at least two adjacent electrode groups 300 do not generate a transverse electric field, so the liquid crystal molecules at the positions of the at least two adjacent electrode groups 300 will not be reset during the reset phase.

[0055] For example, referring to Figures 2 and 5, during the reset phase, the voltage applied to the first type of electrode 31 in the first electrode group 301 is denoted as U1, and the voltage applied to the second type of electrode 32 in the first electrode group 301 is denoted as U2. |U1-U2|=0V. The voltage applied to the first type of electrode 31 in the second electrode group 302 is denoted as U3, and the voltage applied to the second type of electrode 32 in the second electrode group 302 is denoted as U4. |U3-U4|=0V.

[0056] Referring, exemplarily to Figures 2 and 5, during the data writing phase, the absolute value gradient of the voltage applied to multiple electrode groups 300 in the same electrode unit 100 increases. The deflection angle of the liquid crystal molecules corresponding to the first electrode group 301 to the Mth electrode group, which are sequentially arranged along the first direction L1, gradually increases. During the reset phase, the electrode unit 100 includes the first electrode group 301, ..., the Zth electrode group, ..., the Mth electrode group, which are sequentially arranged along the first direction L1. During the reset phase, the voltage difference between the first electrode group 301 and the Zth electrode group is 0V. Here, Z is a positive integer. Z < M.

[0057] Optionally, Z is greater than or equal to 2, meaning that during the reset phase: the voltage difference between the electrodes in at least two consecutive electrode groups is 0. In other words, during the reset phase: the electrodes 30 in the first few electrode groups 300 have a uniform voltage.

[0058] Optionally, referring to Figures 2 and 3, during the reset phase, the electrode unit 100 includes M electrode groups 300 sequentially arranged along the first direction L1. Each electrode group 300 includes two adjacent electrodes 30. During the reset phase, voltages of opposite polarities are applied to the two electrodes 30 within the same electrode group 300. Where 2M ≤ N, and M is a positive integer. In this embodiment, applying reset voltages of opposite polarities to the two electrodes 30 within the same electrode group 300 generates a transverse electric field between the two electrodes 30, resetting the liquid crystal molecules at the position of the electrode group 300. It is understood that applying reset voltages of opposite polarities to the two electrodes 30 within the same electrode group 300, compared to applying reset voltages of the same polarity to the two electrodes 30 within the same electrode group 300, reduces the absolute value of the voltage applied to a single electrode 30 under the same voltage difference. For example, when applying reset voltages of the same polarity to the two electrodes 30 within the same electrode group 300, the reset voltages of the two electrodes 30 are 1V and 3V respectively, achieving a voltage difference of 2V. When two electrodes 30 in the same electrode group 30 are applied with opposite polarity reset voltages, the reset voltages of the two electrodes 30 are -1V and 1V respectively, a voltage difference of 2V can be achieved.

[0059] Optionally, referring to Figures 2 and 3, during the reset phase, when i < j, the absolute value gradient of the voltage applied to the electrodes in the M electrode groups 300 increases. During the data writing phase, the absolute value gradient of the voltage of each electrode 30 increases. Correspondingly, the rotation angle of the liquid crystal molecules gradually increases. During the reset phase, a larger absolute value voltage needs to be applied to reset the liquid crystal molecules where the rotation angle is large; a smaller absolute value voltage only needs to be applied to reset the liquid crystal molecules where the rotation angle is small. Thus, corresponding to the gradient change of the data voltage during the data writing phase, the reset voltage also changes gradient during the reset phase, which can reset the liquid crystal molecules and save power consumption.

[0060] Figure 6 is a timing diagram of another liquid crystal grating provided in an embodiment of this application. Referring to Figures 2 and 6, during the reset phase, when i > j, the absolute value gradient of the voltage applied to the electrodes 30 in the M electrode groups 300 decreases. In this embodiment, during the data writing phase, the absolute value gradient of the voltage of each electrode 30 decreases. Correspondingly, during the reset phase, the decrease in the absolute value gradient of the voltage of each electrode 30 in the electrode group 300 can reset the liquid crystal molecules, thereby saving power consumption.

[0061] Optionally, referring to Figures 2 and 3, during the reset phase, there is at least one electrode group 300 that is a first type of electrode group. In the first type of electrode group, the absolute values ​​of the voltages applied to the two electrodes 30 are equal. Therefore, the voltages applied to the two electrodes 30 in the first type of electrode group are equal in value but opposite in polarity. The positive and negative polarities of the two electrodes 30 in the first type of electrode group cancel each other out on the polarization of the liquid crystal molecules. From an overall perspective, it is equivalent to the first type of electrode group being uncharged and the liquid crystal grating being uncharged. Thus, during the operation of the liquid crystal grating, the liquid crystal molecules in the liquid crystal layer 50 will not be polarized due to the overall positive or negative charge of the liquid crystal grating.

[0062] For example, referring to Figures 2 and 3, during the reset phase, the second electrode group 302, the third electrode group 303, and the fourth electrode group 304 are first-type electrode groups. U3 = -U4, U5 = -U6, U7 = -U8. For example, U3 = 5V, U4 = -5V, U5 = 10V, U6 = -10V, U7 = 15V, U8 = -15V.

[0063] Figure 7 is a timing diagram of another liquid crystal grating provided in an embodiment of this application. Referring to Figures 2 and 7, during the reset phase, there is at least one electrode group 300 that is a second type of electrode group. In the second type of electrode group, the absolute values ​​of the voltages applied to the two electrodes 30 are not equal.

[0064] For example, referring to Figures 2 and 7, the third electrode group 303 is a type II electrode group. U5 ≠ -U6, for example, U5 = 15V, U6 = -10V. Thus, the third electrode group 303 is positively charged as a whole.

[0065] Figure 8 is a timing diagram of another liquid crystal grating provided in an embodiment of this application. Referring to Figures 2 and 8, the working period of the liquid crystal grating includes a first time period T1 and a second time period T2 arranged in a time sequence. Both the first time period T1 and the second time period T2 include a reset phase. The polarity of the second type of electrode group in the first time period T1 is opposite to that in the second time period T2. Therefore, the positive charge carried by the second type of electrode group in the first time period T1 and the negative charge carried by the second type of electrode group in the second time period T2 mutually cancel each other out the polarization of the liquid crystal molecules, or vice versa. Overall, the charge carried by the second type of electrode group is reduced, thus reducing the charge carried by the liquid crystal grating. Therefore, during the operation of the liquid crystal grating, the degree of polarization of the liquid crystal molecules in the liquid crystal layer 50 due to the overall positive or negative charge of the liquid crystal grating is reduced. The polarity of the second type of electrode group is the polarity of the sum of the voltages applied to the two electrodes 30 within the second type of electrode group.

[0066] For example, referring to Figures 2 and 8, in the first time period T1, U5 = 15V and U6 = -10V. The liquid crystal grating is positively charged. In the second time period T2, U5 = 10V and U6 = -15V. The liquid crystal grating is negatively charged. Combining the first time period T1 and the second time period T2, the positive and negative polarities of the two electrodes 30 in the second type of electrode group cancel each other out the polarization of the liquid crystal molecules. Overall, it is equivalent to the liquid crystal grating being uncharged, thus preventing the liquid crystal molecules in the liquid crystal layer 50 from becoming polarized.

[0067] Optionally, in one embodiment, during the reset phase, the maximum absolute value of the voltage applied to two electrodes 30 within the same electrode group 300 is denoted as the electrode pair voltage, and the voltage gradient of M electrode pairs increases or decreases. That is, taking the electrode group 300 as a unit, the voltage gradient increases or decreases overall. Two adjacent electrode groups 300 include a first electrode group 301 and a second electrode group 302. The electrode pair voltage of the first electrode group 301 is less than the electrode pair voltage of the second electrode group 302, and the electrode pair voltage of the first electrode group 301 is greater than the minimum absolute value of the voltage of the electrodes 30 in the second electrode group 302.

[0068] For example, |U1| < |U2|, |U3| < |U4|. The electrode pair voltage of the first electrode group 301 is |U2|, and the electrode pair voltage of the second electrode group 302 is |U4|, |U2| < |U4|, |U3| < |U2|. The magnitude relationship of the electrodes 30 in the first electrode group 301 and the second electrode group 302 is: |U1| < |U3| < |U2| < |U4|.

[0069] Optionally, referring to Figures 2 and 3, the electrode unit 100 includes M electrode groups 300 arranged sequentially along the first direction L1. During the reset phase, at least one electrode group 300 exists, and the voltage applied to both electrodes 30 in the electrode group 300 is 0V. Wherein, 2M≤N, and M is a positive integer.

[0070] For example, referring to Figures 2 and 3, during the reset phase, the voltage difference of the first electrode group 301 is 0V, the voltage of the first type electrode 31 in the first electrode group 301 is 0V, and the voltage of the second type electrode 32 in the first electrode group 301 is 0V. Therefore, during the reset phase, not only is there no lateral electric field between the first type electrode 31 and the second type electrode 32 in the first electrode group 301, but also no longitudinal electric field is generated between the first type electrode 31 and the counter electrode 40, and no longitudinal electric field is generated between the second type electrode 32 and the counter electrode 40. The liquid crystal molecules maintain the deflection angle from the data writing phase prior to the reset phase. The liquid crystal molecules do not perform a reset action.

[0071] Figure 9 is a timing diagram of another liquid crystal grating provided in an embodiment of this application. Referring to Figures 2 and 9, during the reset phase, the first type of electrode 31 and the second type of electrode 32 in the first electrode group 301 can also have non-zero voltages of the same polarity and the same magnitude, thereby achieving a voltage difference of 0V for the first electrode group 301. It is understood that the distance between electrode 30 and the counter electrode 40 is relatively large in the direction perpendicular to the first substrate 10. Typically, a fixed voltage is applied to the counter electrode 40, such as 0V or a voltage value close to 0V. Thus, the longitudinal electric field generated by electrode 30 and the counter electrode 40 is smaller than the transverse electric field generated by positive and negative voltages during the reset phase. In other words, the transverse electric field plays a major role in the reset, and the electrode 30, which achieves a voltage difference of 0V for the first electrode group 301, has a non-zero voltage, so the liquid crystal molecules can also be non-reset at the position of the first electrode group 301. On the one hand, since no reset is required, there is no need to provide a reset voltage at this position, thus reducing power consumption. On the other hand, at locations with lower data voltage during the data writing phase, the deflection angle of the liquid crystal molecules is smaller. Even during the reset phase, the liquid crystal molecules at these locations do not reset. In the next data writing phase, when the data voltage is rewritten to the electrode 30 corresponding to the location with the smaller deflection angle of the non-reset liquid crystal molecules, the liquid crystal molecules can quickly deflect to the preset deflection angle for the next data writing phase. Furthermore, since the reset is not performed under the influence of positive and negative high voltages (i.e., strong lateral electric fields), the influence of friction and interaction forces among different liquid crystal molecules is reduced in the next data writing phase after the reset phase, thus reducing the time it takes for the liquid crystal molecules to reach the preset deflection angle in the next data writing phase and improving the liquid crystal response speed.

[0072] Figure 10 is a timing diagram of another liquid crystal grating provided in an embodiment of this application. Referring to Figures 2 and 10, when i < j, N is an even number, and during the reset phase, it is the first to the second... The voltage applied to electrode 30 is 0V, which is the voltage of the first electrode. The absolute values ​​of the voltages applied to the Nth to Nth electrodes 30 are equal. During the reset phase, voltages of opposite polarities are applied to two electrodes 30 in the same electrode group 300. The voltage of the electrodes 30 in the first half of the electrode group 300 of the electrode unit 100 is 0V. In the second half of the electrode group 300 of the electrode unit 100, the voltages of the two electrodes 30 are equal and opposite in polarity.

[0073] For example, referring to Figures 2 and 10, N = 8. U1 = U2 = U3 = U4 = 0V. U5 = -U6 = U7 = -U8.

[0074] Figure 11 is a cross-sectional schematic diagram of another liquid crystal grating structure, and Figure 12 is a timing diagram of another liquid crystal grating provided in the embodiment of this application. Referring to Figures 11 and 12, N is an odd number, and during the reset phase, it represents the first to the second... The voltage applied to the first electrode is 0V, which is the voltage applied to the second electrode. The absolute values ​​of the voltages applied to the Nth to Nth electrodes are equal. The voltage of electrode 30 in the first half of electrode group 300 of electrode unit 100 is 0V. In the second half of electrode group 300 of electrode unit 100, the voltages of the two electrodes 30 are equal in value but opposite in phase.

[0075] For example, referring to Figures 11 and 12, N = 9. During the data writing phase, the voltages applied to the 1st to 9th electrodes 30 are sequentially denoted as: V1, V2, V3, V4, V5, V6, V7, V8, V9. During the reset phase, the voltages applied to the 1st to 9th electrodes 30 are sequentially denoted as: U1, U2, U3, U4, U5, U6, U7, U8, U9. The following conditions must be met: U1 = U2 = U3 = U4 = U5 = 0V. U6 = -U7 = U8 = -U9.

[0076] In other implementations, when i > j, N is an even number, and during the reset phase, it is the first to the second... The absolute values ​​of the voltages applied to each of the 30 electrodes are equal, and are equal to the absolute values ​​of the voltages applied to the first electrode. The voltage applied to the first to the Nth electrode 30 is 0V. Alternatively, when i > j, N is an odd number, and during the reset phase, it is the voltage applied to the first to the Nth electrode 30. The absolute values ​​of the voltages applied to each of the 30 electrodes are equal, and are equal to the absolute values ​​of the voltages applied to the first electrode. The voltage applied to the Nth to Nth electrodes 30 is 0V. In the first half of the electrode group 300 of the electrode unit 100, the voltages of the two electrodes 30 are equal and out of phase. In the second half of the electrode group 300 of the electrode unit 100, the voltage of the electrodes 30 is 0V.

[0077] Optionally, referring to Figures 2 and 3, the correspondence between the data voltage and reset voltage of the electrode includes at least one of the following: the first data voltage is equal to the first reset voltage, or the second data voltage is equal to the second reset voltage. Maintaining the reset voltage of at least one electrode 30 during the reset phase is equal to the data voltage during the data writing phase prior to the reset phase, without rewriting a voltage of a different value as the reset voltage, reduces power consumption.

[0078] Figure 13 is a timing diagram of another liquid crystal grating provided in an embodiment of this application. Referring to Figures 2 and 13, the voltage applied to an odd number of electrodes 30 in the same electrode unit 100 during the reset phase is equal to the voltage applied during the data writing phase. Maintaining the reset voltage of an odd number of electrodes 30 during the reset phase is equal to the data voltage in the data writing phase prior to the reset phase, eliminating the need to rewrite a different voltage value as the reset voltage, thus reducing power consumption.

[0079] In other embodiments, the voltage applied to an even number of electrodes 30 in the same electrode unit 100 during the reset phase is equal to the voltage applied during the data writing phase. Maintaining the reset voltage of an even number of electrodes 30 during the reset phase is equal to the data voltage in the data writing phase prior to the reset phase, eliminating the need to rewrite a different voltage value as the reset voltage and reducing power consumption.

[0080] Optionally, referring to Figures 2 and 13, during the reset phase, the voltage applied to an odd number of electrodes 30 in the same electrode unit 100 is equal to the voltage applied during the data writing phase; conversely, during the reset phase, the voltage applied to an even number of electrodes 30 in the same electrode unit 100 is equal to the opposite value of the voltage applied during the data writing phase. The voltages applied to the electrodes 30 in the same electrode unit 100 during the data writing phase are sequentially denoted as: V1, V2, V3, V4, ..., V... N-1 V N The voltages applied to electrode 30 in electrode unit 100 during the reset phase are sequentially denoted as: U1, U2, U3, U4, ..., U... N-1 U N N is an even number, U1 = V1, U3 = V3, ..., U N-1 =V N-1 ;U2=-V2, U4=-V4,…,U N =-V N .

[0081] For example, N=8, V1=1V, V2=2V, V3=3V, V4=4V, V5=5V, V6=6V, V7=7V, V8=8V. U1=1V, U2=-2V, U3=3V, U4=-4V, U5=5V, U6=-6V, U7=7V, U8=-8V.

[0082] In one implementation, the voltage applied to an odd number of electrodes 30 in the same electrode unit 100 during the reset phase is equal to the voltage applied during the data writing phase, where N is odd, U1 = V1, U3 = V3, ..., U N =V N ;U2=-V2, U4=-V4,…,U N-1 =-V N-1 .

[0083] For example, N=9, V1=1V, V2=2V, V3=3V, V4=4V, V5=5V, V6=6V, V7=7V, V8=8V, V9=9V. U1=1V, U2=-2V, U3=3V, U4=-4V, U5=5V, U6=-6V, U7=7V, U8=-8V, U9=9V.

[0084] Figure 14 is a timing diagram of another liquid crystal grating provided in an embodiment of this application. Referring to Figures 2 and 14, during the reset phase, the voltage applied to an even number of electrodes 30 in the same electrode unit 100 is equal to the voltage applied during the data writing phase. Conversely, during the reset phase, the voltage applied to an odd number of electrodes 30 in the same electrode unit 100 is equal to the opposite value of the voltage applied during the data writing phase. N is an even number, U1 = -V1, U3 = -V3, ..., U N-1 =-V N-1 ;U2=V2, U4=V4,...,U N =V N .

[0085] For example, N=8, V1=1V, V2=2V, V3=3V, V4=4V, V5=5V, V6=6V, V7=7V, V8=8V. U1=-1V, U2=2V, U3=-3V, U4=4V, U5=-5V, U6=6V, U7=-7V, U8=8V.

[0086] In one implementation, the voltage applied to an even number of electrodes 30 in the same electrode unit 100 during the reset phase is equal to the voltage applied during the data writing phase, where N is odd, U1 = -V1, U3 = -V3, ..., U N =-V N ;U2=V2, U4=V4,...,U N-1 =VN-1 .

[0087] For example, N=9, V1=1V, V2=2V, V3=3V, V4=4V, V5=5V, V6=6V, V7=7V, V8=8V, V9=9V. U1=-1V, U2=2V, U3=-3V, U4=4V, U5=-5V, U6=6V, U7=-7V, U8=8V, U9=-9V.

[0088] When N is odd, reversing the polarity of an even number of electrodes 30 requires one fewer electrode 30 to be reversed than reversing the polarity of an odd number of electrodes 30.

[0089] Figure 15 is a timing diagram of another liquid crystal grating provided in an embodiment of this application. Referring to Figures 2 and 15, during the reset phase, the voltage applied to an odd number of electrodes 30 in the same electrode unit 100 is equal to the voltage applied during the data writing phase. Conversely, during the reset phase, the voltage applied to an even number of electrodes 30 in the same electrode unit 100 is equal to the opposite value of the voltage applied to an odd number of electrodes 30 in the same electrode group 300 during the data writing phase. The voltages applied to the electrodes 30 in the same electrode unit 100 during the data writing phase are sequentially denoted as: V1, V2, V3, V4, ..., V... N-1 V N The voltages applied to electrode 30 in electrode unit 100 during the reset phase are sequentially denoted as: U1, U2, U3, U4, ..., U... N-1 U N N is an even number, U1 = V1, U3 = V3, ..., U N-1 =V N-1 ;U2=-V1, U4=-V3,…,U N =-V N-1 Therefore, the voltages of the first type of electrode 31 and the second type of electrode 32 in the same electrode group 300 are equal but opposite in polarity, and the liquid crystal grating is uncharged. Thus, during the operation of the liquid crystal grating, the liquid crystal molecules in the liquid crystal layer 50 will not be polarized due to the overall positive or negative charge of the liquid crystal grating.

[0090] For example, N=8, V1=1V, V2=2V, V3=3V, V4=4V, V5=5V, V6=6V, V7=7V, V8=8V. U1=1V, U2=-1V, U3=3V, U4=-3V, U5=5V, U6=-5V, U7=7V, U8=-7V.

[0091] In one implementation, the voltage applied to an odd number of electrodes 30 in the same electrode unit 100 during the reset phase is equal to the voltage applied during the data writing phase, where N is odd, U1 = V1, U3 = V3, ..., U N =V N ;U2=-V1, U4=-V3,…,U N-1 =-V N-2 Or, U2 = -V3, U4 = -V5, ..., U N-1 =-V N .

[0092] For example, N=9, V1=1V, V2=2V, V3=3V, V4=4V, V5=5V, V6=6V, V7=7V, V8=8V, V9=9V. U1=1V, U2=-1V, U3=3V, U4=-3V, U5=5V, U6=-5V, U7=7V, U8=-7V, U9=0V.

[0093] In one embodiment, the voltage applied to an even number of electrodes 30 in the same electrode unit 100 during the reset phase is equal to the voltage applied during the data writing phase; conversely, the voltage applied to an odd number of electrodes 30 in the same electrode unit 100 during the reset phase is equal to the opposite value of the voltage applied to an even number of electrodes 30 in the same electrode group 300 during the data writing phase. N is an even number, U1 = -V2, U3 = -V4, ..., U N-1 =-V N ;U2=V2, U4=V4,...,U N =V N .

[0094] For example, N=8, V1=1V, V2=2V, V3=3V, V4=4V, V5=5V, V6=6V, V7=7V, V8=8V. U1=-2V, U2=2V, U3=-4V, U4=4V, U5=-6V, U6=6V, U7=-8V, U8=8V.

[0095] In one implementation, the voltage applied to an even number of electrodes 30 in the same electrode unit 100 during the reset phase is equal to the voltage applied during the data writing phase, where N is odd, U1 = -V2, U3 = -V4, ..., U N-2 =-V N-1 ;U2=V2, U4=V4,...,U N-1 =V N-1 .

[0096] For example, N=9, V1=1V, V2=2V, V3=3V, V4=4V, V5=5V, V6=6V, V7=7V, V8=8V, V9=9V. U1=-2V, U2=2V, U3=-4V, U4=4V, U5=-6V, U6=6V, U7=-8V, U8=8V, U9=0V.

[0097] Optionally, when N is even, U1 = V1 + ΔV, U3 = V3 + ΔV, ..., U N-1 =V N-1 +ΔV; U2=-V2, U4=-V4,…,U N =-V N Or, U1 = -V1, U3 = -V3, ..., U N-1 =-V N-1 ;U2=V2+ΔV, U4=V4+ΔV,…,U N =V N +ΔV. Where the absolute value of ΔV is less than V1, V2, V3, V4, ..., V... N-1 V N The absolute value of . When rewriting the reset voltage, adding ΔV to the original voltage requires less charge to the capacitor, thus reducing power consumption.

[0098] For example, N=8, ΔV=0.5V. V1=1V, V2=2V, V3=3V, V4=4V, V5=5V, V6=6V, V7=7V, V8=8V. U1=1.5V, U2=-2V, U3=3.5V, U4=-4V, U5=5.5V, U6=-6V, U7=7.5V, U8=-8V.

[0099] For example, N = 8, ΔV = -0.5V. U1 = -1V, U2 = 1.5V, U3 = -3V, U4 = 3.5V, U5 = -5V, U6 = 5.5V, U7 = -7V, U8 = 7.5V.

[0100] In one implementation, when N is odd, U1 = V1 + ΔV, U3 = V3 + ΔV, ..., U N =V N +ΔV; U2=-V2, U4=-V4,…,U N-1 =-V N-1 Or, U1 = -V1, U3 = -V3, ..., U N =-V N ;U2=V2+ΔV, U4=V4+ΔV,…,U N-1 =V N-1+ΔV. Where the absolute value of ΔV is less than V1, V2, V3, V4, ..., V... N-1 V N The absolute value of.

[0101] For example, N=9, ΔV=0.5V. V1=1V, V2=2V, V3=3V, V4=4V, V5=5V, V6=6V, V7=7V, V8=8V, V9=9V. U1=1.5V, U2=-2V, U3=3.5V, U4=-4V, U5=5.5V, U6=-6V, U7=7.5V, U8=-8V, U9=9.5V.

[0102] For example, N=9, ΔV=-0.5V. V1=1V, V2=2V, V3=3V, V4=4V, V5=5V, V6=6V, V7=7V, V8=8V, V9=9V. U1=-1V, U2=1.5V, U3=-3V, U4=3.5V, U5=-5V, U6=5.5V, U7=-7V, U8=7.5V, U9=-9V.

[0103] Figure 16 is a timing diagram of another liquid crystal grating provided in an embodiment of this application. Referring to Figures 2 and 16, the working periods of the liquid crystal grating include a first period T1, a second period T2, a third period T3, and a fourth period T4 arranged in a timing sequence. The first period T1 and the third period T3 include a data writing phase, and the second period T2 includes the reset phase in the above embodiment. In the reset phase, the voltage difference between two pairs of adjacent electrodes 30 is different. The maximum absolute value of the voltage applied to the N electrodes 30 in the first period T1 is less than the maximum absolute value of the voltage applied to the N electrodes 30 in the third period T3. In the fourth period T4, a third reset voltage is applied to the odd number of electrodes 30, and a fourth reset voltage is applied to the even number of electrodes 30. The absolute values ​​of the third reset voltage and the fourth reset voltage are equal, and the polarities of the third reset voltage and the fourth reset voltage are opposite. In this embodiment, the maximum absolute value of the voltage applied by the N electrodes 30 in the first time period T1 is less than the maximum absolute value of the voltage applied by the N electrodes 30 in the third time period T3. The maximum deflection angle of the liquid crystal molecules in the first time period T1 is less than the maximum deflection angle of the liquid crystal molecules in the third time period T3. For the data writing stage (first time period T1) where the maximum deflection angle of the liquid crystal molecules is smaller, the liquid crystal molecules can be reset using the reset stage described in the above embodiment after this data writing stage. For the data writing stage (third time period T3) where the maximum deflection angle of the liquid crystal molecules is larger, the liquid crystal molecules can be reset by applying positive and negative high voltages to the odd number of electrodes 30 and the even number of electrodes 30, respectively.

[0104] In other embodiments, the fourth time period T4 includes the reset phase described in the above embodiments. During the reset phase, the voltage difference between the two pairs of adjacent electrodes 30 is different.

[0105] Figure 17 is a schematic diagram of the circuit structure of a liquid crystal grating provided in an embodiment of this application. Referring to Figures 2 and 17, the liquid crystal grating further includes a multiplexer circuit 60 and a source line 70. The multiplexer circuit 60 includes an input terminal and N output terminals. The input terminal is electrically connected to the source line 70, and the N output terminals are electrically connected one-to-one with the N electrodes 30 in the same electrode unit 100. The multiplexer circuit 60 is configured to connect one of the N output terminals to the source line 70 for conduction, providing a data voltage to the electrode 30 during the data writing phase and a reset voltage to the electrode during the reset phase. In this embodiment, the multiplexer circuit 60 used for data voltage signal writing is reused for the reset circuit, eliminating the need to add a new circuit as the reset circuit, which helps to reduce the bezel of the liquid crystal grating. On the other hand, the multiplexer circuit 60 used for data voltage signal writing is reused for the reset circuit, thereby allowing for the setting of a separate reset voltage for each electrode 30, increasing the degree of freedom in applying the reset voltage to the electrode 30.

[0106] Referring, exemplarily to Figures 2, 3, and 17, a plurality of electrode units 100 include a first electrode unit 101 and a second electrode unit 102. A plurality of source lines 70 include a first source line 71 and a second source line 72. The first source line 71 is selectively connected to N electrodes 30 in the first electrode unit 101 via a multiplexer circuit 60. Under the control of a first selection signal Mux1, a second selection signal Mux2, a third selection signal Mux3, a fourth selection signal Mux4, a fifth selection signal Mux5, a sixth selection signal Mux6, a seventh selection signal Mux7, and an eighth selection signal Mux8, the first source line 71 is sequentially and time-divisionally connected to the N electrodes 30 in the first electrode unit 101. Similarly, the second source line 72 is selectively connected to the N electrodes 30 in the second electrode unit 102 via another multiplexer circuit 60. Under the control of the first strobe signal Mux1 to the eighth strobe signal Mux8, the second source line 72 is connected to the N electrodes in the second electrode unit 102 one by one in a 30-minute interval.

[0107] Figure 18 is a schematic diagram of another liquid crystal grating circuit structure provided in an embodiment of this application. Referring to Figures 11, 12, and 18, N is an odd number. The first source line 71 is electrically connected to the N electrodes 30 in the first electrode unit 101 through a multiplexing circuit 60. Under the control of the first selection signal Mux1 to the ninth selection signal Mux9, the first source line 71 is electrically connected to the N electrodes 30 in the first electrode unit 101 one by one in a time-division manner.

[0108] Figure 19 is a schematic diagram of another liquid crystal grating circuit structure provided in an embodiment of this application. Referring to Figure 19, N≥4, the liquid crystal grating further includes a first reset transistor M1, a second reset transistor M2, a third reset transistor M3, and a fourth reset transistor M4. The first reset transistor M1, the second reset transistor M2, the third reset transistor M3, and the fourth reset transistor M4 are electrically connected to different electrodes 30 in the same electrode unit 100. Therefore, compared to applying positive and negative high voltages to an odd number of electrodes 30 and an even number of electrodes 30 respectively, there are more reset transistors to individually control the reset voltage signal on the electrode 30, thus allowing for more reset voltage values ​​to be selected. During the data writing phase, a position corresponding to a smaller voltage is used, and during the reset phase, the liquid crystal molecules are not reset.

[0109] Optionally, referring to FIG19, the liquid crystal grating further includes a first reset source line 91 and a second reset source line 92. The first electrode of the first reset transistor M1 is electrically connected to the first electrode 30 in the electrode unit 100, and the second electrode of the first reset transistor M1 is electrically connected to the first reset source line 91. The first electrode of the second reset transistor M2 is electrically connected to the second electrode 30 in the electrode unit 100, and the second electrode of the second reset transistor M2 is electrically connected to the second reset source line 92. The first electrode of the third reset transistor M3 is electrically connected to the third electrode 30 in the electrode unit 100, and the second electrode of the third reset transistor M3 is electrically connected to the first reset source line 91. The first electrode of the fourth reset transistor M4 is electrically connected to the fourth electrode in the electrode unit, and the second electrode of the fourth reset transistor M4 is electrically connected to the second reset source line 92.

[0110] Referring, as exemplarily to FIG. 19, the liquid crystal grating further includes a first reset gate line 81, a second reset gate line 82, a third reset gate line 83, and a fourth reset gate line 84. The first reset gate line 81 is electrically connected to the gate of the first reset transistor M1. When the first reset gate line 81 controls the first reset transistor M1 to be turned on, the voltage (e.g., 0V) on the first reset source line 91 during the turn-on period is written to the first electrode 30 in the electrode unit 100. The second reset gate line 82 is electrically connected to the gate of the second reset transistor M2. When the second reset gate line 82 controls the second reset transistor M2 to be turned on, the voltage (e.g., 0V) on the second reset source line 92 during the turn-on period is written to the second electrode 30 in the electrode unit 100. The third reset gate line 83 is electrically connected to the gate of the third reset transistor M3. When the third reset gate line 83 controls the third reset transistor M3 to turn on, the voltage (e.g., -15V) on the first reset source line 91 during the turn-on period is written to the third electrode 30 in the electrode unit 100. The fourth reset gate line 84 is electrically connected to the gate of the fourth reset transistor M4. When the fourth reset gate line 84 controls the fourth reset transistor M4 to turn on, the voltage (e.g., 15V) on the second reset source line 92 during the turn-on period is written to the third electrode 30 in the electrode unit 100. Thus, reset voltage distributions such as 0V, 0V, -15V, and 15V can be achieved, for example.

[0111] The first reset gate line 81 and the third reset gate line 83 are turned on at different time periods, thereby writing the voltage on the first reset source line 91 at different time periods onto different electrodes 30. The second reset gate line 82 and the fourth reset gate line 84 are turned on at different time periods, thereby writing the voltage on the second reset source line 92 at different time periods onto different electrodes 30.

[0112] Figure 20 is a schematic diagram of another liquid crystal grating circuit structure provided in an embodiment of this application. The multiplexing circuit and source lines are omitted in Figure 20. Referring to Figure 20, the liquid crystal grating further includes a first reset source line 91, a second reset source line 92, a third reset source line 93, and a fourth reset source line 94. The first electrode of the first reset transistor M1 is electrically connected to the first electrode 30 in the electrode unit 100, and the second electrode of the first reset transistor M1 is electrically connected to the first reset source line 91. The first electrode of the second reset transistor M2 is electrically connected to the second electrode 30 in the electrode unit 100, and the second electrode of the second reset transistor M2 is electrically connected to the second reset source line 92. The first electrode of the third reset transistor M3 is electrically connected to the third electrode 30 in the electrode unit 100, and the second electrode of the third reset transistor M3 is electrically connected to the third reset source line 93. The first electrode of the fourth reset transistor M4 is electrically connected to the fourth electrode 30 in the electrode unit 100, and the second electrode of the fourth reset transistor M4 is electrically connected to the fourth reset source line 94.

[0113] Referring, as exemplarily to FIG. 20, the liquid crystal grating further includes a first reset gate line 81, a second reset gate line 82, a third reset gate line 83, and a fourth reset gate line 84. The first reset gate line 81 is electrically connected to the gate of the first reset transistor M1. The second reset gate line 82 is electrically connected to the gate of the second reset transistor M2. The third reset gate line 83 is electrically connected to the gate of the third reset transistor M3. The fourth reset gate line 84 is electrically connected to the gate of the fourth reset transistor M4. Embodiments of this application can achieve reset voltage distributions such as 0V, 3V, -15V, and 15V.

[0114] Figure 21 is a schematic diagram of another liquid crystal grating circuit structure provided in an embodiment of this application. The multiplexing circuit and source line are omitted in Figure 21. Referring to Figure 21, the liquid crystal grating further includes a fifth reset transistor M5, a sixth reset transistor M6, a fifth reset source line 95, and a sixth reset source line 96. The first electrode of the fifth reset transistor M5 is electrically connected to the fifth electrode 30 in the electrode unit 100, and the second electrode of the fifth reset transistor M5 is electrically connected to the fifth reset source line 95. The first electrode of the sixth reset transistor M6 is electrically connected to the sixth electrode 30 in the electrode unit 100, and the second electrode of the sixth reset transistor M6 is electrically connected to the sixth reset source line 96.

[0115] Exemplarily, the liquid crystal grating further includes a fifth reset gate line 85 and a sixth reset gate line 86. The fifth reset gate line 85 is electrically connected to the gate of the fifth reset transistor M5. The sixth reset gate line 86 is electrically connected to the gate of the sixth reset transistor M6. Embodiments of this application can achieve reset voltage distributions such as 0V, 0V, -3V, 3V, -15V, and 15V.

[0116] Figure 22 is a schematic diagram of another liquid crystal grating circuit structure provided in an embodiment of this application. Referring to Figure 22, the liquid crystal grating further includes multiple reset circuits, each including multiple reset transistors. The multiple reset transistors include a first reset transistor M1, a second reset transistor M2, a third reset transistor M3, and a fourth reset transistor M4. In one embodiment, the number of reset transistors in a reset circuit is a first number, and the number of electrodes 30 electrically connected to the reset transistors in an electrode unit 100 is a second number. The first number equals the second number. When the second number is less than N, a portion of the electrodes 30 in the electrode unit 100 are not electrically connected to the reset transistors, and during the reset phase, the liquid crystal molecules at the locations of these electrodes 30 are not reset. When the second number equals N, each reset transistor is electrically connected to one electrode 30 in an electrode unit 100, thereby allowing for a separate reset voltage to be set for each electrode 30.

[0117] For example, referring to FIG22, the electrode unit 100 includes eight electrodes 30. The first four electrodes 30 are not electrically connected to the reset transistor, and during the reset phase, the liquid crystal molecules at the positions of the first four electrodes 30 are not reset. The last four electrodes 30 are electrically connected to the reset transistor. Individual reset voltages can be written to the last four electrodes 30 through the first reset transistor M1, the second reset transistor M2, the third reset transistor M3, and the fourth reset transistor M4, respectively. It should be noted that the number of electrodes 30 in the electrode unit 100 in this embodiment can be set according to actual needs. The number of electrodes 30 in the electrode unit 100 that are not electrically connected to the reset transistor can also be set according to actual needs.

[0118] Figure 23 is a schematic diagram of another liquid crystal grating circuit structure provided in an embodiment of this application. The multiplexing circuit and source line are omitted in Figure 23. Referring to Figure 23, the liquid crystal grating also includes multiple reset circuits, each including multiple reset transistors. The multiple reset transistors include a first reset transistor M1, a second reset transistor M2, a third reset transistor M3, a fourth reset transistor M4, a fifth reset transistor M5, a sixth reset transistor M6, a seventh reset transistor M7, and an eighth reset transistor M8. The liquid crystal grating also includes a seventh reset gate line 87, an eighth reset gate line 88, a seventh reset source line 97, and an eighth reset source line 98. The first electrode of the seventh reset transistor M7 is electrically connected to the seventh electrode 30 in the electrode unit 100, and the second electrode of the seventh reset transistor M7 is electrically connected to the seventh reset source line 97. The first electrode of the eighth reset transistor M8 is electrically connected to the eighth electrode 30 in the electrode unit 100, and the second electrode of the eighth reset transistor M8 is electrically connected to the eighth reset source line 98. The seventh reset gate line 87 is electrically connected to the gate of the seventh reset transistor M7. The eighth reset gate line 88 is electrically connected to the gate of the eighth reset transistor M8. A reset circuit contains N reset transistors, and the number of reset transistors in a reset circuit is equal to the number of electrodes 30 in an electrode unit 100. Each reset transistor is electrically connected to one electrode 30 in an electrode unit 100, thereby allowing for the setting of a separate reset voltage for each electrode 30.

[0119] For example, referring to FIG23, a reset transistor is electrically connected to an electrode 30, and each electrode unit 100 corresponds to a reset circuit. Multiple electrode units 100 correspond to multiple reset circuits. Thus, electrodes 30 of the same ordinal number in two electrode units 100 are respectively connected to two different reset transistors, the gates of which are connected to the same reset gate line (the reset gate line includes the first reset gate line 81 to the eighth reset gate line 88), and the second electrodes of which are connected to the same reset source line (the reset source line includes the first reset source line 91 to the eighth reset source line 98). For example, the first electrode 30 in the first electrode unit 101 is electrically connected to a first reset transistor M1. The first electrode 30 in the second electrode unit 102 is electrically connected to another first reset transistor M1.

[0120] In other embodiments, a reset transistor is electrically connected to a plurality of electrodes 30, and a reset circuit is provided for each of the plurality of electrode units 100. Thus, electrodes 30 of the same ordinal number in two electrode units 100 are connected to the same reset transistor. For example, the first electrode 30 in the first electrode unit 101 and the first electrode 30 in the second electrode unit 102 are electrically connected to the same first reset transistor M1.

[0121] The value of the data voltage signal is usually less than the value of the reset voltage signal. Therefore, both a multiplexer circuit is provided to selectively write the data voltage signal to electrode 30, and a reset circuit is provided to selectively write the reset voltage signal to electrode 30. The value of the reset voltage signal can be set independently, for example, it can be set to be larger than the data voltage signal, thereby achieving a better reset effect.

[0122] Figure 24 is a schematic diagram of the structure of a stereoscopic display device provided in an embodiment of this application. Referring to Figure 24, the stereoscopic display device includes the liquid crystal grating in the above embodiment.

[0123] Referring, as exemplarily to FIG. 24, the stereoscopic display device includes a light source 210, two spatial light modulators 220, a field lens 230, and a grating assembly 240 arranged sequentially. The light source 210 is configured to emit coherent backlight beams of multiple colors in a time sequence. The backlight beams of multiple colors are emitted sequentially in a time sequence. The two spatial light modulators 220 are a phase spatial light modulator 221 and an amplitude spatial light modulator 222, respectively. The phase spatial light modulator 221 is configured to perform phase modulation on the backlight beam, and the amplitude spatial light modulator 222 is configured to perform amplitude modulation on the backlight beam. The field lens 230 allows more light modulated by the spatial light modulators 220 to be incident on the grating assembly 240, thereby forming left-eye and right-eye images, which helps to improve the light utilization efficiency of the stereoscopic display device.

[0124] The grating assembly 240 includes a plurality of liquid crystal grating elements. Figure 24 illustrates three liquid crystal grating elements; in other embodiments, the grating assembly 240 may also include other numbers of liquid crystal grating elements. At least one of the three liquid crystal grating elements may be a liquid crystal grating as described in the above embodiments.

Claims

A liquid crystal grating includes a plurality of electrode units, wherein the electrode units include N electrodes arranged sequentially at intervals along a first direction; The voltage relationship between the electrodes in the electrode unit includes at least one of the following: During the reset phase, the voltage difference between the two pairs of adjacent electrodes is different; or, The operating period of the liquid crystal grating includes a time-sequential data writing phase and a reset phase. Within the same electrode unit, during the data writing phase, a first data voltage is applied to the i-th electrode and a second data voltage is applied to the j-th electrode, where the absolute value of the first data voltage is less than the absolute value of the second data voltage. During the reset phase, a first reset voltage is applied to the i-th electrode and a second reset voltage is applied to the j-th electrode, where the absolute value of the first reset voltage is less than the absolute value of the second reset voltage. i and j are not equal, 1≤i≤N, 1≤j≤N, i and j are positive integers, and N is a positive integer greater than 1. According to claim 1, the liquid crystal grating, wherein, The electrode unit includes an Xth electrode group and a Yth electrode group arranged sequentially along the first direction; During the data writing phase, the absolute value of the voltage applied to the electrodes in the Xth electrode group is less than the absolute value of the voltage applied to the electrodes in the Yth electrode group. During the reset phase, the absolute value of the voltage difference between a pair of adjacent electrodes in the Xth electrode group is less than the absolute value of the voltage difference between a pair of adjacent electrodes in the Yth electrode group; X and Y are positive integers. According to claim 2, the liquid crystal grating, wherein, The electrode unit includes a first electrode group, a second electrode group, ..., an Mth electrode group arranged sequentially along the first direction; During the reset phase, the absolute value gradient of the voltage difference between the first electrode group and the Mth electrode group increases; Where 2M≤N, M is a positive integer; X and Y are less than M. According to claim 2, the liquid crystal grating, wherein, During the reset phase, the voltage difference of the Xth electrode group is 0V. According to claim 4, the liquid crystal grating, wherein, The electrode unit includes a first electrode group, ..., a Pth electrode group, ..., a Mth electrode group arranged sequentially along the first direction; During the reset phase, the absolute value of the voltage difference of the P-th electrode group is greater than the voltage difference of the first electrode group, and the absolute value of the voltage difference of the M-th electrode group is greater than the absolute value of the voltage difference of the P-th electrode group. Where 2M≤N, 2≤P<M, Y, P and M are positive integers; X=1, Y<M. According to claim 1, the liquid crystal grating, wherein, The electrode unit includes M electrode groups arranged sequentially along the first direction. During the reset phase, there are at least two adjacent electrode groups, and the voltage difference between adjacent electrodes in the adjacent electrode groups is 0V. According to claim 1, the liquid crystal grating, wherein, During the reset phase, The electrode unit includes M electrode groups arranged sequentially along the first direction. Each electrode group includes two adjacent electrodes, and voltages of opposite polarities are applied to the two electrodes in the same electrode group. Where 2M≤N, and M is a positive integer. According to claim 7, the liquid crystal grating, wherein, During the reset phase, In response to i < j, the absolute value gradient of the voltage applied to the electrodes in the M electrode groups increases; In response to i > j, the absolute value gradient of the voltage applied to the electrodes in the M electrode groups decreases. According to claim 7, the liquid crystal grating, wherein, During the reset phase, There exists at least one of the electrode groups that is a first type of electrode group, in which the absolute values ​​of the voltages applied to the two electrodes are equal. According to claim 7, the liquid crystal grating, wherein, During the reset phase, There exists at least one of the electrode groups that is a second type of electrode group, in which the absolute values ​​of the voltages applied to the two electrodes are not equal. According to claim 10, the liquid crystal grating, wherein, The working period of the liquid crystal grating includes a first period and a second period arranged in a time sequence, and both the first period and the second period include the reset phase; The polarity of the second type of electrode group during the first time period is opposite to that during the second time period; Wherein, the polarity of the second type of electrode group is the polarity of the sum of the voltages applied to the two electrodes in the second type of electrode group. According to claim 7, the liquid crystal grating, wherein, During the reset phase, The maximum absolute value of the voltage applied to two electrodes in the same electrode group is denoted as the electrode pair voltage, and the voltage gradient of the M electrode pairs increases or decreases. The two adjacent electrode groups include a first electrode group and a second electrode group. The electrode pair voltage of the first electrode group is less than the electrode pair voltage of the second electrode group, and the electrode pair voltage of the first electrode group is greater than the minimum absolute value of the electrode voltage in the second electrode group. According to claim 1, the liquid crystal grating, wherein, The electrode unit includes components along the first... M electrode groups are arranged sequentially in different directions, and at least one of the electrode groups has a voltage of 0V applied to two electrodes in the electrode group. Where 2M≤N, and M is a positive integer. According to claim 7, the liquid crystal grating, wherein, In response to i < j, N is an even number, representing the first to the second. The voltage applied to the electrode is 0V, which is the voltage of the first electrode. The absolute values ​​of the voltages applied to the Nth to Nth electrodes are equal; Alternatively, N is an odd number, representing the first to the... The voltage applied to the electrode is 0V, which is the voltage of the first electrode. The absolute values ​​of the voltages applied to the Nth to Nth electrodes are equal; In response to i > j, N is an even number, representing the first to the second. The absolute values ​​of the voltages applied to the electrodes are equal; for the first electrode... The voltage applied to the first to the Nth electrode is 0V; Alternatively, N is an odd number, representing the first to the... The absolute values ​​of the voltages applied to the electrodes are equal, and are equal to the absolute values ​​of the voltages applied to the electrodes. The voltage applied to the first to the Nth electrode is 0V. According to claim 1, the liquid crystal grating, wherein, The correspondence between the data voltage and reset voltage of the electrode includes at least one of the following: The first data voltage is equal to the first reset voltage; or, The second data voltage is equal to the second reset voltage. According to claim 15, the liquid crystal grating, wherein, The voltage applied to an odd or even number of electrodes in the same electrode unit during the reset phase is equal to the voltage applied during the data writing phase. According to claim 16, the liquid crystal grating, wherein, The voltage applied to the electrode in the data writing stage for the same electrode unit is recorded as V1, V2, V3, V4,..., V N-1 , in turn. N The voltage applied to the electrode in the reset stage for the electrode unit is recorded as U1, U2, U3, U4,..., U N-1 , in turn. N ​ (1) In response to the reset phase, an odd number of electrodes in the same electrode unit are applied The voltage is equal to the voltage applied during the data writing phase. N is even, U1=V1, U3=V3,..., U N-1 =V N-1 ; U2=-V2, U4=-V4,..., U N =-V N ; or, N is odd, U1=V1, U3=V3,..., U N =V N ; U2=-V2, U4=-V4,..., U N-1 =-V N-1 ; (2) In response to the reset phase, the voltage applied to an even number of electrodes in the same electrode unit is equal to the voltage applied to them during the data write phase. N is an even number, U1 = -V1, U3 = -V3, ..., U N-1 =-V N-1 ;U2=V2, U4=V4,...,U N =V N ; or, N is an odd number, U1 = -V1, U3 = -V3, ..., U N =-V N ;U2=V2, U4=V4,...,U N-1 =V N-1 . According to claim 16, the liquid crystal grating, wherein, The voltages applied to the electrodes in the same electrode unit during the data writing phase are sequentially denoted as: V1, V2, V3, V4, ..., V N-1 V N The voltages applied to the electrodes in the electrode unit during the reset phase are sequentially denoted as: U1, U2, U3, U4, ..., U... N-1 U N ; (1) In response to the reset phase, the voltage applied to an odd number of the electrodes in the same electrode unit is equal to the voltage applied to them during the data write phase. N is an even number, U1 = V1, U3 = V3, ..., U N-1 =V N-1 ;U2=-V1, U4=-V3,…,U N =-V N-1 ; or, N is an odd number, U1 = V1, U3 = V3, ..., U N =V N ;U2=-V1, U4=-V3,…,U N-1 =-V N-2 Or, U2 = -V3, U4 = -V5, ..., U N-1 =-V N ; (2) In response to the reset phase, the voltage applied to an even number of electrodes in the same electrode unit is equal to the voltage applied to them during the data write phase. N even, U1=-V2, U3=-V4,..., U N-1 = -V N ;U2=V2, U4=V4,...,U N =V N ; or, N odd, U1=-V2, U3=-V4,..., U N-2 = -V N-1 ;U2=V2, U4=V4,...,U N-1 =V N-1 . According to claim 1, the liquid crystal grating, wherein, The voltages applied to the electrodes in the same electrode unit during the data writing phase are sequentially denoted as: V1, V2, V3, V4, ..., V N-1 V N The voltages applied to the electrodes in the electrode unit during the reset phase are sequentially denoted as: U1, U2, U3, U4, ..., U... N-1 U N ; In response to N being an even number, U1=V1+ΔV,U3=V3+ΔV,……,U N-1 =V N-1 +ΔV;U2=-V2,U4=-V4,……,U N =-V N ; or, U1=-V1,U3=-V3,……,U N-1 =-V N-1 ;U2=V2+ΔV,U4=V4+ΔV,……,U N =V N +ΔV; In response to N being odd, U1=V1+ΔV,U3=V3+ΔV,……,U N =V N +ΔV;U2=-V2,U4=-V4,……,U N-1 =-V N-1 ; or, U1=-V1,U3=-V3,……,U N =-V N ;U2=V2+ΔV,U4=V4+ΔV,……,U N-1 =V N-1 +ΔV; Among them, the absolute value of ΔV is less than V1, V2, V3, V4, ..., V N-1 V N The absolute value of. According to claim 1, the liquid crystal grating, wherein, The working periods of the liquid crystal grating include a first period, a second period, a third period, and a fourth period arranged in sequence; the first period and the third period include the data writing phase, and the second period includes the reset phase; The maximum absolute value of the voltage applied to the N electrodes in the first time period is less than the maximum absolute value of the voltage applied to the N electrodes in the third time period; In the fourth time period, a third reset voltage is applied to an odd number of the electrodes and a fourth reset voltage is applied to an even number of the electrodes. The absolute values ​​of the third reset voltage and the fourth reset voltage are equal, and the polarities of the third reset voltage and the fourth reset voltage are opposite. The liquid crystal grating according to claim 1 further includes a multiplexing circuit and a source line; The multiplexing circuit includes an input terminal and N output terminals. The input terminal is electrically connected to the source line, and the N output terminals are electrically connected one-to-one to the N electrodes in the same electrode unit. The multiplexing circuit is configured to connect one of the N output terminals to the source line, provide a data voltage to the electrode during the data writing phase, and provide a reset voltage to the electrode during the reset phase. According to claim 1, the liquid crystal grating, wherein, N≥4, and the liquid crystal grating further includes a first reset transistor, a second reset transistor, a third reset transistor, and a fourth reset transistor; The first reset transistor, the second reset transistor, the third reset transistor, and the fourth reset transistor are electrically connected to different electrodes in the same electrode unit. The liquid crystal grating according to claim 22 further includes a first reset source line and a second reset source line; The first terminal of the first reset transistor is electrically connected to the first electrode in the electrode unit, and the second terminal of the first reset transistor is electrically connected to the first reset source line; The first terminal of the second reset transistor is electrically connected to the second electrode in the electrode unit, and the second terminal of the second reset transistor is electrically connected to the second reset source line; The first terminal of the third reset transistor is electrically connected to the third electrode in the electrode unit, and the second terminal of the third reset transistor is electrically connected to the first reset source line. The first electrode of the fourth reset transistor is electrically connected to the fourth electrode in the electrode unit, and the second electrode of the fourth reset transistor is electrically connected to the second reset source electrode line. The liquid crystal grating according to claim 22 further includes a first reset source line, a second reset source line, a third reset source line, and a fourth reset source line; The first terminal of the first reset transistor is electrically connected to the first electrode in the electrode unit, and the second terminal of the first reset transistor is electrically connected to the first reset source line; The first terminal of the second reset transistor is electrically connected to the second electrode in the electrode unit, and the second terminal of the second reset transistor is electrically connected to the second reset source line; The first terminal of the third reset transistor is electrically connected to the third electrode in the electrode unit, and the second terminal of the third reset transistor is electrically connected to the third reset source line; The first electrode of the fourth reset transistor is electrically connected to the fourth electrode in the electrode unit, and the second electrode of the fourth reset transistor is electrically connected to the fourth reset source line. The liquid crystal grating according to claim 24 further includes a fifth reset transistor, a sixth reset transistor, a fifth reset source line, and a sixth reset source line; The first electrode of the fifth reset transistor is electrically connected to the fifth electrode in the electrode unit, and the second electrode of the fifth reset transistor is electrically connected to the fifth reset source line; The first electrode of the sixth reset transistor is electrically connected to the sixth electrode in the electrode unit, and the second electrode of the sixth reset transistor is electrically connected to the sixth reset source line. A stereoscopic display device includes a light source, a spatial light modulator, a field lens, and a grating assembly arranged sequentially, wherein... The grating assembly includes at least one liquid crystal grating as described in any one of claims 1-25.

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