Measurement device and method for high power measurement of a semiconductor device
The use of a dielectric liquid with high dielectric strength and imaging techniques in the measurement device addresses the challenges of arc-over and ineffective fault localization in semiconductor devices, ensuring reliable and precise high power testing.
Patent Information
- Application Number
- PCT/EP2024/064793
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-05-29
- Publication Date
- 2025-12-04
AI Technical Summary
Conventional methods for high power measurement and fault localization of semiconductor devices face challenges such as arc-over conditions, difficulty in performing full blocking measurements, and ineffective fault localization, especially at high voltages, which can lead to chip damage and invalid analysis.
A measurement device and method utilizing a dielectric liquid with high dielectric strength to immerse the semiconductor device, preventing arc-over conditions, combined with imaging techniques for precise fault localization, including emission microscopy and infrared thermography, to perform reliable functional tests at high power levels.
Enables secure and precise functional testing of semiconductor devices at high power without damaging them, allowing for effective fault localization and prevention of arc-over conditions, even at high voltages, thereby maintaining the chip's electrical characteristics.
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Figure EP2024064793_04122025_PF_FP_ABST
Abstract
Description
[0001] P2024,0398 WO E / P230274WO01 May29,2024 -1 - DescriptionMeasurement device and method for high power measur ement of asemiconductordevice The presentdisclosure isrelated to a measurement device andmethod for high power measurement of a semiconducto r device.Semiconductor devices are used in power modules, fo r examplein automotive filed, and require a reliable and eff icientfunctioning and corresponding functionaltests.There is a need to provide a reliable and secure me asurementdevice and method forhigh powermeasurementofa semiconductordevice.Embodiments of the disclosure relate to a measureme nt deviceand method for high power measurement of a semicond uctordevice which enable reliable functionaltests.According to an embodiment, a measurement device fo r highpower measurement of a semiconductor device compris es thesemiconductor device and a frame or chamber enclosi ng thesemiconductor device with respect to one or more la teraldirections perpendicular to an upright direction. T hemeasurement device further comprises a power supply which iselectrically coupled to the semiconductor device fo rsupplying a given high voltage orcurrentto thesemiconductor device. The measurement device furthe rcomprises a detector for detecting an imaging signa l of thesemiconductor device. Moreover, the measurement dev icecomprises a dielectric liquid which comprises a pre determineddielectric strength and which is arranged inside th e frame or P2024,0398 WO E / P230274WO01 May29,2024 -2 -chamber covering the semiconductor device such that thesemiconductordevice isimmersed in the dielectric liquid.By use of the described measurement device an isola tionmethod for high power measurements and fault locali zation ofa power electronic chip can be performed. As the po werelectronicchip orsemiconductordevice iscovered bythedielectric liquid, there is no interface between th esemiconductor device and ambient air or gas which c ontributesto prevent or mitigate arc-over conditions. Accordi ngly, asecure and precise functional test can be performed even athigh power current and / or voltage with a significan tlyreduced riskofdamaging the semiconductordevice.According to an embodiment of the measurement devic e, thedetector is configured to detect emission radiation forperforming emission microscopy of the semiconductor deviceand / orconfigured to detectinfrared radiation for performing infrared thermographyofthe semiconductordevice.According to a further embodiment of the measuremen t device,the frame is part of a chamber enclosing the semico nductordevice and the dielectric liquid, and the chamber i s filledwith airornitrogen.According to a further embodiment of the measuremen t device,the dielectric liquid comprises silicone oil and / orperfluoropolyether . Alternatively or additionally, thedielectric liquid comprises perfluoro(2-methyl-3-pe ntanone)and / or 1-Propene, 1,1,2,3,3,3-hexafluoro-, oxidized, polym d.or 1-Propene, 1,2,2,3,3,3-hexafluoro-,oxidized,poly md.Preferably, the dielectric liquid is a Perfluoropol yether- P2024,0398 WO E / P230274WO01 May29,2024 -3 -liquid (PFPE-liquid) such as Galden® HT200 from Sol vay or aFlourinert.According to a further embodiment of the measuremen t device,the dielectric liquid comprises a given high dielec tricstrength equal to or greater than 0.1 MV / cm. Prefer ably, thedielectric liquid comprises a given high dielectric strengthin a range from 1.0-2.0 MV / cm.According to a further embodiment of the measuremen t device,the dielectric liquid covers the semiconductor devi ce with aheightof15 µm ormore.Such a heightrefersto a verticalor upright direction and a distance between an elec tricallyrelevant uppermost portion of the semiconductor dev ice andthe upper limit of the dielectric liquid. It is a f inding ofthe present disclosure that such a distance of 15 µ m or morebetween the semiconductor device and the ambient ai r or gasinterface can securely contribute to prevent or mit igate arc-overconditions.According to a further embodiment of the measuremen t device,the powersupplyisconfigured to supplya voltage up to 10kV to the semiconductor device. The described confi gurationsof the measurement device allows for a high voltagemeasurement of a semiconductor device, e.g. without a loss ofblocking capability after the reliability testing f or a 1.2kVchip ordevice,such asan insulated-gate bipolartransistor(IGBT), a metal-oxide-semiconductor field-effect tr ansistor(MOSFET) ora diode.According to an embodiment, a method for high volta gemeasurement of a semiconductor device comprises pro viding andpositioning a semiconductor device inside a frame o r chamber, P2024,0398 WO E / P230274WO01 May29,2024 -4 - and electricallycoupling the semiconductordevice to a powersupply. The method further comprises inserting a di electricliquid inside the frame or the chamber such that th esemiconductordevice isimmersed in and covered by the dielectricliquid.The dielectricliquid comprises apredetermined dielectric strength, e.g. equal to or greaterthan 0.1 MV / cm or in a range from 1.0-2.0 MV / cm. Th e methodfurthercomprisesapplying a predetermined voltage orcurrentto the semiconductor device by means of the power s upply, anddetecting an imaging signal of the supplied semicon ductordevice bymeansofa detector.The described measurement method can be performed b y means ofan embodimentofthe described measurementdevice, inparticular. As a result of that, described features andcharacteristicsofthe measurementdevice are also disclosed with respectto the method and vice versa.According to an embodiment of the method, the detec tor isconfigured to detect radiation for emission microsc opy of thesemiconductor device so that detecting an imaging s ignal ofthe supplied semiconductor device comprises detecti ng anemission signal of the supplied semiconductor devic e by meansof the detector and performing emission microscopy.Alternatively or additionally, the detector is conf igured todetect infrared radiation for infrared thermography of thesemiconductor device so that detecting an imaging s ignal ofthe supplied semiconductor device comprises detecti ng aninfrared signal of the supplied semiconductor devic e by meansof the detector and performing infrared thermograph y. P2024,0398 WO E / P230274WO01 May29,2024 -5 -According to an embodiment, the method comprises an alyzingthe detected imaging signaland localizing an area ofinterest of the semiconductor device based on the d etectedimaging signal. Analyzing the detected imaging sign al cancomprise detecting a first imaging signal of the un suppliedsemiconductor device by means of the detector, dete cting asecond imaging signal of the supplied semiconductor device bymeans ofthe detector,and comparing the firstand second imaging signalswith each other.The firstimaging signalcanprovide a reference image to be compared to the ope ration orhigh power state detected by the second imaging sig nal.Alternatively or additionally, analyzing the detect ed imagingsignal can comprise providing historical data of th esemiconductor device, and squaring the detected ima gingsignal with the historical data. Such historical da ta can bestored on a hard disc or another readable medium or in anexternalbackend,forexample.The historicaldata mayinclude an image or data values, e.g. a temperature , for anormal operating state. In comparison with the dete ctedimaging signal, differences or deviations can be de terminedallowing for failure localization or a candidacy fo r anpossiblyupcoming errorposition,forexample. According to an embodimentofthe method,the area of interestisa heated area representing a candidate forafailure location in the semiconductor device, and a nalyzingthe detected imaging signal comprises determining atemperature of the heated area, and determining whe ther thedetermined temperature of the heated area is larger than agiven temperature threshold. P2024,0398 WO E / P230274WO01 May29,2024 -6 -For example, monitored or measured areas of interes t of thesemiconductor device they function within a specifi ctemperature range with permissible tolerances. If a deviationor exceeding of this temperature tolerance range is detected,even if only in a temperature range of a tens or hu ndreds ofmK, this may indicate a local error. Accordingly, t hedetector is configured to provide the needed accura cy.For example, the temperature threshold can be set t o adeviation of 50mK or 0.05K from a normal or specifi edauthorised operating temperature of the semiconduct or deviceor a given location thereof. Such a temperature dif ferencecan indicate a reliable value to determine a differ ence witha background when there is a failure. It is a findi ng, thatthe settemperature threshold ordeviation depends on a failure type and an employed tool,forexample and hence can vary. According to an embodimentofthe method,applying apredetermined voltage to the semiconductor device b y means ofthe powersupplycomprisesapplying voltage to thesemiconductor device stepwise up to 10 kV. Alternat ively, thevoltage or current can be raised stepless. Alternat ively oradditionally, the imaging signals can be detected a t times orcontinuously, e.g. allowing for generation of one o r moreimages or a video of the monitored semiconductor po wer deviceduring the performance ofthe functionaltest. Itisa recognition in connection with the present disclosure thatconventionalconceptsforreliabilitytesting forpower semiconductordevicesare based on generating chip failureswhich need to be measured and analysed to geographi callylocate the failure itself.Itmightoccurthatthe failure P2024,0398 WO E / P230274WO01 May29,2024 -7 -mode is a lack of blocking capability only at a hig h voltage,for example above 60-70% of rated chip voltage. The re is arisk that after such a reliability test, the measur ed device,e.g. a diode, has lost its blocking capability form a certainvoltage value which can be recognized by the blocki ng curve.Itisa furtherrecognition in connection with the presentdisclosure that conventional concepts for fault loc alizationare based on thermography performed at reasonably l owvoltage, e.g. 200V. Such a relative low voltage can still beenough to spot a hard damage, for example a short b etween twodevice terminals.However,itmightnotbe enough, ifa lossof blocking capability is present only at higher vo ltages asaforementioned.In particular, with respect to measurements at a hi gh voltagethere is a risk for generation of a flash-over or a rc betweena chip and ambientair.Additionally,when a powerelectronics chip is encapsulated in an epoxy mold c ompound,it is quite difficult to selectively remove epoxy m oldcompound and the capping polyimide. Such an operati on usuallyleaves the inner passivation layers uncovered; thus , it isnot possible to perform a full blocking measurement of thechip, neither hot spot analysis at high voltage bec auseflash-over occurs. Accordingly, this can lead to an invalidanalysis or measurement, or in a worst case, it cou ld furtherdamage the chip with an extrinsicfailure.By use of the described embodiments of the measurem ent deviceand the corresponding measurement method, it is pos sible toovercome the aforementioned adverse effectsdue to the setupwith a high dielectric strength liquid which contri butes toprevent or mitigate arc-over conditions. A reasonab le low P2024,0398 WO E / P230274WO01 May29,2024 -8 -quantity of a high dielectric strength liquid is di spensedover a power electronic chip or semiconductor devic e. Thedielectricliquid actsasa pure interface between the chipand the ambient air, or nitrogen if a nitrogen cham ber isused to mitigate even further a flash-over. The set up doesnotetch anychip layerleaving the electricalcharacteristics of the chip itself unchanged. In th is way, itis possible to apply a necessary energy or power, t hroughhigh current or voltage, to spot a chip location wh ich maydissipate more heat than normally expected. The des cribedmeasurement device and method each allow for a bene ficialfault localization technique which can be used with any ofhigh voltage chips, e.g. Silicon or Silicon Carbide , whichsufferofsimilarfailures.Exemplary embodiments are explained in the followin g with theaid of schematic drawings and reference numbers. Th e figuresshow:Figure 1 an embodiment of a measurement device for highpowermeasurementofa semiconductordevice;Figures 2-3 examples of measurement results of a hi ghpowermeasurementofa semiconductordevice;Figure 4 exemplary blocking curve of a diode befor e andaftera reliabilitytest;and Figure 5 a flow chartfora method forhigh power measurementofa semiconductordevice. The accompanying figuresare included to provide a furtherunderstanding. It is to be understood that the embo diments P2024,0398 WO E / P230274WO01 May29,2024 -9 -shown in the figures are illustrative representatio ns and arenot necessarily drawn to scale. Identical reference numbersdesignate elements or components with identical fun ctions.For the sake of clarity elements might not appear w ithcorresponding reference symbols in all figures poss ibly.Figure 1 illustratesa in a schematicside view an embodimentof a measurement device 1 for performing a high pow ermeasurement of a semiconductor device 10, e.g. a di ode, aMOSFET orIGBT.The measurementdevice 1 comprises a chamber2 enclosing the semiconductor device 10 with respec t tolateral directions B perpendicular to an upright di rection A.A power supply 4 is electrically coupled to the sem iconductordevice 10 for supplying a given high voltage to thesemiconductor device 10. A detector 5 is configured to detectan imaging signal of the semiconductor device 10. T hemeasurement device 1 further comprises a dielectric liquid 3which has a predetermined dielectric strength and w hich isarranged inside the chamber 2 covering the semicond uctordevice 10 such thatthe semiconductordevice 10 is immersed in the dielectricliquid 3.The detector 5 can be configured to detect emission radiationfor performing emission microscopy of the semicondu ctordevice 10 and / or to detect infrared radiation for p erforminginfrared thermography of the semiconductor device 1 0. Thepower supply 4 can be configured to supply a voltag e up to 10kV to the semiconductordevice 10.The chamber 2 enclosing the semiconductor device 10 and thedielectric liquid 3 can be filled with air or nitro gen. Thedielectricliquid 3 can be perfluoropolyether-liquid with a given high dielectricstrength equalto orgreater than 0.1 P2024,0398 WO E / P230274WO01 May29,2024 -10 -MV / cm or having a value in a range from 1.0-2.0 MV / cm. Thedielectric liquid preferably covers the semiconduct or device10 with a heighth of15 µm ormore. Itisa recognition in connection with the present disclosure thatconventionalconceptsforreliabilitytesting forpower semiconductordevicesare based on generating chip failureswhich need to be measured and analysed to geographi callylocate the failure itself.Itmightoccurthatthe failuremode is a lack of blocking capability only at a hig h voltage,for example above 60-70% of rated chip voltage. The re is arisk that after such a reliability test, the measur ed device,e.g. a diode, has lost its blocking capability form a certainvoltage value which can be recognized by the blocki ng curve(see Fig. 4). The solid line represents the blockin g curve ofa diode before performing a reliability test, and t he dashedline represents the blocking curve of a diode afterperforming a reliabilitytestindication a lackof blockingcapability that can be prevented or counteracted by thedescribed measurement device 1 and / or the describedmeasurementmethod.Steps of a corresponding measurement method can fol low theflow chart as shown in figure 5. Examples of measur ementimages of a high voltage measurement of a semicondu ctordevice 10 are schematically illustrated in the Figs . 2 and 3.In a step S1, the semiconductor device 10 is positi oned inthe chamber 2 and electrically coupled to the power supply 4.In a step S2, the dielectric liquid 3 is inserted i n thechamber2 such thatthe semiconductordevice 10 is immersed in and covered bythe dielectricliquid 3. P2024,0398 WO E / P230274WO01 May29,2024 -11 -In a step S3, a predetermined voltage or voltage cu rve isapplied to the semiconductordevice 10 bymeansof the power supply4.In a step S4, one or more imaging signals of the su ppliedsemiconductor device 10 are detected by means of th e detector5.Preferably, in a step S5 the detected imaging signa l isanalyzed and an area of interest 11, 12 of the semi conductordevice 10 is localized based on the detected imagin g signal.Step S5 of analyzing the detected imaging signal ca n comprisedetecting a firstimaging signalofthe unsupplied semiconductordevice 10 bymeansofthe detector5 asillustrated in Fig. 2. Moreover, a second imaging s ignal ofthe supplied semiconductor device 10 is detected by means ofthe detector 5 as illustrated in Fig. 3. Thus, anal yzingincludes comparing the first and second imaging sig nals witheach other to locate the area of interest 11, 12 wh ich inparticular represent heated areas in which the heat H may begreaterthan expected.The shown image in Fig. 2 for example relates to an imagingsignal detected for a non-supplied semiconductor de vice 10,viz. at 0 V voltage supply. The measured semiconduc tor device10 is highlighted by a dotted rectangular roughly i n thecenter. A scale for the heat H is also shown, where by thedenser the hatching, the lower the heat H, or in ot her word,the less the hatching, the higher the heat H. The s hown imagein Fig.3 forexample relatesto an imaging signal detectedfor a supplied semiconductor device 10 at 1400 V vo ltage P2024,0398 WO E / P230274WO01 May29,2024 -12 -supply. In this case, the heated areas 11, 12 occur at thechip termination,i.e.a chip edge.The embodiments shown in or described by the figure s 1 to 3and 5 asstated representexemplaryembodimentsof theimproved measurement device 1 and the measurement m ethod for;therefore, they do not constitute a complete list o f allembodiments. Actual arrangements and methods may va ry fromthe embodiments shown in terms of baseplates, for e xample.
[0002] P2024,0398 WO E / P230274WO01 May29,2024 -13 - Reference signs 1 measurementdevice 2 frame / chamber 3 dielectricliquid 4 powersupply 5 infrared detector 10 semiconductordevice 11 firstarea ofinterest / heated area 12 second area ofinterest / heated area A verticaldirection / uprightdirection B horizontaldirection / lateraldirection h height H heatS(i) steps of a method for high power measurement o f asemiconductordevice
Claims
P2024,0398 WO E / P230274WO01 May29,2024 -14 - Claims1. Measurement device (1) for high power measuremen t of asemiconductordevice (10),comprising: -the semiconductordevice (10), -a frame (2) enclosing the semiconductor device ( 10)with respect to a lateral direction (B) perpendicul ar to anuprightdirection (A), -a power supply (4) which is electrically coupled tothe semiconductor device (10) for supplying a given highvoltage or current to the semiconductor device (10) ,- a detector (5) for detecting an imaging signal o f thesemiconductordevice (10),and -a dielectricliquid (3)which comprisesapredetermined dielectric strength and which is arra ngedinside the frame (2) covering the semiconductor dev ice (10)such that the semiconductor device (10) is immersed in thedielectricliquid (3).
2. Measurement device (1) according to claim 1, whe rein thedetector (5) is configured to detect emission radia tion forperforming emission microscopy of the semiconductor device(10) and / or configured to detect infrared radiation forperforming infrared thermography of the semiconduct or device(10).
3. Measurement device (1) according to any of the p recedingclaims,wherein the frame (2)ispartofa chamber enclosingthe semiconductor device (10) and the dielectric li quid (3),and wherein the chamber is filled with air or nitro gen.P2024,0398 WO E / P230274WO01 May29,2024 -15 -4. Measurement device (1) according to any of the p recedingclaims, wherein the dielectric liquid (3) comprises siliconeoil and / or perfluoropolyether .
5. Measurement device (1) according to any of the p recedingclaims, wherein the dielectric liquid (3) comprisesperfluoro(2-methyl-3-pentanone)and / or 1-Propene,1,1,2,3,3,3-hexafluoro-, oxidized, polymd .
6. Measurement device (1) according to any of the p recedingclaims, wherein the dielectric liquid (3) comprises a givenhigh dielectric strength equal to or greater than 0 .1 MV / cm.
7. Measurement device (1) according to any of the p recedingclaims, wherein the dielectric liquid (3) comprises a givenhigh dielectric strength in a range from 1.0-2.0 MV / cm.
8. Measurement device (1) according to any of the p recedingclaims, wherein the dielectric liquid (3) covers th esemiconductor device (10) with a height (h) of 15 µ m or more.
9. Measurement device (1) according to any of the p recedingclaims,wherein the powersupply(4)isconfigured to supplya voltage up to 10 kV to the semiconductor device ( 10).
10. Method for high voltage measurement of a semico nductordevice (10),comprising: -positioning a semiconductor device (10) inside a frame(2)ora chamber, -electrically coupling the semiconductor device ( 10) toa powersupply(4), -inserting a dielectric liquid (3) inside the fra me (2)or the chamber such that the semiconductor device ( 10) isP2024,0398 WO E / P230274WO01 May29,2024 -16 -immersed in and covered by the dielectric liquid (3 ), whereinthe dielectric liquid (3) comprises a predetermineddielectricstrength, -applying a predetermined voltage or current to th esemiconductor device (10) by means of the power sup ply (4),and -detecting an imaging signalofthe suppliedsemiconductor device (10) by means of a detector (5 ).
11. Method according to claim 10, wherein the detec tor (5)is configured to detect radiation for emission micr oscopy ofthe semiconductor device (10) and wherein detecting animaging signal of the supplied semiconductor device (10)comprises: detecting an emission signalofthe supplied semiconductordevice (10)bymeansofthe detector (5)and performing emission microscopy.
12. Method according to claim 10 or 11, wherein the detector(5)isconfigured to detectinfrared radiation for infraredthermography of the semiconductor device (10) and w hereindetecting an imaging signal of the supplied semicon ductordevice (10)comprises: detecting an infrared signalofthe supplied semiconductordevice (10)bymeansofthe detector (5)and performing infrared thermography.
13. Method according to any of the claims 10 to 12,comprising: analyzing the detected imaging signal and localizin g anarea of interest (11, 12) of the semiconductor devi ce (10)based on the detected imaging signal.P2024,0398 WO E / P230274WO01 May29,2024 -17 -14. Method according to claim 13, wherein analyzing thedetected imaging signalcomprises: -detecting a first imaging signal of the unsuppli edsemiconductordevice (10)bymeansofthe detector (5), -detecting a second imaging signal of the supplie dsemiconductordevice (10)bymeansofthe detector (5),and -comparing the first and second imaging signals w itheach other.
15. Method according to claim 13 or 14, wherein ana lyzingthe detected imaging signalcomprises: -providing historical data of the semiconductor d evice(10),and -squaring the detected imaging signalwith the historicaldata.
16. Method according to any of the claims 13 to 15, whereinthe area of interest (11, 12) is a heated area repr esenting acandidate for a failure location in the semiconduct or device(10), and wherein analyzing the detected imaging si gnalcomprises: -determining a temperature of the heated area, an d- determining whether the determined temperature o f theheated area is larger than a given temperature thre shold.
17. Method according to any of the claims 10 to 16, whereinapplying a predetermined voltage to the semiconduct or device(10)bymeansofthe powersupply(4)comprises: applying voltage to the semiconductordevice (10) stepwise up to 10 kV.
Citation Information
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