Silicon carbide semiconductor structure and manufacturing method therefor, and manufacturing method for semiconductor working device using silicon carbide semiconductor structure

Abstract

A silicon carbide semiconductor structure. A III-V base layer and a support substrate can be used as a basic growth interface for a silicon carbide epitaxial layer or a doped silicon carbide epitaxial layer growing into a perfect single crystal. The support substrate may be, for example, a sapphire substrate, an aluminum nitride substrate, or a silicon carbide substrate. If the support substrate is an aluminum nitride substrate, the silicon carbide epitaxial layer or the doped silicon carbide epitaxial layer may directly grow. The III-V base layer is made of one of an aluminum nitride (AlN) material, a gallium nitride (GaN) material, and an AlN / GaN mixed material. The silicon carbide epitaxial layer or the doped silicon carbide epitaxial layer is formed on the III-V base layer by means of an epitaxial process. The III-V base layer is formed on the support substrate. After a semi-finished semiconductor working device is formed using the silicon carbide semiconductor structure, the support substrate and the III-V base layer can be stripped by means of various scientific processes.

Description

This invention relates to a silicon carbide semiconductor structure, its manufacturing method, and a method for manufacturing semiconductor devices using the same. Specifically, it describes a silicon carbide semiconductor structure, its manufacturing method, and a method for manufacturing semiconductor devices using the same, particularly using a support substrate (e.g., a sapphire substrate, an aluminum nitride substrate, or a silicon carbide substrate) and an IILV group base layer (Note: If the support substrate is an aluminum nitride substrate, a silicon carbide epitaxial layer or a silicon carbide epitaxial doped layer can be directly grown, and a III-V group base layer may be optional) to epitaxially grow a silicon carbide epitaxial layer or a silicon carbide epitaxial doped layer. Background Technology: Compared to silicon semiconductor devices, silicon carbide (SiC) semiconductor devices possess 10 times the breakdown electric field, 3 times the bandgap width, 50 times the power density, and 3 times the thermal conductivity. This makes them more suitable as materials for high-power components such as power electronic charging devices, and their applications span electric vehicles, rail transportation, wind power generation, and even high-performance applications like high-speed communication, high-efficiency power management, and artificial intelligence processing. SiC semiconductor devices are suitable for high-voltage, high-current applications, further improving the efficiency of electric vehicles and renewable energy systems. SiC exhibits excellent high-temperature stability, making it suitable for applications in high-temperature environments, such as automotive engine control, aerospace, and high-temperature power conversion. These advantages have led to widespread attention and strong market demand for SiC semiconductor devices across various application fields, driving continuous innovation and progress in the semiconductor industry. Currently, silicon carbide semiconductor structures are formed using homoepitaxial growth to create 4H-SiC epitaxial layers, 4H-SiC epitaxial doped layers, 6H-SiC epitaxial layers, 6H-SiC epitaxial doped layers, 3C-SiC epitaxial layers, or 3C-SiC epitaxial doped layers on doped silicon carbide substrates. However, existing research has revealed that device size is highly sensitive to the yield of silicon carbide semiconductor devices. This is primarily because epitaxial layer defects can lead to device failure, and most epitaxial layer defects originate from defects in the doped silicon carbide substrate. Low-defect doped silicon carbide substrates are typically expensive; therefore, six-inch doped silicon carbide substrates are commonly used for homoepitaxial growth. For example, mainstream silicon carbide MOSFETs are formed by homoepitaxial growth of a 4H-SiC epitaxial layer on a 4H-SiC N+ substrate. Furthermore, other studies in the prior art have found that 2H-silicon carbide (2H-SiC) has superior electrical properties compared to 4H-silicon carbide and 6H-silicon carbide.Therefore, there is still a demand in the industry for low-defect 2H-silicon carbide epitaxial layers or 2H-silicon carbide epitaxial doped layers that can be epitaxially produced at a lower cost. Summary of the Invention: In accordance with any of the above objectives, the present invention provides a silicon carbide semiconductor structure comprising a branch. The process involves a substrate, a III-V substrate, and a silicon carbide epitaxial layer or a silicon carbide epitaxial doped layer. The III-V substrate and the support substrate serve as the basic growth interface for the growth of the silicon carbide epitaxial layer or the silicon carbide epitaxial doped layer into a perfect single crystal. The support substrate can be, for example, a sapphire substrate, an aluminum nitride substrate, or a silicon carbide substrate. If the support substrate is an aluminum nitride substrate, the silicon carbide epitaxial layer or the silicon carbide epitaxial doped layer can be grown directly. The III-V substrate is composed of aluminum nitride (AlN), shale nitride (GaN), or a hybrid of AlN / GaN. The silicon carbide epitaxial layer or the silicon carbide epitaxial doped layer is formed on the III-V substrate through an epitaxial process. The III-V group substrate is formed on the sapphire substrate, and after the semiconductor working device semi-finished product is formed using a silicon carbide semiconductor structure, the sapphire substrate and the III-V group substrate can be peeled off through various scientific processes, such as, but not limited to, laser lift-off process, chemical lift-off process (e.g., etching process) or other lift-off process. According to the aforementioned silicon carbide semiconductor structure, the silicon carbide epitaxial layer is a poly-type silicon carbide epitaxial layer, which includes, but is not limited to, one of a 6H-silicon carbide (6H-SiC) epitaxial layer, a 4H-silicon carbide (4H-SiC) epitaxial layer, a 3C-silicon carbide (3C-SiC) epitaxial layer, and a 2H-silicon carbide (2H-SiC) epitaxial layer, and the silicon carbide epitaxial doped layer is a poly-type silicon carbide epitaxial doped layer, which includes, but is not limited to, one of a 6H-silicon carbide (6H-SiC) epitaxial doped layer, a 4H-silicon carbide (4H-SiC) epitaxial doped layer, a 3C-silicon carbide (3C-SiC) epitaxial doped layer, and a 2H-silicon carbide (2H-SiC) epitaxial doped layer. According to the aforementioned silicon carbide semiconductor structure, the supporting substrate is a C-plane sapphire substrate with an off-axis angle of, for example but not limited to, 0.5 to 10 degrees. The silicon carbide semiconductor structure further includes a transition metal chalcogenide layer, wherein the transition metal chalcogenide layer is formed between the sapphire substrate and the silicon carbide epitaxial layer or silicon carbide epitaxial doped layer. The silicon carbide semiconductor structure further includes another III-V substrate and another silicon carbide epitaxial layer or another silicon carbide epitaxial doped layer. The other III-V substrate is composed of one of aluminum nitride, shale nitride, or a mixture of aluminum nitride and shale nitride, and is located on the silicon carbide epitaxial layer or silicon carbide epitaxial doped layer. The other silicon carbide epitaxial layer or the other silicon carbide epitaxial doped layer is formed on the other III-V substrate through an epitaxial process.According to the aforementioned silicon carbide semiconductor structure, the silicon carbide semiconductor structure further includes at least one other silicon carbide epitaxial doped layer, wherein the at least one other silicon carbide epitaxial doped layer is formed on the silicon carbide epitaxial layer or the silicon carbide epitaxial doped layer, wherein the doping type of the other silicon carbide epitaxial doped layer is the same as or different from the doping type of the silicon carbide epitaxial doped layer, and the doping concentration of the other silicon carbide epitaxial doped layer is the same as or different from the doping concentration of the silicon carbide epitaxial doped layer. According to the aforementioned silicon carbide semiconductor structure, the semiconductor working device semi-finished product includes at least one of the following: MOSFET device semi-finished product, Schottky diode device semi-finished product, sietzium nitride power device semi-finished product, superjunction MOSFET (SJ MOSFET) device semi-finished product, insulated gate bipolar transistor (IGBT) device semi-finished product, and thyristor device semi-finished product. According to any of the above objectives, the present invention provides a method for manufacturing a silicon carbide semiconductor structure, the method comprising the following steps: forming a III-V group substrate on a support substrate, wherein the III-V group substrate is composed of one of aluminum nitride, shale nitride, and a mixture of aluminum nitride and shale nitride; and forming a silicon carbide epitaxial layer or a silicon carbide epitaxial doped layer on the IILV group substrate through an epitaxial process; wherein after forming a semiconductor working device semi-finished product using the silicon carbide semiconductor structure, various scientific processes are employed, such as, but not limited to, laser lift-off and chemical lift-off processes. (For example, etching processes) or other lift-off processes, the support substrate and IILV group base layer can be peeled off. According to the above-described manufacturing method for manufacturing a silicon carbide semiconductor structure, the support substrate is a C-plane sapphire substrate with an off-axis angle of 0.5 to 10 degrees. According to the above-described manufacturing method for manufacturing a silicon carbide semiconductor structure, the manufacturing method further includes the step of: forming a transition metal chalcogenide layer between the support substrate and the silicon carbide epitaxial layer or silicon carbide epitaxial doped layer. According to the above-described manufacturing method for silicon carbide semiconductor structures, the manufacturing method further includes the following steps: forming another IILV group substrate on a silicon carbide epitaxial layer or a silicon carbide epitaxial doped layer, wherein the other IILV group substrate is composed of aluminum nitride, shale nitride, or a mixture of aluminum nitride and shale nitride; and forming another silicon carbide epitaxial layer or another silicon carbide epitaxial doped layer on another III-V group substrate through an epitaxial process. According to the above-described manufacturing method for silicon carbide semiconductor structures, the manufacturing method further includes the following steps: forming at least one other silicon carbide epitaxial doped layer on a silicon carbide epitaxial layer or a silicon carbide epitaxial doped layer, wherein the doping type of the other silicon carbide epitaxial doped layer is the same as or different from the doping type of the silicon carbide epitaxial doped layer, and the doping concentration of the other silicon carbide epitaxial doped layer is the same as or different from the doping concentration of the silicon carbide epitaxial doped layer. According to the above-described manufacturing method for silicon carbide semiconductor structures, the semiconductor working device semi-finished product includes a MOSFET. The present invention provides at least one of a semiconductor working device semi-finished product, a Schottky diode device semi-finished product, a shale nitride power device semi-finished product, a superjunction MOSFET device semi-finished product, an insulated gate bipolar transistor device semi-finished product, and a thyristor device semi-finished product. According to any of the above objectives, the present invention provides a manufacturing method for manufacturing a semiconductor working device, the manufacturing method comprising the following steps: forming a semiconductor working device semi-finished product on a silicon carbide epitaxial layer or a silicon carbide epitaxial doped layer of the aforementioned silicon carbide semiconductor structure; peeling off a support substrate and a III-V base layer through various scientific processes, such as, but not limited to, laser lift-off processes, chemical lift-off processes (e.g., etching processes), or other lift-off processes; and performing post-processing, wherein the post-processing can be various scientific processes, such as, but not limited to, polishing, etching, forming a back metal, or transferring the semiconductor working device semi-finished product to a functional substrate. According to the above-described manufacturing method for manufacturing a semiconductor working device, the semiconductor working device semi-finished product includes a MOSFET. At least one of the following: a semi-finished device, a Schottky diode device, a sietzium nitride power device, a superjunction MOSFET device, an insulated gate bipolar transistor device, and a thyristor device.According to any of the above objectives, the present invention provides a semiconductor working device manufactured using the aforementioned manufacturing method for manufacturing semiconductor working devices, wherein the semiconductor working device includes at least one of a MOSFET device, a Schottky diode device, a sietzium nitride power device, a superjunction MOSFET device, an insulated gate bipolar transistor device, and a thyristor device. In summary, the silicon carbide semiconductor structure, its manufacturing method, and the manufacturing method of the semiconductor working device using the present invention can give its silicon carbide epitaxial layer or silicon carbide epitaxial doped layer superior electrical properties, and can save manufacturing costs, improve the yield of manufacturing semiconductor working devices, and reduce defects in semiconductor working devices. The accompanying drawings are provided to enable those skilled in the art to further understand the present invention and are incorporated in and constitute a part of this specification. The drawings illustrate exemplary embodiments of the present invention. It is used in conjunction with the specification of this invention to explain the principles of the invention, and is not intended to limit the invention. A brief description of the accompanying drawings of this invention is as follows: Figure 1 is a schematic cross-sectional view of a silicon carbide semiconductor structure according to an embodiment of the present invention; Figure 2 is a schematic cross-sectional view of a silicon carbide semiconductor structure according to another embodiment of the present invention; Figure 3 is a schematic cross-sectional view of a silicon carbide semiconductor structure according to another embodiment of the present invention; Figure 4 is a schematic cross-sectional view of a silicon carbide semiconductor structure according to another embodiment of the present invention; Figure 5 is a schematic cross-sectional view of a silicon carbide MOSFET device semi-finished product according to an embodiment of the present invention; Figure 6 is a schematic cross-sectional view of a silicon carbide MOSFET device according to an embodiment of the present invention; Figure 7 is a schematic cross-sectional view of a silicon carbide semiconductor structure according to another embodiment of the present invention; Figure 8 is a schematic cross-sectional view of a silicon carbide semiconductor structure according to another embodiment of the present invention; Figure 9 is a schematic cross-sectional view of a silicon carbide MOSFET device semi-finished product according to another embodiment of the present invention; Figure 10 is a schematic cross-sectional view of a Schottky diode device semi-finished product according to an embodiment of the present invention; Figure 11 is a schematic cross-sectional view of a Schottky diode device according to an embodiment of the present invention; Figure 12 is a schematic cross-sectional view of a shale nitride power device semi-finished product according to an embodiment of the present invention; Figure 13 is a schematic cross-sectional view of a shale nitride power device semi-finished product according to another embodiment of the present invention. Figure 14 is a schematic cross-sectional view of a silicon carbide MOSFET device according to another embodiment of the present invention; Figure 15 is a schematic cross-sectional view of a silicon carbide superjunction MOSFET device according to an embodiment of the present invention; Figure 16 is a schematic cross-sectional view of a silicon carbide insulated gate bipolar transistor device according to an embodiment of the present invention; Figure 17 is a schematic cross-sectional view of a thyristor device according to an embodiment of the present invention. [Symbol Explanation] 1-4, 7, 8: Silicon carbide semiconductor structure 5, 9: Semi-finished silicon carbide MOSFET devices 6, 14: Silicon carbide MOSFET devices 10: Schottky diode device semi-finished product 11: Schottky diode devices 12, 13: Semi-finished products of sulfide power devices 15: Silicon carbide superjunction MOSFET devices 16: Silicon carbide insulated gate bipolar transistor device 17: Thyristor Devices 100: Support substrate 101, 103: III-V family base 102>104: Silicon carbide epitaxial layer 105: Transition metal chalcogenide layer 106, 107, 301, 302, 317, 321: Silicon carbide epitaxial doped layers 108, 109, 303, 304: P-type wells 110, 111, 309, 310: N+ doped regions 112, 113, 114, 116, 208, 209, 210, 300, 311, 312, 313: Metal electrodes 115, 314: Gate oxide layer 117: Ohmic contact electrode 201, 203: Aluminum nitride layer 202: Nitride layer 204: An alloy layer formed by aluminum nitride and styrene nitride. 205: Sieve nitride coating 206: Silicon nitride layer 207: Passivation layer 211, 212: Gate electrodes 213: Carbon dioxide composite layer 305, 306, 319, 320: P+ doped regions 315, 316: P-type area 318: Specific Implementation of the P-type Substrate To help the examiner understand the technical features, content, advantages, and effects of the present invention, the present invention is described in detail below with reference to the accompanying drawings and in the form of embodiments. The accompanying drawings are for illustrative and supplementary purposes only and may not represent the actual proportions and precise configurations of the invention after implementation. Therefore, the proportions and configurations of the accompanying drawings should not be interpreted or used to limit the scope of the invention in actual implementation. Please refer to Figure 1, which is a schematic cross-sectional view of a silicon carbide semiconductor structure according to an embodiment of the present invention. The silicon carbide semiconductor structure 1 includes a support substrate 100, a III-V group substrate 101, and a silicon carbide epitaxial layer 102. The III-V group substrate 101 is composed of one of aluminum nitride (AlN), sulfide (GaN), or a mixture of aluminum nitride / sulfide (AlN / GaN). A silicon carbide epitaxial layer 102 is formed on a III-V substrate 101 through an epitaxial process. The silicon carbide epitaxial layer 102 is a polytype silicon carbide epitaxial layer, which includes a 6H-silicon carbide (6H-SiC) epitaxial layer, a 4H-silicon carbide (4H-SiC) epitaxial layer, and a 3C-carbon epitaxial layer. It can be either a silicon carbide (3C-SiC) epitaxial layer or a 2H-silicon carbide (2H-SiC) epitaxial layer, but is not limited thereto. The III-V substrate 101 is formed on the support substrate 100. After a semiconductor working device semi-finished product is formed using the silicon carbide semiconductor structure 1, the support substrate 100 and the II-V substrate 101 are formed through various scientific processes, such as, but not limited to, laser lift-off, chemical lift-off (e.g., etching) or other lift-off processes. It should be noted that the main inventive spirit of this invention is that the III-V substrate 101 and the support substrate 100 can serve as the basic growth interface for the growth of the silicon carbide epitaxial layer 102 (or the silicon carbide epitaxial doped layer 106 in FIG. 4) into a perfect single crystal. The support substrate 100 is, for example, a sapphire substrate, an aluminum nitride substrate or a silicon carbide substrate. However, if the support substrate is an aluminum nitride substrate, the silicon carbide epitaxial layer or the silicon carbide epitaxial doped layer can be grown directly, and the III-V substrate 101 can be omitted. Furthermore, the support substrate 100 is a C-plane support substrate with an off-axis angle of 0.5 to 10 degrees, and the direction of its off-axis angle is

[1100] or

[1120] . However, the present invention is not limited to the direction of the off-axis angle of 1100 or 1120. In some cases, the off-axis angle may be 0 degrees or 10.5 degrees. Similarly, the direction of the off-axis angle is not necessarily a limitation of the present invention. The formation of the silicon carbide semiconductor structure 1 requires only a single piece of equipment, unlike the prior art which requires at least two pieces of equipment when forming silicon carbide semiconductor structures using silicon carbide substrates. On the other hand, the support substrate 100 can be a recycled sapphire substrate, aluminum nitride substrate, or silicon carbide substrate, that is, the support substrate 100 can be reused. Therefore, the manufacturing cost of the silicon carbide semiconductor structure 1 is reduced. Furthermore, the support substrate 100 can be 6-inch, 8-inch, 12-inch, or larger. In addition, compared with the prior art, when the silicon carbide epitaxial layer 102 is a 2H-silicon carbide epitaxial layer, it can have better electrical properties. Furthermore, by using heteroepitaxial growth, the problem of defects in the silicon carbide substrate leading to defects in the silicon carbide epitaxial layer 102 can be avoided. Therefore, the semiconductor device formed using the silicon carbide semiconductor structure 1 will have lower defects and higher yield. Please refer to Figure 2, which is a schematic cross-sectional view of a silicon carbide semiconductor structure according to another embodiment of the present invention.Compared to the embodiment in Figure 1, the silicon carbide semiconductor structure 2 further includes a III-V substrate 103 and a silicon carbide epitaxial layer 104. The III-V substrate 103 is composed of one of aluminum nitride, shale nitride, or a mixture of aluminum nitride and shale nitride, and is located on the silicon carbide epitaxial layer 102. The silicon carbide epitaxial layer 104 is formed on the III-V substrate 103 through an epitaxial process. The silicon carbide epitaxial layer 104 is a poly-type silicon carbide epitaxial layer, which includes one of a 6H-silicon carbide (6H-SiC) epitaxial layer, a 4H-silicon carbide (4H-SiC) epitaxial layer, a 3C-silicon carbide (3C-SiC) epitaxial layer, and a 2H-silicon carbide (2H-SiC) epitaxial layer. Please note that the silicon carbide semiconductor structure 2 of this embodiment can periodically form other IILV group substrates and other silicon carbide epitaxial layers, that is, there can be more than two sets of stacked combinations of IILV group substrates and silicon carbide epitaxial layers. Please refer to FIG3, which is a schematic cross-sectional view of a silicon carbide semiconductor structure according to another embodiment of this invention. Compared with the embodiment of FIG1, the silicon carbide semiconductor structure 3 further includes a transition metal chalcogenide layer 105, wherein the transition metal chalcogenide layer 105 is formed between the support substrate 100 and the III-V group substrate 101. The material of the transition metal chalcogenide layer 105 can be MoS2, MoSe2, WS2, WSe2, MoTe2, etc. The provision of the transition metal chalcogenide layer 105 makes the attraction between the transition metal chalcogenide layer 105 and the III-V group substrate 101 and the silicon carbide epitaxial layer 102 a van der Waals force, thus making it easier to separate the layers. Furthermore, in other embodiments, the silicon carbide semiconductor structure 3 may be a III-V base layer having multiple sets of periodicity on the support substrate 100. 101. A semiconductor structure comprising a transition metal chalcogenide layer 105 and a silicon carbide epitaxial layer 102, and the present invention is not limited thereto. Please refer to Figure 4, which is a schematic cross-sectional view of a silicon carbide semiconductor structure according to another embodiment of the present invention. Unlike the embodiment of Figure 1, the silicon carbide semiconductor structure 4 further includes two silicon carbide epitaxial doped layers 106 and 107. The silicon carbide epitaxial doped layer 106 is formed on the silicon carbide epitaxial layer 102, and may be, for example, but not limited to, N+ doping. The silicon carbide epitaxial doped layer 107 is formed on the silicon carbide epitaxial doped layer 106, and may be, for example, but not limited to, N- doping. The doping type and doping concentration of the silicon carbide epitaxial doped layers 106 and 107 may be P+ or P- doped, and the doping type and doping concentration of the silicon carbide epitaxial doped layers 106 and 107 are not intended to limit the present invention. Furthermore, each of the silicon carbide epitaxial doped layers 106 and 107 is a poly-type silicon carbide epitaxial doped layer, which includes one of a 6H-silicon carbide (6H-SiC) epitaxial doped layer, a 4H-silicon carbide (4H-SiC) epitaxial doped layer, a 3C-silicon carbide (3C-SiC) epitaxial doped layer, and a 2H-silicon carbide (2H-SiC) epitaxial doped layer. The silicon carbide epitaxial doped layers 106 and 107 can be formed by direct epitaxy, or by first forming a silicon carbide epitaxial layer and then forming the silicon carbide epitaxial doped layers 106 and 107 through ion implantation. The doping type (N or P) of the silicon carbide epitaxial doped layers 106 and 107 can be the same or different from each other, and the doping concentration (e.g., lightly doped or heavily doped) of the silicon carbide epitaxial doped layers 106 and 107 can be the same or different from each other. Please refer to Figures 5 and 6. Figure 5 is a schematic cross-sectional view of a silicon carbide MOSFET device semi-finished product according to an embodiment of the present invention, and Figure 6 is a schematic cross-sectional view of a silicon carbide MOSFET device according to an embodiment of the present invention. The silicon carbide MOSFET device semi-finished product 5 in Figure 5 is implemented using the silicon carbide semiconductor structure 1 of the embodiment in Figure 1. First, an N+-doped silicon carbide epitaxial layer 106 is formed on the silicon carbide epitaxial layer 102. Then, an N-doped silicon carbide epitaxial layer 107 is formed on the silicon carbide epitaxial layer 106, thus forming the silicon carbide semiconductor structure 4 shown in Figure 4.Subsequently, two P-type wells 108 and 109 are formed on both sides of the silicon carbide epitaxial doped layer 107. Then, N+ doped regions 110 and 111 are formed in the two P-type wells 108 and 109. Next, two metal electrodes 112 and 113 (used as source electrodes) are formed on the two N+ doped regions 110 and 111. A gate oxide layer 115 is formed between the two N+ doped regions 110 and 111, and a metal electrode 114 (used as a gate electrode) is formed on the gate oxide layer 115, thereby forming a silicon carbide MOSFET device semi-finished product 5. After forming the silicon carbide MOSFET device semi-finished product 5, a post-laser lift-off process is performed to remove the support substrate 100 and the III-V base layer 101. Then, the silicon carbide epitaxial layer 102 is ground down to the silicon carbide epitaxial doped layer 106. A metal electrode 116 (used as a drain electrode) is then formed under the silicon carbide epitaxial doped layer 106 to form the silicon carbide MOSFET device 6. Please refer to FIG7, which is a schematic cross-sectional view of a silicon carbide semiconductor structure according to another embodiment of the present invention. Unlike the embodiment of FIG1, the silicon carbide semiconductor structure 7 does not have a silicon carbide epitaxial layer 102, but includes a silicon carbide epitaxial doped layer 106. The silicon carbide epitaxial doped layer 106 can be, for example, N+ doped, but the present invention is not limited by the doping type and concentration. On the other hand, the silicon carbide semiconductor structure 7 may further include a transition metal chalcogenide layer 105, which is disposed between the silicon carbide epitaxial doped layer 106 and the III-V substrate 101. Furthermore, the silicon carbide semiconductor structure 7 may also be a semiconductor structure having multiple sets of periodic IILV substrate 101, transition metal chalcogenide layer 105, and silicon carbide epitaxial doped layer 106 on the support substrate 100, or it may be on the support substrate 100. The semiconductor structure 8 has multiple sets of periodic IILV group base layers 101 and silicon carbide epitaxial doped layers 106. Referring to FIG8, FIG8 is a schematic cross-sectional view of a silicon carbide semiconductor structure according to another embodiment of the present invention. Unlike the embodiment of FIG7, the silicon carbide semiconductor structure 8 further includes a silicon carbide epitaxial doped layer 107. The silicon carbide epitaxial doped layer 107 is formed on the silicon carbide epitaxial doped layer 106, and may be, for example, but not limited to, N-doped. Referring to FIG9 and FIG6, FIG9 is a schematic cross-sectional view of a silicon carbide MOSFET device semi-finished product according to another embodiment of the present invention. The silicon carbide MOSFET device semi-finished product 9 of FIG9 is implemented using the silicon carbide semiconductor structure 7 of the embodiment of FIG7. First, an N-doped silicon carbide epitaxial doped layer 107 is formed on the N+ doped silicon carbide epitaxial doped layer 106, thus forming the silicon carbide semiconductor structure 8 of FIG8. Subsequently, two P-type wells 108 and 109 are formed on both sides of the silicon carbide epitaxial doped layer 107, and then N+ doped regions 110 and 111 are formed in the two P-type wells 108 and 109. Next, two metal electrodes 112 and 113 (used as source electrodes) are formed on the two N+ doped regions 110 and 111. A gate oxide layer 115 is formed between the two N+ doped regions 110 and 111, and a metal electrode 114 (used as a gate electrode) is formed on the gate oxide layer 115, thereby forming a silicon carbide MOSFET device semi-finished product 9o. After forming the silicon carbide MOSFET device semi-finished product 9o, a post-laser lift-off process is performed to peel off the support substrate 100 and the III-V base layer 101, and a portion of the lower surface of the silicon carbide epitaxial doped layer 106 is polished (e.g., but not limited to chemical mechanical polishing (CMP)). Then, a metal electrode 116 (used as a drain electrode) is formed under the silicon carbide epitaxial doped layer 106, thereby forming a silicon carbide MOSFET device 6. Please refer to Figures 10 and 11. Figure 10 is a schematic cross-sectional view of a Schottky diode device semi-finished product according to an embodiment of the present invention, and Figure 11 is a schematic cross-sectional view of a Schottky diode device according to an embodiment of the present invention. The Schottky diode device semi-finished product 10 of Figure 10 is realized using the silicon carbide semiconductor structure 7 of the embodiment of Figure 7. First, an N-doped silicon carbide epitaxial doped layer 107 is formed on an N+ doped silicon carbide epitaxial doped layer 106, that is, the silicon carbide semiconductor structure 8 of Figure 8 is formed.Subsequently, two P-type wells 108 and 109 are formed on both sides of the silicon carbide epitaxial doped layer 107. Then, an ohmic contact electrode 117 (used as a cathode electrode, made of titanium or tungsten, but not limited thereto) is formed between the two P-type wells 108 and 109 to form a Schottky diode device semi-finished product 10. After forming the Schottky diode device semi-finished product 10, a post-laser lift-off process is performed to peel off the support substrate 100 and the III-V base layer 101, and a portion of the lower surface of the silicon carbide epitaxial doped layer 106 is ground (e.g., but not limited to chemical mechanical polishing). Then, a metal electrode 116 (used as an anode electrode) is formed under the silicon carbide epitaxial doped layer 106 to form the Schottky diode device 11. Please refer to FIG12, which is a schematic cross-sectional view of the nitride power device semi-finished product according to an embodiment of the present invention. The semi-finished product 12 of the spur nitride power device in Figure 12 is realized using the silicon carbide semiconductor structure 1 of the embodiment in Figure 1. First, an aluminum nitride layer 201, a spur nitride layer 202, an aluminum nitride layer 203, an alloy layer 204 formed of aluminum nitride and spur nitride, and a spur nitride capping layer 205 are sequentially formed on the silicon carbide epitaxial layer 102, which serves as a temporary carrier. Then, through the manufacturing process, multiple metal electrodes 208, 209, and 210 are defined as source electrodes, gate electrodes, and drain electrodes. A silicon nitride layer 206 covers an aluminum nitride layer 202, an aluminum nitride layer 203, an alloy layer 204 formed of aluminum nitride and aluminum nitride, an aluminum nitride capping layer 205, metal electrodes 208, 209, and 210, and gate electrodes 211 and 212 located on the aluminum nitride capping layer 205. A passivation layer 207 covers the metal electrodes 208, 209, and 210 and the silicon nitride layer 206. The supporting substrate 100 in the aluminum nitride power device semi-finished product 12 is also included. The III-V group substrate 101 can be laser-peeled, and then the silicon carbide epitaxial layer 102 is ground down to the aluminum nitride layer 201. The entire semiconductor structure is then transferred to a functional substrate (e.g., but not limited to a thermally conductive copper substrate). Referring to FIG13, FIG13 is a schematic cross-sectional view of a semi-finished nitride power device according to another embodiment of the present invention. The semi-finished nitride power device 13 of FIG13 is also implemented using the silicon carbide semiconductor structure 1 of the embodiment of FIG1, but differs from FIG12 in that the semi-finished nitride power device 13 has an additional oxide bonding layer 213 located below the silicon nitride layer 206. The support substrate 100 and the IILV group substrate 101 in the semi-finished nitride power device 13 can be laser-peeled, and then the silicon carbide epitaxial layer 102 is ground down to the aluminum nitride layer 201. The entire semiconductor structure is then transferred to a functional substrate (e.g., but not limited to a thermally conductive copper substrate). Please refer to Figure 14, which is a schematic cross-sectional view of a silicon carbide MOSFET device according to another embodiment of the present invention. The silicon carbide MOSFET device 14 in Figure 14 is implemented using the aforementioned silicon carbide semiconductor structure 1 or 7. The silicon carbide MOSFET device 14 includes, from bottom to top, a stacked structure consisting of a metal electrode 300 (used as a drain electrode), an N+-doped silicon carbide epitaxial doped layer 301, and an N-doped silicon carbide epitaxial doped layer 302. P-type wells 303 and 304 are formed on both sides of the silicon carbide epitaxial doped layer 302. P+ doped region 305 and N+ doped region 309 are formed in P-type well 303, and P+ doped region 306 and N+ doped region 310 are formed in P-type well 304. A metal electrode 311 (used as a source electrode) is formed above the P+ doped region 305 and N+ doped region 309, and a metal electrode 312 (used as a source electrode) is formed above the P+ doped region 306 and N+ doped region 310. A gate oxide layer 314 is formed between the metal electrodes 311 and 312. A metal electrode 313 (used as a gate electrode) is formed on the gate oxide layer 314. Please refer to FIG15, which is a schematic cross-sectional view of a silicon carbide superjunction MOSFET device according to an embodiment of the present invention. The silicon carbide superjunction MOSFET device 15 of FIG15 is implemented using the aforementioned silicon carbide semiconductor structure 1 or 7. The silicon carbide superjunction MOSFET device 15 differs from the silicon carbide MOSFET device 14 of FIG14 in that the silicon carbide superjunction MOSFET device 15 has two P-type regions 315 and 316 formed in the silicon carbide epitaxial doped layer 302, and located below the P-type wells 303 and 304, respectively.Please refer to Figure 16, which is a schematic cross-sectional view of a silicon carbide insulated-gate bipolar transistor (SMT) device according to an embodiment of the present invention. The SMT device 16 of Figure 16 is implemented using the aforementioned silicon carbide semiconductor structure 1 or 7. The difference between the SMT device 16 and the silicon carbide MOSFET device 14 of Figure 14 is that the SMT device 16 further has a P+ doped silicon carbide epitaxial doped layer 317 located below the N+ doped silicon carbide epitaxial doped layer 301. Please refer to Figure 17, which is a schematic cross-sectional view of a thyristor device according to an embodiment of the present invention. The thyristor device 17 in Figure 17 is implemented using the aforementioned silicon carbide semiconductor structure 1 or 7. The thyristor device 17 includes, from bottom to top, a stacked structure consisting of a metal electrode 300 (used as a drain electrode), a P+-doped silicon carbide epitaxial layer 317, an N+-doped silicon carbide epitaxial layer 301, an N-doped silicon carbide epitaxial layer 302, and a P-type base 318. P+ doped regions 319 and 320 are formed on both sides of the P-type base 318. Metal electrodes 311 and 312 are formed above the P+ doped regions 319 and 320, respectively. An N+-doped silicon carbide epitaxial layer 321 is formed between the metal electrodes 311 and 312, and a metal electrode 313 is formed above the N+-doped silicon carbide epitaxial layer 321. Furthermore, based on the above description, the present invention further provides a method for manufacturing a silicon carbide semiconductor structure. The manufacturing method includes the following steps: forming a III-V substrate on a support substrate, wherein the III-V substrate is composed of one of aluminum nitride, shale nitride, or a hybrid aluminum nitride / shale nitride material; and forming a silicon carbide epitaxial layer or a silicon carbide epitaxial doped layer on the III-V substrate through an epitaxial process; wherein after forming a semiconductor working device semi-finished product using a silicon carbide semiconductor structure, the support substrate and the III-V substrate can be peeled off through a laser lift-off process. In one embodiment of the manufacturing method for manufacturing a silicon carbide semiconductor structure, the support substrate is a C-plane sapphire substrate with an off-axis angle of 0.5 to 10 degrees, and the direction of its off-axis angle is...

[1100] or

[1120] In one embodiment of a manufacturing method for manufacturing a silicon carbide semiconductor structure, the manufacturing method further includes the step of: forming a transition metal chalcogenide layer between a support substrate and a silicon carbide epitaxial layer or a silicon carbide epitaxial doped layer. In one embodiment of the manufacturing method for manufacturing a silicon carbide semiconductor structure, the manufacturing method further includes the following steps: forming another IILV group substrate on a silicon carbide epitaxial layer or a silicon carbide epitaxial doped layer, wherein the other IILV group substrate is composed of aluminum nitride, shale nitride, or a mixture of aluminum nitride and shale nitride; and forming another silicon carbide epitaxial layer or another silicon carbide epitaxial doped layer on another III-V group substrate through an epitaxial process. In one embodiment of the manufacturing method for manufacturing a silicon carbide semiconductor structure, the manufacturing method further includes the following steps: forming at least one other silicon carbide epitaxial doped layer on a silicon carbide epitaxial layer or a silicon carbide epitaxial doped layer, wherein the doping type of the other silicon carbide epitaxial doped layer is the same as or different from the doping type of the silicon carbide epitaxial doped layer, and the doping concentration of the other silicon carbide epitaxial doped layer is the same as or different from the doping concentration of the silicon carbide epitaxial doped layer. In one embodiment of the manufacturing method for manufacturing a silicon carbide semiconductor structure, the semiconductor working device semi-finished product includes a MOSFET device semi-finished product, a Schottky diode device semi-finished product, etc. At least one of a nitride power device semi-finished product, a superjunction MOSFET device semi-finished product, an insulated gate bipolar transistor device semi-finished product, and a thyristor device semi-finished product. Furthermore, based on the above description, the present invention also provides a manufacturing method for manufacturing a semiconductor working device, the manufacturing method comprising the following steps: forming a semiconductor working device semi-finished product on a silicon carbide epitaxial layer or a silicon carbide epitaxial doped layer of the above-described silicon carbide semiconductor structure; removing a support substrate and a III-V group substrate through various scientific processes, such as, but not limited to, laser lift-off processes, chemical lift-off processes (e.g., etching processes), or other lift-off processes; and performing post-processing, the post-processing including at least one of grinding, etching, forming a back metal, or transferring the semiconductor working device semi-finished product to a functional substrate. In summary, This invention provides a silicon carbide semiconductor structure for epitaxial growth of a silicon carbide epitaxial layer or a silicon carbide epitaxial doped layer using a support substrate and a III-V group substrate, a method for manufacturing the structure, and a method for manufacturing a semiconductor device using the structure. When the silicon carbide epitaxial layer is a 2H silicon carbide epitaxial layer, or the silicon carbide epitaxial doped layer is a 2H-silicon carbide epitaxial doped layer, the 2H-silicon carbide epitaxial layer or the 2H-silicon carbide epitaxial doped layer exhibits superior electrical properties compared to 4H-silicon carbide epitaxial layers, 4H-silicon carbide epitaxial doped layers, 6H-silicon carbide epitaxial layers, and 6H-silicon carbide epitaxial doped layers.Furthermore, compared to the existing technology that uses a silicon carbide substrate, the method of using a support substrate and a III-V group substrate can effectively save costs, and the support substrate has lower defects. Therefore, the silicon carbide epitaxial layer or silicon carbide epitaxial doping has lower defects, and the semiconductor device implemented using this invention will also have lower defects and higher yield. The above-described embodiments are only for illustrating the technical concept and features of this invention, and are intended to enable those skilled in the art to understand them. Those who understand the content of this invention and implement it accordingly should not limit the patent scope of this invention. That is, all equivalent changes or modifications made in accordance with the spirit of this invention should still be covered within the patent scope of this invention.

Claims

CLAIM 1. A silicon carbide semiconductor structure, comprising: A support substrate (100); a III-V group base layer (101) formed on the support substrate (100), composed of one of aluminum nitride (AlN) material, gallium nitride (GaN) material and aluminum nitride / gallium nitride (AlN / GaN) mixed material; and a silicon carbide epitaxial layer (102) or a silicon carbide epitaxial doped layer (106) formed on the III-V group base layer (101) through an epitaxial process; After a semiconductor working device semi-finished product is formed using the silicon carbide semiconductor structure, the support substrate (100) and the III-V group base layer (101) can be peeled off through a scientific process.

2. The silicon carbide semiconductor structure of claim 1, wherein the silicon carbide epitaxial layer (102) is a poly-type silicon carbide epitaxial layer, including one of 6H-silicon carbide (6H-SiC) epitaxial layer, 4H-silicon carbide (4H-SiC) epitaxial layer, 3C-silicon carbide (3C-SiC) epitaxial layer and 2H-silicon carbide (2H-SiC) epitaxial layer, and the silicon carbide epitaxial doped layer (106) is a poly-type silicon carbide epitaxial doped layer, including one of 6H-silicon carbide (6H-SiC) epitaxial doped layer, 4H-silicon carbide (4H-SiC) epitaxial doped layer, 3C-silicon carbide (3C-SiC) epitaxial doped layer and 2H-silicon carbide (2H-SiC) epitaxial doped layer.

3. The silicon carbide semiconductor structure of claim 1, wherein the support substrate (100) is a C-plane support substrate, having an off-axis angle of 0.5 to 10 degrees.

4. The silicon carbide semiconductor structure of one of claims 1 to 3, further comprising: A transition metal chalcogenide layer (105) is formed between the support substrate (100) and the silicon carbide epitaxial layer (102) or the silicon carbide epitaxial doped layer (106).

5. The silicon carbide semiconductor structure of one of claims 1 to 3, further comprising: Another III-V group base layer (103) composed of one of aluminum nitride material, gallium nitride material and aluminum nitride / gallium nitride mixed material is located on the silicon carbide epitaxial layer (102) or the silicon carbide epitaxial doped layer (106); and another silicon carbide epitaxial layer (104) or another silicon carbide epitaxial doped layer is formed on the another III-V group base layer (103) through the epitaxial process.

6. The silicon carbide semiconductor structure of one of claims 1 to 3, further comprising: at least one other silicon carbide epitaxial doped layer (107) formed on the silicon carbide epitaxial layer (102) or the silicon carbide epitaxial doped layer (106), wherein the other silicon carbide epitaxial doped layer (107) has the same or different doping type as the silicon carbide epitaxial doped layer (106), and the other silicon carbide epitaxial doped layer (107) has the same or different doping concentration as the silicon carbide epitaxial doped layer (106).

7. The silicon carbide semiconductor structure of any one of claims 1 to 3, wherein the semiconductor working device semi-product comprises at least one of a MOSFET device semi-product, a Schottky diode device semi-product, a nitride power device semi-product, a super junction MOSFET (SJ MOSFET) device semi-product, an insulated gate bipolar transistor device (IGBT) semi-product, and a thyristor device semi-product. forming a III-V group base layer (101) on a support substrate (100), wherein the III-V group base layer (101) is composed of one of aluminum nitride material, gallium nitride material, and mixed aluminum nitride / gallium nitride material; and forming a silicon carbide epitaxial layer (102) or a silicon carbide epitaxial doped layer (106) on the III-V group base layer (101) through an epitaxial process; 8. A method of manufacture for fabricating a silicon carbide semiconductor structure, comprising: wherein after a semiconductor working device semi-product is formed using the silicon carbide semiconductor structure, the support substrate (100) and the III-V group base layer (101) can be peeled off through a scientific process. forming a transition metal chalcogenide layer (105) between the support substrate (100) and the silicon carbide epitaxial layer (102) or the silicon carbide epitaxial doped layer (106).

9. The manufacturing method of claim 8, further comprising: forming another III-V group base layer (103) on the silicon carbide epitaxial layer (102) or the silicon carbide epitaxial doped layer (106), wherein the other III-V group base layer (103) is composed of one of aluminum nitride material, gallium nitride material, and mixed aluminum nitride / gallium nitride material; and forming another silicon carbide epitaxial layer (104) or another silicon carbide epitaxial doped layer on the other III-V group base layer (103) through the epitaxial process.

10. The manufacturing method of claim 8, further comprising: forming at least one other silicon carbide epitaxial doped layer (107) on the silicon carbide epitaxial layer (102) or the silicon carbide epitaxial doped layer (106), wherein the other silicon carbide epitaxial doped layer (107) has the same or different doping type as the silicon carbide epitaxial doped layer (106), and the other silicon carbide epitaxial doped layer (107) has the same or different doping concentration as the silicon carbide epitaxial doped layer (106).

11. The manufacturing method of claim 8, further comprising: at ​ 12. A manufacturing method for manufacturing a semiconductor operating device, comprising: forming a semiconductor working device semi-finished product from the 2H-silicon carbide epitaxial layer (102) or the 2H-silicon carbide epitaxial doped layer (106) of the silicon carbide semiconductor structure as claimed in claim 1; through a laser lift-off process, the support substrate (100) and the III-V group layer (101) are peeled off; and performing a post-process, wherein the post-process includes at least one of grinding, etching, forming a back metal, and transferring the semiconductor working device semi-finished product to a functional substrate.

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