Carrier substrate for manufacturing semiconductor device, and method for manufacturing semiconductor device

A metal film on the silicon substrate enhances the strength and thermal conductivity of carrier substrates, addressing cracking issues and ensuring uniform heat distribution for high-quality semiconductor devices.

WO2025248934A1PCT designated stage Publication Date: 2025-12-04MITSUBISHI MATERIALS CORP
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Patent Information

Application Number
PCT/JP2025/011524
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-05-27
Filing Date
2025-03-24
Publication Date
2025-12-04

AI Technical Summary

Technical Problem

Silicon carrier substrates used in wafer level package (WLP) and panel level package (PLP) technologies are prone to cracking due to their brittle nature, which can lead to semiconductor device failure, as they cannot withstand their own weight with increasing area while maintaining the same thickness.

Method used

A carrier substrate with a metal film, preferably made of aluminum or copper, is formed on at least one surface of the silicon substrate to enhance strength and thermal conductivity, preventing cracking and ensuring uniform heat distribution during semiconductor device manufacturing.

Benefits of technology

The metal film reinforces the silicon substrate, reducing cracking and ensuring uniform heat distribution, leading to the formation of high-quality semiconductor devices with improved rigidity and thermal stability.

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Abstract

A semiconductor device (16) is formed through: a temporary fixing layer forming step in which a first surface (2a) and a second surface (2b) of a substrate body (2) made of silicon are formed parallel to each other, a metal film (3) is formed on at least the first surface (2a) of the substrate body (2), and using the silicon substrate as a carrier substrate (1), a temporary fixing layer (11) is formed on either the first surface (2a) side or the second surface (2b) side thereof; a semiconductor device forming step in which at least part of the semiconductor device (16) is formed on the temporary fixing layer; and a peeling step in which the temporary fixing layer (11) and the carrier substrate (1) are peeled off after the semiconductor device forming step.
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Description

Carrier substrate for semiconductor device manufacturing and semiconductor device manufacturing method

[0001] This application claims priority to Japanese Patent Application No. 2024-085505, filed May 27, 2024, the contents of which are incorporated herein by reference.

[0002] As electronic devices become smaller and more power-efficient, there is a growing need for higher integration and thinner semiconductor chips and printed wiring boards. To meet this need, wafer level package (WLP) and panel level package (PLP) technologies have been developed in recent years. In WLP and PLP, multiple silicon chips are sometimes mounted on a circular or rectangular carrier substrate while being rewired, and then packaged in a resin mold or similar. The carrier substrate is generally removed after packaging.

[0003] Patent Document 1 describes a method of preparing a laminated sheet (metal foil with a carrier) having a release layer and a metal layer in that order on a carrier (carrier substrate) made of glass, ceramics, silicon, resin, or metal, forming a resin-containing layer having a desired wiring layer on the metal layer of the laminated sheet, forming a gap between the carrier and the metal layer, and peeling the metal layer so as to expand the gap. After the metal layer is peeled from the carrier, it is removed from the surface of the resin-containing layer by etching or the like.

[0004] Japanese Patent Application Publication No. 2023-067941 (A)

[0005] Silicon (Si) is often used as a carrier substrate for WLP and PLP to ensure a smooth surface. However, silicon is a brittle material and prone to cracking. In this case, the area of ​​each carrier substrate is increasing year by year, but the thickness remains the same. As a result, the material can no longer withstand its own weight, resulting in cracks. If a crack occurs in the carrier substrate, the semiconductor device it supports will also crack, and a solution to this problem is needed.

[0006] The present invention has been made in view of the above circumstances, and has as its object to improve the strength of a carrier substrate for use in manufacturing semiconductor devices.

[0007] The carrier substrate for semiconductor device manufacturing of the present invention comprises a substrate body made of silicon, the first surface and the second surface of which are formed parallel to each other, and a metal film formed on at least the first surface of the substrate body. In this case, the carrier substrate may also have a metal film formed on an outer peripheral surface connecting the peripheries of the first surface and the second surface.

[0008] This carrier substrate has a metal film formed on at least the first surface of the substrate body, which reinforces the entire substrate body made of silicon, a brittle material, making it less likely to crack. Forming a metal film on the outer peripheral surface of the substrate body further increases rigidity. The substrate body can be made of either single-crystal silicon or polycrystalline silicon.

[0009] Since the entire substrate is reinforced by the metal film, cracks can be prevented from occurring when the substrate is handled as a carrier substrate. Furthermore, since the metal film has excellent thermal conductivity, even when the substrate is heated during the formation of semiconductor devices on the substrate, localized heating is suppressed and heat is transmitted uniformly throughout, thereby preventing deformation and breakage of the semiconductor devices.

[0010] In the carrier substrate of the present invention, the metal film is preferably made of aluminum or copper and has a thickness of 0.1% or more of the thickness of the substrate body. Aluminum and copper are easily available, which helps prevent cost increases, and they have excellent thermal conductivity, making them suitable for applications requiring uniform temperature distribution. If the thickness of the metal film is less than 0.1% of the thickness of the substrate body, the reinforcing effect of the metal film is poor.

[0011] The length of chipping occurring at the corners of the substrate body is preferably 50 μm or less. By limiting chipping that can be the starting point of cracks, the occurrence of cracks can be further suppressed.

[0012] A method for manufacturing a semiconductor device using this carrier substrate includes a temporary fixing layer formation process for forming a temporary fixing layer on either the first surface side or the second surface side of the carrier substrate, a semiconductor device formation process for forming at least a portion of a semiconductor device on the temporary fixing layer, and a peeling process for peeling off the temporary fixing layer and the carrier substrate after the semiconductor device formation process.

[0013] In this manufacturing method, since the carrier substrate has a metal film formed on the first surface, it is reinforced, preventing cracks during handling, and heat during semiconductor device manufacturing is uniformly transmitted to the entire surface, allowing high-quality semiconductor devices to be formed. In this case, forming the temporary fixing layer on the surface on the second surface side is preferable to forming it on the surface on the first surface side (the surface of the metal film), as this does not interfere with the peeling process.

[0014] According to the present invention, since the metal film is formed on at least the first surface of the substrate body made of silicon, the strength of the carrier substrate can be improved.

[0015] Fig. 2 is a cross-sectional view showing a carrier substrate of a first embodiment of the present invention; Fig. 3 is a cross-sectional view showing a part of a process for forming a semiconductor device using the carrier substrate of the first embodiment; Fig. 4 is a cross-sectional view showing a process following Fig. 2A; Fig. 5 is a cross-sectional view showing a process following Fig. 2B; Fig. 6 is a cross-sectional view showing a process following Fig. 2C; Fig. 7 is a cross-sectional view showing a process following Fig. 3A; Fig. 8 is a cross-sectional view showing a process following Fig. 3B; Fig. 9 is a cross-sectional view showing a carrier substrate of a second embodiment of the present invention; Fig. 10 is a cross-sectional view showing a carrier substrate of a third embodiment of the present invention; Fig. 11 is a cross-sectional view for explaining a bending test;

[0016] Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

[0017] 1, a carrier substrate 1 of the first embodiment has a metal film 3 formed on one surface of a substrate body 2. The substrate body 2 is made of single crystal silicon or polycrystalline silicon, and has a first surface 2a and a second surface 2b formed parallel to each other, and an outer peripheral surface 2c connecting the peripheries of the first surface 2a and the second surface 2b formed in a cylindrical or rectangular tube shape (in other words, the first surface 2a and the second surface 2b are formed in a circular or rectangular shape, and the entire substrate is formed in a disk-like or rectangular plate-like shape).

[0018] The dimensions of the substrate body 2 are not necessarily limited, but the thickness t1 is 0.3 mm to 1.2 mm, the diameter d is 200 mm to 430 mm, preferably 300 mm to 430 mm, if it is disk-shaped, and one side d (since the planar shape is not specified in FIG. 1, the same symbol d is used) is 200 mm to 900 mm, preferably 300 mm to 900 mm, more preferably 500 mm to 900 mm, if it is rectangular. The rectangular substrate body 2 may be square, rectangular, or polygonal.

[0019] The substrate body 2 is formed by slicing a silicon ingot into plates and grinding the outer edge. However, because it is a brittle material, chipping may occur during machining processes such as slicing and grinding. For this reason, an etching process is performed after machining, and any chipping is removed by the etching process. This etching process may be performed on the entire surface of the substrate body, but it is particularly effective on corners (periphery and outer periphery) where chipping is more likely to occur. In this case, chipping is suppressed to a length of 50 μm or less, preferably 45 μm or less, and more preferably 40 μm or less, from all sides (corners) of the substrate body 2. While not particularly limited, chipping may be 0.1 μm or more, 1 μm or more, or 5 μm or more from all sides (corners) of the substrate body 2.

[0020] The metal film 3 can be made of copper (Cu) or aluminum (Al), but a metal with good thermal conductivity is preferred. Compounds such as aluminum alloys and copper alloys may also be used, but oxides of aluminum or copper are not preferred. The metal film 3 is formed on the first surface 2a of the substrate body 2, for example, by physical vapor deposition (e.g., vapor deposition), sputtering, or ion plating, chemical vapor deposition, or plating. Its thickness t2 is set to a value between 0.1% and 2% of the thickness t1 of the substrate body 2. For example, if the thickness t1 of the substrate body 2 is 0.8 mm (800 μm), the thickness t2 is set to approximately 10 μm. While not particularly limited, the thickness t2 of the metal film 3 may be 0.2% or more, or even 0.3% or more, of the thickness t1 of the substrate body 2. Furthermore, although not particularly limited, the thickness t2 may be 1.8% or less, or even 1.5% or less, of the thickness t1 of the substrate body 2. If the thickness t2 of the metal film 3 is less than 0.1% of the thickness t1 of the substrate body 2, the reinforcing effect of the metal film 3 is poor. However, if the thickness is too thick, the difference in thermal expansion between the silicon substrate body 2 and the metal film 3 during the heating process may cause warping of the substrate body 2, so it is best to keep the thickness up to 2% of the thickness t1 of the substrate body 2. Furthermore, the thickness t2 of the metal film 3 may be 15 μm or less, 10 μm or less, or 5 μm or less. The lower limit of the thickness t2 is not particularly limited, but may be 1 μm.

[0021] Next, a method for manufacturing a semiconductor device (semiconductor package) using the thus configured carrier substrate 1 will be described. Hereinafter, the silicon substrate 1 will be referred to as the carrier substrate, with the surface on which the metal film 3 is formed being referred to as the first surface 2a and the opposite surface being referred to as the second surface 2b. This semiconductor device manufacturing method includes a temporary fixing layer forming step of forming a temporary fixing layer 11 on the surface of the second surface 2b of the carrier substrate 1, a semiconductor device forming step of mounting a semiconductor chip 13 mounted on a rewiring layer 12 on the temporary fixing layer 11, a peeling step of peeling off the temporary fixing layer 11 and the carrier substrate 1 after the semiconductor device forming step, and a terminal forming step of forming electrode terminals 14 on the rewiring layer 12 after the peeling step. The steps will be described below in order.

[0022] [Temporary Fixing Layer Formation Process] As shown in FIG. 2A, a temporary fixing layer 11 is formed on the second surface 2b of the carrier substrate 1, opposite the metal film 3. This temporary fixing layer 11 is a layer provided to peel the carrier substrate 1 from the rewiring layer 12 when use as the carrier substrate 1 is finished. For example, it is formed from a material that is easily peeled by applying external force (e.g., hydrocarbon, amorphous carbon, etc.), a material that decomposes when irradiated with laser light or the like, reducing the adhesive strength at the interface (e.g., resin, etc.), or a material that peels from within the layer (e.g., silicon carbide, etc.). This temporary fixing layer 11 can be formed on the surface of the carrier substrate 1 by sputtering or the like. In the case of resin, it is formed by spin coating or the like. The thickness t3 is not particularly limited, but is set to 1 μm or more and 5 μm or less.

[0023] [Semiconductor device formation process] In the semiconductor device formation process, a rewiring layer 12 is formed on the temporary fixing layer 11 (see Figure 2B), a semiconductor chip 13 is mounted on the rewiring layer 12 (see Figure 2C), and a sealing resin 15 is formed to cover the semiconductor chip 13 (see Figure 3A).

[0024] The rewiring layer 12 is formed on the temporary fixing layer 11 of the carrier substrate 1 by appropriately forming an insulating film 12a and a circuit conductor 12b using thin film formation techniques such as resist film formation and exposure and development processing, thereby forming a layer of wiring with a fine line width, and mainly provides wiring between the semiconductor chip 13 to be mounted next and the electrode terminals (solder balls) 14 to be formed later.

[0025] A semiconductor chip 13 is mounted on this rewiring layer 12. In a pre-process, this semiconductor chip 13 is formed on a silicon substrate through processes such as film formation, exposure and development in a so-called clean room, and then separated into individual pieces. In a subsequent process, the semiconductor chip 13 is mounted on the rewiring layer 12 on the carrier substrate 1 as described above. FIG. 2C shows an example in which two semiconductor chips 13 are mounted. Finally, as shown in FIG. 3A, the semiconductor chip 13 is sealed with sealing resin 15 so as to cover it. Epoxy-based resin is widely used as the sealing resin 15.

[0026] 3B , the carrier substrate 1 is peeled off from the rewiring layer 12 together with the temporary fixing layer 11. In this peeling step, depending on the material of the temporary fixing layer 11, a method such as peeling by applying a physical external force, decomposing a part of the temporary fixing layer 11 by irradiating it with laser light or the like from the carrier substrate 1 side to reduce the adhesive strength at the interface, or peeling it off from within the temporary fixing layer 11 is used. After peeling off the carrier substrate 1, if a part of the temporary fixing layer 11 remains on the surface of the rewiring layer 12, it is removed with a solvent or the like.

[0027] [Terminal Formation Process] Electrode terminals (solder balls) 14 are fixed to the exposed portions of the circuit conductors 12b of the rewiring layer 12 that are exposed after peeling off the carrier substrate 1, and the electrode terminals (solder balls) 14 are divided into the required size and finished as a semiconductor package (semiconductor device) 16 shown in FIG. 3C.

[0028] As described above, when manufacturing the semiconductor package 16, the carrier substrate 1 supports the rewiring layer 12 and the semiconductor chip 13 formed during the semiconductor chip mounting process. Therefore, the carrier substrate 1 must have a smooth surface and be free of deformation, such as warping, to allow for the formation of fine rewiring. Because the carrier substrate 1 of this embodiment is a silicon substrate, its surface is smooth. Furthermore, the metal film 3 is formed on one side (first surface) 2a of the substrate body 2, making it less susceptible to cracking. This reduces cracking during handling, enabling the formation of high-precision semiconductor devices. In particular, in recent years, the area of ​​semiconductor devices has been increased to increase yields by fabricating more semiconductor devices. Silicon substrates, which are brittle materials, are no longer able to withstand their own weight, creating an environment prone to cracking. However, the presence of a metal film on the first surface reduces cracking in both the carrier substrate 1 and the semiconductor package 16 supported by the carrier substrate 1, which is advantageous for increasing the area of ​​semiconductor devices.

[0029] Furthermore, in the semiconductor device formation process, heat (e.g., 250°C) is applied to harden the resist film. In the carrier substrate 1 of this embodiment, the metal film 3 is formed over the entire first surface 2a. Because of its excellent thermal conductivity, the applied heat is quickly transferred in the planar direction, allowing the entire surface to be uniformly heated. This prevents warping and partial thermal expansion caused by uneven heat distribution. Partial thermal expansion can cause deformation, breakage, and other problems. By using the carrier substrate 1 of this embodiment, a highly accurate redistribution layer 12 can be formed. While the metal film 3 is formed over the entire first surface 2a of the substrate body 2, it does not necessarily have to be formed over the entire surface; for example, the peripheral edge portion may be omitted.

[0030] [Second Embodiment] In the first embodiment, the carrier substrate 1 was formed by forming a metal film 3 on one surface (first surface) 2a of the substrate body 2. In the second embodiment, as shown in FIG. 4 , a carrier substrate 21 is provided in which a metal film 3 is also formed on the outer peripheral surface 2c of the substrate body 2, connecting the peripheries of the first surface 2a and the second surface 2b. The metal film 3 formed on the outer peripheral surface 2c of the substrate body 2 may be the same as the metal film 3 formed on the first surface 2a, and may be made of copper (Cu), aluminum (Al), etc., with a metal having good thermal conductivity being preferred. The metal film 3 is formed simultaneously with the metal film 3 formed on the first surface 2a of the substrate body 2 by physical vapor deposition (e.g., evaporation, sputtering, ion plating), chemical vapor deposition, plating, or other methods. The thickness of the metal film 3 is set to the same thickness t2 of the metal film 3 formed on the first surface 2a, in the range of 0.1% to 2% of the thickness t1 of the substrate body 2. Although not particularly limited, the thickness t2 of the metal film 3 may be 0.2% or more, or 0.3% or more, of the thickness t1 of the substrate body 2. Furthermore, although not particularly limited, the thickness t2 may be 1.8% or less of the thickness t1 of the substrate body 2, or may be 1.5% or less.

[0031] Using this carrier substrate 21, a semiconductor device (semiconductor package) can be manufactured on the second surface 2b of the carrier substrate 21 through a process similar to that of the first embodiment. The metal film 3 is formed not only on the first surface 2a but also on the outer peripheral surface 2c of the carrier substrate 21, and the metal film 3 on the outer peripheral surface 2c forms a cylindrical shape, resulting in a large section modulus and higher rigidity. Furthermore, when heated, heat is quickly conducted to the outer peripheral surface 2c of the substrate body 2, ensuring better thermal uniformity and improving the quality of the resulting semiconductor package.

[0032] Third Embodiment: The second surface 2b of the carrier substrate is where a semiconductor device is formed via a temporary fixing layer 11, and a metal film 3 may also be formed on this second surface 2b. FIG. 5 shows an embodiment in which a metal film 3 is formed on both the first surface 2a and the second surface 2b of the substrate body 2. The metal film 3 on both surfaces is set within a range of 0.1% to 2% of the thickness t1 of the substrate body 2, and the thicknesses of the metal films 3 on the first surface 2a and the second surface 2b may be the same or different. Although not particularly limited, the thickness t2 of the metal film 3 may be 0.2% or more, or even 0.3% or more, of the thickness t1 of the substrate body 2. Furthermore, although not particularly limited, the thickness t2 may be 1.8% or less, or even 1.5% or less, of the thickness t1 of the substrate body 2. When manufacturing a semiconductor device using the carrier substrate 22 of this third embodiment, a temporary fixing layer 11 is formed on the metal film 3 on the second surface 2b. In this third embodiment, a metal film 3 may also be formed on the outer peripheral surface 2c.

[0033] Alternatively, the metal film 3 may be formed only on the second surface 2b instead of the first surface 2a. However, since the second surface 2b is the side that is peeled off in the peeling step, it is preferable to form the metal film 3 on the first surface 2a so as not to interfere with the peeling operation.

[0034] The present invention is not limited to the configurations of the above-described embodiments, and various modifications can be made without departing from the spirit of the present invention. For example, in the embodiments, the rewiring layer 12, the semiconductor chip 13, and the sealing resin 15 are formed in this order on the carrier substrate 1 (rewiring layer-first type), but the semiconductor chip 13 may be placed on the carrier substrate 1, the sealing resin 15 may be molded, and then the rewiring layer 12 may be formed (chip-first type).

[0035] The timing of peeling off the carrier substrate 1 also includes peeling off after the formation of the rewiring layer 12, the mounting of the semiconductor chip 13, and the resin sealing are all completed, as well as peeling off during these operations, for example, after molding the sealing resin in a chip-first type. For this reason, the process sequence may be such that after at least a part of the semiconductor device is formed in the semiconductor device formation process, the carrier substrate 1 is peeled off (peeling process), and then other parts of the semiconductor device are formed.

[0036] Single crystal silicon and polycrystalline silicon were used as the substrate body 2, and a metal film 3 of aluminum or copper was formed on one side thereof, and various physical properties such as breaking stress and bending modulus were measured. As a comparative reference sample, a substrate body (silicon alone) 2 without the metal film 3 was also measured. In both cases, the substrate body 2 had a width of 4.0±0.1 mm, a length of 40±0.1 mm, and a thickness of 3.0±0.1 mm. By wet etching with fluorinated nitric acid, chipping occurring at the corners of the sides between the supports 31 in FIG. 6 (two sides: the sides where bending stress acts during the breaking stress measurement described below) was suppressed to a length of 40 μm or less. The length of this chipping was measured using the measurement mode of an optical microscope. The concentration of fluorinated nitric acid used for etching was HF:HNO 3 :CH 3 The ratio of COOH was 1:2:1. The metal film 3 was formed to a thickness of 5 μm or 10 μm.

[0037] The test was performed using a precision universal testing machine (autograph). As shown in FIG. 6, the sample was placed on supports 31 spaced apart by L = 30 mm, with the metal film 3 positioned underneath, and the substrate body 2 of the sample was pressed in the thickness direction indicated by the arrow using a pressing metal fitting at the midpoint between both supports 31 to measure the stress at break (breaking stress) and determine the bending modulus.

[0038] The results are shown in Table 1. Samples No. 1 and 6 in Table 1 are comparative reference samples that do not have a metal film. Table 1 also shows the calculated percentage change (measured value of the control sample / measured value of the comparative reference sample - 1) in both breaking stress and flexural modulus relative to the comparative reference sample.

[0039]

[0040] As shown in Table 1, the fracture stress of both single-crystal and polycrystalline silicon substrates increased when a metal film was formed. Since the thickness of the substrate body was 3 mm and the film thickness was 5 μm or 10 μm, it was possible to improve strength with a film thickness of about 0.17% of the thickness of the substrate body. This increase in fracture stress is thought to be due to the ductility of aluminum or copper. Because aluminum and copper have higher ductility than silicon, when force is applied to the silicon (substrate body) with the metal film, the metal film acts as a buffer layer, improving strength against cracking.

[0041] In terms of the flexural modulus, which indicates rigidity, of the substrate bodies (samples Nos. 2, 3, 5, 7, 8, and 10) on which an aluminum metal film was formed, samples Nos. 5 and 10, which had aluminum metal films formed on both sides of the substrate body, had a higher flexural modulus than the substrate bodies made of silicon alone without a metal film (samples Nos. 1 and 6). However, among the substrate bodies on which an aluminum metal film was formed on one side, some had a higher flexural modulus (sample 3) and others had a lower flexural modulus (samples Nos. 2, 7, and 8). This indicates that even with the metal film formed, the substrate bodies warp to the same extent as regular silicon. On the other hand, the substrate bodies (samples Nos. 4 and 9) on which a copper metal film was formed had a higher flexural modulus than the substrate bodies made of silicon alone, demonstrating that warpage is suppressed.

[0042] According to the present invention, since a metal film is formed on at least the first surface of the substrate body made of silicon, it is possible to improve the strength of the carrier substrate.

[0043] REFERENCE SIGNS LIST 1 Carrier substrate 2 Substrate body 2a First surface 2b Second surface 2c Outer circumferential surface 3 Metal film 11 Temporary fixing layer 12 Rewiring layer 12a Insulating film 12b Circuit conductor 13 Semiconductor chip 14 Electrode terminal 15 Sealing resin 16 Semiconductor package (semiconductor device)

Claims

1. A carrier substrate for semiconductor device manufacturing, characterized in that a first surface and a second surface of a substrate body made of silicon are formed parallel to each other, and a metal film is formed on at least the first surface of the substrate body.

2. A carrier substrate for manufacturing semiconductor devices according to claim 1, wherein a metal film is also formed on the outer peripheral surface connecting the peripheries of said first surface and said second surface.

3. The carrier substrate for manufacturing semiconductor devices according to claim 1, wherein the metal film is made of aluminum or copper and has a thickness of 0.2% or more of the thickness of the substrate body.

4. A carrier substrate for use in manufacturing semiconductor devices according to claim 1, characterized in that the length of chipping occurring at the corners of the substrate body is 50 μm or less.

5. A semiconductor device manufacturing method comprising: a temporary fixing layer forming step of forming a temporary fixing layer on either the first surface side or the second surface side of a carrier substrate for semiconductor device manufacturing described in any one of claims 1 to 4; a semiconductor device forming step of forming at least a part of a semiconductor device on the temporary fixing layer; and a peeling step of peeling off the temporary fixing layer and the carrier substrate after the semiconductor device forming step.

6. The method for manufacturing a semiconductor device according to claim 5, wherein the metal film is formed on the first surface, and the temporary fixing layer is formed on the second surface.

Citation Information

Patent Citations

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