Semiconductor device

Abstract

This semiconductor device is provided with: a first semiconductor element having a first electrode positioned on one side in a first direction; a conductor electrically connected to the first electrode; and an intermediate layer positioned between the first semiconductor element and the conductor in the first direction. The intermediate layer is an insulator and is in contact with the first semiconductor element and the conductor. The conductor has a first surface facing in the first direction and facing the first semiconductor element. The first surface is separated from the first semiconductor element. The intermediate layer is in contact with the first surface.

Description

Semiconductor Devices

[0001] The present disclosure relates to semiconductor devices.

[0002] Conventionally, semiconductor devices equipped with semiconductor elements having a switching function have been widely known. Such semiconductor devices are mainly used for power conversion. Patent Document 1 discloses an example of such a semiconductor device.

[0003] In the semiconductor device disclosed in Patent Document 1, a semiconductor element mounted on the semiconductor device has a source electrode and a drain electrode positioned on opposite sides. An upper plate electrode is conductively bonded to the source electrode. A drain electrode pattern is conductively bonded to the drain electrode. The semiconductor element is sandwiched between the upper plate electrode and the drain electrode pattern. This configuration makes it possible to reduce the parasitic resistance of the semiconductor device while miniaturizing the semiconductor device. Generally, the source electrode is positioned inward from the periphery of the semiconductor element in a plan view. Therefore, in this semiconductor device, when the source electrode is conductively bonded to the upper plate electrode, a gap is formed between the semiconductor element and the upper plate electrode. If external factors such as moisture enter through this gap, it may cause a decrease in the dielectric strength voltage of the semiconductor device.

[0004] JP 2013-258387 A

[0005] [Summary] An object of the present disclosure is to provide an improved semiconductor device compared to conventional semiconductor devices. In particular, in view of the above circumstances, an object of the present disclosure is to provide a semiconductor device that can suppress a decrease in the device's dielectric strength voltage.

[0006] A semiconductor device according to one aspect of the present disclosure includes a first semiconductor element having a first electrode located on one side in a first direction, a conductor electrically connected to the first electrode, and an intermediate layer located between the first semiconductor element and the conductor in the first direction. The intermediate layer is an insulator and is in contact with the first semiconductor element and the conductor.

[0007] Other features and advantages of the present disclosure will become more apparent from the following detailed description taken in conjunction with the accompanying drawings.

[0008] FIG. 1 is a plan view of a semiconductor device according to a first embodiment of the present disclosure. FIG. 2 is a plan view corresponding to FIG. 1 , showing a see-through sealing resin. FIG. 3 is a plan view corresponding to FIG. 2 , showing a further see-through conductive member. FIG. 4 is a bottom view of the semiconductor device shown in FIG. 1 . FIG. 5 is a cross-sectional view taken along line V-V in FIG. 2 . FIG. 6 is a cross-sectional view taken along line VI-VI in FIG. 2 . FIG. 7 is a cross-sectional view taken along line VII-VII in FIG. 2 . FIG. 8 is a cross-sectional view taken along line VIII-VIII in FIG. 2 . FIG. 9 is a partially enlarged view of FIG. 3 , showing a second semiconductor element and its vicinity. FIG. 10 is a cross-sectional view taken along line X-X in FIG. 9 . FIG. 11 is a partially enlarged view of FIG. 3 , showing a first semiconductor element and its vicinity, and showing a further see-through first semiconductor element and bonding layer. FIG. 12 is a cross-sectional view taken along line XII-XII in FIG. 11 . FIG. 13 is a cross-sectional view taken along line XIII-XIII in FIG. 11 . FIG. 14 is a partially enlarged view of FIG. 13 . FIG. 15 is a partially enlarged plan view of a semiconductor device according to a second embodiment of the present disclosure, corresponding to FIG. 11 . FIG. 16 is a cross-sectional view taken along line XVI-XVI in FIG. 15 . FIG. 17 is a cross-sectional view taken along line XVII-XVII in FIG. 15 . FIG. 18 is a partially enlarged view of FIG. 17 . FIG. 19 is a partially enlarged cross-sectional view of a semiconductor device according to a third embodiment of the present disclosure, corresponding to FIG. 12 . FIG. 20 is a partially enlarged cross-sectional view of the semiconductor device shown in FIG. 19 , corresponding to FIG. 13 . FIG. 21 is a plan view of a semiconductor device according to a fourth embodiment of the present disclosure, seen through the encapsulating resin and the first semiconductor element. FIG. 22 is a bottom view of the semiconductor device shown in FIG. 21 . FIG. 23 is a cross-sectional view taken along line XXIII-XXIII in FIG. 21 . FIG. 24 is a cross-sectional view taken along line XXIV-XXIV in FIG. 21 . Fig. 25 is a cross-sectional view taken along line XXV-XXV in Fig. 21. Fig. 26 is a partially enlarged view of Fig. 23.

[0009] DETAILED DESCRIPTION The present disclosure will be described in detail with reference to the accompanying drawings.

[0010] First Embodiment: A semiconductor device A10 according to a first embodiment of the present disclosure will be described with reference to FIGS. 1 to 14. The semiconductor device A10 includes a first conductive layer 12, a second conductive layer 13, a plurality of first semiconductor elements 21, a plurality of second semiconductor elements 22, a plurality of conductors 31, a bonding layer 32, an intermediate layer 33, a conductive member 48, a first power terminal 41, a second power terminal 42, a third power terminal 43, and a sealing resin 60. The semiconductor device A10 also includes an insulating layer 11, a first signal wiring 14, a second signal wiring 15, a third signal wiring 16, a fourth signal wiring 17, a heat dissipation layer 18, a first signal terminal 44, a second signal terminal 45, a third signal terminal 46, and a fourth signal terminal 47. For ease of understanding, FIG. 2 shows the sealing resin 60 in a see-through manner. For ease of understanding, FIG. 3 shows the conductive member 48 in a see-through manner in comparison to FIG. 2. For ease of understanding, Fig. 11 shows the first semiconductor element 21 and the bonding layer 32 in a more transparent manner than Fig. 3. In Figs. 2 and 3, the transmitted sealing resin 60 is shown by an imaginary line (two-dot chain line). In Figs. 3 and 11, the transmitted conductive member 48 is shown by an imaginary line. In Fig. 11, the transmitted first semiconductor element 21 is shown by an imaginary line.

[0011] In the description of the semiconductor device A10, for convenience, for example, the normal direction to the first mounting surface 121 (details of which will be described later) of the first conductive layer 12 will be referred to as the "first direction z." Furthermore, for example, an example of a direction perpendicular to the first direction z will be referred to as the "second direction x." Furthermore, for example, a direction perpendicular to the first direction z and the second direction x will be referred to as the "third direction y."

[0012] The semiconductor device A10 converts DC power applied to the first power terminal 41 and the second power terminal 42 into AC power using a plurality of first semiconductor elements 21 and a plurality of second semiconductor elements 22. The converted AC power is input to a power supply target such as a motor from a third power terminal 43. The semiconductor device A10 constitutes part of a power conversion circuit such as an inverter.

[0013] As shown in FIGS. 5 and 7 , the insulating layer 11 supports the first conductive layer 12, the second conductive layer 13, the first signal wiring 14, the second signal wiring 15, the third signal wiring 16, the fourth signal wiring 17, and the heat dissipation layer 18. The elements including the insulating layer 11, the first conductive layer 12, the second conductive layer 13, the first signal wiring 14 to the fourth signal wiring 17, and the heat dissipation layer 18 are obtained from a substrate formed by, for example, active metal brazing (AMB). The insulating layer 11 is covered with a sealing resin 60. The dimension of the insulating layer 11 in the first direction z is smaller than the dimensions of the first conductive layer 12, the second conductive layer 13, and the heat dissipation layer 18 in the first direction z.

[0014] As shown in Figures 2, 3, and 8, the first conductive layer 12 is bonded to one side of the insulating layer 11 in the first direction z. The first conductive layer 12 carries a plurality of first semiconductor elements 21 and a plurality of conductors 31. When viewed in the first direction z, the first conductive layer 12 is surrounded by the periphery of the insulating layer 11. The first conductive layer 12 contains copper (Cu). The first conductive layer 12 has a first mounting surface 121 facing the first direction z. The plurality of first semiconductor elements 21 and the plurality of conductors 31 face the first mounting surface 121.

[0015] As shown in FIGS. 2 , 3 , and 7 , the second conductive layer 13 is located on the same side as the first conductive layer 12 with respect to the insulating layer 11 in the first direction z, and is bonded to the insulating layer 11. The second conductive layer 13 carries a plurality of second semiconductor elements 22. The second conductive layer 13 is spaced apart from the first conductive layer 12 in the second direction x. As viewed in the first direction z, the second conductive layer 13 is surrounded by the periphery of the insulating layer 11. The second conductive layer 13 contains copper. The second conductive layer 13 has a second mounting surface 131 that faces the same side as the first mounting surface 121 of the first conductive layer 12 in the first direction z. The plurality of second semiconductor elements 22 face the second mounting surface 131.

[0016] As shown in FIGS. 5 to 8 , the heat dissipation layer 18 is located on the opposite side of the insulating layer 11 in the first direction z from the first conductive layer 12 and the second conductive layer 13. The heat dissipation layer 18 is bonded to the insulating layer 11. The heat dissipation layer 18 is exposed from the sealing resin 60. As shown in FIG. 4 , the heat dissipation layer 18 is surrounded by the periphery of the insulating layer 11 when viewed in the first direction z. The composition of the heat dissipation layer 18 includes copper. When the semiconductor device A10 is in use, a heat sink (not shown) is bonded to the heat dissipation layer 18.

[0017] As shown in FIGS. 5 and 8 , the multiple first semiconductor elements 21 are individually and electrically connected to multiple conductors 31. All of the multiple first semiconductor elements 21 are identical elements. The multiple first semiconductor elements 21 are, for example, metal-oxide-semiconductor field-effect transistors (MOSFETs). Alternatively, the multiple first semiconductor elements 21 may be field-effect transistors including metal-insulator-semiconductor field-effect transistors (MISFETs) or bipolar transistors such as insulated gate bipolar transistors (IGBTs). In the description of the semiconductor device A10, the multiple first semiconductor elements 21 are n-channel MOSFETs with a vertical structure. The multiple first semiconductor elements 21 include a compound semiconductor substrate. The compound semiconductor substrate contains silicon carbide (SiC). The multiple first semiconductor elements 21 are arranged along the third direction y.

[0018] As shown in FIGS. 12 and 13 , the plurality of first semiconductor elements 21 have a first electrode 211 , a second electrode 212 and a first gate electrode 213 .

[0019] 12 and 13 , the first electrode 211 faces one of the plurality of conductors 31. A current corresponding to the power converted by the first semiconductor element 21 flows through the first electrode 211. In other words, the first electrode 211 corresponds to the source of the first semiconductor element 21.

[0020] 12 and 13 , the second electrode 212 is located on the opposite side of the first electrode 211 in the first direction z. A current corresponding to the power before being converted by the first semiconductor element 21 flows through the second electrode 212. In other words, the second electrode 212 corresponds to the drain of the first semiconductor element 21.

[0021] 12 and 13 , the first gate electrode 213 is located on the same side as the first electrode 211 in the first direction z. A gate voltage for driving the first semiconductor element 21 is applied to the first gate electrode 213. As shown in Fig. 11 , the area of ​​the first gate electrode 213 is smaller than the area of ​​the first electrode 211 as viewed in the first direction z. The first gate electrode 213 is separated from any of the corresponding plurality of conductors 31 as viewed in the first direction z.

[0022] 5 to 7, the multiple second semiconductor elements 22 are conductively bonded to the second mounting surface 131 of the second conductive layer 13. The multiple second semiconductor elements 22 are the same elements as the multiple first semiconductor elements 21. Therefore, the multiple second semiconductor elements 22 are n-channel MOSFETs with a vertical structure. The multiple second semiconductor elements 22 are arranged along the third direction y.

[0023] As shown in FIG. 10 , the plurality of second semiconductor elements 22 have a third electrode 221 , a fourth electrode 222 and a second gate electrode 223 .

[0024] 10 , the third electrode 221 is located on the opposite side of the second conductive layer 13 from the side facing the second mounting surface 131 in the first direction z. A current corresponding to the power converted by the second semiconductor element 22 flows through the third electrode 221. In other words, the third electrode 221 corresponds to the source of the second semiconductor element 22. Therefore, the polarity of the third electrode 221 is different from the polarity of the second electrode 212 of each of the multiple first semiconductor elements 21.

[0025] As shown in FIG. 10 , the fourth electrode 222 is located on the opposite side of the third electrode 221 in the first direction z. A current corresponding to the power before being converted by the second semiconductor element 22 flows through the fourth electrode 222. In other words, the fourth electrode 222 corresponds to the drain of the second semiconductor element 22. The fourth electrode 222 is conductively bonded to the second mounting surface 131 of the second conductive layer 13 via the conductive bonding layer 29. As a result, the fourth electrode 222 of each of the multiple second semiconductor elements 22 is electrically connected to the second conductive layer 13. The conductive bonding layer 29 is, for example, solder. Alternatively, the conductive bonding layer 29 may be a sintered body of metal particles. In this case, the metal particles include, for example, silver (Ag).

[0026] 10 , the second gate electrode 223 is located on the same side as the third electrode 221 in the first direction z. A gate voltage for driving the second semiconductor element 22 is applied to the second gate electrode 223. As shown in FIG. 9 , the area of ​​the second gate electrode 223 is smaller than the area of ​​the third electrode 221 when viewed in the first direction z.

[0027] In the semiconductor device A10, an upper arm circuit includes a plurality of first semiconductor elements 21. In addition, a lower arm circuit includes a plurality of second semiconductor elements 22. Furthermore, in the semiconductor device A10, the configuration of the plurality of first semiconductor elements 21 is equivalent to the configuration obtained when the plurality of second semiconductor elements 22 are inverted around the third direction y.

[0028] As shown in FIG. 8 , the multiple conductors 31 are conductively bonded to the first mounting surface 121 of the first conductive layer 12. The multiple conductors 31 are arranged along the third direction y. The multiple conductors 31 are located between the first mounting surface 121 and the multiple first semiconductor elements 21 in the first direction z. The first electrodes 211 of the multiple first semiconductor elements 21 are individually connected to the multiple conductors 31. The composition of the multiple conductors 31 includes copper. As shown in FIGS. 12 and 13 , the multiple conductors 31 have a first portion 311, a second portion 312, and an opening 313.

[0029] As shown in FIGS. 11 to 13 , the first portion 311 has a first surface 31A, a third surface 31C, and a peripheral surface 31D. The first surface 31A faces the first direction z and faces one of the first semiconductor elements 21. The first surface 31A is spaced apart from the first semiconductor elements 21. As viewed in the first direction z, the first surface 31A protrudes outward beyond one of the corresponding first semiconductor elements 21. The third surface 31C faces the opposite side of the first surface 31A in the first direction z. The third surface 31C is conductively bonded to the first mounting surface 121 of the first conductive layer 12 via a conductive bonding layer 29. This allows each of the multiple conductors 31 to be electrically connected to the first conductive layer 12. The peripheral surface 31D faces in a direction perpendicular to the first direction z. In the semiconductor device A10, the peripheral surface 31D includes multiple regions.

[0030] As shown in FIGS. 11 to 13 , the second portion 312 protrudes from the first surface 31A of the first portion 311. As viewed in the first direction z, the entire second portion 312 overlaps the first portion 311. The second portion 312 has a second surface 31B. The second surface 31B faces the same side as the first surface 31A of the first portion 311 in the first direction z. The first electrode 211 of each of the multiple first semiconductor elements 21 is individually conductively bonded to the second surface 31B of the second portion 312 of each of the multiple conductors 31. In the semiconductor device A10, as viewed in the first direction z, the second surface 31B is located inward from the periphery of one of the first electrodes 211 of the corresponding multiple first semiconductor elements 21.

[0031] As shown in FIGS. 12 and 13, the dimension t1 of the first portion 311 in the first direction z is larger than the dimension t2 of the second portion 312 in the first direction z.

[0032] 11 to 13 , the opening 313 penetrates each of the first portion 311 and the second portion 312 in the first direction z. The opening 313 opens from the circumferential surface 31D. When viewed in the first direction z, the first gate electrode 213 of any one of the plurality of first semiconductor elements 21 overlaps the opening 313.

[0033] As shown in FIGS. 12 and 13 , the bonding layer 32 electrically conductively bonds the second surface 31B of the second portion 312 of each of the multiple conductors 31 to the first electrode 211 of each of the multiple first semiconductor elements 21. This allows the first electrode 211 of each of the multiple first semiconductor elements 21 to be electrically connected to the first conductive layer 12 via one of the multiple conductors 31. The bonding layer 32 may be, for example, solder. Alternatively, the bonding layer 32 may be a sintered body of metal particles. In this case, the metal particles may include, for example, silver. Therefore, the composition of the bonding layer 32 can be the same as the composition of the conductive bonding layer 29. As shown in FIG. 14 , the bonding layer 32 has an end surface 321 facing in a direction perpendicular to the first direction z.

[0034] As shown in FIGS. 12 and 13 , the intermediate layers 33 are individually located between the plurality of conductors 31 and the plurality of first semiconductor elements 21 in the first direction z. The intermediate layers 33 are insulators. The intermediate layers 33 are in contact with any of the corresponding plurality of conductors 31 and the corresponding plurality of first semiconductor elements 21. The intermediate layers 33 are made of a material containing resin. The resin is, for example, photosensitive polyimide.

[0035] 12 and 13 , the intermediate layer 33 is in contact with the first surface 31A of each of the plurality of conductors 31 and the second portion 312 of each of the plurality of conductors 31. As shown in Fig. 11 , when viewed in the first direction z, the intermediate layer 33 protrudes outward from any of the corresponding plurality of first semiconductor elements 21. The intermediate layer 33 is in contact with the periphery of the first surface 31A of any of the corresponding plurality of conductors 31. The dimension of the intermediate layer 33 in the first direction z is, for example, not less than 5 µm and not more than 100 µm.

[0036] 14 , the intermediate layer 33 has a protrusion 331. The protrusion 331 protrudes in the first direction z beyond the second surface 31B of the second portion 312 of any of the corresponding plurality of conductors 31. The protrusion 331 is in contact with the end surface 321 of the bonding layer 32 and the first electrode 211 of any of the corresponding plurality of first semiconductor elements 21.

[0037] In the semiconductor device A10, the intermediate layer 33 can be formed by applying photosensitive polyimide so as to cover the first surface 31A and the second surface 31B of any of the multiple conductors 31, and then photolithographically patterning the photosensitive polyimide. Alternatively, a method may be used in which the first electrode 211 of any of the multiple first semiconductor elements 21 is conductively bonded to the second surface 31B of any of the multiple conductors 31 via a bonding layer 32, and then the intermediate layer 33 is filled in the gap in the first direction z between the conductor 31 and the first semiconductor element 21. In this case, the intermediate layer 33 is in contact with the first surface 31A of the conductor 31.

[0038] 2, 3, and 5, the first signal wiring 14 is located on the same side as the first conductive layer 12 with respect to the insulating layer 11 in the first direction z, and is bonded to the insulating layer 11. The first signal wiring 14 is located on the opposite side of the second conductive layer 13 from the first conductive layer 12 in the second direction x. The first signal wiring 14 extends in the third direction y. The first signal wiring 14 contains copper. The first signal wiring 14 is covered with a sealing resin 60.

[0039] As shown in FIGS. 2 and 3 , the first signal terminal 44 is located on the opposite side of the first conductive layer 12 from the first signal wiring 14 in the second direction x. The first signal terminal 44 is electrically connected to the first signal wiring 14. The first signal terminal 44 is a metal lead made of a material containing copper or a copper alloy. As shown in FIGS. 1 and 5 , a portion of the first signal terminal 44 is covered with the sealing resin 60. When viewed in the third direction y, the first signal terminal 44 is L-shaped. As shown in FIG. 5 , the first signal terminal 44 includes a portion that stands up in the first direction z. This portion is exposed from the sealing resin 60. A gate voltage for driving the multiple first semiconductor elements 21 is applied to the first signal terminal 44.

[0040] As shown in FIG. 3 , the semiconductor device A10 further includes a plurality of first wirings 51. As shown in FIG. 11 , the plurality of first wirings 51 are conductively bonded to the first gate electrodes 213 of the plurality of first semiconductor elements 21 and are also conductively bonded to the first signal wiring 14. As a result, the first gate electrodes 213 of the plurality of first semiconductor elements 21 are electrically connected to the first signal wiring 14. The plurality of first wirings 51 are metal leads. The composition of the plurality of first wirings 51 includes copper. As shown in FIGS. 12 and 13 , the plurality of first wirings 51 are individually conductively bonded to the first gate electrodes 213 of the plurality of first semiconductor elements 21 via conductive bonding layers 29.

[0041] 2, 3, and 5, the second signal wiring 15 is located on the same side as the second conductive layer 13 with respect to the insulating layer 11 in the first direction z, and is bonded to the insulating layer 11. The second signal wiring 15 is located on the opposite side from the first signal wiring 14 with respect to the second conductive layer 13 in the second direction x. The second signal wiring 15 extends along the third direction y. The second signal wiring 15 contains copper. The second signal wiring 15 is covered with a sealing resin 60.

[0042] As shown in FIGS. 2 and 3 , the second signal terminal 45 is located on the opposite side of the second conductive layer 13 from the second signal wiring 15 in the second direction x. The second signal terminal 45 is electrically connected to the second signal wiring 15. The second signal terminal 45 is a metal lead made of a material containing copper or a copper alloy. As shown in FIGS. 1 and 5 , a portion of the second signal terminal 45 is covered with the sealing resin 60. When viewed in the third direction y, the second signal terminal 45 is L-shaped. As shown in FIG. 5 , the second signal terminal 45 includes a portion that stands up in the first direction z. This portion is exposed from the sealing resin 60. A gate voltage for driving the multiple second semiconductor elements 22 is applied to the second signal terminal 45.

[0043] 3, the semiconductor device A10 further includes a plurality of second wirings 52. As shown in FIG. 9, the plurality of second wirings 52 are conductively bonded to the second gate electrodes 223 of the plurality of second semiconductor elements 22, and are also conductively bonded to the second signal wiring 15. As a result, the second gate electrodes 223 of the plurality of second semiconductor elements 22 are electrically connected to the second signal wiring 15. The plurality of second wirings 52 are wires. The composition of the plurality of second wirings 52 includes gold (Au). Alternatively, the composition of the plurality of second wirings 52 may include copper or aluminum (Al).

[0044] 2 , the semiconductor device A10 further includes fifth wiring 55 and sixth wiring 56. The fifth wiring 55 is conductively connected to the first signal wiring 14 and the first signal terminal 44. As a result, the first signal terminal 44 is electrically connected to the first signal wiring 14. The sixth wiring 56 is conductively connected to the second signal wiring 15 and the second signal terminal 45. As a result, the second signal terminal 45 is electrically connected to the second signal wiring 15. Each of the fifth wiring 55 and the sixth wiring 56 is a wire. The composition of each of the fifth wiring 55 and the sixth wiring 56 includes gold. Alternatively, the composition of each of the fifth wiring 55 and the sixth wiring 56 may include copper or aluminum.

[0045] 2, 3, and 5, the third signal wiring 16 is located on the same side as the first conductive layer 12 with respect to the insulating layer 11 in the first direction z, and is joined to the insulating layer 11. The third signal wiring 16 is located adjacent to the first signal wiring 14 in the second direction x. The third signal wiring 16 extends along the third direction y. The composition of the third signal wiring 16 includes copper. The third signal wiring 16 is covered with a sealing resin 60.

[0046] As shown in FIGS. 2 and 3 , the third signal terminal 46 is located on the opposite side of the third signal wiring 16 from the first conductive layer 12 in the second direction x. The third signal terminal 46 is located adjacent to the first signal terminal 44 in the third direction y. The third signal terminal 46 is electrically connected to the third signal wiring 16. The third signal terminal 46 is a metal lead made of a material containing copper or a copper alloy. As shown in FIGS. 1 and 6 , a portion of the third signal terminal 46 is covered with a sealing resin 60. The third signal terminal 46 is L-shaped when viewed in the third direction y. As shown in FIG. 6 , the third signal terminal 46 includes a portion that stands up in the first direction z. This portion is exposed from the sealing resin 60. A voltage equivalent to the voltage applied to each of the first electrodes 211 of the plurality of first semiconductor elements 21 is applied to the third signal terminal 46.

[0047] 3, the semiconductor device A10 further includes a plurality of third wirings 53. As shown in FIG. 11, the plurality of third wirings 53 are individually conductively bonded to the first surfaces 31A of the plurality of conductors 31, and are also conductively bonded to the third signal wirings 16. As a result, the first electrodes 211 of the plurality of first semiconductor elements 21 are electrically connected to the third signal wirings 16. The plurality of third wirings 53 are wires. The composition of the plurality of third wirings 53 includes gold. Alternatively, the composition of the plurality of third wirings 53 may include copper or aluminum.

[0048] 2 , 3 , and 5 , the fourth signal wiring 17 is located on the same side as the second conductive layer 13 with respect to the insulating layer 11 in the first direction z, and is joined to the insulating layer 11. The fourth signal wiring 17 is located adjacent to the second signal wiring 15 in the second direction x. The fourth signal wiring 17 extends along the third direction y. The composition of the fourth signal wiring 17 includes copper. The fourth signal wiring 17 is covered with a sealing resin 60.

[0049] As shown in FIGS. 2 and 3 , the fourth signal terminal 47 is located on the opposite side of the second conductive layer 13 from the fourth signal wiring 17 in the second direction x. The fourth signal terminal 47 is located adjacent to the second signal terminal 45 in the third direction y. The fourth signal terminal 47 is electrically connected to the fourth signal wiring 17. The fourth signal terminal 47 is a metal lead made of a material containing copper or a copper alloy. As shown in FIGS. 1 and 6 , a portion of the fourth signal terminal 47 is covered with a sealing resin 60. When viewed in the third direction y, the fourth signal terminal 47 is L-shaped. As shown in FIG. 6 , the fourth signal terminal 47 includes a portion that stands up in the first direction z. This portion is exposed from the sealing resin 60. A voltage equivalent to the voltage applied to the third electrode 221 of each of the plurality of second semiconductor elements 22 is applied to the fourth signal terminal 47.

[0050] 3, the semiconductor device A10 further includes a plurality of fourth wirings 54. As shown in FIG. 9, the plurality of fourth wirings 54 are individually conductively bonded to the third electrodes 221 of the plurality of second semiconductor elements 22, and are also conductively bonded to the fourth signal wiring 17. As a result, the third electrodes 221 of the plurality of second semiconductor elements 22 are electrically connected to the fourth signal wiring 17. The plurality of fourth wirings 54 are wires. The composition of the plurality of fourth wirings 54 includes gold. Alternatively, the composition of the plurality of fourth wirings 54 may include copper or aluminum.

[0051] 2 , the semiconductor device A10 further includes seventh wiring 57 and eighth wiring 58. The seventh wiring 57 is conductively connected to the third signal wiring 16 and the third signal terminal 46. As a result, the third signal terminal 46 is electrically connected to the third signal wiring 16. The eighth wiring 58 is conductively connected to the fourth signal wiring 17 and the fourth signal terminal 47. As a result, the fourth signal terminal 47 is electrically connected to the fourth signal wiring 17. Each of the seventh wiring 57 and the eighth wiring 58 is a wire. The composition of each of the seventh wiring 57 and the eighth wiring 58 includes gold. Alternatively, the composition of each of the seventh wiring 57 and the eighth wiring 58 may include copper or aluminum.

[0052] 5 to 8 , the conductive member 48 is located on the opposite side of the first conductive layer 12 and the second conductive layer 13 in the first direction z with respect to the plurality of first semiconductor elements 21 and the plurality of second semiconductor elements 22. The conductive member 48 is electrically connected to the second electrode 212 of each of the plurality of first semiconductor elements 21 and the third electrode 221 of each of the plurality of second semiconductor elements 22. The conductive member 48 contains copper.

[0053] 2 and 5 to 8 , the conductive member 48 has a main portion 481, a plurality of first connection portions 482, and a plurality of second connection portions 483. The main portion 481 extends in the third direction y. When viewed in the first direction z, the main portion 481 overlaps the first conductive layer 12, the second conductive layer 13, and a region of the insulating layer 11 located between the first conductive layer 12 and the second conductive layer 13.

[0054] 2 and 5 , the multiple first connection portions 482 are connected to one side of the main portion 481 in the second direction x. The multiple first connection portions 482 extend in the second direction x and are arranged along the third direction y. As shown in FIG. 8 , the multiple first connection portions 482 are individually conductively bonded to the second electrodes 212 of the multiple first semiconductor elements 21 via the conductive bonding layer 29. As a result, the second electrodes 212 of the multiple first semiconductor elements 21 are electrically connected to the conductive member 48.

[0055] As shown in FIGS. 2 and 5 , the second connection portions 483 are located on the opposite side of the main portion 481 from the first connection portions 482 in the second direction x and are connected to the main portion 481. The second connection portions 483 extend in the second direction x and are arranged along the third direction y. As viewed in the first direction z, the shape and dimensions of each of the second connection portions 483 are equal to the shape and dimensions of each of the first connection portions 482. As shown in FIG. 7 , the second connection portions 483 are conductively bonded to the third electrodes 221 of the second semiconductor elements 22 via the conductive bonding layer 29. As a result, the third electrodes 221 of the second semiconductor elements 22 are electrically connected to the conductive member 48.

[0056] As shown in FIGS. 1 to 3 , the first power terminal 41 is located on one side of the insulating layer 11 in the third direction y. As shown in FIG. 8 , the first power terminal 41 is conductively bonded to the first conductive layer 12. This allows the first power terminal 41 to be electrically connected to the first electrodes 211 of the multiple first semiconductor elements 21 via the first conductive layer 12 and the multiple conductors 31. The first power terminal 41 is a metal plate made of a material containing copper or a copper alloy. A portion of the first power terminal 41 is covered with a sealing resin 60. The first power terminal 41 has a first mounting hole 411 penetrating in the first direction z. The first mounting hole 411 is located away from the sealing resin 60. The first power terminal 41 is an N-terminal (negative electrode) to which a DC power supply voltage to be converted is applied.

[0057] As shown in FIGS. 1 to 3 , the second power terminal 42 is located on the same side as the first power terminal 41 in the third direction y, with the insulating layer 11 as the reference. The second power terminal 42 is located away from the first power terminal 41 in the second direction x. As shown in FIG. 7 , the second power terminal 42 is conductively joined to the second conductive layer 13. This allows the second power terminal 42 to be electrically connected to the fourth electrodes 222 of the multiple second semiconductor elements 22 via the second conductive layer 13. The second power terminal 42 is a metal plate made of a material containing copper or a copper alloy. A portion of the second power terminal 42 is covered with a sealing resin 60. The second power terminal 42 has a second mounting hole 421 penetrating in the first direction z. The second mounting hole 421 is located away from the sealing resin 60. The second power terminal 42 is a P terminal (positive electrode) to which a DC power supply voltage to be converted is applied.

[0058] As shown in FIGS. 1 and 2 , the third power terminal 43 is located on the opposite side of the insulating layer 11 in the third direction y from the first power terminal 41 and the second power terminal 42. As shown in FIG. 7 , the third power terminal 43 is conductively joined to the main portion 481 of the conductive member 48. This allows the third power terminal 43 to be electrically connected to the second electrodes 212 of the multiple first semiconductor elements 21 and the third electrodes 221 of the multiple second semiconductor elements 22. The third power terminal 43 is a metal plate made of a material containing copper or a copper alloy. A portion of the third power terminal 43 is covered with a sealing resin 60. The third power terminal 43 has a third mounting hole 431 penetrating in the first direction z. The third mounting hole 431 is located away from the sealing resin 60. AC power converted by the multiple first semiconductor elements 21 and the multiple second semiconductor elements 22 is output from the third power terminal 43.

[0059] As shown in FIGS. 1 and 5 to 8 , the sealing resin 60 covers the first conductive layer 12, the second conductive layer 13, the plurality of first semiconductor elements 21, the plurality of second semiconductor elements 22, the plurality of conductors 31, and the conductive member 48. The sealing resin 60 also covers a portion of each of the heat dissipation layer 18, the first power terminal 41, the second power terminal 42, the third power terminal 43, the first signal terminal 44, the second signal terminal 45, the third signal terminal 46, and the fourth signal terminal 47. The sealing resin 60 has electrical insulation properties. The sealing resin 60 is made of a material containing, for example, black epoxy resin. A portion of the sealing resin 60 is sandwiched between the insulating layer 11 and the main portion 481 of the conductive member 48 in the first direction z.

[0060] 1, 4, and 5 to 8, the sealing resin 60 has a top surface 61, a bottom surface 62, two first side surfaces 63, and two second side surfaces 64. The top surface 61 faces the same side as the first mounting surface 121 of the first conductive layer 12 in the first direction z. The bottom surface 62 faces the opposite side to the top surface 61 in the first direction z. The heat dissipation layer 18 is exposed from the bottom surface 62.

[0061] 1 and 4 to 6 , the two first side surfaces 63 are spaced apart from each other in the second direction x and are connected to the top surface 61 and the bottom surface 62. The first signal terminal 44 and the third signal terminal 46 are exposed from one of the two first side surfaces 63. The second signal terminal 45 and the fourth signal terminal 47 are exposed from the other of the two first side surfaces 63.

[0062] 1 , 4 , 7 , and 8 , the two second side surfaces 64 are spaced apart from each other in the third direction y and are connected to the top surface 61 and the bottom surface 62. The first power terminal 41 and the second power terminal 42 are exposed from one of the two second side surfaces 64. The third power terminal 43 is exposed from the other of the two second side surfaces 64.

[0063] Next, the effects of the semiconductor device A10 will be described.

[0064] The semiconductor device A10 includes a first semiconductor element 21 having a first electrode 211 located on one side in the first direction z, a conductor 31 electrically connected to the first electrode 211, and an intermediate layer 33 located between the first semiconductor element 21 and the conductor 31 in the first direction z. The intermediate layer 33 is an insulator and is in contact with the first semiconductor element 21 and the conductor 31. With this configuration, the gap between the first semiconductor element 21 and the conductor 31 in the first direction z is filled with the intermediate layer 33. This prevents external factors (such as moisture and dust) from penetrating the gap. Therefore, with this configuration, the semiconductor device A10 can suppress a decrease in the dielectric strength voltage of the semiconductor device A10.

[0065] As viewed in the first direction z, the first surface 31A of the conductor 31 and the intermediate layer 33 protrude outward beyond the first semiconductor element 21. The intermediate layer 33 is in contact with the periphery of the first surface 31A. With this configuration, as viewed in the first direction z, the intermediate layer 33 includes a portion that is located outward beyond the gap in the first direction z between the first semiconductor element 21 and the conductor 31. This makes it possible to effectively prevent external factors from entering the gap.

[0066] The semiconductor device A10 further includes a bonding layer 32 that conductively bonds the first electrode 211 of the first semiconductor element 21 to the conductor 31. The intermediate layer 33 is in contact with the bonding layer 32. This configuration can suppress leakage current from the first electrode 211.

[0067] The conductor 31 has a first portion 311 including the first surface 31A and a second portion 312 protruding from the first surface 31A. When viewed in the first direction z, the entire second portion 312 overlaps the first portion 311. The first electrode 211 of the first semiconductor element 21 is conductively joined to the second portion 312. With this configuration, heat conducted from the first electrode 211 to the conductor 31 is more likely to diffuse in a direction perpendicular to the first direction z. This reduces the thermal resistance of the conductor 31.

[0068] The dimension t1 of the first portion 311 in the first direction z is larger than the dimension t2 of the second portion 312 in the first direction z. This makes the degree of heat diffusion in the direction perpendicular to the first direction z greater in the first portion 311 than in the second portion 312. This makes it possible to effectively reduce the thermal resistance of the conductor 31.

[0069] The conductor 31 has an opening 313 penetrating in the first direction z. As viewed in the first direction z, the first gate electrode 213 of the first semiconductor element 21 overlaps the opening 313. This configuration more reliably prevents a short circuit between the conductor 31 and the first gate electrode 213. In this case, the opening 313 penetrating the second portion 312 in the first direction z ensures a larger bonding area between the second portion 312 and the first electrode 211 of the first semiconductor element 21. Furthermore, the opening 313 opens from the peripheral surface 31D of the conductor 31. This configuration more reliably prevents a short circuit between the conductor 31 and the first wiring 51 when the first wiring 51 is conductively bonded to the first gate electrode 213.

[0070] The second portion 312 of the conductor 31 has a second surface 31B to which the first electrode 211 of the first semiconductor element 21 is conductively bonded. The intermediate layer 33 has a convex portion 331 that protrudes in the first direction z beyond the second surface 31B. The convex portion 331 is in contact with the bonding layer 32. With this configuration, when the first electrode 211 is conductively bonded to the second surface 31B via the bonding layer 32, the intermediate layer 33 can prevent the molten bonding layer 32 from leaking from the second surface 31B.

[0071] The semiconductor device A10 further includes an insulating layer 11, a first conductive layer 12, a second conductive layer 13, a heat dissipation layer 18, a second semiconductor element 22, a conductive member 48, and a sealing resin 60. The conductive member 48 is conductively bonded to a second electrode 212 of the first semiconductor element 21 and a third electrode 221 of the second semiconductor element 22. The polarity of the first electrode 211 of the first semiconductor element 21 is opposite to the polarity of the fourth electrode 222 of the second semiconductor element 22. When viewed in the first direction z, the conductive member 48 overlaps a portion of the insulating layer 11 sandwiched between the first conductive layer 12 and the second conductive layer 13. Here, in the semiconductor device A10, a parasitic capacitance is formed in which the conductive member 48 and the heat dissipation layer 18 serve as conductor layers and the insulating layer 11 and the sealing resin 60 serve as dielectric layers. Therefore, by adopting this configuration, a longer distance can be secured between the conductive member 48 and the heat dissipation layer 18 in the first direction z, thereby making it possible to further reduce the electrostatic capacitance of the parasitic capacitance, which in turn suppresses the generation of leakage current in the semiconductor device A10 due to the parasitic capacitance, thereby making it possible to reduce noise generated in the semiconductor device A10.

[0072] Second Embodiment: A semiconductor device A20 according to a second embodiment of the present disclosure will be described with reference to Figures 15 to 18. In these figures, elements that are the same as or similar to those in the semiconductor device A10 described above are designated by the same reference numerals, and duplicated descriptions will be omitted. Here, Figure 15 corresponds to Figure 11, which shows the semiconductor device A10. In Figure 15, the transparent conductive member 48 and first semiconductor element 21 are each shown by imaginary lines.

[0073] In the semiconductor device A20, the configurations of the plurality of conductors 31 and the intermediate layer 33 are different from those of the semiconductor device A10.

[0074] As shown in Figures 15 to 17, when viewed in the first direction z, the second surface 31B of the second portion 312 of any of the multiple conductors 31 extends outward beyond the periphery of the first electrode 211 of any of the corresponding multiple first semiconductor elements 21.

[0075] As shown in FIG. 18 , the convex portion 331 of the intermediate layer 33 contacts the second surface 31B of the second portion 312 of one of the corresponding plurality of electrical conductors 31 .

[0076] Next, the effects of the semiconductor device A20 will be described.

[0077] The semiconductor device A20 includes a first semiconductor element 21 having a first electrode 211 located on one side in the first direction z, a conductor 31 electrically connected to the first electrode 211, and an intermediate layer 33 located between the first semiconductor element 21 and the conductor 31 in the first direction z. The intermediate layer 33 is an insulator and is in contact with the first semiconductor element 21 and the conductor 31. Therefore, with this configuration, the semiconductor device A20 can also suppress a decrease in the dielectric strength voltage of the semiconductor device A20. Furthermore, by having a configuration common to the semiconductor device A10, the semiconductor device A20 achieves the same effects as the semiconductor device A10.

[0078] In the semiconductor device A20, the convex portion 331 of the intermediate layer 33 contacts the first electrode 211 of the first semiconductor element 21 and the second surface 31B of the second portion 312 of the conductor 31. With this configuration, the intermediate layer 33 further suppresses both the intrusion of external factors into the gap in the first direction z between the first semiconductor element 21 and the conductor 31 and the generation of leakage current from the first electrode 211. This makes it possible to more effectively suppress a decrease in the dielectric strength voltage of the semiconductor device A20.

[0079] Third Embodiment: A semiconductor device A30 according to a third embodiment of the present disclosure will be described with reference to Figures 19 and 20. In these figures, elements that are the same as or similar to those in the semiconductor device A10 described above are designated by the same reference numerals, and duplicated descriptions will be omitted. Here, Figure 19 corresponds to Figure 12, which shows the semiconductor device A10. Figure 20 corresponds to Figure 13, which shows the semiconductor device A10.

[0080] In the semiconductor device A30, the configurations of the plurality of first semiconductor elements 21 and the plurality of conductors 31 are different from those of the semiconductor device A10.

[0081] 19 and 20 , each of the plurality of conductors 31 does not have a first portion 311 or a second portion 312. Each of the plurality of conductors 31 has a first surface 31A, a third surface 31C, a peripheral surface 31D, and an opening 313.

[0082] 19 and 20 , the dimension in the first direction z of the first electrode 211 of each of the multiple first semiconductor elements 21 is larger than the dimension in the first direction z of each of the multiple first electrodes 211 of the multiple first semiconductor elements 21 included in the semiconductor device A10. The first electrode 211 of each of the multiple first semiconductor elements 21 is conductively bonded to the first surface 31A of one of the corresponding multiple conductors 31 via the bonding layer 32.

[0083] Next, the effects of the semiconductor device A30 will be described.

[0084] The semiconductor device A30 includes a first semiconductor element 21 having a first electrode 211 located on one side in the first direction z, a conductor 31 electrically connected to the first electrode 211, and an intermediate layer 33 located between the first semiconductor element 21 and the conductor 31 in the first direction z. The intermediate layer 33 is an insulator and is in contact with the first semiconductor element 21 and the conductor 31. Therefore, with this configuration, the semiconductor device A30 can also suppress a decrease in the dielectric strength voltage of the semiconductor device A30. Furthermore, by having a configuration common to the semiconductor device A10, the semiconductor device A30 achieves the same effects as the semiconductor device A10.

[0085] Fourth Embodiment: Next, a semiconductor device A40 according to a fourth embodiment of the present disclosure will be described with reference to FIGS. 21 to 26. In these figures, elements that are the same as or similar to those in the semiconductor device A10 described above are given the same reference numerals, and redundant description will be omitted. For ease of understanding, FIG. 21 shows the sealing resin 60 and the first semiconductor element 21 in a see-through view. In FIG. 21, the see-through sealing resin 60 and the first semiconductor element 21 are each shown by imaginary lines.

[0086] The semiconductor device A40 is surface-mounted on a wiring substrate that constitutes, for example, an inverter circuit. The semiconductor device A40 includes a first semiconductor element 21, a conductor 31, a bonding layer 32, an intermediate layer 33, a sealing resin 60, a first pad 71, a second pad 72, rewiring 73, and a covering layer 74. Some of the components of the semiconductor device A40 correspond to any one of the multiple first semiconductor elements 21 included in the semiconductor device A10, any one of the multiple conductors 31 electrically connected thereto, and the corresponding bonding layer 32 and intermediate layer 33. Therefore, in the semiconductor device A10, multiple semiconductor devices A40 can be conductively bonded to the first conductive layer 12 instead of the multiple first semiconductor elements 21, the multiple conductors 31, the bonding layer 32, and the intermediate layer 33.

[0087] 23 and 25 , similar to the semiconductor device A10, the conductor 31 has a first portion 311, a second portion 312, and an opening 313. The first electrode 211 of the first semiconductor element 21 is conductively bonded to the second surface 31B of the second portion 312 via the bonding layer 32.

[0088] The configuration of the conductor 31 is the same as the configuration of each of the plurality of conductors 31 included in the semiconductor device A10. Alternatively, the configuration of the conductor 31 can selectively adopt the configuration of each of the plurality of conductors 31 included in the semiconductor device A20 or the configuration of each of the plurality of conductors 31 included in the semiconductor device A30.

[0089] 22 , the third surface 31C of the first portion 311 of the conductor 31 is exposed from the bottom surface 62 of the sealing resin 60. As shown in FIGS. 23 and 25 , the second electrode 212 of the first semiconductor element 21 is exposed from the top surface 61 of the sealing resin 60.

[0090] As shown in FIGS. 23 to 25, the intermediate layer 33 is in contact with the sealing resin 60 .

[0091] 23 and 24 , the first pad 71 and the second pad 72 are located on the same side as the second electrode 212 of the first semiconductor element 21 in the first direction z, with the first semiconductor element 21 as the reference. The second pad 72 is spaced apart from the first pad 71 in the third direction y. Each of the first pad 71 and the second pad 72 is exposed from the top surface 61 of the sealing resin 60.

[0092] 23 to 25 , at least a portion of the rewiring 73 is covered with the sealing resin 60. The rewiring 73 includes a first rewiring 731 and a second rewiring 732. The first rewiring 731 is electrically connected to the first pad 71 and the first gate electrode 213 of the first semiconductor element 21. As a result, the first pad 71 is electrically connected to the first gate electrode 213. The second rewiring 732 is electrically connected to the second pad 72 and the first portion 311 of the conductor 31. As a result, the second pad 72 is electrically connected to the first electrode 211 of the first semiconductor element 21 via the conductor 31.

[0093] The rewiring 73 includes a section extending in the first direction z and a section extending in the second direction x. In the first rewiring 731, the section extending in the first direction z that is connected to the first gate electrode 213 of the first semiconductor element 21 is accommodated in the opening 313 of the conductor 31.

[0094] 26 , the rewiring 73 includes an underlayer 73A and a main layer 73B. The sealing resin 60 includes an additive containing a metal element. The underlayer 73A is composed of the metal element contained in the additive. The underlayer 73A is in contact with the sealing resin 60. The main layer 73B covers the underlayer 73A. The main layer 73B contains copper. The rewiring 73 can be formed, for example, by the laser direct structuring (LDS) method disclosed in U.S. Patent Application Publication No. 2010 / 0019370.

[0095] The covering layer 74 covers the first rewiring 731 of the rewiring 73 that is exposed from the sealing resin 60. The covering layer 74 has electrical insulation properties. The covering layer 74 is in contact with the bottom surface 62 of the sealing resin 60 and the first rewiring 731. The covering layer 74 is, for example, a solder resist.

[0096] Next, the effects of the semiconductor device A40 will be described.

[0097] The semiconductor device A40 includes a first semiconductor element 21 having a first electrode 211 located on one side in the first direction z, a conductor 31 electrically connected to the first electrode 211, and an intermediate layer 33 located between the first semiconductor element 21 and the conductor 31 in the first direction z. The intermediate layer 33 is an insulator and is in contact with the first semiconductor element 21 and the conductor 31. Therefore, with this configuration, the semiconductor device A40 can also suppress a decrease in the dielectric strength voltage of the semiconductor device A40. Furthermore, by having a configuration common to the semiconductor device A10, the semiconductor device A40 achieves the same effects as the semiconductor device A10.

[0098] The semiconductor device A40 further includes a first pad 71 electrically connected to the first gate electrode 213 of the first semiconductor element 21, and a sealing resin 60. The first pad 71, together with the second electrode 212 of the first semiconductor element 21, is exposed from the top surface 61 of the sealing resin 60. By adopting this configuration, in the semiconductor device A10, when the semiconductor device A40 is conductively bonded to the first conductive layer 12, the first pad 71 is located on the same side as the second electrode 212 of the first semiconductor element 21 in the first direction z, with the first semiconductor element 21 as the reference. This makes it easier to conductively bond a wire or the like to the first pad 71 and the first signal wiring 14.

[0099] The present disclosure is not limited to the above-described embodiment, and the specific configuration of each part of the present disclosure can be freely modified in various ways.

[0100] The present disclosure includes embodiments described in the following supplementary notes. Supplementary note 1. A semiconductor device (A10) comprising: a first semiconductor element (21) having a first electrode (211) located on one side in a first direction (z); a conductor (31) electrically connected to the first electrode; and an intermediate layer (33) located between the first semiconductor element and the conductor in the first direction, wherein the intermediate layer is an insulator and is in contact with the first semiconductor element and the conductor. Supplementary note 2. The semiconductor device (A10) according to Supplementary note 1, wherein the conductor (31) has a first surface (31A) facing the first direction (z) and facing the first semiconductor element (21), the first surface being spaced apart from the first semiconductor element, and the intermediate layer (33) is in contact with the first surface. Supplementary note 3. The semiconductor device (A10) according to Supplementary Note 2, wherein the first surface (31A) protrudes outward beyond the first semiconductor element (21) when viewed in the first direction (z). Supplementary Note 4. The semiconductor device (A10) according to Supplementary Note 3, wherein the intermediate layer (33) protrudes outward beyond the first semiconductor element (21) when viewed in the first direction (z). Supplementary Note 5. The semiconductor device (A10) according to Supplementary Note 4, wherein the intermediate layer (33) is in contact with the periphery of the first surface (31A). Supplementary Note 6. The semiconductor device (A10) according to Supplementary Note 4, further comprising a bonding layer (32) that conductively bonds the first electrode (211) and the conductor (31), and wherein the intermediate layer (33) is in contact with the bonding layer. Supplementary Note 7. The semiconductor device (A10) according to Supplementary Note 6, wherein the first semiconductor element (21) has a second electrode (212) located on the opposite side of the first electrode (211) in the first direction (z) and a first gate electrode (213) located on the same side as the first electrode in the first direction, and the first gate electrode is spaced apart from the conductor (31) as viewed in the first direction.Supplementary Note 8. The semiconductor device (A10) according to Supplementary Note 7, wherein the conductor (31) has a first portion (311) including the first surface (31A) and a second portion (312) protruding from the first surface (31A), and the entire second portion overlaps the first portion as viewed in the first direction (z), and the first electrode (211) is conductively joined to the second portion.Appendix 9. The semiconductor device (A10) according to Appendix 8, wherein the intermediate layer (33) is in contact with the second portion (312). Appendix 10. The semiconductor device (A10) according to Appendix 9, wherein the second portion (312) has a second surface (31B) facing the same side as the first surface (31A) in the first direction (z), the first electrode (211) is conductively bonded to the second surface, the intermediate layer (33) has a convex portion (331) protruding in the first direction beyond the second surface, and the convex portion is in contact with the bonding layer (32). Appendix 11. The semiconductor device (A10) according to Appendix 10, wherein the convex portion (331) is in contact with the first electrode (211). Appendix 12. The semiconductor device (A20) according to Appendix 10, wherein the convex portion (331) is in contact with the second surface. Appendix 13. The semiconductor device (A10) according to Supplementary Note 10, wherein the conductor (31) has an opening (313) penetrating the first portion (311) in the first direction (z), and the first gate electrode (213) overlaps the opening as viewed in the first direction. Supplementary Note 14. The semiconductor device (A10) according to Supplementary Note 13, wherein the first portion (311) has a peripheral surface (31D) facing a direction perpendicular to the first direction (z), and the opening (313) opens from the peripheral surface. Supplementary Note 15. The semiconductor device (A10) according to Supplementary Note 13, wherein the opening (313) penetrates the second portion (312) in the first direction (z). Supplementary Note 16. The semiconductor device (A10) according to any of Supplements 7 to 15, further comprising a first conductive layer (12) located on the opposite side of the conductor (31) from the first semiconductor element (21), and the conductor is conductively bonded to the first conductive layer. Supplementary Note 17. The semiconductor device (A10) according to Supplementary Note 16, further comprising: a second conductive layer (13); and a second semiconductor element (22) having a third electrode (221) and a fourth electrode (222) positioned opposite each other in the first direction (z), wherein the polarity of the second electrode (212) and the polarity of the third electrode are different from each other, the third electrode is electrically connected to the second electrode, and the fourth electrode is electrically connected to the second conductive layer.Appendix 18. The semiconductor device (A40) according to Appendix 7, further comprising a sealing resin (60) covering a portion of each of the first semiconductor element (21) and the conductor (31), the sealing resin having a top surface (61) and a bottom surface (62) facing opposite each other in the first direction (z), the second electrode (212) being exposed from the top surface, and the conductor being exposed from the bottom surface. Appendix 19. The semiconductor device (A40) according to Appendix 18, wherein the intermediate layer (33) is in contact with the sealing resin (60). Appendix 20. The semiconductor device (A40) according to Appendix 19, further comprising a first pad (71) and a first rewiring (731) electrically connected to each of the first gate electrode (213) and the first pad, the first pad being exposed from the top surface (61), and the first rewiring being covered with the sealing resin (60). Appendix 21. The semiconductor device (A10) according to Appendix 6, wherein the intermediate layer (33) is made of a material containing photosensitive polyimide. Appendix 22. The semiconductor device (A10) according to Appendix 8, wherein the dimension of the first portion (311) in the first direction (z) is larger than the dimension of the second portion (312) in the first direction. Appendix 23. The semiconductor device (A10) according to Appendix 17, wherein the second semiconductor element (22) has a second gate electrode (223) located on the same side as the third electrode (221) in the first direction (z). Appendix 24. The semiconductor device according to Appendix 23, further comprising a conductive member (48) conductively bonded to each of the second electrode (212) and the third electrode (221). Appendix 25. The semiconductor device (A10) according to Appendix 24, further comprising an insulating layer (11) located on the opposite side of the first semiconductor element (21) and the second semiconductor element (22) with respect to the first conductive layer (12) and the second conductive layer (13), the first conductive layer and the second conductive layer being bonded to the insulating layer. Appendix 26. The semiconductor device (A10) according to Appendix 25, further comprising a sealing resin covering the first semiconductor element (21) and the second semiconductor element (22).Appendix 27. The semiconductor device (A10) according to Appendix 26, further comprising a heat dissipation layer (14) located on the opposite side of the insulating layer (11) from the first conductive layer (12) and the second conductive layer (13), the heat dissipation layer being exposed from the sealing resin (60). Appendix 28. The semiconductor device (A40) according to Appendix 19, further comprising a second pad (72) and a second rewiring (732) electrically connected to each of the conductor (31) and the second pad, the second pad being exposed from the top surface (61), and the second rewiring being covered with the sealing resin (60).

[0101] A10 to A40: semiconductor device 11: insulating layer 12: first conductive layer 121: first mounting surface 13: second conductive layer 131: second mounting surface 14 to 17: first signal wiring to fourth signal wiring 18: heat dissipation layer 21: first semiconductor element 211, 212: first electrode, second electrode 213: first gate electrode 22: second semiconductor element 221, 222: third electrode, fourth electrode 223: second gate electrode 29: conductive bonding layer 31: conductor 31A, 31B, 31C: first surface, second surface, third surface 31D: peripheral surface 311, 312: first portion, second portion 313: opening 32: bonding layer 321: end surface 33: intermediate layer 331: convex portion 41: first power terminal 411: first mounting hole 42: Second power terminal 421: Second mounting hole 43: Third power terminal 431: Third mounting hole 44-47: First to fourth signal terminals 48: Conductive member 481: Main portion 482, 483: First connection portion, second connection portion 51-58: First to eighth wiring 60: Sealing resin 61: Top surface 62: Bottom surface 63, 64: First side surface, second side surface 71, 72: First pad, second pad 73: Rewiring 73A: Underlayer 73B: Main body layer 731, 732: First rewiring, second rewiring 74: Covering layer z, x, y: First direction, second direction, third direction

Claims

1. A semiconductor device comprising: a first semiconductor element having a first electrode located on one side in a first direction; a conductor electrically connected to the first electrode; and an intermediate layer located between the first semiconductor element and the conductor in the first direction, wherein the intermediate layer is an insulator and is in contact with the first semiconductor element and the conductor.

2. The semiconductor device according to claim 1, wherein the conductor has a first surface facing the first direction and facing the first semiconductor element, the first surface being spaced apart from the first semiconductor element, and the intermediate layer being in contact with the first surface.

3. The semiconductor device according to claim 2, wherein the first surface protrudes outward beyond the first semiconductor element when viewed in the first direction.

4. The semiconductor device according to claim 3, wherein the intermediate layer protrudes outward beyond the first semiconductor element when viewed in the first direction.

5. The semiconductor device according to claim 4, wherein said intermediate layer is in contact with the periphery of said first surface.

6. The semiconductor device according to claim 4, further comprising a bonding layer that electrically connects the first electrode and the conductor, and the intermediate layer is in contact with the bonding layer.

7. The semiconductor device described in claim 6, wherein the first semiconductor element has a second electrode located on the opposite side of the first electrode in the first direction, and a first gate electrode located on the same side as the first electrode in the first direction, and the first gate electrode is spaced apart from the conductor when viewed in the first direction.

8. The semiconductor device described in claim 7, wherein the conductor has a first portion including the first surface and a second portion protruding from the first surface, the entire second portion overlaps the first portion when viewed in the first direction, and the first electrode is conductively joined to the second portion.

9. The semiconductor device according to claim 8, wherein the intermediate layer is in contact with the second portion.

10. The semiconductor device described in claim 9, wherein the second portion has a second surface facing the same side as the first surface in the first direction, the first electrode is conductively bonded to the second surface, the intermediate layer has a convex portion that protrudes in the first direction beyond the second surface, and the convex portion is in contact with the bonding layer.

11. The semiconductor device according to claim 10, wherein the protrusion is in contact with the first electrode.

12. The semiconductor device according to claim 10, wherein the protrusion is in contact with the second surface.

13. The semiconductor device according to claim 10, wherein the conductor has an opening that penetrates the first portion in the first direction, and the first gate electrode overlaps the opening when viewed in the first direction.

14. The semiconductor device according to claim 13, wherein the first portion has a peripheral surface facing in a direction perpendicular to the first direction, and the opening opens from the peripheral surface.

15. The semiconductor device according to claim 13, wherein the opening penetrates the second portion in the first direction.

16. A semiconductor device according to any one of claims 7 to 15, further comprising a first conductive layer located on the opposite side of the conductor from the first semiconductor element, and the conductor is conductively joined to the first conductive layer.

17. The semiconductor device described in claim 16, further comprising: a second conductive layer; and a second semiconductor element having a third electrode and a fourth electrode positioned opposite each other in the first direction, wherein the polarity of the second electrode and the polarity of the third electrode are different from each other, the third electrode is electrically connected to the second electrode, and the fourth electrode is electrically connected to the second conductive layer.

18. The semiconductor device described in claim 7, further comprising a sealing resin covering a portion of each of the first semiconductor element and the conductor, the sealing resin having a top surface and a bottom surface facing opposite each other in the first direction, the second electrode being exposed from the top surface, and the conductor being exposed from the bottom surface.

19. The semiconductor device according to claim 18, wherein the intermediate layer is in contact with the sealing resin.

20. The semiconductor device according to claim 19, further comprising a first pad and a first rewiring electrically connected to each of the first gate electrode and the first pad, wherein the first pad is exposed from the top surface, and the first rewiring is covered with the sealing resin.

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