Power conversion device

Abstract

A power conversion device (2) comprises: a power conversion circuit (100A) for executing AC / DC power conversion between AC circuits (20, 3) of a power grid (1) and a DC circuit (9); a braking chopper (10); and a control circuit (30) for the braking chopper (10). The braking chopper (10) includes a series circuit of a switch (11) and an energy absorber (12) and is configured to consume the energy of the connection destination of the braking chopper (10) through energization of the energy absorber (12) during the ON period of the switch (11). The control circuit (30) variably controls the duty ratio during the ON period of the switch (11) in accordance with a power consumption command value based on the inflow power to the power conversion circuit (100A) and / or the outflow power from the power conversion circuit during a braking chopper (10) operation period corresponding to the occurrence of a disturbance in the power grid (1).

Description

Power Conversion Device

[0001] The present disclosure relates to a power conversion device.

[0002] In recent years, there has been an increase in use cases in which electricity generated at offshore wind power plants is transmitted using high-voltage direct current (HVDC) systems that include DC transmission lines between offshore and onshore AC / DC converter stations (converters).

[0003] In such an HVDC system, if an AC system fault such as a ground fault or short circuit occurs near an onshore AC / DC converter station, it will be impossible to send all of the power generated by the offshore wind farm to the onshore AC power system. This will cause a voltage rise due to the surplus energy generated, raising concerns that the AC / DC converter may be unable to continue operating due to overvoltage protection.

[0004] To deal with such excess energy, International Publication No. 2021 / 261041 (Patent Document 1) describes protective control using a braking chopper configured with a series circuit of a switch and a resistor. Patent Document 1 describes protective control that, when an accident occurs and the DC voltage (Vdc) connected to the braking chopper rises, turns on the braking chopper (turns on the switch) to consume excess power, thereby suppressing the rise in DC voltage.

[0005] International Publication No. 2021 / 261041

[0006] However, the protection control described in Patent Document 1 activates a braking chopper in response to the detection of an increase in DC voltage, and maintains the braking chopper in operation until the temperature of the braking chopper reaches an upper limit. Therefore, in a minor system fault, the braking chopper may consume excessive energy, causing the DC voltage to drop too much, which may affect the operation of the AC-DC converter, such as causing hunting. As such, there is room for improvement in the protection control of power systems using braking choppers.

[0007] The present disclosure has been made to solve such problems, and the purpose of the present disclosure is to improve the protection control using a braking chopper provided in a power conversion device arranged in a power system such as an HVDC system.

[0008] According to one aspect of the present disclosure, there is provided a power conversion device. The power conversion device is connected between an AC circuit and a DC circuit of an electric power system. The power conversion device includes a power conversion circuit, a braking chopper, and a first control circuit that controls operation of the braking chopper. The power conversion circuit performs AC-DC power conversion between the AC circuit and the DC circuit. The braking chopper is connected to the AC circuit, the DC circuit, or an interior of the power conversion circuit. The braking chopper includes a series circuit of a switch and an energy absorber, and is configured to consume energy from a destination connected to the braking chopper by energizing the energy absorber during an on-period of the switch. The first control circuit variably controls a duty ratio of an on-period with respect to a switching period of the switch during an operation period of the braking chopper in response to a disturbance occurring in the electric power system, in accordance with a power consumption command value based on at least one of power flowing from one of the AC circuit and the DC circuit to the power conversion circuit and power flowing from the power conversion circuit to the other of the AC circuit and the DC circuit.

[0009] According to the present disclosure, the power consumption by the braking chopper can be variably controlled in accordance with the difference between the inflow and outflow power in the power conversion circuit, thereby preventing the braking chopper from consuming too much energy due to a minor system accident or the like, which would result in an excessive drop in the DC voltage, and by suppressing voltage increases within the DC circuit or power conversion circuit, protection control can be enhanced.

[0010] 1 is a schematic diagram illustrating an example of the configuration of an HVDC system, which is an example of a power system in which a power conversion apparatus according to this embodiment is arranged. FIG. 1 is a block diagram illustrating an example of the hardware configuration of a chopper control circuit and an MMC control circuit shown in FIG. 1. FIG. 1 is a functional block diagram illustrating a control configuration of a braking chopper according to embodiment 1. FIG. 2 is a logic circuit diagram for explaining details of the activation / shutdown control circuit shown in FIG. 3. FIG. 3 is a signal waveform diagram for explaining an example of an operation of starting the activation / shutdown control circuit shown in FIG. 4. FIG. 4 is a flowchart for explaining an overview of protection control by a braking chopper in a power conversion apparatus according to this embodiment. FIG. 5 is a conceptual waveform diagram for explaining a first example of operation of protection control by a braking chopper in a power conversion apparatus according to this embodiment. FIG. 6 is a conceptual waveform diagram for explaining a second example of operation of protection control by a braking chopper in a power conversion apparatus according to embodiment 2. FIG. 7 is a circuit diagram for explaining an example of the configuration of a converter cell shown in FIG. 9. FIG. 8 is a block diagram for explaining an example of an MMC control configuration in a power conversion apparatus according to embodiment 2. FIG. 9 is a block diagram for explaining an example of the configuration of a total voltage control unit shown in FIG. 11. FIG. 12 is a waveform diagram for explaining an example of setting of control gains shown in FIG. Fig. 15A is a conceptual waveform diagram illustrating an example of an operational delay of the braking chopper 10 depending on the phase of the carrier wave. Fig. 15B is a conceptual waveform diagram illustrating a first example of PWM control of the braking chopper in the power conversion device according to the modification of embodiment 1. Fig. 15C is a conceptual waveform diagram illustrating a second example of PWM control of the braking chopper in the power conversion device according to the modification of embodiment 1. Fig. 15D is a block diagram illustrating a third example of PWM control of the braking chopper in the power conversion device according to the modification of embodiment 1. Fig. 15D is a conceptual waveform diagram illustrating PWM control according to the block diagram of Fig. 15A.

[0011] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. In the following, identical or corresponding parts in the drawings will be denoted by the same reference numerals, and their description will not be repeated in principle.

[0012] First Embodiment Fig. 1 is a schematic diagram illustrating a configuration example of an HVDC system 1, which is an example of a power system in which a power conversion device according to this embodiment is arranged.

[0013] 1 is configured to transmit power generated by a wind power generation device 3, also called a wind farm, located offshore to a general onshore AC system 20. Specifically, the HVDC system 1 includes power conversion devices 2A and 2B, the wind power generation device 3, a bus 4, transformers 5 and 15, a transmission line 6, a DC system 9, and an AC system 20. For example, the DC system 9 can be configured by a bipolar DC cable.

[0014] The power generated by the wind turbine generator 3 is output to a bus 4 of the offshore converter station. The power of the bus 4 is transmitted to a transmission line 6 via a transformer 5. The power conversion device 2B has a power conversion circuit 100B connected between the transmission line 6 and a DC grid 9. The power conversion circuit 100B performs power conversion (AC-DC power conversion) between the AC power of the transmission line 6 and the DC power of the DC grid 9. For example, the power conversion circuit 100B performs power conversion (AC-DC power conversion) accompanied by energy balance control for avoiding an energy surplus or shortage within the power conversion circuit 100B. In this case, the power conversion circuit 100B can be controlled so as to control the output current (output power) from the power conversion circuit 100B to the DC grid 9 in accordance with the power generated by the wind turbine generator 3.

[0015] The DCL (DC reactor) 7 is connected to the power conversion circuit 100B side (wind power generator 3 side) of the DC system 9 to suppress oscillation components (harmonic components) of the voltage and current.

[0016] The power conversion device 2A is connected between the DC system 9 and the AC system 20. The power conversion device 2A is connected to the AC system 20 via a transformer 15. The power conversion device 2A includes a power conversion circuit 100A for performing power conversion (AC-DC power conversion) between AC power from the AC system 20 and DC power from the DC system 9. Each of the power conversion circuits 100A and 100B can typically be configured using a modular multilevel converter (MMC) in which converter cells incorporating storage elements such as capacitors are cascade-connected. The power conversion circuit 100A basically performs AC-DC power conversion by transmitting power input from the wind turbine generator 3 to the DC system 9 as is to maintain a constant DC voltage in the DC system 9, while performing energy balance control to avoid energy surpluses or shortages within the power conversion circuit 100A.

[0017] 1 , when a disturbance such as a system fault or load fluctuation occurs in the AC system 20, the power that can be output from the power conversion circuit 100A to the AC system 20 temporarily decreases. In contrast, assuming a case in which the power generated by the wind turbine generator 3 is transmitted to the DC system 9 without any decrease, in the power conversion circuit 100A, the power that flows out to the AC system 20 decreases relative to the power that flows in from the DC system 9, and surplus energy is generated by integrating this difference.

[0018] There is a concern that this surplus energy will increase the voltage on the DC side (DC system 9) of the power conversion circuit 100A or the capacitor voltage inside the power conversion circuit 100A, causing an overvoltage (OV) anomaly and making it impossible to continue operating the power conversion circuit 100A. As will be described below, the power conversion device according to this embodiment has a protection control function using a braking chopper that consumes the above-mentioned surplus energy, and can improve the accuracy of the protection control function by optimizing the power consumption by the braking chopper.

[0019] In the following, an example will be described in which the power conversion device 2A is configured by the power conversion device according to this embodiment, corresponding to the above case. However, the power conversion device 2B, or each of the power conversion devices 2A and 2B, may also be configured by the power conversion device according to this embodiment. For this reason, in the following, the power conversion device according to this embodiment will be referred to as the power conversion device 2 including the power conversion circuit 100, without using the subscripts A and B in FIG. 1.

[0020] 1, each of the wind turbine generator 3 and the AC system 20 corresponds to an example of an "AC circuit." The DC system 9 corresponds to an example of a "DC circuit."

[0021] The power conversion device 2 according to this embodiment includes a power conversion circuit 100, a braking chopper 10, a chopper control circuit 30, and an MMC control circuit 110. The braking chopper 10 has a series circuit of a switch 11 and a resistance element 12. In the following, this embodiment will be described with reference to an example in which the braking chopper 10 is connected to a DC system 9. If the DC system 9 is a bipolar cable, the switch 11 and the resistance element 12 can be connected in series between the cables of both polarities. Alternatively, the switch 11 and the resistance element 12 connected in series can be disposed between the positive cable (high voltage side) and ground and between the negative cable (low voltage side) and ground, respectively.

[0022] The switch 11 can be configured by a self-extinguishing switching element, such as an IGBT (Insulated Gate Bipolar Transistor), that can control both on and off operations. The resistive element 12 is an example of an "energy absorber." During the on period of the switch 11, the resistive element 12 is energized, thereby consuming energy from the connected destination (the DC grid 9).

[0023] 1, it is also possible to connect an additional DCL to the DC system 9 closer to the wind turbine generator 3 than the connection point with the braking chopper 10. However, if a DCL is placed between the connection point and the power conversion circuit 100A, there is a concern that the effect of reducing the power flowing into the power conversion circuit 100A due to the operation of the braking chopper 10 may be reduced, so it is preferable to avoid placing a DCL in this location.

[0024] The chopper control circuit 30 outputs a gate signal for controlling the on / off of the switch 11 based on sensor measurement values ​​(voltage, current, temperature, etc.). The switch 11 is turned on when the gate signal (described later) from the chopper control circuit 30 is at H level, and turned off when it is at L level. The chopper control circuit 30 that controls the operation of the braking chopper 10 corresponds to one example of a "first control response."

[0025] The MMC control circuit 110 generates a control signal for controlling the operation (AC / DC power conversion) of the power conversion circuit 100 based on sensor measurement values ​​(voltage, current, temperature, etc.). An example of the control operation by the MMC control circuit 110 when the power conversion circuit 100 is configured with an MMC will be described in the second embodiment below. That is, the braking chopper control (also simply referred to as chopper control) described in the first embodiment can be applied without limiting the configuration of the power conversion circuit 100. The MMC control circuit 110 corresponds to an example of a "second control circuit."

[0026] Fig. 2 is a block diagram showing an example of the hardware configuration of the chopper control circuit 30 and the MMC control circuit 110. Fig. 2 shows an example in which the chopper control circuit 30 and the MMC control circuit 110 are configured by a computer.

[0027] Referring to FIG. 2 , the chopper control circuit 30 and the MMC control circuit 110 include one or more input converters 90, one or more sample-and-hold (S / H) circuits 91, a multiplexer (MUX) 92, an A / D (Analog-to-Digital) converter 93, one or more CPUs 94, a RAM (Random Access Memory) 95, a ROM (Read Only Memory) 96, one or more input / output interfaces (I / F) 97, an auxiliary storage device 98, and a bus 99 that interconnects the above components.

[0028] The input converter 90 has an auxiliary transformer (not shown) for each input channel. Each auxiliary transformer converts, for example, a detection signal such as voltage, current, or temperature from each sensor into a signal with a voltage level suitable for subsequent signal processing. A sample-and-hold circuit 91 is provided for each input converter 90. The sample-and-hold circuit 91 samples and holds a signal representing an electrical quantity received from the corresponding input converter 90 at a specified sampling frequency.

[0029] The multiplexer 92 sequentially selects the signals held in the plurality of sample-and-hold circuits 91. The A / D converter 93 converts the signal selected by the multiplexer 92 into a digital value. Note that by providing a plurality of A / D converters 93, A / D conversion may be performed in parallel on detection signals of a plurality of input channels.

[0030] The CPU 94 controls the entire chopper control circuit 30 or the MMC control circuit 110 and executes arithmetic processing according to a program. A RAM 95 as a volatile memory and a ROM 96 as a nonvolatile memory are used as the main memory of the CPU 94. The ROM 96 stores programs, setting values ​​for signal processing, and the like. The auxiliary storage device 98 is a nonvolatile memory with a larger capacity than the ROM 96 and stores programs, data of sensor detection values, and the like.

[0031] The input / output interface 97 is an interface circuit for communication between the CPU 94 and an external device. Unlike the example of FIG. 2 , at least a portion of the chopper control circuit 30 and the MMC control circuit 110 can be configured using circuits such as a field programmable gate array (FPGA) or an application specific integrated circuit (ASIC). For example, the functions of each functional block shown in each drawing below can be configured based on the computer illustrated in FIG. 2 , or at least a portion of the functions can be configured using circuits such as an FPGA or an ASIC. Furthermore, at least a portion of the functions of each functional block can also be configured using analog circuits.

[0032] Next, details of the control of the braking chopper will be described. Fig. 3 is a functional block diagram illustrating the control configuration of the braking chopper according to the first embodiment.

[0033] 3, the chopper control circuit 30 shown in Fig. 1 has a duty ratio control unit 40 and a start / stop control unit 50. The AC system 20 is configured as a three-phase AC system, and the DC system 9 is configured as high-voltage and low-voltage DC cables 9P, 9N.

[0034] The chopper control circuit 30 receives as input measured values ​​from an AC sensor group 21 arranged in the AC system 20 and measured values ​​from a DC sensor group 22 arranged in the DC system 9. The measured values ​​from the AC sensor group 21 include voltages Vu, Vv, Vw of each phase (UVW) of the three-phase AC and currents Iu, Iv, Iw of each phase.

[0035] The measurements by the DC sensor group 22 include the DC current Idc flowing through the DC system 9 and the DC voltage Vdc between the DC cables 9P and 9N. As shown in FIG. 3 , the DC current Idc is positive (Idc > 0) from the power conversion circuit 100A toward the DC system 9, so it can be understood that the power flowing from the DC system 9 to the power conversion circuit 100A is expressed as (−Idc) × Vdc. As shown in FIG. 3 , the DC current Idc is a measurement value at a position on the DC system 9 to the right of the connection point with the braking chopper 10 (denoted as “BRK” in the figure) (i.e., the side away from the power conversion circuit 100A). Therefore, the DC current Idc represents the current value exchanged between the power conversion circuit 100A, the braking chopper 10, and the DC system 9. Therefore, in Figure 3, it can be understood that when Idc>0 (flow direction from the power conversion circuit 100A to the DC system 9), the DC current Idc does not include the current of the braking chopper 10, and when Idc<0 (flow direction from the DC system 9 to the power conversion circuit 100A), the DC current Idc includes the current of the braking chopper 10.

[0036] The chopper control circuit 30 has a duty ratio control unit 40 and a start / stop control unit 50. The start / stop control unit 50 executes a start sequence and a stop sequence, which will be described later, to control the start and stop of the braking chopper 10 through control calculations, which will be described later.

[0037] The duty ratio control unit 40 includes calculation units 41A and 41B, a hold unit 42, a safety factor multiplication unit 43, a multiplier 44, a subtractor 45, a duty ratio calculation unit 46, a PWM (Pulse Width Modulation) modulation unit 47, and a carrier wave generation unit 48.

[0038] The calculation unit 41A calculates output power Pac, which is AC power output from the power conversion circuit 100A to the AC grid 20, using the phase voltages Vu, Vv, and Vw and the currents Iu, Iv, and Iw. Furthermore, the calculation unit 41A calculates a grid voltage V1, which reflects a fault state, from the phase voltages Vu, Vv, and Vw. For example, the grid voltage V1 may be a positive-sequence voltage or a minimum phase voltage. As is well known, the positive-sequence voltage is calculated using vector-represented phase voltages Vu, Vv, and Vw and an operator that rotates the phase of the vector by 120°. Therefore, when the positive-sequence voltage is the grid voltage V1, V1 = 1.0 [p.u.] during normal operation (when no disturbance occurs). On the other hand, when a system fault or the like occurs, the system voltage V1 (positive-phase voltage) drops below normal to a value that depends on the type of fault (three-phase ground fault, one-phase ground fault, two-phase short circuit, unbalanced fault, etc.) and the location of the fault (distance from the power conversion circuit 100A), etc. (V1 < 1.0).

[0039] Based on the above-described calculation of (-Idc) × Vdc, the calculation unit 41B calculates the incoming power Pdc, which is the DC power input to the power conversion circuit 100A from the DC system 9. In the present embodiment, the values ​​of the voltage, current, and power are expressed in dimensionless units [p.u].

[0040] The hold unit 42 holds the outflow power Pac calculated by the calculation unit 41A. As a result, when the braking chopper 10 is activated due to a disturbance such as a grid fault, the outflow power Pac0 in the immediately preceding normal state, i.e., immediately before the braking chopper 10 is activated, can be obtained. After the braking chopper 10 is activated, the output value (outflow power Pac0) of the hold unit 42 is maintained until the braking chopper 10 is stopped. Note that instead of the outflow power Pac0, it is also possible to use Pdc0, which is the value of the DC power Pdc calculated by the calculation unit 41B in the immediately preceding normal state.

[0041] The safety coefficient multiplication unit 43 multiplies the system voltage V1 calculated by the calculation unit 41A by a predetermined safety coefficient Ka (e.g., Ka=0.9, Ka<1). The multiplier 44 outputs the product of the output value (outflow power Pac0) of the hold unit 42 and the output value (V1×Ka) of the safety coefficient multiplication unit 43 as the outflow power command value Pac*.

[0042] Therefore, the outflow power command value Pac* can be set to be lower than the outflow power Pac immediately before a disturbance such as a system fault occurs (during normal times), and the degree of decrease becomes greater the lower the system voltage V1, i.e., the lower the system voltage.

[0043] The subtractor 45 calculates the power consumption command value Pbk* in the power conversion circuit 100A by subtracting the outgoing power command value Pac* from the incoming power Pdc output from the calculation unit 41B (Pbk*=Pdc-Pac*). As a result, when Pdc>Pac*, Pbk* is set to be greater than 0. It is also possible to input the above-mentioned Pdc0 (the immediately preceding normal value) to the subtractor 45 and set Pbk*=Pdc0-Pac*.

[0044] When the braking chopper 10 is activated by the activation sequence of the activation / shutdown control unit 50, the duty ratio calculation unit 46 sets the duty ratio DTY (0≦DTY≦1.0) in accordance with the power consumption command value Pbk*. Basically, the higher the power consumption command value Pbk*, the larger the duty ratio DTY is set to. Most simply, the duty ratio DTY can be set within the range of 0≦DTY≦1.0 in proportion to the power consumption command value Pbk*. Alternatively, the duty ratio calculation unit 46 can calculate the duty ratio DTY from the power consumption command value Pbk* as the output of a control calculation having predetermined time response characteristics, such as a first-order lag calculation including integration or a pseudo-differential calculation, which is the power consumption command value Pbk*.

[0045] On the other hand, the duty ratio calculation unit 46 basically fixes the duty ratio DTY to 0 in order to fix the switch 11 to the off state during the stop period of the braking chopper 10. However, as will be described later, in the stop sequence of the braking chopper 10, it is also possible to gradually return the duty ratio DTY to 0 at a constant rate rather than immediately returning it to 0.

[0046] The PWM modulation unit 47 generates a gate signal Gch for the switch 11 of the braking chopper 10 by PWM modulation based on a comparison between the carrier wave CW generated by the carrier wave generation unit 48 and the duty ratio DTY output from the duty ratio calculation unit 46.

[0047] The carrier wave CW is a periodic signal with a constant frequency, such as a triangular wave or a sawtooth wave. The gate signal Gch is a pulse signal that has an H-level period length that is proportional to the duty ratio DTY within a period Tc that is equal to the period Tc of the carrier wave CW. In other words, the switching period Tc of the switch 11 is equal to the period Tc of the carrier wave CW.

[0048] The switching frequency fsw (fsw=1 / Tc) of the switch 11 needs to be sufficiently high with respect to the time constant of the DCL 7. On the other hand, if the switching frequency is too high, the power loss in the switch 11 increases, and therefore, an appropriate switching frequency fsw (fsw=1 / Tc) can be determined by considering the trade-off between the two.

[0049] The switch 11 is controlled to be on during the H level period of the gate signal Gch and off during the L level period. That is, the ratio (Ton / Tc) of the H level period length Ton to one cycle Tc of the gate signal Gch, i.e., the on duty of the switch 11, is controlled in accordance with the duty ratio DTY from the duty ratio calculation unit 46.

[0050] Therefore, during the period when the duty ratio DTY=0, the switch 11 is fixed to the off state, and the resistance element 12 is maintained in a non-conductive state, so that the braking chopper 10 is in a stopped state (power consumption Pbk=0).

[0051] On the other hand, when the duty ratio DTY=1.0, the switch 11 is fixed on and the current is maintained through the resistance element 12, thereby maximizing the power consumption of the braking chopper 10. In contrast, by setting 0<DTY<1.0, the power consumption of the braking chopper 10 can be continuously varied in accordance with the duty ratio DTY.

[0052] Note that FIG. 3 illustrates an example in which the outflow power command value Pac* is introduced and the power consumption command value Pbk* is set according to (Pdc - Pac*). However, it is also possible to more simply calculate the power consumption command value Pbk* according to the difference between the measured values ​​of the inflow power Pdc and the outflow power Pac. By setting the power consumption command value Pbk* using such a difference, a portion of the inflow power from the DC grid 9 when a disturbance occurs in the AC grid 20 can be absorbed by the braking chopper 10 (resistance element 12). Alternatively, by setting Ka = 0 and setting Pbk* = Pdc (or Pdc0), or by using the outflow power Pac0 immediately before the braking chopper 10 is activated and setting Pbk* = Pac0, the power consumption command value Pbk* can be set so that all of the inflow power from the DC grid 9 is absorbed by the braking chopper 10 (resistance element 12). Although this increases the power consumption in the resistance element 12 and increases the effect of frequency fluctuations on the power grid, it allows the most stable operation of the power conversion circuit 100 (100A). As described above, in this embodiment, the power consumption command value Pbk* of the braking chopper 10, which operates in response to disturbances in the AC grid 20, can be set based on at least one of the power flowing into the power conversion circuit 100A (100) and the power flowing out from the power conversion circuit. Note that, at this time, the power flowing out from the power conversion circuit 100 may be corrected to take into account losses occurring in the downstream power conversion circuit 100 and / or the transformer 15, etc., and subtract these losses.

[0053] Next, an example of the configuration of the activation / shutdown control unit 50 will be described with reference to Fig. 4. Fig. 4 is a logic circuit diagram for explaining the activation / shutdown control unit 50 in detail.

[0054] Referring to FIG. 4, the start-stop control unit 50 has comparators 51, 54, 56, and 62, a pulse generating circuit 52, a subtractor 53, an integrator 55, logic gates 57 to 58, a start-up sequence circuit 60, a one-shot pulse generating circuit 61, logic gates 63 to 65, a high temperature detection unit 68, and a stop sequence circuit 70.

[0055] First, the configuration and operation of the start / stop control unit 50 for starting the braking chopper 10 will be described.

[0056] The subtractor 53 subtracts the outgoing power Pac calculated by the calculation unit 41A (FIG. 3) from the inflowing power Pdc calculated by the calculation unit 41B (FIG. 3) to output the surplus power ΔP. The integrator 55 integrates the surplus power ΔP by multiplying it by an integral gain Kp that defines the integration time constant to output the surplus energy ΔE.

[0057] The comparator 54 outputs a detection signal S2 according to the comparison result between the surplus power ΔP from the subtractor 53 and a predetermined judgment value Pth. The detection signal S2 is set to an H level when ΔP>Pth, and is set to an L level when ΔP≦Pth. The judgment value Pth may be set to have a so-called hysteresis characteristic, in which when the detection signal S2 is at an H level, it is set to a lower value than when the detection signal S2 is at an L level. The judgment value Vth corresponds to an example of a "first threshold value." In addition, when the judgment value Vth has a hysteresis characteristic, the value when S2=L level corresponds to the "first threshold value," and the set value when S2=H level corresponds to the "fourth threshold value."

[0058] Similarly, the comparator 54 outputs a detection signal S3 according to the result of comparison between the surplus energy ΔE from the integrator 55 and a predetermined judgment value Eth1. The detection signal S3 is set to H level when ΔE>Eth1, and is set to L level when ΔE≦Eth1. The judgment value Eth1 corresponds to an example of a "second threshold value."

[0059] The comparator 51 generates a detection signal S0 according to the comparison result between the system voltage V1 calculated by the calculation unit 41A (FIG. 3) and a predetermined determination value Vth. The detection signal S0 is set to an H level when V1<Vth, and is set to an L level when V1≧Vth. The determination value Vth may be set to have a hysteresis characteristic in which, when the detection signal S0 is at an H level, it is set to a higher value than when the detection signal S0 is at an L level. The determination value Vth corresponds to an example of a "third threshold." Furthermore, when the determination value Vth has a hysteresis characteristic, the value when S0=L level corresponds to the "third threshold," and the set value when S0=H level corresponds to the "sixth threshold."

[0060] The pulse generating circuit 52 generates a pulse signal S1 whose level transitions in response to the detection signal S0 from the comparator 51. Specifically, the pulse signal S1 transitions from L level to H level as the output signal of the comparator 51 transitions from L level to H level, and transitions from H level to L level as the output signal of the comparator 51 transitions from H level to L level. Thus, the pulse signal S1 is generated so as to have an H level period corresponding to the period during which the system voltage is low (V1<Vth) due to a disturbance such as a system fault.

[0061] When the pulse generating circuit 52 transitions the pulse signal S1 from H level to L level, it is also possible to transition the pulse signal S1 from H level to L level by adding a waiting time T1 as a delay time relative to the timing at which the output signal of the comparator 51 changes from H level to L level. An example of control in which the waiting time T1 is added will be described below.

[0062] Logic gate 57 outputs detection signal S4 according to the result of an OR (logical sum) operation of detection signal S2 from comparator 54 and detection signal S3 from comparator 56. Therefore, detection signal S4 changes from L level to H level when at least one of a state in which surplus power ΔP corresponding to short-term fluctuations is excessive (ΔP>Pth) and a state in which surplus energy ΔE corresponding to long-term fluctuations is excessive (ΔE>Eth1) occurs in power conversion circuit 100A.

[0063] The logic gate 58 generates a start command signal Son for the braking chopper 10 in accordance with the result of an AND (logical product) operation between the detection signal S4 from the logic gate 57 and the pulse signal S1 from the pulse generating circuit 52. When the start command signal Son changes from L level to H level, the start sequence circuit 60 executes a start sequence for the braking chopper 10. The start sequence includes an instruction to the duty ratio calculation unit 46 to start calculation processing of the duty ratio DTY. Until receiving the start instruction, the duty ratio calculation unit 46 fixes DTY to 0, but when the calculation processing starts, it calculates the duty ratio DTY (0≦DTY≦1.0) based on the power consumption command value Pbk*. Furthermore, although details will be described in embodiment 2, in order to avoid unnecessary activation of the protective bypass switch in each converter cell 120 when the braking chopper 10 itself is delayed in operation or inoperable due to a malfunction or the like, or when an unexpected severe accident occurs, control may be performed to wait for activation of the bypass switch in response to a detection signal S4 indicating an excessive state of surplus power ΔP or surplus energy ΔE.

[0064] Next, the configuration and operation of the start / stop control unit 50 for stopping the braking chopper 10 will be described.

[0065] The one-shot pulse generating circuit 61 outputs a one-shot pulse signal S5 having a pulse width time length T0 in response to the start-up command signal Son changing from L level to H level.

[0066] The comparator 62 outputs a detection signal S7 according to the result of comparison between the surplus energy ΔE from the integrator 55 and a predetermined judgment value Eth2. The detection signal S7 is set to H level when ΔE<Eth2, and is set to L level when ΔE≧Eth2. The judgment value Eth2 is used to determine whether the state in which the surplus energy ΔE is excessive (ΔE≧Eth2) has been resolved, and is set so that Eth2<Eth1 in order to provide a hysteresis characteristic. The judgment value Eth2 corresponds to an example of a "second threshold" or a "fifth threshold."

[0067] Logic gate 59 outputs a control signal S6 according to the result of a NOR (negative OR) operation between detection signal S4 from logic gate 57 and pulse signal S1. Furthermore, logic gate 63 outputs a control signal S8 according to the result of an OR (logical OR) operation between control signal S6 from logic gate 59 and detection signal S7 from comparator 62.

[0068] Therefore, when the braking chopper 10 is started up and the start command signal Son changes from L level to H level, the control signal S8 is set to L level in response to the pulse signal S1 or the detection signal S2 or S3 being set to H level.

[0069] After the braking chopper 10 is started, the control signal S8 is set to H level when the drop in the system voltage V1 is resolved and the pulse signal S1 returns to L level, and when the increase in the surplus power ΔP is resolved and the detection signal S2 returns to L level, or when the increase in the surplus energy ΔE is resolved and the detection signal S7 changes to H level.

[0070] Logic gate 64 outputs a control signal S9 according to the result of an AND (logical product) operation between the inverted level of pulse signal S5 from one-shot pulse generating circuit 61 and control signal S8 from logic gate 63. Therefore, control signal S9 is fixed to L level during the H level period (time length T0) of pulse signal S5, but has the same signal level as control signal S8 during other periods.

[0071] The high-temperature detection unit 68 generates a temperature rise detection signal Stmp based on a chopper temperature Tbk detected by a temperature sensor (not shown) disposed in the braking chopper 10. For example, if the chopper temperature Tbk rises above a predetermined upper limit temperature, the detection signal Stmp is set to an H level to protect the braking chopper 10. The chopper temperature Tbk may be the temperature of the switch 11, the temperature of the resistor element 12, or both. The temperature rise detection signal Stmp may be generated based on the amount of energy consumed by the braking chopper 10 (resistor element 12) instead of the value detected by the temperature sensor. For example, the detection signal Stmp may be set to an H level when the amount of energy consumed (calculated value) indicated by the time integral of power consumption calculated from the duty ratio DTY exceeds a predetermined upper limit energy amount.

[0072] The logic gate 65 generates a stop command signal Soff for the braking chopper 10 according to the result of an OR (logical sum) operation between the control signal S9 from the logic gate 64 and the detection signal Stmp from the high temperature detection unit 68.

[0073] Therefore, when the detection signal Stmp is set to H level due to an increase in the chopper temperature Tbk, the stop command signal Soff is set to H level to protect the braking chopper 10. On the other hand, when the detection signal Stmp is at L level, the stop command signal Soff is set to H level in response to the cancellation of the abnormal state of the system voltage V1 and the abnormal states related to the surplus power ΔP and surplus energy ΔE in the power conversion circuit 100A.

[0074] When the stop command signal Soff changes from L level to H level, the stop sequence circuit 70 executes a stop sequence for the braking chopper 10. The stop sequence includes an instruction to the duty ratio calculation unit 46 to start a stop process for returning the duty ratio DTY to 0. As described above, the stop process may involve rate processing for gradually returning the duty ratio DTY from its current value to 0 at a constant rate.

[0075] Furthermore, after the braking chopper 10 has been stopped, the next start-up sequence may be prohibited from being executed until a predetermined time has elapsed for the braking chopper 10 to cool, or until the chopper temperature Tbk has dropped below a predetermined reference temperature.

[0076] In a symmetrical single-pole HVDC system, if one of the positive and negative DC transmission lines constituting the DC system 9 experiences a ground fault, the other healthy transmission line will experience an overvoltage of more than twice the normal voltage relative to ground. When the midpoint of the braking chopper 10 is grounded, a switch 11 is provided between each of the two transmission lines and the ground point. In this configuration, the overvoltage on the healthy transmission line can be suppressed by turning on the switch 11 connected to the transmission line on the voltage-increasing side (overvoltage side). In this case, although not shown in FIG. 4 , each switch 11 can be controlled to turn on when the voltage measurement value of the connected DC transmission line exceeds a predetermined threshold relative to ground and turn off when the measured voltage value falls below the threshold. This allows the braking chopper 10 to operate so that the switch 11 is turned on for the overvoltage side transmission line.

[0077] Fig. 5 is a signal waveform diagram for explaining an example of operation of the start / stop control unit 50. Fig. 5 shows an example of operation when an excessive temperature rise does not occur during operation of the braking chopper 10 and the detection signal Stmp is maintained at an L level.

[0078] In the example of FIG. 5 , in response to a drop in the system voltage due to the occurrence of a system fault in the AC system 20, at time t1, the system voltage V1 drops below the determination value Vth, causing the pulse signal S1 to change from L level to H level.

[0079] At time t2, the surplus power ΔP increases in response to a decrease in the power that can be output from the power conversion circuit 100A to the AC grid 20 due to the grid fault, and the start-up command signal Son changes from L level to H level through changes in the detection signals S2 and S4. In response to this, an H level period (time length T0) is provided in the pulse signal S5 from the one-shot pulse generation circuit 61. At this time t2, the start-up processing sequence for the braking chopper 10 described above is executed.

[0080] From time t2, the operating period of the braking chopper 10 starts, and an ON period of the switch 11 is provided, whereby energy of the connection destination of the braking chopper 10 (for example, the DC cable 9P) is consumed by energizing the resistance element 12. Note that, during the period from time t2 to t3 when the pulse signal S1 is at H level, the output signal (control signal S9) of the logic gate 64 is forcibly set to L level, so it can be understood that the operating period of the braking chopper 10 is ensured to be at least the H level period (time length T0) of the pulse signal S5.

[0081] 5 , the system fault is resolved at time t4, and the system voltage V1 is restored (V1>Vth). At time t5, the increases in surplus power ΔP and surplus energy ΔE are resolved (ΔP<Pth, and ΔE<Eth2). As a result, the detection signal S4 (logic gate 57) returns to the L level at time t5. Meanwhile, the pulse signal S1 is maintained at the H level from time t4 until t6, when a predetermined waiting time T1 has elapsed, and is returned to the L level at time t6.

[0082] The control signal S8 output from the logic gate 63 is maintained at L level until time t6 when the pulse signal S1 and the detection signals S4 and S7 all become L level. Therefore, the stop command signal Soff is maintained at L level until time t6, at which time it changes from L level to H level. In response to this, a process of stopping the braking chopper 10 is initiated. At this time, the operation of the braking chopper 10 can be maintained until the waiting time T1 has elapsed from the timing (time t4) when the elimination of the grid fault is detected. As a result, during the transient phenomenon period immediately after recovery from the grid fault, a stable recovery from the grid fault can be achieved without abruptly increasing the output power Pac from the power conversion circuit 100A (i.e., the power supplied to the AC grid 20).

[0083] 6 is a flowchart illustrating an outline of the protection control by the braking chopper in the power conversion device according to this embodiment. The control process shown in FIG. 6 is repeatedly executed by the chopper control circuit 30 when the power conversion device 2 is in operation.

[0084] As shown in Fig. 6, in the initial state in which the braking chopper 10 is stopped, the chopper control circuit 30 determines whether or not the chopper activation condition is satisfied in step (hereinafter simply referred to as "S") 110. The processing of S110 corresponds to the determination processing for changing the activation command signal Son from L level to H level in Fig. 4. While the determination in S110 is NO, the stopped state of the braking chopper 10 (the state in which the switch 11 is fixed off due to DTY = 0) continues, and the determination (S110) of whether or not the chopper activation condition is satisfied is repeatedly executed.

[0085] When the chopper activation condition is met and the activation command signal Son is set to H level (YES in S110), the chopper control circuit 30 activates the braking chopper 10 in S120 to perform variable control of the chopper power consumption. As described with reference to Fig. 3 , the power consumption of the braking chopper 10 can be variably controlled in accordance with the surplus of the inflow power Pdc relative to the power that the power conversion circuit 100 can output (the outflow power command value Pac*). For example, as in the example of Fig. 3 , variable control of the chopper power consumption can be achieved by controlling the duty ratio (DTY) of the switch 11 in accordance with the power consumption command value Pbk* that is set corresponding to the surplus.

[0086] While the braking chopper 10 is in operation, the chopper control circuit 30 determines in S130 whether the chopper stop condition is met. The processing in S130 corresponds to the determination processing for changing the stop command signal Soff from L level to H level in Fig. 4. While the determination in S130 is NO, the operating state of the braking chopper 10 (a state in which the on period of the switch 11 is provided due to 0 < DTY ≦ 1.0) continues, and the determination (S130) of whether the chopper stop condition is met is repeatedly executed.

[0087] When the chopper stop condition is met and the stop command signal Soff is set to H level (YES in S130), the chopper control circuit 30 executes a stop processing sequence for the braking chopper 10 in S140 to stop the braking chopper 10. This restores the initial state in which the braking chopper 10 is stopped. At this time, activation of the braking chopper 10 may be prohibited depending on the temperature measurement value of the braking chopper 10 or the elapsed time since it was stopped.

[0088] Next, an example of the operation of protection control by the braking chopper in the power conversion device according to this embodiment will be described with reference to FIGS.

[0089] FIG. 7 shows conceptual waveform diagrams illustrating a first operation example in a case where a disturbance occurs in the AC system 20, such as a three-phase ground fault occurring close to the power conversion circuit 100, causing the system voltage to drop to near zero.

[0090] 7, in the first operation example, in response to the occurrence of a system fault at time t1, the system voltage drops to 0. As a result, in the control configuration of FIG. 4, in response to the system voltage V1 also dropping to 0, the outflow power command value Pac* is set to 0, and the power supply from the power conversion circuit 100A to the AC system 20 is stopped.

[0091] Accordingly, after time t1, the outflow power Pac becomes 0, while the duty ratio DTY of the braking chopper 10 is set to 1.0, thereby increasing the power consumption Pbk. This increases the amount of surplus energy consumed by the braking chopper 10, thereby suppressing a voltage rise inside the DC system 9 or the power conversion circuit 100A.

[0092] In contrast to this, FIG. 8 shows a conceptual waveform diagram illustrating a second operation example in a case where a disturbance occurs in which the system voltage remains (does not decrease to near 0) due to a phase-to-phase short circuit fault or an unbalanced fault at a point far from the power conversion circuit 100.

[0093] 8, in the second operation example, in response to the occurrence of a grid fault at time t1, the amount of decrease in the grid voltage is smaller than that in FIG. 7 (first operation example), and the grid voltage does not decrease to 0. As a result, in the control configuration of FIG. 4, the grid voltage V1 also does not decrease to 0, and therefore the outflow power command value Pac* is set to be greater than 0. Therefore, a certain amount of power can be supplied from the power conversion circuit 100A to the AC grid 20.

[0094] In such a case, if the braking chopper 10 is operated in a manner in which the switch 11 is simply fixed on as in Patent Document 1, the braking chopper 10 may consume excessive energy, which may result in an excessive drop in the voltage inside the DC system 9 or the power conversion circuit 100A. There is a concern that such a voltage drop may have an adverse effect on the operation of the power conversion circuit 100A after the braking chopper 10 is stopped.

[0095] In contrast to this, in the first embodiment, in the control configuration of Fig. 4, the outflow power command value Pac* is set to be greater than 0, so that the power consumption command value Pbk* of the braking chopper 10 is set lower than that in Fig. 7 (operation example 1). Accordingly, after time t1, power is supplied to the AC grid 20 with the outflow power Pac > 0, while the duty ratio DTY of the braking chopper 10 is set to be less than 1.0, so that the power consumption Pbk can be reduced more than that in the operation example of Fig. 7.

[0096] 7 and 8, even if the system voltage is restored at time t4 due to the elimination of the cause of the accident, such as by disconnecting the faulty location, the operation of the braking chopper 10 is ensured from time t4 to time t6, at which time the standby time T1 has elapsed, and therefore the flow of power Pac from the power conversion circuit 100A to the AC system 20 can be maintained.

[0097] 7 and 8, for the sake of simplicity, the outflow power Pac and the power consumption Pbk of the braking chopper 10 are represented as constant values. In reality, however, the power consumption command value Pbk* changes over time to reflect changes in the outflow power command value Pac* accompanying changes in the system voltage V1 or changes in the inflow power Pdc. As a result, when the duty ratio DTY of the braking chopper 10 changes, the power consumption Pbk changes over time.

[0098] As described above, according to the power conversion device of the first embodiment, the power consumption Pbk during the operation period of the braking chopper 10 can be variably controlled in accordance with the surplus power in the power conversion circuit 100. This makes it possible to prevent the DC voltage from dropping too much due to excessive energy consumption by the braking chopper 10 caused by a minor system fault or the like, and to suppress voltage increases inside the DC system 9 or the power conversion circuit 100A, thereby enabling more advanced protection control.

[0099] In particular, by variably setting the power consumption Pbk to reflect the degree of decline in the system voltage V1, the power that can be output from the power conversion circuit 100 (outflow power Pac*) can be appropriately estimated, and by setting an appropriate power consumption Pbk, the voltage rise within the DC system 9 or the power conversion circuit 100A can be appropriately suppressed.

[0100] Furthermore, when the braking chopper 10 is stopped, the operation of the braking chopper 10 can be maintained until a predetermined waiting time T1 has elapsed since the timing at which the grid fault is resolved. This makes it possible to stabilize the operation of the power conversion circuit 100A during the transient phenomenon period immediately after the grid fault is resolved, thereby achieving a stable recovery from the grid fault.

[0101] Similarly, when the braking chopper 10 is stopped, the duty ratio DTY is gradually reduced to 0 by rate processing, so that the operation immediately after the system fault is restored can be further stabilized.

[0102] 3, the safety factor Ka for calculating the outflow power command value Pac* is a fixed value, but the safety factor Ka may be variably set based on the actual output power (outflow power) of the power conversion circuit 100 to the AC grid 20. For example, by monitoring the difference (Pac-Pac*) between Pac* and the real-time outflow power Pac, and when the difference is a negative value (Pac*>Pac), the safety factor Ka may be reduced from the current value to increase the power consumption of the braking chopper 10, thereby updating the outflow power command value Pac* to a lower value.

[0103] The start and stop conditions for the braking chopper 10 when a disturbance occurs in the AC grid 20 are not limited to the example shown in FIG. 4 . Specifically, the start and stop conditions can be arbitrarily determined based on at least one of the three determinations used in FIG. 4 : (1) determination of an excess of surplus power ΔP (ΔP>Pth), (2) determination of an excess of surplus energy ΔE (ΔE>Eth1, Eth2), and (3) determination of a drop in grid voltage V1 (V1<Vth). For example, in the configuration example shown in FIG. 4 , the logic gate 58 can be an OR gate instead of an AND gate, and the start command signal Son can be generated based on the OR (logical sum) operation result of the detection signals S4 and S1. In this way, it is possible to protect against sudden power fluctuations that occur faster than the detection of fluctuations in the grid voltage V1. Alternatively, with priority given to protection responsiveness, the start command signal Son can be generated using only the detection signal S4 based on the surplus power ΔP.

[0104] Modification of First Embodiment In the control of the braking chopper 10 described in the first embodiment, if the activation of the braking chopper 10 is delayed in response to the occurrence of a disturbance such as a grid fault, the capacitor (not shown) in the power conversion circuit 100 is charged during the delay period, increasing the possibility of an overvoltage. Therefore, it is preferable to activate the braking chopper 10 as quickly as possible after detecting a fault. Accelerated fault detection can be achieved by, for example, calculating the difference between the inflow and outflow power of the power conversion circuit 100, as described above. On the other hand, when PWM-controlling the switch 11 of the braking chopper 10, an operational delay depending on the phase of the carrier wave may occur.

[0105] FIG. 14A is a conceptual waveform diagram illustrating an example of an operation delay of the braking chopper 10 depending on the phase of the carrier wave.

[0106] 14A, the PWM control of the switch 11 by the PWM modulation unit 47 (FIG. 3) is performed by comparing the duty ratio DTY (0≦DTY≦1.0), which is set within the range of 0 to 1.0 in accordance with the power consumption command value Pbk*, with a carrier wave that periodically changes between 0 and 1.0 in accordance with the setting range of the duty ratio DTY. FIG. 14A illustrates a triangular carrier wave CW0 whose phase is not particularly adjusted.

[0107] When DTY<1.0, the gate signal Gch is set to H level and the switch 11 is turned on during the period of DTY≧CW, while the gate signal Gch is set to L level and the switch 11 is turned off during the period of DTY<CW. As a result, the power consumption of the braking chopper 10 can be made variable by controlling the on / off of the switch 11 in accordance with the power consumption command value Pbk*.

[0108] In the example of FIG. 14A , when the braking chopper 10 is started in response to the occurrence of a disturbance in the AC system 20, at time t0, the duty ratio DTY increases from “0”, which is a fixed value in a stopped state, to D1, which is a value set in accordance with the power consumption command value Pbk*.

[0109] However, if the value of the unphased carrier wave CW0 is higher than D1 at time t0, the switch 11 actually turns on and the braking chopper 10 starts consuming power at time t1, when the value of the periodically changing carrier wave CW0 becomes lower than D1. From time t1 onward, the length of the H-level period of the gate signal Gch (times t1 to t2 and t3 to t4) according to the duty ratio DTY = D1 is ensured. This allows the power consumption of the braking chopper 10 to be controlled in accordance with the power consumption command value Pbk* via the duty ratio DTY. However, because the switch 11 is not turned on between times t0 and t1, the operation of the braking chopper 10 described above is delayed, raising concerns about a voltage rise inside the power conversion circuit 100, etc.

[0110] Therefore, in the modified example of the first embodiment, in the control configuration of FIG. 3, the duty ratio DTY output from the duty ratio calculation unit 46 is also input to the carrier wave generation unit 48, and the carrier wave generation unit 48 sets the phase of the carrier wave in accordance with the duty ratio DTY.

[0111] FIG. 14B is a conceptual waveform diagram illustrating a first example of PWM control of the braking chopper in the power conversion device according to the modification of the first embodiment.

[0112] In the first example shown in FIG. 14B, when the duty ratio DTY changes from 0 to D1 at time t0 to instruct activation of the braking chopper 10, the carrier wave generating unit 48 generates a carrier wave CW1 as a triangular wave whose initial value at time t0 is equal to T1 and whose phase is set so that the value decreases from time t0.

[0113] By using carrier wave CW1 with such a phase, gate signal Gch can be changed from L level to H level at time t0, thereby starting the ON period of switch 11. It can also be seen that the length of the H level period of gate signal Gch (times t0 to t2a and t3a to t4a) obtained by comparing carrier wave CW1 with duty ratio DTY (=D1) is similar to that shown in Figure 14A (times t1 to t2 and t3 to t4).

[0114] FIG. 14C is a conceptual waveform diagram illustrating a second example of PWM control of the braking chopper in the power conversion device according to the modification of the first embodiment.

[0115] In the second example shown in FIG. 14C, when the duty ratio DTY changes from 0 to D1 at time t0 to instruct activation of the braking chopper 10, the carrier wave generating unit 48 generates a carrier wave CW2 as a sawtooth wave whose phase is set so that the initial value at time t0 is 0.

[0116] In the examples of Figures 14B and 14C, the phase setting of the carrier wave CW by the carrier wave generating unit 48 allows the on period of the switch 11 to start without delay when the braking chopper 10 is started, thereby avoiding any delay in the operation of the braking chopper 10.

[0117] FIG. 15A is a block diagram illustrating a third example of PWM control of a braking chopper in a power conversion device according to a modification of the first embodiment.

[0118] 15A, a shaping unit 49 is provided between duty ratio calculation unit 46 and carrier wave generation unit 48. Shaping unit 49 receives duty ratio DTY from duty ratio calculation unit 46 and outputs a shaped duty ratio DTY#. PWM modulation unit 47 generates gate signal Gch by comparing carrier wave CW from carrier wave generation unit 48 with duty ratio DTY# from shaping unit 49. The phase of carrier wave CW in this case is arbitrary, and it may be a carrier wave CW0 with no phase setting, as described in FIG. 14A.

[0119] FIG. 15B shows a conceptual waveform diagram illustrating PWM control according to the block diagram of FIG. 15A.

[0120] 15B , at time t0, in response to a change in duty ratio DTY from duty ratio calculation unit 46 from 0 to D1, waveform shaping unit 49 initially sets duty ratio DTY# to 1.0 instead of D1. Furthermore, after time t0, shaping unit 49 reduces duty ratio DTY# from 1.0 to D1 using a predetermined time constant. By shaping the waveform of duty ratio DTY in this way, the on-period of switch 11 can be started without delay when braking chopper 10 is started, so that a delay in the operation of braking chopper 10 can be avoided in the third example of PWM control as well.

[0121] In addition, if the time constant by which the duty ratio DTY# changes from 1.0 to D1 is set to be shorter than one cycle of the carrier wave CW, then from the second H level period (time t3 to t4) onwards, the on period of switch 11 can be set to a period length in accordance with the originally set duty ratio DTY (= D1).

[0122] 15A and 15B, the length of the on period of the switch 11 from time t0 is longer than the period length based on the originally set duty ratio DTY (=D1), so the braking chopper 10 can be controlled to be safe against a voltage rise due to surplus energy. As a result, even if there is a delay in detecting an accident, it is expected that a voltage rise in the power conversion circuit 100 can be avoided.

[0123] Second Embodiment In a second embodiment, a method for enhancing the effect of protection control will be described, assuming that the power conversion circuit 100 is configured with an MMC.

[0124] FIG. 9 is a circuit diagram illustrating a configuration example of a power conversion circuit 100 in a power conversion device according to the second embodiment.

[0125] 9, the power conversion circuit 100 is configured by a modular multilevel converter (MMC) including a plurality of converter cells 120 connected in cascade to one another. The power conversion circuit 100 performs power conversion between a DC system 9, which is an example of a DC circuit, and an AC circuit (the AC system 20 or the wind power generation device 3 in FIG. 1).

[0126] The power conversion circuit 100 includes a plurality of leg circuits 104u, 104v, and 104w connected in parallel between a high-potential side DC terminal Np and a low-potential side DC terminal Nn. Note that, hereinafter, the leg circuits 104u, 104v, and 104w will also be referred to as "leg circuits 104" when referring to them collectively or when referring to any one of them.

[0127] The high-potential side DC terminal Np is connected to the high-voltage side DC cable 9P, and the low-potential side DC terminal Nn is connected to the low-voltage side DC cable 9N. In the configuration example of Fig. 9 , the braking chopper 10 can be connected between the DC cables 9P and 9N. Alternatively, the braking chopper 10 may be connected between the DC cable 9P and ground and between the DC cable 9N and ground, respectively. Furthermore, a capacitor 14 for maintaining the DC voltage Vdc may be connected between the high-potential side DC terminal Np (the high-voltage side DC cable 9P) and the low-potential side DC terminal Nn (the low-voltage side DC cable 9N) of the MMC.

[0128] A leg circuit 104 is provided for each of the multiple phases constituting the AC. The leg circuit 104 is connected between the AC circuit and the DC circuit and performs power conversion between the two circuits. Fig. 9 shows a case where the AC circuit is a three-phase AC, and three leg circuits 104u, 104v, and 104w are provided corresponding to the U phase, V phase, and W phase, respectively.

[0129] The AC input terminals Nu, Nv, and Nw provided in the leg circuits 104u, 104v, and 104w, respectively, are connected to the AC circuit via a transformer 13. The transformer 13 corresponds to the transformer 15 (on the AC system 20 side) or the transformer 5 (on the wind turbine generator 3 side) in Fig. 1. Note that, for ease of illustration, Fig. 9 does not show the connection between the AC input terminals Nv and Nw and the transformer 13.

[0130] Instead of using the transformer 13, the AC circuit and the leg circuits 104u, 104v, and 104w may be electrically connected via an interconnection reactor. Alternatively, instead of the AC input terminals Nu, Nv, and Nw, primary windings may be provided in the leg circuits 104u, 104v, and 104w, respectively, and the leg circuits 104u, 104v, and 104w may be AC-connected to the transformer 13 or the interconnection reactor via secondary windings magnetically coupled to the primary windings. In this case, the primary windings may be reactors 108A and 108B described below. That is, the leg circuit 104 is electrically (i.e., DC- or AC-connected) to the AC circuit via connection parts provided in each of the leg circuits 104u, 104v, and 104w, such as the AC input terminals Nu, Nv, and Nw or the above-described primary windings.

[0131] The leg circuit 104u includes an upper arm circuit 105 extending from the high-potential side DC terminal Np to the AC input terminal Nu, and a lower arm circuit 106 extending from the low-potential side DC terminal Nn to the AC input terminal Nu. The AC input terminal Nu, which is the connection point between the upper arm circuit 105 and the lower arm circuit 106, is connected to the transformer 13. Hereinafter, the upper arm circuit 105 and the lower arm circuit 106 will be collectively referred to simply as "arm circuits." Since the leg circuits 104v and 104w have the same configuration as the leg circuit 104u, the configuration of the leg circuit 104u will be described below as a representative example.

[0132] The upper arm circuit 105 includes a plurality of cascaded converter cells 120 and a reactor 108A. The plurality of converter cells 120 and the reactor 108A are connected in series. Similarly, the lower arm circuit 106 includes a plurality of cascaded converter cells 120 and a reactor 108B. The plurality of converter cells 120 and the reactor 108B are connected in series. In the following description, the number of converter cells 120 included in each of the upper arm circuit 105 and the lower arm circuit 106 is denoted as Ncell (where Ncell≧2).

[0133] The reactor 108A may be inserted at any position in the upper arm circuit 105 of the leg circuit 104u, and the reactor 108B may be inserted at any position in the lower arm circuit 106 of the leg circuit 104u. A plurality of reactors 108A and 108B may be provided. The inductance values ​​of the reactors may be different from each other. Furthermore, only the reactor 108A in the upper arm circuit 105 or only the reactor 108B in the lower arm circuit 106 may be provided. Furthermore, the transformer wiring may be devised to cancel the magnetic flux of the DC component current and allow the leakage reactance of the transformer to act on the AC component current, thereby replacing the reactor. By providing the reactors 108A and 108B, a sudden increase in fault current in the event of a fault in an AC circuit or a DC circuit, etc., can be suppressed.

[0134] The power conversion circuit 100 is provided with an AC voltage detector 21A and an AC current detector 21B corresponding to the AC sensor group 21 shown in Fig. 3, DC voltage detectors 22A and 22B and a DC current detector 22c corresponding to the DC sensor group 22 shown in Fig. 3, and arm current detectors 109A and 109B provided in each leg circuit 104. Signals detected by the detectors are input to the MMC control circuit 110.

[0135] 9, for ease of illustration, the signal lines for signals input from each detector to the MMC control circuit 110 and the signal lines for signals input / output between the MMC control circuit 110 and each converter cell 120 are shown together, but in reality, a signal line is provided for each detector and each converter cell 120. The signal lines are formed, for example, from optical fibers.

[0136] The AC voltage detector 21A detects a U-phase voltage Vu, a V-phase voltage Vv, and a W-phase voltage Vw of the AC circuit. In the following description, Vu, Vv, and Vw are also collectively referred to as Vac.

[0137] The AC current detector 21B detects a U-phase current Iu, a V-phase current Iv, and a W-phase current Iw of the AC circuit. In the following description, Iu, Iv, and Iw are also collectively referred to as Iac.

[0138] The DC voltage detector 22A detects a DC voltage Vdcp at a high-potential side DC terminal Np connected to the DC circuit (DC system 9). The DC voltage detector 22B detects a DC voltage Vdcn at a low-potential side DC terminal Nn connected to the DC circuit (DC system 9). The difference between the DC voltage Vdcp and the DC voltage Vdcn corresponds to the DC voltage Vdc in FIG. 1 etc. The DC current detector 22C detects a DC current Idc flowing through the DC system 9 (the high-potential side DC terminal Np or the low-potential side DC terminal Nn).

[0139] The arm current detectors 109A and 109B provided in the U-phase leg circuit 104u detect the upper arm current Ipu flowing in the upper arm circuit 105 and the lower arm current Inu flowing in the lower arm circuit 106. The arm current detectors 109A and 109B provided in the V-phase leg circuit 104v detect the upper arm current Ipv and the lower arm current Inv, respectively. The arm current detectors 109A and 109B provided in the W-phase leg circuit 104w detect the upper arm current Ipw and the lower arm current Inw, respectively.

[0140] FIG. 10 is a circuit diagram showing an example of a sub-module that constitutes the converter cell 120 of FIG.

[0141] The converter cell 120 illustrated in FIG. 10 includes a half-bridge type conversion circuit 120HB, a capacitor 124 as a representative example of an “electricity storage element”, a voltage detector 125, and a cell control unit 127.

[0142] The half-bridge conversion circuit 120HB includes switching elements 122A and 122B and diodes 123A and 123B connected in series with each other. The diodes 123A and 123B are connected in anti-parallel with the switching elements 122A and 122B, respectively. Hereinafter, the switching elements 122A and 122B and the diodes 123A and 123B will be referred to as the switching element 122 and the diode 123, respectively, when referring to them collectively or when referring to any one of them.

[0143] The capacitor 124 is connected in parallel with the series connection circuit of the switching elements 122A and 122B and holds a DC voltage. The connection node between the switching elements 122A and 122B is connected to a high-potential side input / output terminal 126P. The connection node between the switching element 122B and the capacitor 124 is connected to a low-potential side input / output terminal 126N.

[0144] Typically, the input / output terminal 126P is connected to the input / output terminal 126N of the converter cell 120 adjacent on the positive side. The input / output terminal 126N is connected to the input / output terminal 126P of the converter cell 120 adjacent on the negative side.

[0145] Like the switch 11, each of the switching elements 122A and 122B is a self-extinguishing switching element. For example, the switching elements 122A and 122B can be configured with an IGBT or a GCT (Gate Commutated Turn-off Thyristor). Furthermore, a bypass switch BPS can be provided between the input / output terminals 26P and 26N. The bypass switch BPS is configured to short-circuit both ends of the switching element 122B by closing its contacts, allowing a fault current to flow. In other words, the bypass switch BPS shorts the converter cell 120, thereby protecting each element included in the converter cell 120 (the switching elements 122A and 122B, the diodes 123A and 123B, and the capacitor 124) from an overcurrent that occurs during a fault.

[0146] The conversion circuit of the converter cell 120 is not limited to the half-bridge type conversion circuit 120HB as described above. For example, the converter cell 120 may be configured using an inverted half-bridge type conversion circuit, a full-bridge type conversion circuit, or a three-quarter-bridge type conversion circuit.

[0147] The voltage detector 125 detects the voltage between both ends 124P and 124N of the capacitor 124 (hereinafter referred to as the cell voltage Vcell).

[0148] The voltage (cell voltage Vcell) of the capacitor 124 as a power storage element changes according to the integral of the power balance of the power conversion circuit 100. Specifically, when the power flowing into the power conversion circuit 100 is greater than the power flowing out, the cell voltage Vcell held in the capacitor 124 of each converter cell 120 increases. Conversely, when the power flowing into the power conversion circuit 100 is smaller than the power flowing out, the cell voltage Vcell of each converter cell 120 decreases.

[0149] The cell control unit 127 generates gate signals for controlling the on and off of the switching elements 122A and 122B according to phase-shift PWM control based on a control command 128 received from the MMC control circuit 110. The cell control unit 127 also transmits a signal 29 including the cell voltage Vcell detected by the voltage detector 125 to the MMC control circuit 110.

[0150] Typically, the cell control unit 127 can control one of the switching elements 122A and 122B to be in the ON state and the other to be in the OFF state. When the switching element 122A is in the ON state and the switching element 122B is in the OFF state, the voltage (Vcell) across the capacitor 124 is applied between the input / output terminals 126P and 126N. Conversely, when the switching element 122A is in the OFF state and the switching element 122B is in the ON state, 0 V (zero voltage) is applied between the input / output terminals 26P and 26N.

[0151] The converter cell 120 can output zero voltage or a positive voltage (+Vcell) that depends on the voltage of the capacitor 124 by alternately turning on the switching elements 122A and 122B. The diodes 123A and 123B are provided to protect the switching elements 122A and 122B when a reverse voltage is applied. To prevent an overvoltage of the capacitor 124, the bypass switch BPS can be controlled by the cell control unit 127 to turn on when the cell voltage Vcell exceeds a predetermined upper voltage limit OV1. As described above, the instruction to turn on the bypass switch by the cell control unit 127 may be awaited by a command from the chopper control circuit 30 or the MMC control circuit 110 in response to the on (transition from L level to H level) of the detection signal S4 indicating an excessive power ΔP or excess energy ΔE, as described in FIG. 4 . This makes it possible to prevent the bypass switch BPS from being unnecessarily turned on in the case of a delay in operation or inoperation due to a failure of the braking chopper 10 itself, or due to an unexpected severe accident, as described above.

[0152] As described above, if the voltage further increases and reaches the insulation limit of the capacitor or element after the instruction to turn on the bypass switch BPS is awaited in response to the turning on of the detection signal S4, the bypass switch BPS may be turned on to prevent insulation breakdown. In this case, it is understood that waiting for the bypass switch BPS to be turned on means changing the threshold voltage for turning on the bypass switch (for example, the above-mentioned upper voltage limit value OV1) in an upward direction.

[0153] The cell control unit 127 may be configured by a dedicated circuit such as an ASIC (Application Specific Integrated Circuit), or may be configured using an FPGA (Field Programmable Gate Array), etc. Alternatively, it may be configured based on a computer including a CPU (Central Processing Unit) and memory, or may be configured by a combination of two or more of the above.

[0154] FIG. 11 is a block diagram illustrating an example of an MMC control configuration in the power conversion device according to the second embodiment.

[0155] Referring to FIG. 11, the MMC control circuit 110 includes a subtractor 161 , a DC voltage control unit 162 , an output current control unit 166 , an individual phase voltage command calculation unit 168 , and an individual cell DC voltage control unit 169 .

[0156] The subtractor 161 outputs a voltage deviation ΔVdc obtained by subtracting the detected value of the DC voltage Vdc (DC voltage detectors 22A, 22B) from the target value (Vdc*) of the DC voltage Vdc. The DC voltage control unit 162 calculates a DC voltage command value Vdcref to make ΔVdc=0 by a control calculation (for example, a proportional-plus-integral (PI) calculation or a proportional (P) calculation) using the voltage deviation ΔVdc from the subtractor 161 as an input.

[0157] As described below, the total voltage control unit 200 generates an active current target value Id* so as to feedback-control a representative value (e.g., average value) of the cell voltage Vcell of each converter cell 120 to a predetermined cell voltage target value Vcell*. As described above, when the power balance becomes unbalanced and the cell voltage Vcell increases or decreases, the total voltage control unit 200 calculates an active current target value Id* to adjust the output power of the power conversion circuit 100 to compensate for the increase or decrease in the cell voltage Vcell relative to the cell voltage target value Vcell*. Furthermore, the active current target value Id* may be calculated by a combination of feedback control and feedforward control, as described below.

[0158] The output current control unit 166 receives the active current target value Id*, the reactive current target value Iq*, and the currents Iu, Iv, and Iw, which are the outputs of the total voltage control unit 200, and outputs an active voltage command value Vd* and a reactive voltage command value Vq*.

[0159] In the output current control unit 166, the active current Id and the reactive current Iq are calculated from the currents Iu, Iv, and Iw of each phase by three-phase to two-phase conversion, and the active voltage command value Vd* and the reactive voltage command value Vq* are calculated by control calculations (PI calculations, P calculations, etc.) to bring the current deviations ΔId (ΔId = Id* - Id) and ΔIq (ΔIq = Iq* - Iq) closer to zero.

[0160] Although not shown in the figure, the reactive current target value Iq* can be obtained by a control calculation (such as a PI calculation or a P calculation) for bringing the power deviation (Pq*-Pq) between the reactive power command value Qq* given from a higher-level control device and the actual reactive power Qq calculated from the voltages Vu, Vv, Vw and currents Iu, Iv, Iw of each phase closer to zero.

[0161] The phase voltage command calculation unit 168 calculates AC voltage command values ​​Vu*, Vv*, and Vw* by performing a two-phase to three-phase inverse conversion on the active voltage command value Vd* and the reactive voltage command value Vq* from the output current control unit 166.

[0162] Each cell DC voltage control unit 169 receives the AC voltage command values ​​Vu*, Vv*, Vw* from the respective phase voltage command calculation unit 168 and the DC voltage command value Vdcref from the DC voltage control unit 162 as inputs, and generates a control command 128 for each converter cell 120. The control command 128 is, for example, a voltage command value for the upper arm circuit 105 and the lower arm circuit 106 of each of the UVW phases. The voltage command value Vref can be calculated, for example, according to the following equation (1): Vref=(Mau+Mdc)·Vcellarm (1)

[0163] In equation (1), Mau is a sine wave signal having an amplitude and phase determined from the above-mentioned AC voltage command values ​​Vu*, Vv*, and Vw*, and is set individually for each phase. Furthermore, Mdc is a DC modulation factor set according to the DC voltage command value Vdcref, and is set to a reference value of approximately 0.5 [pu]. Furthermore, Vcellarm is a coefficient set according to the average value of the cell 1 voltage Vcell in each arm circuit (the upper arm circuit 105 or the lower arm circuit 106 of each phase), and when this average value is the cell voltage target value Vcell*, Vcellav = 1.0.

[0164] The cell control unit 127 (Figure 10) of each converter cell 120 can generate gate signals (on / off control signals) for the switching elements 122A, 122B (Figure 10) in accordance with phase shift PWM control based on the voltage command value of the arm to which the converter cell 120 belongs, received as a control command 128.

[0165] The carrier frequency of the phase-shift PWM may be set low during steady-state operation to prioritize reduction of switching loss (switching elements 122A, 122B) in each converter cell 120, while it may be set high during disturbance occurrence or high-power operation to prioritize control responsiveness and stability. For example, when (1) the surplus power ΔP obtained by subtracting the outflow power from the inflow power to the converter exceeds a set range, (2) the control deviation of the control system, such as current, voltage, and power, exceeds a set range, (3) the converter operating conditions, such as active power, reactive power, apparent power, current, and voltage output from the converter, exceed a set range, or (4) the system conditions, such as system voltage, frequency, harmonic components, and unbalance, exceed a set range, the system may be determined to be in a disturbance state or high-power operation, and the carrier frequency may be set higher than that during steady-state operation.

[0166] By such MMC control, the power output (AC active power) from the power conversion circuit 100 to the AC circuit is increased or decreased by total voltage control for controlling a representative value (e.g., average value) of the cell voltage Vcell of each converter cell 120 to the cell voltage target value Vcell*. In the configuration example of Fig. 9, it can be understood that the increase or decrease in the power output by total voltage control is reflected in the generation of the AC voltage command values ​​Vu*, Vv*, Vw* for each phase.

[0167] Furthermore, when the DC voltage Vdc of the DC system 9 rises or falls relative to the target value Vdc*, a command value (Vdcref) for compensating for the rise or fall can be reflected to generate voltage command values ​​for the upper arm and lower arm of each phase from the AC voltage command values ​​Vu*, Vv*, Vw* of each phase.

[0168] 12 is a block diagram illustrating an example of the configuration of full voltage control unit 200. Referring to Fig. 12, full voltage control unit 200 includes an average value calculation unit 210, a subtractor 212, a feedback (FB) calculation unit 215, feedforward calculation units 220 and 222, a changeover switch 223, an adder 225, a control gain setting unit 230, and a multiplier 235.

[0169] The average value calculation unit 210 receives the cell voltages Vcell of all (Ncell × 3) converter cells 120 included in the power conversion circuit 100 and outputs the average total voltage average value Vcellav as a "representative value." The subtractor 212 subtracts the cell voltage target value Vcell* from the total voltage average value Vcellav (representative value) calculated by the average value calculation unit 210 and outputs the total voltage deviation ΔVcell. The FB calculation unit 215 outputs a feedback term Idfb of the active current target value Id* by control calculation (e.g., PI control or P control) using the total voltage deviation ΔVcell as input. When ΔVcell > 0, i.e., when Vcellav > Vcell*, calculation is performed so that Idfb > 0 so that the active power flowing out of the power conversion circuit 100 increases.

[0170] The feedforward control may be performed by switching (using a selector switch 223) between a state in which the braking chopper 10 is not in operation (normal state in which no disturbance occurs) and a state in which the braking chopper 10 is in operation (when a disturbance occurs in the AC grid 20). The feedforward calculation unit 220 calculates a feedforward term Idff of the active current target value Id* in normal state (when the braking chopper 10 is not in operation) by multiplying the DC current Idc by a feedforward gain Kf1 (Kf1<0). When power flows into the power conversion circuit 100, Idff is set to be greater than 0 for Idc<0 in accordance with the positive and negative directions of the DC current Idc defined in FIG. 3. In response to this, the feedforward calculation unit 222 calculates the feedforward term Idff of the active current target value Id* based on the output power target value Pac* (FIG. 4) when the braking chopper 10 is in operation. Specifically, the feedforward term Idff can be calculated by multiplying a value obtained by dividing the target output power Pac* by the AC voltage Vac (measured value) by a feedforward gain Kf2 (Kf2 > 0) (Idff = Kf2 · Pac* / Vac). The changeover switch 223 selects one output from the feedforward calculation units 220 and 222 in accordance with a control signal sw that indicates whether the braking chopper 10 is activated, and inputs the selected output to the adder 225. Specifically, when the braking chopper 10 is not activated (normal operation) and sw = "0," the changeover switch 223 selects the output from the feedforward calculation unit 220. On the other hand, when the braking chopper 10 is activated (when a disturbance occurs) and sw = "1," the changeover switch 223 selects the output from the feedforward calculation unit 222.

[0171] An adder 225 adds together a feedback term Idfb from the FB calculation unit 215 and a feedforward term Idff from the changeover switch 223 to calculate a base value of the active current target value Id* (Id*=Idfb+Idff). A control gain setting unit 230 sets a control gain Kb in accordance with a control signal SKb from the chopper control circuit 30. A multiplier 235 multiplies the base value from the adder 225 by the control gain Kb set by the control gain setting unit 230 to calculate the active current target value Id* ( FIG. 10 ).

[0172] Fig. 13 is a waveform diagram illustrating an example of setting the control gain Kb. Referring to Fig. 13, the control signal SKb is set to an H level during the operating period of the braking chopper 10, from time t2 to t6 (Fig. 5), and during the period from time t5 until a predetermined duration T2 elapses (times t6 to t7). During the stop period of the braking chopper 10, excluding times t2 to t7, the control signal SKb is set to an L level.

[0173] The control gain setting unit 230 sets the control gain Kb to 1.0 while the control signal Skb is at L level, and sets the control gain Kb to K1 (K1 > 1.0, for example, K1 is around 1.05) while the control signal Skb is at H level. The control gain Kb corresponds to the "adjustment coefficient," and in the examples of Figures 10 and 11, the active current target value Id* corresponds to one example of the "command value for output power control of the power conversion circuit."

[0174] As a result, the active current target value Id* output from the multiplier 235 (FIG. 12) is set to the above-mentioned base value during normal times, including before the braking chopper 10 is activated. On the other hand, during the period from time t2 to t7, which corresponds to the activation period of the braking chopper 10, the active current target value Id* is set to K1 times the base value, which is the control value during normal times.

[0175] As a result, according to the power conversion device of the second embodiment, if the cell voltage Vcell rises due to surplus power when the braking chopper 10 is activated, it is possible to enhance the effect of increasing the output power from the power conversion circuit 100 through the total voltage control. In this way, by increasing the control amount of the total voltage control in conjunction with the activation of the braking chopper 10, it is possible to effectively suppress voltage rises in the DC system 9 or the power conversion circuit 100A.

[0176] In particular, by providing a period of Kb>1.0 even after time t7 when the braking chopper 10 is stopped, it is possible to promote the output of surplus energy through full voltage control when surplus energy is accumulated in the power conversion circuit 100 due to a disturbance in the AC system 20. As a result, it is possible to enhance the effect of suppressing voltage rises in the DC system 9 or the power conversion circuit 100A even after recovery from the system fault.

[0177] If the cell voltage Vcell falls outside a predetermined voltage range, an OV (Over Voltage) anomaly or UV (Under Voltage) anomaly is detected, and the power conversion circuit 100 is protected and shut down. However, since a large margin is usually ensured in the UV direction compared to the OV direction, when the braking chopper 10 is activated, the occurrence of an OV anomaly in the cell voltage Vcell can be suppressed even by simply increasing the absolute value of the control amount (active current target value Id*) by total voltage control, regardless of the power direction.

[0178] In the power conversion device according to the second embodiment, it is also possible to provide a modified example in which the braking chopper 10 is connected in parallel with the storage element (capacitor 124) of each converter cell 120 of the power conversion circuit 100 configured with MMC. Such a connection example corresponds to an example of a mode in which the braking chopper 10 is connected inside the power conversion circuit 100.

[0179] In addition, in this embodiment, an example has been described in which the braking chopper 10 is arranged in the power conversion circuit 100A between the DC system 9 and the AC system 20, but it is also possible to arrange the braking chopper 10 in the power conversion circuit 100B between the wind power generation device 3 and the DC system 9.

[0180] In the power conversion circuit 100B, the AC power supplied from the wind turbine generator 3 to the power conversion circuit 100B is treated as "incoming power" and the DC power supplied from the power conversion circuit 100B to the DC grid 9 is treated as "outgoing power." This allows variable control of the power consumption of the braking chopper 10, as in the first embodiment. In this case, the power that can be output from the power conversion circuit 100B to the DC grid 9 is determined by the power that can be output from the power conversion circuit 100A to the AC grid 20. Therefore, the command value for the outgoing power from the power conversion circuit 100B (corresponding to Pac* in FIG. 3 ) for calculating the power consumption command value Pbk* of the braking chopper 10 can be calculated by multiplying the hold value of the DC power immediately before the fault by (V1 × Ka) [pu], as in FIG. 3 . However, in this case, high-speed communication between the power conversion devices 2A and 2B is required. Therefore, as another method, it is possible to reduce the input DC power to match the AC output that the power conversion circuit 100A can output, thereby reducing the outflow power of the power conversion circuit 100B, as in normal HVDC control that is not compatible with the offshore wind power generation plant 3. In this case, based on the difference between the inflow power and the outflow power of the power conversion circuit 100B, the power consumption command value Pbk* can be set to ΔP×Ka using the surplus power ΔP in Fig. 4 and the safety factor Ka in Fig. 3.

[0181] Furthermore, as described above, for the purpose of energy balance control, the power conversion circuit 100B operates to control the output current (output power) from the power conversion circuit 100B to the DC grid 9 in accordance with the power generated by the wind turbine generator 3. Therefore, when the above-described total voltage control is performed in the power conversion circuit 100B, the output value of the total voltage control unit 200 can be used as the output current (output power) to the DC grid 9, thereby achieving the same effect.

[0182] In a modified example, the braking chopper 10 may be connected to the AC side of the power conversion circuits 100A, 100B. In these modified examples, including the modified example in which the braking chopper 10 is connected to the inside of the power conversion circuits 100A, 100B (for example, between both ends of a storage element such as a capacitor of a converter cell 120 constituting an MMC), the duty ratio of the braking chopper 10 can be controlled in the same way as in the first embodiment, based on at least one of the inflow power and the outflow power of the power conversion circuit 100 (100A, 100B) corresponding to the connection of the braking chopper 10.

[0183] Furthermore, in the second embodiment, the total voltage control has been described for the case where the power conversion circuit 100 is configured with an MMC, but control similar to that of the second embodiment can be applied to other configurations as well. For example, the output control by the dq-axis current control illustrated in FIG. 13 can be applied to the case where the power conversion circuit 100 is configured with a known two-level converter or three-level converter. Specifically, the same effect can be achieved by applying a control gain (adjustment coefficient) set in the same manner as in FIG. 13 to arbitrary control of the output power from the power conversion circuit 100 in accordance with the increase or decrease in the stored energy of all the storage elements inside the power conversion circuit 100 in conjunction with the operation of the braking chopper 10.

[0184] The embodiments disclosed herein should be considered to be illustrative in all respects and not restrictive. The scope of the present disclosure is defined by the claims, not the above description, and is intended to include all modifications within the meaning and scope of the claims.

[0185] 1 HVDC system (power system), 2, 2A, 2B power conversion device, 3 wind power generation device, 4, 6 transmission line, 5, 13, 15 transformer, 9 DC system, 9N, 9P DC cable, 10 braking chopper, 11 switch, 12 resistance element, 14 capacitor, 20 AC system, 21, 22 sensor group, 21A AC voltage detector, 21B AC current detector, 22A, 22B DC voltage detector, 22C, 22c DC current detector, 29 signal, 30 chopper control circuit, 40 duty ratio control unit, 41A, 41B, 215 calculation unit, 42 hold unit, 43 safety factor multiplication unit, 44, 235 multiplier, 45, 53, 161, 212 subtractor, 46 duty ratio calculation unit, 47 modulation unit, 48 Carrier wave generating unit, 49 Waveform shaping unit, 50 Start / stop control unit, 51, 54, 56, 62 Comparator, 52 Pulse generating circuit, 55 Integrator, 57 to 59, 63 to 65 Logic gates, 60 Start sequence circuit, 61 One-shot pulse generating circuit, 68 High temperature detection unit, 70 Stop sequence circuit, 100, 100A, 100B Power conversion circuit, 104, 104u, 104v, 104w Leg circuit, 105 Upper arm circuit, 106 Lower arm circuit, 108A, 108B Reactor, 109A, 109B Arm current detector, 110 MMC control circuit, 120 Converter cell, 120HB Conversion circuit, 122, 122A, 122B Switching element, 123, 123A, 123B Diode, 124 Capacitor (converter cell), 124N, 124P both ends (capacitor), 125 voltage detector, 126N, 126P input / output terminal, 127 cell control unit, 128 control command, 162 DC voltage control unit, 166 output current control unit, 168 each phase voltage command calculation unit, 169 cell DC voltage control unit, 200 total voltage control unit, 210 average value calculation unit, 220 feedforward calculation unit, 225 adder, 230 control gain setting unit, CW carrier wave, DTY duty ratio, Eth1, Eth2, Pth, Vth judgment value, Gch gate signal, Id active current, Id* active current target value, Idc DC current, Idfb feedback term, Idff feedforward term, Iq reactive current, Iq* reactive current target value, Iu, Iv,Iw: Current (each phase), Ka: Safety coefficient, Kb: Control gain, Kf: Feedforward gain, Kp: Integral gain, Nn: Low potential side DC terminal, Np: High potential side DC terminal, Nu, Nv, Nw: AC input terminal, Pbk*: Power consumption command value, Pdc: Inflow power, S1, S5: Pulse signal, Soff: Stop command signal, Son: Start command signal, T0: Time length, T1: Wait time, T2: Duration, Tbk: Chopper temperature, Tc: Switching period, V1: System voltage, Vcell: Cell voltage, Vcellav: Total voltage average value, Vcell*: Cell voltage target value, Vd: Active voltage command value, Vdc, Vdcn, Vdcp: DC voltage, Vdc*: Target value, Vdcref: DC voltage command value, Vq*: Reactive voltage command value, Vu, Vv, Vw Voltage (each phase), Vu*, Vv*, Vw* AC voltage command value (each phase).

Claims

1. A power conversion device connected between an AC circuit and a DC circuit of an electric power system, comprising: a power conversion circuit for performing AC / DC power conversion between the AC circuit and the DC circuit; a braking chopper connected to the AC circuit, the DC circuit, or the inside of the power conversion circuit; and a first control circuit for controlling the operation of the braking chopper, wherein the braking chopper includes a series circuit of a switch and an energy absorber, and is configured to consume energy at a destination connected to the braking chopper by energizing the energy absorber during an on-period of the switch, and the first control circuit variably controls the duty ratio of the on-period with respect to a switching period of the switch according to a power consumption command value based on at least one of power flowing from one of the AC circuit and the DC circuit to the power conversion circuit and power flowing from the power conversion circuit to the other of the AC circuit and the DC circuit during an operation period of the braking chopper in response to the occurrence of a disturbance in the electric power system.

2. A power conversion device as described in claim 1, wherein the first control circuit, during the operation period of the braking chopper, sets an outflow power target value based on the measured value of the outflow power or the inflow power immediately before the operation of the braking chopper and the measured voltage value of the power grid, and variably controls the duty ratio in accordance with the power consumption command value calculated by subtracting the outflow power target value from the measured value of the inflow power.

3. A power conversion device as described in claim 1, wherein the first control circuit, during the operation period of the braking chopper, sets an outflow power target value based on the measured value of the outflow power immediately before the operation of the braking chopper and the measured voltage value of the power grid, and variably controls the duty ratio in accordance with the power consumption command value calculated by subtracting the outflow power target value from the measured value of the inflow power immediately before the operation.

4. A power conversion device as described in claim 1, wherein the first control circuit variably controls the duty ratio during the operation period of the braking chopper in accordance with the power consumption command value calculated in accordance with the measured value of the inflow power (equivalent to Pdc or Pdc0) at the time of operation of the braking chopper or immediately before operation, or the measured value of the outflow power (equivalent to Pac0) immediately before operation of the braking chopper, and variably controls the duty ratio in accordance with the calculated power consumption command value.

5. A power conversion device as described in claim 2 or 3, wherein the first control circuit reduces the target outflow power value below its current value when the target outflow power value is greater than the measured value of the outflow power during the operation period of the braking chopper.

6. A power conversion device according to any one of claims 1 to 5, wherein the first control circuit sets the duty ratio as the output of a control calculation having a predetermined time characteristic, the control calculation having the power consumption command value as an input.

7. The power conversion device according to any one of claims 1 to 6, wherein the first control circuit gradually reduces the duty ratio to zero at a constant rate during the process of stopping the braking chopper.

8. A power conversion device as claimed in any one of claims 1 to 7, wherein when the first control circuit detects that the disturbance in the power system has been resolved while the braking chopper is in operation, the first control circuit maintains operation of the braking chopper for at least a predetermined waiting time from the time of detection.

9. A power conversion device according to any one of claims 1 to 8, wherein, when the braking chopper is stopped, the first control circuit determines whether or not to activate the braking chopper based on at least one of the following: a determination that surplus power obtained by subtracting the outflow power from the inflow power is higher than a first threshold; a determination that surplus energy obtained by integrating the surplus power is higher than a second threshold; and a determination that the voltage of the power grid has dropped below a third threshold.

10. A power conversion device according to any one of claims 1 to 8, wherein, when the braking chopper is operating, the first control circuit determines whether or not to stop the braking chopper based on at least one of the following: a determination that surplus power obtained by subtracting the outflow power from the inflow power is lower than a first threshold; a determination that surplus energy obtained by integrating the surplus power is lower than a second threshold; and a determination that the voltage of the power grid has risen above a third threshold.

11. The power conversion device according to claim 10, wherein the first control circuit, when the braking chopper is operating, determines whether or not the braking chopper needs to be stopped based on at least one of a determination that the surplus power is lower than a fourth threshold, a determination that the surplus energy is lower than a fifth threshold, and a determination that the voltage of the power grid has risen above a sixth threshold, wherein the fourth threshold is set lower than the first threshold, the fifth threshold is set lower than the second threshold, and the sixth threshold is set higher than the third threshold.

12. A power conversion device as claimed in any one of claims 1 to 11, wherein the first control circuit includes: a carrier wave generating unit that generates a carrier wave, which is a periodic signal for pulse width modulation; and a modulation unit that generates an on / off control signal for the switch by comparing the carrier wave with the duty ratio set in accordance with the power consumption command value, the duty ratio being fixed to 0 when the braking chopper is stopped, but increasing from 0 when the braking chopper is started; and the carrier wave generating unit sets the phase of the carrier wave so that the on period of the switch begins in response to the duty ratio increasing from 0 when the braking chopper is started.

13. A power conversion device as described in claim 12, wherein the carrier wave is a triangular wave that rises or falls between 0 and 1.0 in accordance with the setting range of the duty ratio, and the carrier wave generating unit sets the phase of the carrier wave so that, when the braking chopper is started, the carrier wave has an initial value in accordance with the first value and falls from the initial value as the duty ratio rises from 0 to a first value set in accordance with the power consumption command value.

14. A power conversion device as described in claim 12, wherein the carrier wave is a sawtooth wave that periodically changes between 0 and 1.0 corresponding to the setting range of the duty ratio, and the carrier wave generating unit sets the phase of the carrier wave so that the initial value of the carrier wave becomes 0 when the braking chopper is started.

15. A power conversion device according to any one of claims 1 to 11, wherein the first control circuit includes: a carrier wave generating unit that generates a carrier wave which is a periodic signal for pulse width modulation; a shaping unit that shapes the waveform of the duty ratio set in accordance with the power consumption command value; and a modulation unit that generates an on / off control signal for the switch in accordance with a comparison between the duty ratio shaped by the shaping unit and the carrier wave, wherein the duty ratio is fixed to 0 when the braking chopper is stopped, and increases from 0 to a first value set in accordance with the power consumption command value when the braking chopper is started, and the carrier wave is generated so as to change periodically between 0 and 1.0 corresponding to the setting range of the duty ratio, and the shaping unit shapes the duty ratio so that the value of the duty ratio input to the modulation unit is initially 1.0 when the braking chopper is started, and then decreases from 1.0 to the first value in accordance with a predetermined time constant.

16. A power conversion device according to any one of claims 1 to 15, further comprising a second control circuit that controls the AC-DC power conversion by the power conversion circuit, wherein the second control circuit controls the AC-DC power conversion by multiplying a command value for output power control of the power conversion circuit by an adjustment coefficient that is set to 1.0 before the braking chopper is activated and that is set to a value greater than 1 in conjunction with the activation period of the braking chopper.

17. A power conversion device according to claim 16, wherein, when the operating period of the braking chopper is ended by the first control circuit, the second control circuit maintains the adjustment coefficient at a value greater than 1 for a predetermined duration from the end of the operating period.

18. A power conversion device according to claim 16 or 17, wherein the power conversion circuit is configured by a modular multilevel converter having arms in which a plurality of converter cells, each including a storage element and a switching element, are cascade-connected, and the command value for output power control is calculated so as to feedback-control a representative value of the voltage of the storage element of each of all of the converter cells in the power conversion circuit to a predetermined target value.

19. The power conversion device according to claim 18, wherein the power conversion circuit is configured by a modular multilevel converter having arms in which a plurality of converter cells, each including a storage element and a switching element, are cascade-connected, the command value for the output power control is calculated by a combination of feedforward control and the feedback control, and the feedforward control is executed based on a DC current flowing between the power conversion circuit and the DC circuit during a period in which the braking chopper is not in operation, and is executed based on a target value for the power flowing out from the power grid during a period in which the braking chopper is in operation.

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