Analog-to-digital conversion circuit, chip, and electronic device

Abstract

The present application provides an analog-to-digital conversion circuit, a chip, and an electronic device. The analog-to-digital conversion circuit comprises: an analog-to-digital conversion module; and an input switching module, used for enabling the analog-to-digital conversion module to output a first digital signal on the basis of a first differential signal between a first differential input signal and a second differential input signal, and enabling the analog-to-digital conversion module to output a second digital signal on the basis of a second differential signal between the second differential input signal and the first differential input signal, wherein the first digital signal and the second digital signal are used for determining target digital signals of corresponding differential input signals.

Description

Analog-to-digital converter circuits, chips and electronic devices

[0001] This application claims priority to Chinese Patent Application No. 202410787776.6, filed on June 18, 2024, entitled “Analog-to-Digital Conversion Circuit, Chip and Electronic Device”, the entire contents of which are incorporated herein by reference. Technical Field

[0002] This application relates to the field of integrated circuit technology, specifically to an analog-to-digital conversion circuit, a chip, and an electronic device. Background Technology

[0003] An analog-to-digital converter (ADC) primarily converts electrical signals (such as voltage and current) into digital signals to quantize them. Therefore, ADCs are crucial functional modules in communication, instrumentation, and sensor control systems, and are widely used in analog integrated circuits and mixed-signal integrated circuits. During ADC operation, when the differential input signal voltage / current is low, such as in the case of small output signals from pressure and temperature sensors, or bioelectrical signals, the ADC may not operate within its optimal voltage range, leading to a decrease in its accuracy.

[0004] Therefore, in related technologies, the input signal needs to be amplified by an amplifier circuit before being measured by an analog-to-digital converter (ADC). However, due to the offset voltage inherent in the ADC itself (such as the offset voltage of the operational amplifier inside the ADC), and the mismatch phenomenon in the amplifier circuit, the ADC will produce offset errors, which leads to a decrease in the conversion accuracy of the ADC. Technical issues

[0005] This application provides an analog-to-digital conversion circuit, chip, and electronic device to solve the conversion error problem caused by the offset voltage of the analog-to-digital conversion module. Technical solutions

[0006] The technical solution of this application is as follows:

[0007] In a first aspect, embodiments of this application provide an analog-to-digital conversion circuit, characterized in that the analog-to-digital conversion circuit is used to perform analog-to-digital conversion on at least one differential input signal, each differential input signal including a first differential input signal and a second differential input signal, the analog-to-digital conversion circuit comprising:

[0008] Analog-to-digital conversion module;

[0009] At least one signal amplification module, the signal amplification module having a first differential input terminal and a second differential input terminal, the signal amplification module being used to amplify the differential signal between the first differential input terminal and the second differential input terminal to output a differential amplified signal;

[0010] The input switching module is used to input a first differential input signal to the first differential input terminal and a second differential input signal to the second differential input terminal, so that the signal amplification module outputs a first differential amplified signal based on the first differential signal between the first differential input signal and the second differential input signal;

[0011] The input switching module is also used to input a first differential input signal to the second differential input terminal and input a second differential input signal to the first differential input terminal, so that the signal amplification module outputs a second differential amplified signal based on the second differential signal between the second differential input signal and the first differential input signal;

[0012] The analog-to-digital converter module is used to output a first digital signal based on the first differential amplified signal, and the analog-to-digital converter module is also used to output a second digital signal based on the second differential amplified signal. The first digital signal and the second digital signal are used to determine the target digital signal corresponding to the differential input signal.

[0013] Secondly, embodiments of this application also provide a chip including the analog-to-digital conversion circuit described above.

[0014] Thirdly, embodiments of this application also provide an electronic device, including the aforementioned chip or analog-to-digital conversion circuit.

[0015] These or other aspects of this application will become more apparent in the following description of the embodiments. Beneficial effects

[0016] This application utilizes an input switching module during each digital signal conversion. This allows the analog-to-digital converter (ADC) to output a first digital signal based on a first differential amplified signal corresponding to the first differential signal between the first and second differential input signals. Simultaneously, the ADC outputs a second digital signal based on a second differential amplified signal corresponding to the second differential signal between the second and first differential input signals. Since the first digital signal includes the first differential signal, as well as digital signals corresponding to the ADC offset error and signal amplification module mismatch error, and the second digital signal includes the second differential signal, as well as digital signals corresponding to the ADC offset error and signal amplification module mismatch error, the target digital signal corresponding to the differential input signal can be determined using the first and second digital signals. This eliminates the conversion error caused by the ADC offset voltage, ultimately improving the conversion accuracy of the ADC circuit. Attached Figure Description

[0017] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 shows a schematic diagram of an analog-to-digital conversion circuit in the related art.

[0019] Figure 2 shows a schematic diagram of an analog-to-digital conversion circuit in an embodiment of this application.

[0020] Figure 3 shows a schematic diagram of an analog-to-digital conversion circuit in an embodiment of this application.

[0021] Figure 4 shows another schematic diagram of the analog-to-digital conversion circuit in an embodiment of this application.

[0022] Figure 5 shows another schematic diagram of the analog-to-digital conversion circuit in an embodiment of this application.

[0023] Figure 6 shows another schematic diagram of the analog-to-digital conversion circuit in an embodiment of this application.

[0024] Figure 7 shows another schematic diagram of the analog-to-digital conversion circuit in an embodiment of this application.

[0025] Figure 8 shows another schematic diagram of the analog-to-digital conversion circuit in an embodiment of this application.

[0026] Figure 9 shows another schematic diagram of the analog-to-digital conversion circuit in an embodiment of this application.

[0027] Figure 10 shows another schematic diagram of the analog-to-digital conversion circuit in an embodiment of this application.

[0028] Figure 11 shows another schematic diagram of the analog-to-digital conversion circuit in an embodiment of this application.

[0029] Figure 12 shows another schematic diagram of the analog-to-digital conversion circuit in an embodiment of this application.

[0030] Figure 13 shows a schematic diagram of the working sequence of an analog-to-digital conversion circuit in an embodiment of this application.

[0031] Figure 14 shows another schematic diagram of the analog-to-digital conversion circuit in an embodiment of this application.

[0032] Figure 15 shows another schematic diagram of the operating sequence of the analog-to-digital conversion circuit in an embodiment of this application.

[0033] Figure 16 shows another schematic diagram of the operating sequence of the analog-to-digital conversion circuit in an embodiment of this application.

[0034] Figure 17 shows another schematic diagram of the analog-to-digital conversion circuit in an embodiment of this application.

[0035] Figure 18 shows another schematic diagram of the analog-to-digital conversion circuit in an embodiment of this application.

[0036] Figure 19 shows another schematic diagram of the analog-to-digital conversion circuit in an embodiment of this application.

[0037] Figure 20 shows another schematic diagram of the analog-to-digital conversion circuit in an embodiment of this application.

[0038] Among them, 10 is an analog-to-digital conversion module, 20 is an input switching module, 21 is a switching unit, 30 is a signal amplification module, 301 is a first differential input terminal, 302 is a second differential input terminal, 31 is a first signal amplification module, 32 is a second signal amplification module, and 40 is an output switching module.

[0039] First operational amplifier OP1, first resistor R1, second resistor R2, third resistor R3, fourth resistor R4, first switch S1, second switch S2, third switch S3, fourth switch S4, fifth switch S5, sixth switch S6, seventh switch S7, eighth switch S8, ninth switch S9, tenth switch S10.

[0040] Implementation methods of this application

[0041] The embodiments of this application are described in detail below. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application.

[0042] To enable those skilled in the art to better understand the solutions of this application, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0043] In the embodiments of this application, it should be noted that, in this document, relational terms such as first and second are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations.

[0044] Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0045] In the description of the embodiments of this application, the words "example" or "for example" are used to indicate exemplification, illustration, or description. Any embodiment or design described as "example" or "for example" in the embodiments of this application is not to be construed as being more preferred or having more advantages than another embodiment or design. The use of the words "example" or "for example" is intended to present relative concepts in a clear manner.

[0046] Furthermore, in the embodiments of this application, "multiple" refers to two or more. Therefore, in the embodiments of this application, "multiple" can also be understood as "at least two". "At least one" can be understood as one or more, such as one, two, or more. For example, including at least one means including one, two, or more, and is not limited to which ones are included. For example, including at least one of A, B, and C, then it could include A, B, C, A and B, A and C, B and C, or A and B and C.

[0047] It should be noted that in the embodiments of this application, "connection" can be understood as electrical connection. The connection between two electrical components can be a direct or indirect connection between the two electrical components. For example, the connection between A and B can be a direct connection between A and B, or an indirect connection between A and B through one or more other electrical components.

[0048] In the embodiments of this application, the first pole / first terminal and the second pole / second terminal of the electronic components (e.g., resistors or switches) are structurally symmetrical, so their first pole / first terminal and second pole / second terminal may be structurally indistinguishable. For example, when the electronic component is a switch, the first terminal of the switch refers to either of its two ends, and the second terminal of the switch refers to the other end of its two ends; when the electronic component is a resistor, the first terminal of the resistor refers to either of its two ends, and the second terminal of the resistor refers to the other end of its two ends.

[0049] An analog-to-digital converter (ADC) is used to convert electrical signals (such as voltage and current) into digital signals. Referring to Figure 1, Figure 1 shows a schematic diagram of an analog-to-digital converter circuit in the related art. The analog-to-digital converter circuit includes a resistive amplifier circuit and an analog-to-digital converter (ADC). The ADC performs analog-to-digital conversion on multiple input signals Vip1-Vin1 and Vip2-Vin2. The resistive amplifier circuit consists of an input resistor Ri, a feedback resistor Ro, and an operational amplifier OP. When an input signal Vip-Vin is input to the resistive amplifier circuit, the resistive amplifier circuit can output a corresponding differential amplified signal Vop-Von, so that the ADC measures the differential amplified signal Vop-Von in the optimal operating range, and finally obtains the corresponding conversion code Dout through the ADC.

[0050] Under ideal conditions, the ideal formula for the converted character output by the above analog-to-digital converter circuit is:

[0051] Where Ro is the resistance value of the feedback resistor Ro, Rp is the resistance value of the input resistor Ri, Vref is the reference voltage of the input analog-to-digital converter (ADC), and N is the number of bits of the analog-to-digital converter.

[0052] However, during the operation of the analog-to-digital converter (ADC), the ADC itself has an offset voltage (such as the offset voltage Vos_ADC of the operational amplifier inside the ADC), and the amplifier circuit also has mismatch phenomena (such as the mismatch of input resistor Ri±△Ri and feedback resistor Ro±△Ro), which will cause the ADC to produce offset errors, resulting in a decrease in the conversion accuracy of the ADC.

[0053] Therefore, this application provides an analog-to-digital conversion circuit, a chip, and an electronic device, which are described in detail below.

[0054] First, referring to Figure 2, Figure 2 shows a schematic diagram of an analog-to-digital conversion circuit in an embodiment of this application. The analog-to-digital conversion circuit is used to perform analog-to-digital conversion on at least one differential input signal VI1-VIn. The analog-to-digital conversion circuit includes an analog-to-digital conversion module 10, an input switching module 20, and a signal amplification module 30.

[0055] In some embodiments of this application, each differential input signal includes a first differential input signal (Vip1, Vip2...Vipn) and a second differential input signal (Vip1, Vip2...Vipn). The voltage difference between the first and second differential input signals represents the signal quantity of that differential input signal. The first and second differential input signals refer to the signal quantity relative to a reference potential (e.g., ground potential). In other words, the differential input signal in this application refers to a differential signal. Compared to a single-ended signal, even if the reference potential changes, the voltage difference between the first and second differential input signals will hardly change, thus helping to ensure the correctness of the differential input signal.

[0056] For example, the differential input signal can be, but is not limited to, analog electrical signals generated, received, or output by various analog sensors and various circuit modules. Various analog sensors include pressure sensors, temperature sensors, humidity sensors, flow sensors, laser sensors, liquid level sensors, vibration sensors, displacement sensors, vacuum sensors, visible light sensors, infrared light sensors, ultraviolet light sensors, magnetic sensors, gas sensors, ion sensors, enzyme sensors, immune sensors, DNA sensors, microbial sensors, etc. Various circuit modules include processors, memory, graphics cards, power supplies, battery modules, display modules, speaker modules, cooling fan modules, electric motors, engine control modules, automatic transmission control modules, body control modules, central control door lock control modules, on-board chargers, high-voltage distribution boxes, Bluetooth transceiver modules, etc.

[0057] The analog-to-digital conversion module 10 can perform analog-to-digital conversion on the differential amplified signal output by the signal amplification module 30. For example, the analog-to-digital conversion module 10 can be a hybrid analog-to-digital converter composed of one or more of the following: successive approximation analog-to-digital converter (SAR ADC), Sigma-delta analog-to-digital converter (Sigma-delta ADC), pipeline analog-to-digital converter (Pipeline ADC), or ramp-compare analog-to-digital converter (Ramp-compare ADC).

[0058] The signal amplification module 30 has a first differential input terminal 301 and a second differential input terminal 302. The signal amplification module 30 can amplify the differential signal between the first differential input terminal 301 and the second differential input terminal 302 to output a differential amplified signal, so that the analog-to-digital conversion module 10 can perform analog-to-digital conversion on the differential amplified signal and output a digital signal. For example, the signal amplification module 30 may include, but is not limited to, a resistive signal amplification circuit, a capacitive signal amplification circuit, or an RC signal amplification circuit.

[0059] The input switching module 20 is used to control the first differential input terminal 301 of the signal amplification module 30 to receive either a first differential input signal or a second differential input signal, and to control the second differential input terminal 302 of the signal amplification module 30 to receive either a first differential input signal or a second differential input signal. For example, referring to Figure 3, which shows a schematic diagram of an analog-to-digital conversion circuit in an embodiment of this application, the input switching module 20, which receives multiple differential input signals VI1-VIn, inputs a first differential input signal Vip1 corresponding to the differential input signal VI1 to the first differential input terminal 301 of the signal amplification module 30, and inputs a second differential input signal Vin1 corresponding to the differential input signal VI1 to the second differential input terminal 302 of the signal amplification module 30. This causes the signal amplification module 30 to output a first differential amplified signal VOP1 based on the first differential signal VP1 between the first differential input signal Vip1 and the second differential input signal Vin1. Finally, the analog-to-digital conversion module 10 can output a first digital signal D1 based on the first differential amplified signal VOP1.

[0060] For example, referring to Figure 4, which shows another schematic diagram of the analog-to-digital conversion circuit in this embodiment, the input switching module 20 inputs the first differential input signal Vip1 corresponding to the differential input signal VI1 to the second differential input terminal 302 of the signal amplification module 30, and inputs the second differential input signal Vin1 corresponding to the differential input signal VI1 to the first differential input terminal 301 of the signal amplification module 30. This allows the signal amplification module 30 to output the second differential amplified signal VON1 based on the second differential signal VN1 between the second differential input signal Vin1 and the first differential input signal Vip1. Finally, the analog-to-digital conversion module 10 can output the second digital signal D2 according to the second differential amplified signal VON1.

[0061] Taking the analog-to-digital conversion of the differential input signal VI1 as an example, since the first digital signal D1 contains the digital signals corresponding to the first differential signal VP1, the offset error of the analog-to-digital conversion module 10, and the mismatch error of the signal amplification module 30, the first digital signal D1 can be calculated according to the following formula:

[0062] Where Vref is the reference voltage of the input analog-to-digital converter module 10, N is the number of bits of the analog-to-digital converter module 10, Vos_ADC is the offset voltage of the analog-to-digital converter module 10, and Vs_OP is the error voltage caused by the mismatch error of the signal amplification module 30.

[0063] Similarly, since the second digital signal D2 includes the digital signals corresponding to the second differential signal VN1, the offset error of the analog-to-digital conversion module 10, and the mismatch error of the signal amplification module 30, the second digital signal D2 can be calculated using the following formula:

[0064] Since both the first digital signal D1 and the second digital signal D2 contain the digital signal corresponding to the offset error and the mismatch error, the target digital signal corresponding to the differential input signal can be determined based on the first digital signal D1 and the second digital signal D2 according to the following formula:

[0065] That is, the target digital signal D0 satisfies:

[0066] It can be seen that the above formula for calculating the target digital signal D0 eliminates the influence of the offset voltage Vos_ADC of the analog-to-digital converter module 10 and the error voltage Vs_OP caused by the mismatch error of the signal amplification module 30. This can avoid the conversion error caused by the offset voltage Vos_ADC of the analog-to-digital converter module 10 and the error voltage Vs_OP caused by the mismatch error, and ultimately help improve the conversion accuracy of the analog-to-digital converter circuit.

[0067] It is understood that the above calculation formula for the target digital signal D0 is only an exemplary embodiment. The above calculation formula can be modified and adjusted by the art, for example, by setting calibration parameters such as correction coefficients through circuit calibration.

[0068] Taking the signal amplification module 30, which includes a resistive amplifier circuit, as an example, referring to Figure 5, Figure 5 shows another schematic diagram of the analog-to-digital conversion circuit in this embodiment of the application. The signal amplification module 30 includes a first operational amplifier OP1, a first resistor R1, a second resistor R2, a third resistor R3, and a fourth resistor R4. The first operational amplifier OP1, the first resistor R1, the second resistor R2, the third resistor R3, and the fourth resistor R4 constitute a resistive amplifier circuit. Specifically, the first end of the first resistor R1 is connected to the input switching module 20, and the second end of the first resistor R1 is connected to the first input terminal of the first operational amplifier OP1; the first end of the second resistor R2 is connected to the input switching module 20, and the second end of the second resistor R2 is connected to the second input terminal of the first operational amplifier OP1; the first end of the third resistor R3 is connected to the first input terminal of the first operational amplifier OP1, and the second end of the third resistor R3 is connected to the first output terminal of the first operational amplifier OP1; the first end of the fourth resistor R4 is connected to the second input terminal of the first operational amplifier OP1, and the second end of the fourth resistor R4 is connected to the second output terminal of the first operational amplifier OP1.

[0069] It should be noted that the first operational amplifier OP1 has an offset voltage, and there is a mismatch between the first resistor R1 and the second resistor R2, the third resistor R3 and the fourth resistor R4, and the input channel resistors (e.g., trace resistors). Since the input signal is amplified by the signal amplification module 30 and measured by the analog-to-digital converter module 10, the first digital signal D1 not only includes the error corresponding to the offset error of the analog-to-digital converter module 10, but also includes the mismatch error of the input channel resistors, the offset voltage of the first operational amplifier OP1, and the conversion error caused by the mismatch between the first resistor R1 and the second resistor R2, and the mismatch between the third resistor R3 and the fourth resistor R4. Therefore, taking the analog-to-digital conversion of the differential input signal VI1 as an example, the first digital signal D1 corresponding to the differential input signal VI1 can be calculated by the following formula:

[0070] Where Rch is the resistor corresponding to the input channel (i.e., wiring, switch, etc.), Ri is the ideal resistance value of the first resistor R1 and the second resistor R2, Ro is the ideal resistance value of the third resistor R3 and the fourth resistor R4, ΔRi is the mismatch error of the first resistor R1 and the second resistor R2, ΔRch is the resistor mismatch error corresponding to the input channel, ΔRo is the mismatch error of the third resistor R3 and the fourth resistor R4, Vos_OP is the offset voltage of the first operational amplifier OP1, and k1, k2, and k3 are coefficients.

[0071] Similarly, the second digital signal D2 not only includes the error corresponding to the offset error of the analog-to-digital conversion module 10, but also the mismatch error of the input channel, the offset voltage of the first operational amplifier OP1, and the measurement error caused by the mismatch between the first resistor R1 and the second resistor R2, and the mismatch between the third resistor R3 and the fourth resistor R4. Therefore, the second digital signal D2 corresponding to the differential input signal VI1 can be calculated according to the following formula:

[0072] Therefore, the target digital signal corresponding to the differential input signal VI1 can be determined based on the first digital signal D1 and the second digital signal D2 according to the following formula:

[0073] That is, the target digital signal D0 satisfies:

[0074] As can be seen, when the signal amplification module 30 using a resistive amplifier circuit amplifies the differential input signal, since this application determines the target digital signal corresponding to the differential input signal based on the first digital signal and the second digital signal, it can not only eliminate the conversion error caused by the offset voltage of the analog-to-digital converter module 10, but also eliminate the measurement error caused by the mismatch error of the input channel, the offset voltage of the first operational amplifier OP1, the mismatch between the first resistor R1 and the second resistor R2, and the mismatch between the third resistor R3 and the fourth resistor R4, which ultimately helps to further improve the conversion accuracy of the analog-to-digital converter circuit.

[0075] It is understood that the above-described signal amplification module 30 is only an exemplary embodiment, and the implementation of the signal amplification module 30 is not limited thereto. For example, the signal amplification module 30 can also be a switched capacitor sampling / hold circuit, a switched capacitor integrator, an RC integrator, etc. The input switching module 20 can also eliminate the conversion error caused by electronic component mismatch and / or offset voltage in the signal amplification module 30.

[0076] In some embodiments of this application, such as an embodiment of an analog-to-digital converter circuit converting multiple differential input signals VI1-VIn, referring to FIG6, FIG6 shows another schematic diagram of an analog-to-digital converter circuit in an embodiment of this application. The input switching module 20 includes multiple switching units 21, each switching unit 21 being connected to one differential input signal. Each switching unit 21 can control the first differential input terminal 301 to connect to the first differential input signal or the second differential input signal of one differential input signal, and control the second differential input terminal 302 to connect to the first differential input signal or the second differential input signal of one differential input signal, so as to change the signals connected to the first differential input terminal 301 and the second differential input terminal 302 of the signal amplification module 30 through the switching unit 21 and perform corresponding amplification.

[0077] As an exemplary embodiment of the switching unit 21, referring to FIG7, FIG7 shows another schematic diagram of the analog-to-digital conversion circuit in the embodiment of the present application, wherein the switching unit 21 includes a first switch S1, a second switch S2, a third switch S3 and a fourth switch S4; the first terminal of the first switch S1 is connected to a first differential input signal, and the second terminal of the first switch S1 is connected to the first differential input terminal 301 of the signal amplification module 30; the first terminal of the second switch S2 is connected to the first differential input signal, and the second terminal of the second switch S2 is connected to the second differential input terminal 302 of the signal amplification module 30; the first terminal of the third switch S3 is connected to a second differential input signal, and the second terminal of the third switch S3 is connected to the first differential input terminal 301 of the signal amplification module 30; the first terminal of the fourth switch S4 is connected to the second differential input signal, and the second terminal of the fourth switch S4 is connected to the second differential input terminal 302 of the signal amplification module 30.

[0078] Taking the analog-to-digital conversion circuit for the first differential input signal VI1 as an example, when the first switch S1 corresponding to the first differential input signal Vip1 of the differential input signal VI1 is closed, and the second switch S2 corresponding to the second differential input signal Vin1 of the differential input signal VI1 is closed, the signal amplification module 30 amplifies and establishes the first differential signal VP1 between the first differential input signal Vip1 and the second differential input signal Vin1, and the signal amplification module 30 outputs the first differential amplified signal VOP1 to the analog-to-digital conversion module 10, so that the analog-to-digital conversion module 10 converts the first digital signal based on the first differential amplified signal VOP1.

[0079] When the third switch S3 corresponding to the first differential input signal Vip1 of the differential input signal VI1 is closed, and the fourth switch S4 corresponding to the second differential input signal Vin1 of the differential input signal VI1 is closed, the signal amplification module 30 amplifies and establishes the second differential signal VN1 between the second differential input signal Vin1 and the first differential input signal Vip1. The signal amplification module 30 outputs the second differential amplified signal VON1 to the analog-to-digital conversion module 10, so that the analog-to-digital conversion module 10 converts the second digital signal based on the second differential amplified signal VON1. Therefore, the target digital signal corresponding to the first differential input signal VI1 can be obtained according to the first digital signal D1 and the second digital signal D2.

[0080] As another exemplary embodiment of the switching unit 21, referring to FIG8, FIG8 shows another schematic diagram of the analog-to-digital conversion circuit in the embodiment of the present application. The switching unit 21 further includes a fifth switch S5, a sixth switch S6, a seventh switch S7, and an eighth switch S8. The first end of the fifth switch S5 is connected to the second ends of the first switch S1 and the third switch S3, and the second end of the fifth switch S5 is connected to the first differential input terminal 301 of the signal amplification module 30. The first end of the sixth switch S6 is connected to the second ends of the second switch S2 and the fourth switch S4, and the second end of the sixth switch S6 is connected to the second differential input terminal 302 of the signal amplification module 30. The first end of the seventh switch S7 is connected to the first end of the fifth switch S5, and the second end of the seventh switch S7 is connected to a bias voltage. The first end of the eighth switch S8 is connected to the first end of the sixth switch S6, and the second end of the eighth switch S8 is connected to a bias voltage VB.

[0081] It should be noted that when the first switch S1 and the fourth switch S4 of the same switching unit 21 are closed, or when the second switch S2 and the third switch S3 of the same switching unit 21 are closed, the fifth switch S5 and the sixth switch S6 of the same switching unit 21 are closed, and the seventh switch S7 and the eighth switch S8 are open, so that the first differential signal or the second differential signal corresponding to one differential input signal can be normally input to the signal amplification module 30. Conversely, when the first switch S1, the fourth switch S4, the second switch S2 and the third switch S3 of the same switching unit 21 are simultaneously open, the fifth switch S5 and the sixth switch S6 of the same switching unit 21 are open, and the seventh switch S7 and the eighth switch S8 are closed. In this way, the input channel corresponding to the switching unit 21 can be limited to the bias voltage VB, thereby achieving channel isolation and avoiding the phenomenon of mutual interference of multiple differential input signals.

[0082] As another exemplary embodiment of the switching unit 21, referring to FIG9, FIG9 shows another schematic diagram of the analog-to-digital conversion circuit in the embodiment of the present application, wherein the switching unit 21 further includes a fifth switch S5, a sixth switch S6, a seventh switch S7 and an eighth switch S8; the first end of the fifth switch S5 is connected to the first end of the first switch and the second switch, and the second end of the fifth switch S5 is connected to the first differential input signal; the first end of the sixth switch S6 is connected to the first end of the third switch and the fourth switch, and the second end of the sixth switch S6 is connected to the second differential input signal; the first end of the seventh switch S7 is connected to the first end of the fifth switch S5, and the second end of the seventh switch S7 is connected to the bias voltage; the first end of the eighth switch S8 is connected to the first end of the sixth switch S6, and the second end of the eighth switch S8 is connected to the bias voltage.

[0083] It should be noted that, unlike Figure 8 where the isolating switch composed of the fifth switch S5, the sixth switch S6, the seventh switch S7, and the eighth switch S8 is located at the input of the signal amplification module 30, the above exemplary embodiment places the isolating switch composed of the fifth switch S5, the sixth switch S6, the seventh switch S7, and the eighth switch S8 at the input of the switch unit. Similarly, when the first switch S1 and the fourth switch S4 of the same switching unit 21 are closed, or when the second switch S2 and the third switch S3 of the same switching unit 21 are closed, the fifth switch S5 and the sixth switch S6 of the same switching unit 21 are closed, and the seventh switch S7 and the eighth switch S8 are open, so that a differential input signal can be normally input to the signal amplification module 30. Conversely, when the first switch S1, the fourth switch S4, the second switch S2 and the third switch S3 of the same switching unit 21 are simultaneously open, the fifth switch S5 and the sixth switch S6 of the same switching unit 21 are open, and the seventh switch S7 and the eighth switch S8 are closed. In this way, the input channel corresponding to the switching unit 21 can be limited to the bias voltage VB, thereby achieving channel isolation and avoiding the phenomenon of mutual interference of multiple differential input signals.

[0084] In some embodiments of this application, referring to FIG10, FIG10 shows another schematic diagram of an analog-to-digital conversion circuit in an embodiment of this application, wherein the analog-to-digital conversion circuit includes multiple signal amplification modules 30, and the analog-to-digital conversion circuit is used to perform analog-to-digital conversion on multiple differential input signals; during the operation of the analog-to-digital conversion circuit, a differential input signal corresponding to a first differential amplified signal and a second differential amplified signal is established by the same signal amplification module 30.

[0085] For example, referring to Figures 11 and 12, which show another schematic diagram of the analog-to-digital conversion circuit in an embodiment of this application, in Figure 11, signal amplification module 1 amplifies the first differential signal VP1 corresponding to the first differential input signal Vip1 and the second differential input signal Vin1, while signal amplification module 2 amplifies the first differential signal VP2 corresponding to the first differential input signal Vip2 and the second differential input signal Vin2. This allows analog-to-digital conversion module 10 to sequentially convert the first differential amplified signal VOP1 and the first differential amplified signal VOP2, thereby avoiding the need for analog-to-digital conversion module 10 to wait for the first differential amplified signal to complete the conversion process. The phenomenon of establishing the first differential amplified signal VOP1 and the second differential amplified signal VOP2 is shown in Figure 12. Signal amplification module 1 amplifies the second differential signal VN1 corresponding to the first differential input signal Vip1 and the second differential input signal Vin1. At the same time, signal amplification module 2 amplifies the second differential signal VN2 corresponding to the first differential input signal Vip2 and the second differential input signal Vin2. This allows analog-to-digital conversion module 10 to convert the second differential amplified signal VON1 and the second differential amplified signal VON2 in sequence, thereby avoiding the phenomenon that analog-to-digital conversion module 10 needs to wait for the establishment of the second differential amplified signal VON1 and the second differential amplified signal VON2 during the conversion process.

[0086] It should be noted that after a differential input signal is input to the signal amplification module 30, it needs to be amplified and stabilized before the corresponding amplified signal can be output. Therefore, from the time the differential input signal is input to the signal amplification module 30 until the signal amplification is established and stabilized, the analog-to-digital converter module 10 cannot directly perform analog-to-digital conversion; otherwise, measurement errors will occur. In the above embodiment, since the analog-to-digital converter circuit includes multiple signal amplification modules 30, these modules can amplify multiple differential input signals simultaneously. The analog-to-digital converter module 10 can then sequentially perform analog-to-digital conversion on the multiple differential input signals, avoiding the need for the analog-to-digital converter module 10 to wait for the signal amplification module 30 to complete the amplification signal establishment before performing the conversion after each conversion. This improves the conversion rate of the analog-to-digital converter circuit.

[0087] Meanwhile, during the operation of the analog-to-digital conversion circuit, since the first differential amplified signal and the second differential amplified signal corresponding to one differential input signal are established by the same signal amplification module 30, for any first digital signal and second digital signal obtained by converting any differential input signal, it can be known that the first digital signal and the second digital signal both contain the offset error of the analog-to-digital conversion module 10, the conversion error caused by the mismatch of electronic components in the same signal amplification module 30 and / or the offset voltage, and the target digital signal determined based on the first digital signal and the second digital signal will also not contain the conversion error caused by the above mismatch and / or offset voltage.

[0088] In some embodiments of this application, when the analog-to-digital conversion module 10 performs analog-to-digital conversion on the first differential amplified signal or the second differential amplified signal corresponding to one differential input signal output by a signal amplification module 30, at least one other signal amplification module 30 pre-establishes the first differential amplified signal or the second differential amplified signal for another differential input signal. That is, the signal amplification module 30 does not need to amplify the first differential signal or the second differential signal corresponding to all differential input signals simultaneously; it can establish the amplified signal using the analog-to-digital conversion module 10's analog-to-digital conversion time. This not only ensures the conversion rate of the analog-to-digital conversion circuit but also helps reduce the power consumption of the analog-to-digital conversion circuit, ultimately reducing the heat generated by the chip and electronic equipment.

[0089] In some embodiments of this application, when a signal amplification module 30 outputs the first differential amplified signal or the second differential amplified signal corresponding to the Nth differential input signal, another signal amplification module 30 simultaneously establishes the first differential amplified signal or the second differential amplified signal for the (N+1)th differential input signal in advance; when a signal amplification module 30 outputs the first differential amplified signal or the second differential amplified signal corresponding to the (N+1)th differential input signal, another signal amplification module 30 simultaneously establishes the first differential amplified signal or the second differential amplified signal for the Nth differential input signal in advance; wherein, N is an integer greater than or equal to 1.

[0090] For example, referring to Figure 13, which shows a schematic diagram of the working sequence of an analog-to-digital conversion circuit in an embodiment of this application, the signal amplification module 1 first establishes a first differential amplified signal VOP1 for the first differential signal VP1 corresponding to the differential input signal VI1, and outputs the first differential amplified signal VOP1 after the establishment is completed, so that the analog-to-digital conversion module 10 converts the first differential amplified signal VOP1; while the analog-to-digital conversion module 10 converts the first differential amplified signal VOP1, the signal amplification module 2 establishes a first differential amplified signal VOP2 for the first differential signal VP2 corresponding to the differential input signal VI2. After the analog-to-digital conversion module 10 completes the analog-to-digital conversion of the first differential amplified signal VOP1, the analog-to-digital conversion module 10 can immediately perform analog-to-digital conversion on the first differential amplified signal VOP2.

[0091] Meanwhile, while the analog-to-digital conversion module 10 converts the first differential amplified signal VOP2, the signal amplification module 1 establishes the second differential amplified signal VON1 for the second differential signal VN1 corresponding to the differential input signal VI1. After the analog-to-digital conversion module 10 completes the analog-to-digital conversion of the first differential amplified signal VOP2, the analog-to-digital conversion module 10 can immediately perform analog-to-digital conversion on the second differential amplified signal VON1.

[0092] Similarly, when the analog-to-digital converter module 10 converts the second differential amplified signal VON1, the signal amplification module 2 establishes the second differential amplified signal VON2 corresponding to the differential input signal VI2. After the analog-to-digital converter module 10 completes the analog-to-digital conversion of the second differential amplified signal VON1, the analog-to-digital converter module 10 can immediately perform analog-to-digital conversion on the second differential amplified signal VON2.

[0093] It can be seen that, through the above process, the first digital signal D1[1] corresponding to the first differential amplified signal VOP1, the second digital signal D2[1] corresponding to the second differential amplified signal VON1, the first digital signal D1[2] corresponding to the first differential amplified signal VOP2, and the second digital signal D2[2] corresponding to the second differential amplified signal VON2 will be obtained. Therefore, the target digital signal D0[1] of the differential input signal VI1 can be determined according to the first digital signal D1[1] and the second digital signal D2[1], and the target digital signal D0[2] of the differential input signal VI2 can be determined according to the first digital signal D1[2] and the second digital signal D2[2].

[0094] Meanwhile, in the above process, since the first differential amplified signal VOP1 and the second differential amplified signal VON1 are established by the same signal amplification module 1, and the first differential amplified signal VOP2 and the second differential amplified signal VON2 are established by the same signal amplification module 2, that is, one differential input signal corresponds to the first differential amplified signal and the second differential amplified signal being established by the same signal amplification module 30. Therefore, the target digital signal determined based on the first digital signal and the second digital signal may also not contain the conversion error caused by the mismatch and / or offset voltage mentioned above.

[0095] In some embodiments of this application, referring to FIG14, FIG14 shows another schematic diagram of the analog-to-digital conversion circuit in an embodiment of this application, wherein the plurality of signal amplification modules 30 include a first signal amplification module 31 and a second signal amplification module 32; when the first signal amplification module 31 outputs the first differential amplified signal corresponding to the Nth differential input signal, the second signal amplification module 32 simultaneously pre-establishes the first differential amplified signal for the (N+1)th differential input signal; when the second signal amplification module 32 outputs the first differential amplified signal corresponding to the (N+1)th differential input signal, the first signal amplification module 31 simultaneously pre-establishes the second differential amplified signal for the Nth differential input signal; when the first signal amplification module 31 outputs the second differential amplified signal corresponding to the Nth differential input signal, the second signal amplification module 32 simultaneously pre-establishes the second differential amplified signal for the (N+1)th differential input signal.

[0096] For example, referring to Figure 15, Figure 15 shows another schematic diagram of the working sequence of the analog-to-digital conversion circuit in this embodiment of the application. In this case, when the first signal amplification module 31 outputs the first differential amplified signal VOP1 corresponding to the first differential input signal VI1, the second signal amplification module 32 simultaneously establishes the first differential amplified signal VOP2 for the second differential input signal VI2 in advance; when the second signal amplification module 32 outputs the first differential amplified signal VOP2 corresponding to the second differential input signal VI2, the first signal amplification module 31 simultaneously establishes the second differential amplified signal VON1 for the first differential input signal VI1 in advance.

[0097] When the first signal amplification module 31 outputs the second differential amplified signal VON1 corresponding to the first differential input signal VI1, the second signal amplification module 32 simultaneously establishes the second differential amplified signal VON2 for the second differential input signal VI2, and so on.

[0098] Overall, the first signal amplification module 31 and the second signal amplification module 32 alternately output the differential amplified signal corresponding to the Nth differential input signal and the second differential amplified signal corresponding to the N+1th differential input signal. While realizing that the first differential amplified signal and the second differential amplified signal corresponding to one differential input signal are established by the same amplification unit, they can also output the first differential amplified signal and the second differential amplified signal corresponding to one differential input signal as quickly as possible, thereby obtaining the target digital signal corresponding to one differential input signal as quickly as possible.

[0099] It is understood that the above process is only an exemplary embodiment, and those skilled in the art can make equivalent modifications under the guidance of this application. For example, three, four, or even more signal amplification modules 30 can be used. For another example, referring to Figure 16, Figure 16 shows another working sequence diagram of the analog-to-digital conversion circuit in the embodiment of this application. In the operation of the analog-to-digital conversion circuit, the signal amplification module 1 first establishes and outputs the second differential amplification signal VON1 for the second differential signal VN1 corresponding to the differential input signal VI1, and then establishes and outputs the first differential amplification signal VOP1 for the first differential signal VP1 corresponding to the differential input signal VI1. The signal amplification module 2 first establishes and outputs the first differential amplification signal VOP2 for the first differential signal VP2 corresponding to the differential input signal VI2, and then establishes and outputs the first differential amplification signal VON3 for the second differential signal VN3 corresponding to the differential input signal VI3.

[0100] In some embodiments of this application, such as embodiments where the analog-to-digital conversion circuit includes multiple signal amplification modules 30, referring to FIG17, FIG17 shows another schematic diagram of the analog-to-digital conversion circuit in an embodiment of this application. In this embodiment, the analog-to-digital conversion module 10 further includes an output switching module 40. The output switching module 40 can control the first differential amplified signal or the second differential amplified signal output by one of the multiple signal amplification modules 30 to be input to the analog-to-digital conversion module 10, so that the analog-to-digital conversion module 10 can sequentially perform analog-to-digital conversion on the first differential amplified signal or the second differential amplified signal.

[0101] As an example, referring to FIG18, FIG18 shows another schematic diagram of the analog-to-digital conversion circuit in an embodiment of the present application, wherein the output switching module 40 includes a plurality of ninth switches S9 and a plurality of tenth switches S10; the ninth switches S9 correspond one-to-one with the signal amplification module 30, the first end of the ninth switch S9 is connected to the first output terminal of the signal amplification module 30, and the second end of the ninth switch S9 is connected to the first differential input terminal 301 of the signal amplification module 30; the tenth switches S10 correspond one-to-one with the signal amplification module 30, the first end of the tenth switch S10 is connected to the second output terminal of the signal amplification module 30, and the second end of the tenth switch S10 is connected to the second differential input terminal 302 of the signal amplification module 30.

[0102] For example, taking a signal amplification module 30 including a resistive amplifier circuit as an example, referring to FIG19, FIG19 shows another schematic diagram of the analog-to-digital conversion circuit in an embodiment of the present application. The first end of the ninth switch S9 is connected to the inverting output terminal of the first operational amplifier OP1, and the first end of the tenth switch S10 is connected to the non-inverting output terminal of the first operational amplifier OP1. When the ninth switch S9 and the tenth switch S10 corresponding to a certain signal amplification module 30 are closed, the first differential amplified signal or the second differential amplified signal amplified by the signal amplification module 30 can be output, so that the analog-to-digital conversion module 10 performs analog-to-digital conversion based on the first differential amplified signal or the second differential amplified signal amplified by the signal amplification module 30.

[0103] As an exemplary embodiment of this application, referring to FIG20, FIG20 shows another schematic diagram of the analog-to-digital conversion circuit in an embodiment of this application. The differential input signals VI1, VI3...VIn-1 of the odd-numbered paths are respectively input to a plurality of switching units 21 connected to the first signal amplification module 31. Through these switching units 21, the differential input signals VI1, VI3...VIn-1 can be controlled to be input to the first signal amplification module 31, thereby enabling the first signal amplification module 31 to amplify the differential input signals of the odd-numbered paths and enabling the analog-to-digital conversion module 10 to perform analog-to-digital conversion based on the amplified signals.

[0104] The even-numbered differential input signals VI2, VI4, ..., VIn are respectively input to multiple switching units 21 connected to the second signal amplification module 32. These switching units 21 can control whether the differential input signals VI2, VI4, ..., VIn are input to the first signal amplification module.

[0105] 31, thereby enabling the second signal amplification module 32 to amplify the even-numbered differential input signals and enabling the analog-to-digital conversion module 10 to perform analog-to-digital conversion based on the amplified signals.

[0106] During the operation of the analog-to-digital conversion circuit, the switching unit 21 controls the differential input signal VI1 to be input into the first signal amplification module 31 and establishes the first differential amplification signal VOP1. After the establishment of the first differential amplification signal VOP1 is completed, the ninth switch S9 and the tenth switch S10 connected to the first signal amplification module 31 are closed, and the analog-to-digital conversion module 10 performs analog-to-digital conversion on the first differential amplification signal VOP1 to obtain the first digital signal corresponding to the differential input signal VI1. While the analog-to-digital conversion module 10 performs analog-to-digital conversion on the first differential amplification signal VOP1, the switching unit 21 controls the differential input signal VI2 to be input into the second signal amplification module 32 and establishes the first differential amplification signal VOP2. After the analog-to-digital conversion module 10 completes the analog-to-digital conversion on the first differential amplification signal VOP1, the analog-to-digital conversion module 10 can immediately perform analog-to-digital conversion on the first differential amplification signal VOP2, and so on.

[0107] This application also provides a chip that includes the analog-to-digital conversion circuit described above. A chip (Integrated Circuit, IC) is also called a chip, and this chip can be, but is not limited to, a System on Chip (SOC) chip or a System in Package (SIP) chip. Since the chip of this application includes the analog-to-digital conversion circuit described in any of the above embodiments, it possesses all the beneficial effects of the analog-to-digital conversion circuit in the above embodiments, and will not be repeated here.

[0108] This application also provides an electronic device, which includes a device body and a chip as described above disposed within the device body. The electronic device may be, but is not limited to, a weight scale, body fat scale, nutrition scale, infrared electronic thermometer, pulse oximeter, body composition analyzer, power bank, wireless charger, fast charger, car charger, adapter, display, USB (Universal Serial Bus) docking station, stylus, true wireless earphones, car center console screen, automobile, smart wearable device, mobile terminal, and smart home device. Smart wearable devices include, but are not limited to, smartwatches, smart bracelets, and neck massagers. Mobile terminals include, but are not limited to, smartphones, laptops, tablets, and POS (point of sales terminal) machines. Smart home devices include, but are not limited to, smart sockets, smart rice cookers, smart robot vacuums, and smart lights.

[0109] The above are merely preferred embodiments of this application and are not intended to limit this application in any way. Although this application has disclosed preferred embodiments as above, it is not intended to limit this application. Any person skilled in the art can make some modifications or alterations to the above-disclosed technical content to create equivalent embodiments without departing from the scope of the technical solution of this application. Any simple modifications, equivalent changes and alterations made to the above embodiments based on the technical essence of this application without departing from the scope of the technical solution of this application shall still fall within the scope of the technical solution of this application.

Claims

1. An analog-to-digital converter (ADC) circuit, the ADC circuit being used to perform analog-to-digital conversion on at least one differential input signal, each of the differential input signals including a first differential input signal and a second differential input signal, the ADC circuit comprising: Analog-to-digital conversion module; At least one signal amplification module, the signal amplification module having a first differential input terminal and a second differential input terminal, the signal amplification module being used to amplify the differential signal between the first differential input terminal and the second differential input terminal to output a differential amplified signal; An input switching module is configured to input a first differential input signal to a first differential input terminal and a second differential input signal to a second differential input terminal, so that the signal amplification module outputs a first differential amplified signal based on a first differential signal between the first differential input signal and the second differential input signal; The input switching module is further configured to input the first differential input signal to the second differential input terminal and input the second differential input signal to the first differential input terminal, so that the signal amplification module outputs a second differential amplified signal based on the second differential signal between the second differential input signal and the first differential input signal; The analog-to-digital converter module is used to output a first digital signal based on the first differential amplified signal, and the analog-to-digital converter module is also used to output a second digital signal based on the second differential amplified signal. The first digital signal and the second digital signal are used to determine the target digital signal corresponding to the differential input signal.

2. The analog-to-digital converter circuit as described in claim 1, characterized in that, The input switching module includes multiple switching units, and each switching unit is connected to one differential input signal. Each of the switching units is used to control the first differential input terminal to connect to either the first differential input signal or the second differential input signal of one differential input signal, and to control the second differential input terminal to connect to either the first differential input signal or the second differential input signal of one differential input signal.

3. The analog-to-digital converter circuit as described in claim 2, characterized in that, The switching unit includes a first switch, a second switch, a third switch, and a fourth switch; The first terminal of the first switch is connected to the first differential input signal, and the second terminal of the first switch is connected to the first differential input terminal; The first terminal of the second switch is connected to the first differential input signal, and the second terminal of the second switch is connected to the second differential input terminal; The first terminal of the third switch is connected to the second differential input signal, and the second terminal of the third switch is connected to the first differential input terminal; The first terminal of the fourth switch is connected to the second differential input signal, and the second terminal of the fourth switch is connected to the second differential input terminal.

4. The analog-to-digital converter circuit as described in claim 3, characterized in that, The switching unit also includes a fifth switch, a sixth switch, a seventh switch, and an eighth switch; The first end of the fifth switch is connected to the first switch and the second end of the third switch, and the second end of the fifth switch is connected to the first differential input terminal; The first end of the sixth switch is connected to the second switch and the second end of the fourth switch, and the second end of the sixth switch is connected to the second differential input terminal; The first terminal of the seventh switch is connected to the first terminal of the fifth switch, and the second terminal of the seventh switch is connected to a bias voltage; The first terminal of the eighth switch is connected to the first terminal of the sixth switch, and the second terminal of the eighth switch is connected to the bias voltage.

5. The analog-to-digital converter circuit as described in claim 3, characterized in that, The switching unit also includes a fifth switch, a sixth switch, a seventh switch, and an eighth switch; The first end of the fifth switch is connected to the first switch and the first end of the second switch, and the second end of the fifth switch is connected to the first differential input signal. The first end of the sixth switch is connected to the first end of the third switch and the first end of the fourth switch, and the second end of the sixth switch is connected to the second differential input signal; The first terminal of the seventh switch is connected to the first terminal of the fifth switch, and the second terminal of the seventh switch is connected to a bias voltage; The first terminal of the eighth switch is connected to the first terminal of the sixth switch, and the second terminal of the eighth switch is connected to the bias voltage.

6. The analog-to-digital converter circuit as described in any one of claims 1 to 5, characterized in that, The signal amplification module includes a first operational amplifier, a first resistor, a second resistor, a third resistor, and a fourth resistor; The first end of the first resistor is connected to the input switching module, and the second end of the first resistor is connected to the first input terminal of the first operational amplifier. The first end of the second resistor is connected to the input switching module, and the second end of the second resistor is connected to the second input terminal of the first operational amplifier. The first end of the third resistor is connected to the first input terminal of the first operational amplifier, and the second end of the third resistor is connected to the first output terminal of the first operational amplifier. The first end of the fourth resistor is connected to the second input terminal of the first operational amplifier, and the second end of the fourth resistor is connected to the second output terminal of the first operational amplifier.

7. The analog-to-digital converter circuit as described in claim 1, characterized in that, The analog-to-digital conversion circuit includes multiple signal amplification modules; During the operation of the analog-to-digital conversion circuit, one differential input signal corresponds to the first differential amplified signal and the second differential amplified signal, which are generated by the same signal amplification module.

8. The analog-to-digital converter circuit as described in claim 7, characterized in that, When the analog-to-digital conversion module performs analog-to-digital conversion on the first differential amplified signal or the second differential amplified signal corresponding to one of the differential input signals output by the signal amplification module, at least one other signal amplification module pre-establishes the first differential amplified signal or the second differential amplified signal for another differential input signal.

9. The analog-to-digital converter circuit as described in claim 8, characterized in that, When one of the signal amplification modules outputs the first differential amplified signal or the second differential amplified signal corresponding to the Nth differential input signal, the other signal amplification module simultaneously establishes the first differential amplified signal or the second differential amplified signal for the N+1th differential input signal in advance; When one of the signal amplification modules outputs the first differential amplified signal or the second differential amplified signal corresponding to the (N+1)th differential input signal, the other signal amplification module simultaneously pre-establishes the first differential amplified signal or the second differential amplified signal for the Nth differential input signal; Where N is an integer greater than or equal to 1.

10. The analog-to-digital converter circuit as described in claim 9, characterized in that, The plurality of signal amplification modules include a first signal amplification module and a second signal amplification module; When the first signal amplification module outputs the first differential amplified signal corresponding to the Nth differential input signal, the second signal amplification module simultaneously establishes the first differential amplified signal for the N+1th differential input signal in advance. When the second signal amplification module outputs the first differential amplified signal corresponding to the N+1th differential input signal, the first signal amplification module simultaneously establishes the second differential amplified signal in advance for the Nth differential input signal; When the first signal amplification module outputs the second differential amplified signal corresponding to the Nth differential input signal, the second signal amplification module simultaneously establishes the second differential amplified signal for the (N+1)th differential input signal in advance.

11. The analog-to-digital converter circuit as described in claim 7, characterized in that, The analog-to-digital conversion module also includes an output switching module; The output switching module is used to control the first differential amplified signal or the second differential amplified signal output by one of the multiple signal amplification modules to be input to the analog-to-digital conversion module.

12. The analog-to-digital converter circuit as described in claim 11, characterized in that, The output switching module includes multiple ninth switches and multiple tenth switches; The ninth switch corresponds one-to-one with the signal amplification module. The first end of the ninth switch is connected to the first output end of the signal amplification module, and the second end of the ninth switch is connected to the first input end of the analog-to-digital conversion module. The tenth switch corresponds one-to-one with the signal amplification module. The first end of the tenth switch is connected to the second output end of the signal amplification module, and the second end of the tenth switch is connected to the second input end of the analog-to-digital conversion module.

13. A chip comprising the analog-to-digital conversion circuit as described in any one of claims 1 to 12.

14. An electronic device comprising the chip as claimed in claim 13.

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