Multilayer ceramic capacitor

Abstract

Provided is a multilayer ceramic capacitor capable of suppressing occurrence of structural defects.　In an LT cross section passing through the center of the width direction W of a laminate 2, when the line formed by connecting imaginary line segments connecting ends of adjacent first effective portions 15Aa on a first end face CA side is defined as a first virtual line L1, the region of the laminate 2 from the first virtual line L1 to the first end face CA is defined as a first region F1, the region of the first region F1 from the center of the first region F1 in a length direction L to the first virtual line L1 is defined as a first effective portion side region F11, and the region of the first region F1 from the center of the first region F1 in the length direction L to the first end face CA is defined as a first end face side region F12, the length of the portion of a first drawn portion 15Ab located in the first effective portion side region F11 is greater than the length of the portion of the first drawn portion 15Ab located in the first end face side region F12.

Description

Multilayer ceramic capacitors

[0001] The present invention relates to a multilayer ceramic capacitor.

[0002] Conventionally, there exists a multilayer ceramic capacitor including a laminate in which dielectric layers and internal electrodes are alternately stacked, and external electrodes provided on both end surfaces of the laminate (see Patent Document 1). Multilayer ceramic capacitors are one of the important electronic components involved in the operation of electronic devices. In recent years, there has been a strong demand for high-quality multilayer ceramic capacitors.

[0003] Japanese Patent Application Laid-Open No. 2003-243249

[0004] However, in the multilayer ceramic capacitor of Patent Document 1, structural defects such as cracks occurring inside the laminate are likely to occur, which degrade the quality of the multilayer ceramic capacitor.

[0005] An object of the present invention is to provide a multilayer ceramic capacitor that can suppress the occurrence of structural defects.

[0006] In order to achieve the above object, a multilayer ceramic capacitor according to the present invention comprises: a laminate having an inner layer portion including a plurality of dielectric layers and a plurality of internal electrodes stacked alternately; first and second main surfaces opposing each other in a stacking direction; first and second side surfaces opposing each other in a width direction perpendicular to the stacking direction; and first and second end surfaces opposing each other in a length direction perpendicular to the stacking direction and the width direction; a first external electrode disposed on the first end surface; and a second external electrode disposed on the second end surface, wherein the internal electrodes have a first internal electrode connected to the first external electrode and a second internal electrode connected to the second external electrode, and the first internal electrode has a first effective portion which is a portion facing the second internal electrode; and a second effective portion which is a portion drawn out from the first effective portion toward the first end surface. and a first draw-out portion, wherein in a cross section parallel to the stacking direction and the length direction that passes through the center of the width direction of the laminate, a line formed by connecting imaginary line segments that connect the ends of adjacent first effective portions on the first end face side is defined as a first virtual line, a region of the laminate from the first virtual line to the first end face is defined as a first region, a region of the first region from the center of the first region in the length direction to the first virtual line is defined as a first effective portion side region, and a region of the first region from the center of the first region in the length direction to the first end face is defined as a first end face side region, the length of the portion of the first draw-out portion located in the first effective portion side region is greater than the length of the portion of the first draw-out portion located in the second end face side region.

[0007] According to the present invention, it is possible to provide a multilayer ceramic capacitor that can suppress the occurrence of structural defects.

[0008] 1 is a schematic perspective view of a multilayer ceramic capacitor according to an embodiment; FIG. 2 is a cross-sectional view taken along line II-II of FIG. 1; FIG. 3 is a cross-sectional view taken along line III-III of FIG. 1; FIG. 4 is an enlarged view of part IV of FIG. 3; and FIG. 5 is an enlarged view of part V of FIG. 2. It is a perspective view showing a state in which a step-eliminating paste is disposed on a ceramic green sheet. It is a cross-sectional view showing a portion around a first lead-out portion in an LT cross-section passing through the center of the width direction of the laminate, where (a) is a diagram showing a case in which the viscosities of the conductive paste and the step-eliminating paste are relatively high, (b) is a diagram showing a case in which the viscosities of the conductive paste and the step-eliminating paste are medium, and (c) is a diagram showing a case in which the viscosities of the conductive paste and the step-eliminating paste are relatively low.

[0009] A multilayer ceramic capacitor 1 according to an embodiment of the present invention will now be described with reference to FIGS.

[0010] (Multilayer Ceramic Capacitor 1) As shown in Fig. 1, the multilayer ceramic capacitor 1 is a multilayer ceramic capacitor with a so-called two-terminal structure. The multilayer ceramic capacitor 1 includes a laminate 2, a first external electrode 3A, and a second external electrode 3B. The laminate 2 is substantially rectangular and has six outer surfaces. The laminate 2 includes an inner layer portion 11 in which a dielectric layer 14 and an internal electrode 15 are stacked. The first external electrode 3A and the second external electrode 3B may be collectively referred to as the "external electrodes 3."

[0011] In this specification, the direction in which the dielectric layers 14 and the internal electrodes 15 are stacked in the multilayer ceramic capacitor 1 is referred to as the stacking direction T. One of the directions perpendicular to the stacking direction T is referred to as the length direction L. The direction perpendicular to both the length direction L and the stacking direction T is referred to as the width direction W.

[0012] Of the six outer surfaces of the laminate 2, a pair of outer surfaces on both sides in the stacking direction T are referred to as the first main surface AA and the second main surface AB, a pair of outer surfaces extending in the stacking direction T and on both sides in the width direction W are referred to as the first side surface BA and the second side surface BB, and a pair of outer surfaces extending in the stacking direction T and on both sides in the length direction L are referred to as the first end surface CA and the second end surface CB.

[0013] The first main surface AA and the second main surface AB may be collectively referred to as "main surfaces A." The first side surface BA and the second side surface BB may be collectively referred to as "side surfaces B." The first end surface CA and the second end surface CB may be collectively referred to as "end surfaces C."

[0014] A cross section parallel to the stacking direction T and the length direction L is referred to as an "LT cross section." The cross section of Fig. 2 is an LT cross section passing through the center of the multilayer ceramic capacitor 1 in the width direction W. The cross section of Fig. 3 is a WT cross section passing through the center of the multilayer ceramic capacitor 1 in the length direction L.

[0015] (Laminate 2) The laminate 2 has an inner layer portion 11 and a pair of outer layer portions 12 arranged on either side of the inner layer portion 11 in the stacking direction T. The portions where three outer surfaces of the laminate 2 intersect are referred to as "corners." The portions where two outer surfaces of the laminate 2 intersect are referred to as "ridge portions." The corners and ridge portions of the laminate 2 are preferably rounded.

[0016] The outer dimensions of the laminate are, for example, 0.1 mm to 5.0 mm in the lamination direction T, 0.2 mm to 5.7 mm in the length direction L, and 0.1 mm to 5.0 mm in the width direction W. The outer dimensions of the multilayer ceramic capacitor 1 can be measured with a micrometer.

[0017] 2 and 3, the inner layer portion 11 has a plurality of dielectric layers 14 and a plurality of internal electrodes 15. The dielectric layers 14 and the internal electrodes 15 are alternately stacked.

[0018] The dielectric layer 14 is made of a perovskite compound. For example, a dielectric ceramic containing BaTiO3, CaTiO3, SrTiO3, or CaZrO3 as a main component is used as the material for the dielectric layer 14. The material for the dielectric layer 14 may contain, in addition to these main components, a secondary component such as a Mn compound, a Mg compound, a Si compound, a Fe compound, a Cr compound, a Co compound, a Ni compound, an Al compound, a V compound, or a rare earth compound.

[0019] The internal electrodes 15 are formed by sintering a conductive paste containing a metal powder that serves as a conductor, an organic solvent, a binder, and a dispersant on the dielectric layer 14. Metals such as Ni, Cu, Ag, Pd, an Ag-Pd alloy, Au, and Sn are used as the metal powder that serves as a conductor. These metals may be compounds containing these metal elements or alloys with other metals. The total number of internal electrodes 15 is, for example, 200 to 2000.

[0020] The internal electrodes 15 include a plurality of first internal electrodes 15A and a plurality of second internal electrodes 15B. The first internal electrodes 15A are exposed only at the first end face CA. The second internal electrodes 15B are exposed only at the second end face CB. The first internal electrodes 15A and the second internal electrodes 15B are arranged alternately. Of the internal electrodes 15, the one closest to the first main face AA is, for example, the first internal electrode 15A. Of the internal electrodes 15, the one closest to the second main face AB is, for example, the second internal electrode 15B. However, this is not limited thereto, and the one closest to the first main face AA may be the second internal electrode 15B, or the one closest to the second main face AB may be the first internal electrode 15A.

[0021] The first internal electrode 15A has a first effective portion 15Aa and a first lead portion 15Ab. The first effective portion 15Aa is a portion of the first internal electrode 15A that faces the adjacent second internal electrode 15B. The first lead portion 15Ab is a portion of the first internal electrode 15A that is led out from the first effective portion 15Aa toward the first end face CA.

[0022] The second internal electrode 15B has a second effective portion 15Ba and a second lead portion 15Bb. The second effective portion 15Ba is a portion of the second internal electrode 15B facing the adjacent first internal electrode 15A (first effective portion 15Aa). The second lead portion 15Bb is a portion of the second internal electrode 15B that is led out from the second effective portion 15Ba toward the second end face CB.

[0023] The first internal electrode 15A and the second internal electrode 15B may be collectively referred to as "internal electrodes 15." The first effective portion 15Aa and the second effective portion 15Ba may be collectively referred to as "effective portion 15a."

[0024] (Outer Layer Portion 12) The outer layer portion 12 is formed of the same material as the dielectric layer 14 of the inner layer portion 11. Note that no inner electrode 15 is disposed in the outer layer portion 12.

[0025] (External electrode 3) The first external electrode 3A is provided on the first end face CA. The first external electrode 3A covers not only the first end face CA but also part of the principal face A and part of the side face B. The first external electrode 3A is connected to the first internal electrode 15A.

[0026] The second external electrode 3B is provided on the second end face CB. The second external electrode 3B covers not only the second end face CB but also part of the main face A and part of the side face B. The second external electrode 3B is connected to the second internal electrode 15B.

[0027] The external electrodes 3 each include a base electrode layer 31 disposed on the surface of the laminate 2 and a plating layer 32 disposed on the base electrode layer 31 .

[0028] The base electrode layer 31 is a baked layer containing, for example, a conductive metal and glass. The conductive metal is, for example, nickel (Ni), copper (Cu), silver (Ag), palladium (Pd), gold (Au), an Ag—Pd alloy, or the like, and is preferably Cu.

[0029] The plating layer 32 is made of, for example, one metal selected from the group consisting of Ni, Cu, Ag, Pd, Au, and Sn, or an alloy containing such a metal. The plating layer 32 includes, for example, a first plating layer 321 disposed on the base electrode layer 31 and a second plating layer 322 disposed on the first plating layer 321.

[0030] The first plating layer 321 is, for example, a Ni plating layer. The second plating layer 322 is, for example, a Sn (tin) plating layer. The plating layer 322 may have a single layer structure.

[0031] The structure of the multilayer ceramic capacitor 1 is generally symmetrical in the longitudinal direction L. Therefore, when describing the LT cross section of the laminate 2, the region of the laminate 2 on the first end face CA side will be described as an example.

[0032] Here, in the LT cross section (see FIG. 2 ) passing through the center of the width direction W of the laminate 2, the line formed by connecting the imaginary line segments connecting the ends of adjacent first effective portions 15Aa on the first end face CA side is referred to as the "first virtual line L1." The region of the laminate 2 from the first virtual line L1 to the first end face CA is referred to as the "first region F1." The region of the first region F1 from the center of the first region F1 in the length direction L to the first virtual line L1 is referred to as the "first effective portion side region F11." The region of the laminate 2 from the center of the first region F1 in the length direction L to the first end face CA is referred to as the "first end face side region F12."

[0033] In at least one first lead portion 15Ab, the length of the portion of the first lead portion 15Ab located in the first effective portion region F11 is greater than the length of the portion of the first lead portion 15Ab located in the first end face region F12. The portion of each first lead portion 15Ab located in the first end face region F12 is linear. The portion of each first lead portion 15Ab located in the first effective portion region F11 has a portion that is inclined in the stacking direction T.

[0034] As shown in Figure 4, in the LT cross section passing through the center of the width direction W of the laminate 2, the relationship between the distance T1 in the stacking direction T between adjacent first internal electrodes 15A and second internal electrodes 15B at the center of the length direction L of the laminate 2 and the distance T2 in the stacking direction T between adjacent first lead portions 15Ab on the first end face CA satisfies T2 > (2 × T1).

[0035] Note that T2 is the distance between the portions of each first lead portion 15Ab that extend parallel to the longitudinal direction L. In other words, T2 is the distance between the portions of each first lead portion 15Ab that do not have the first curved portion 16A.

[0036] The dielectric layer 14 has an end surface side adjusting region 142 formed in the region between adjacent lead portions 15b and derived from step-eliminating paste 104 (described below). The end surface side adjusting region 142 has, for example, a first end surface side adjusting region 142A formed in the region between adjacent first lead portions 15Ab. Note that in the drawings, the region corresponding to the first end surface side adjusting region 142A is shown surrounded by a virtual line. Furthermore, the region of the dielectric layer 14 that does not correspond to the first end surface side adjusting region 142A is derived from the ceramic green sheet 102 (described below).

[0037] The first end surface side adjusting region 142A is located between the second internal electrode 15B and the first end surface CA. The first end surface side adjusting region 142A and the region of the dielectric layer 14 that does not correspond to the first end surface side adjusting region 142A overlap in the stacking direction T. The first end surface side adjusting region 142A abuts the first lead portion 15Ab. The first end surface side adjusting region 142A abuts or is close to, for example, the second internal electrode 15B. For example, a gap V is formed between the first end surface side adjusting region 142A and the second internal electrode 15B.

[0038] The presence of the first end face side adjustment region 142A increases the thickness of the dielectric layer 14 near the end of the second internal electrode 15B on the first end face CA side, thereby ensuring the magnitude of T2 and realizing the relationship T2 > (2 × T1).

[0039] In at least one first internal electrode 15A, the first lead portion 15Ab has a first bent portion 151A formed to include a portion of the first lead portion located in the first effective portion side region F11. Each first bent portion 151A is convex toward the center in the stacking direction T of the laminate 2. Each first bent portion 151A is, for example, V-shaped. For example, the entire first bent portion 151A is located in the first effective portion side region F11.

[0040] In the LT cross section passing through the center of the width direction W of the laminate 2, the ratio of the length of the portion of the first drawn portion 15Ab located in the first effective portion side region F11 to the length of the portion of the first drawn portion 15Ab located in the first end face side region F12 is defined as the "first length ratio."

[0041] The first length ratio of the first lead portion 15Ab that is closest to the first main surface AA is within a range of 1.05 to 1.40.

[0042] Of the two first lead portions 15Ab, the first lead portion 15Ab closest to the center in the stacking direction T of the laminate 2 has a larger first length ratio than the first lead portion 15Ab farther from the center in the stacking direction T of the laminate 2. The first length ratio of the first lead portion 15Ab closest to the first main surface AA (referred to as "first lead portion 15AbA") among the first lead portions 15Ab is larger than the first length ratio of the first lead portion 15Ab closest to the center in the stacking direction T of the laminate 2 (referred to as "first lead portion 15AbC") among the first lead portions 15Ab. Furthermore, the first length ratio may gradually increase from the first lead portion 15Ab arranged at the center in the stacking direction T of the laminate 2 to the first lead portion 15Ab arranged closest to the first main surface AA.

[0043] The maximum first length ratio among the first length ratios is either the first length ratio of the first lead portion 15AbA or the first length ratio of the first lead portion 15Ab (referred to as "first lead portion 15AbB") that is closest to the second main surface AB among the first lead portions 15Ab, more specifically, it is the first length ratio of the first lead portion 15AbA. The minimum first length ratio among the first length ratios is the first length ratio of the first lead portion 15AbC.

[0044] The position in the stacking direction T of the portion of the first lead portion 15Ab located in the first end face side region F12 overlaps the position of the first effective portion 15Aa in the stacking direction T. For example, in the first internal electrode 15A having the first lead portion 15AbA, the first effective portion 15Aa extends parallel to the longitudinal direction L. The entire first effective portion 15Aa and the entire portion of the first lead portion 15AbA located in the first end face side region F12 are located on the same straight line extending in the longitudinal direction L.

[0045] As described above, the structure of the multilayer ceramic capacitor 1 is approximately symmetrical in the length direction L. Therefore, the configuration of the region of the laminate 2 closer to the second end face CB is approximately the same as the configuration of the region of the laminate 2 closer to the first end face CA, with the "first end face CA" replaced with the "second end face CB." However, the structure of the multilayer ceramic capacitor 1 does not necessarily have to be approximately symmetrical in the length direction L. The configuration of the region of the laminate 2 closer to the second end face CB does not necessarily have to correspond to the configuration of the region of the laminate 2 closer to the first end face CA.

[0046] In a WT cross section (see FIG. 3 ) passing through the center of the laminate 2 in the longitudinal direction L, a virtual line passing through the end of the internal electrode 15 on the first side surface BA side and the center of the internal electrode 15 in the width direction W is defined as a "third virtual line L3." A virtual line passing through the end of the internal electrode 15 on the second side surface BB side and the center of the internal electrode 15 in the width direction W is defined as a "fourth virtual line L4."

[0047] In at least one internal electrode 15 (more specifically, the internal electrode 15 among the internal electrodes 15 that is closest to the first main surface AA), the angle at which the third virtual line L3 and the fourth virtual line L4 intersect with each other in the stacking direction T is greater than or equal to 170° and less than or equal to 180°.

[0048] A portion of the internal electrode 15 (more specifically, the effective portion 15 a) including one end in the width direction W curves in a direction approaching the center in the stacking direction T of the laminate 2 as it moves away from the center in the width direction W of the laminate 2, and more specifically, curves in an arc that convex in the direction away from the center in the stacking direction T and width direction W of the laminate 2. A portion of the internal electrode 15 (more specifically, the effective portion 15 a) including the other end in the width direction W curves in a direction approaching the center in the stacking direction T of the laminate 2 as it moves away from the center in the width direction W of the laminate 2, and more specifically, curves in an arc that convex in the direction away from the center in the stacking direction T and width direction W of the laminate 2.

[0049] The curvature of the internal electrode 15 near each end in the width direction W may be symmetrical or different from each other in the width direction W. The internal electrode 15 does not necessarily have to be curved near both ends in the width direction W of the internal electrode 15, and may be curved only near one end.

[0050] 5, the dielectric layer 14 is formed in a region overlapping the internal electrode 15 in the stacking direction T and has a side adjustment region 141 derived from the step-eliminating paste 104 (described later). The side adjustment region 141 has, for example, a first side adjustment region 141A formed between the second internal electrode 15B and the first side surface BA. In the drawing, the region corresponding to the first side adjustment region 141A is shown surrounded by a virtual line. The region of the dielectric layer 14 that does not correspond to the first side adjustment region 141A is derived from the ceramic green sheet 102 (described later).

[0051] The first side surface side adjusting region 141A and the region of the dielectric layer 14 that does not correspond to the first side surface side adjusting region 141A overlap in the stacking direction T. The first side surface side adjusting region 141A abuts or is close to the internal electrode 15.

[0052] The end surface side adjustment region 142 and the side surface side adjustment region 141 may be collectively referred to as "adjustment regions 141, 142."

[0053] Of the internal electrodes 15 , the thickness of the internal electrode 15 closest to the first main surface AA is smaller than the thickness of the internal electrode 15 closest to the center of the laminate 2 in the stacking direction T.

[0054] This makes it possible to prevent discontinuity of the internal electrodes 15 in the vicinity of the center of the laminate 2 in the lamination direction T. This makes it possible to improve the ESR and the withstand voltage characteristics.

[0055] It is assumed that there may be one or two of the internal electrodes 15 that are closest to the center in the stacking direction T of the laminate 2. When there are two of the internal electrodes 15 that are closest to the center in the stacking direction T of the laminate 2, in comparing the thicknesses of the internal electrodes 15, the thickness of the internal electrode 15 that is closest to the internal electrode 15 being compared, of the two internal electrodes 15 that are closest to the center in the stacking direction T of the laminate 2, is determined to be the thickness of the internal electrode 15 that is closest to the center in the stacking direction T of the laminate 2.

[0056] The thickness of the internal electrode 15 is measured at a WT cross section passing through the center of the length direction L of the laminate 2. The multilayer ceramic capacitor 1 is polished to expose a predetermined cross section. The exposed cross section is observed using an optical microscope. The thickness of the internal electrode 15 is measured along five lines parallel to the lamination direction T that divide the internal electrode 15 into six equal parts in the width direction W. The average of these measurements is taken as the thickness of the internal electrode 15.

[0057] (Method of Manufacturing Multilayer Ceramic Capacitor 1) Next, a method of manufacturing the multilayer ceramic capacitor 1 of the embodiment will be described. This will be described with reference to Figures 6 and 7. Figure 7 is a cross-sectional view showing a portion around the first lead portion 15Ab of an LT cross section passing through the center of the width direction W of the laminate 2, in which (a) is a diagram showing a case where the viscosities of the conductive paste and the step-eliminating paste are relatively high, (b) is a diagram showing a case where the viscosities of the conductive paste and the step-eliminating paste are medium, and (c) is a diagram showing a case where the viscosities of the conductive paste and the step-eliminating paste are relatively low.

[0058] (Internal Electrode Pattern Forming Process) First, a ceramic green sheet 102 is prepared by forming a ceramic slurry into a sheet shape. The ceramic green sheet 102 contains ceramic raw materials including a dielectric ceramic material, as well as a binder, a solvent, and the like. A rare earth-containing additive may also be added to the ceramic raw materials. First, a pattern of the internal electrodes 15 (sometimes simply referred to as the "internal electrode pattern 103") is printed on the ceramic green sheet 102 using a conductive paste. The shape of the internal electrode pattern 103 as viewed in the stacking direction T is, for example, rectangular. This results in a ceramic green sheet 101 for an inner layer portion on which the internal electrodes 15 are arranged. The internal electrode pattern 103 is formed by printing, for example, screen printing, gravure printing, letterpress printing, or the like.

[0059] (Step of arranging dielectric for eliminating step) Next, as shown in Fig. 6, a dielectric paste for eliminating step (sometimes simply referred to as "step elimination paste 104") is arranged on the ceramic green sheet 102. The step elimination paste 104 is arranged on at least a part (more specifically, over the entire area) of the surface of the ceramic green sheet 102 excluding the area where the internal electrode pattern 103 is arranged. The step elimination paste 104 is arranged, for example, at a position abutting or adjacent to an end in the length direction L of the internal electrode pattern 103. The step elimination paste 104 is arranged, for example, at a position abutting or adjacent to an end in the width direction W of the internal electrode pattern 103. The internal electrode pattern 103 is formed by printing, for example, screen printing, gravure printing, letterpress printing or the like.

[0060] The step-eliminating paste 104 contains ceramic raw materials including a dielectric ceramic material, as well as a binder, a solvent, etc. The grains (ceramic particles) of the step-eliminating paste 104 and the grains (ceramic particles) of the ceramic green sheet 102 may be different or the same. The amount of grains of the step-eliminating paste 104 and the amount of grains of the ceramic green sheet 102 may be different or the same.

[0061] Furthermore, the internal electrode pattern 103 is slightly deformed due to its own weight. The step-eliminating paste 104 is slightly deformed due to its own weight. The end of the step-eliminating paste 104 on the internal electrode pattern 103 side is, for example, an inclined surface. The peripheral edge of the internal electrode pattern 103 is, for example, an inclined surface. Therefore, the vicinity of the boundary between the internal electrode pattern 103 and the step-eliminating paste 104 described later is, for example, concave.

[0062] The thickness of the step-eliminating paste 104 and the shape of the end of the step-eliminating paste 104 are adjusted, for example, by adjusting the viscosity of the step-eliminating paste 104. The viscosity of the step-eliminating paste 104 is adjusted, for example, by adjusting the binder content in the step-eliminating paste 104. Similarly, the thickness of the internal electrode pattern 103 and the shape of the end of the internal electrode pattern 103 are adjusted, for example, by adjusting the viscosity of the conductive paste. Also, as an example, the thickness of the step-eliminating paste may be formed to be substantially the same as the thickness of the internal electrode pattern. The step-eliminating paste and the internal electrode pattern may overlap by, for example, 0 μm or more and 20 μm or less, or may be applied with a gap in the range of 0 μm or more and 100 μm or less.

[0063] The order in which the step of arranging dielectrics to eliminate the step and the step of forming internal electrode patterns can be reversed. For example, the step of arranging dielectrics to eliminate the step may be performed first, and then the step of forming internal electrode patterns may be performed.

[0064] (Laminating Process) Next, the ceramic green sheets 101 for the inner layer portion are laminated. The ceramic green sheets 101 for the inner layer portion are laminated so that the internal electrode patterns 103 are shifted by half a pitch between adjacent sheets in the length direction L. Next, ceramic green sheets for the outer layer portion, which will become the outer layer portion 12, are laminated on both sides of the laminated ceramic green sheets 101 for the inner layer portion in the lamination direction T. The ceramic green sheets for the outer layer portion are thermocompression bonded to the ceramic green sheets. This results in a mother block.

[0065] Each outer layer portion 12 may be formed by laminating a plurality of ceramic green sheets or by a single ceramic green sheet. The ceramic green sheet 101 for the inner layer portion and the ceramic green sheet for the outer layer portion may contain different components.

[0066] (Pressing Process) Next, the mother block is pressed in the stacking direction T by means of a hydrostatic press or the like. At this time, for example, of the internal electrode pattern 103 of the first internal electrode 15A, a portion that overlaps in the stacking direction T with the boundary (or gap V) between the internal electrode pattern 13 of the second internal electrode 15B and the step-eliminating paste 104 is bent into a shape that is convex toward the center of the stacking direction T of the mother block. As a result, the end portions in the width direction W of the first internal electrode 15A and the first lead portion 15Ab are each bent toward the center of the stacking direction T of the mother block. Note that, in the second internal electrode 15B as well, the end portions in the width direction W of the second internal electrode 15B and the second lead portion 15Bb are each bent.

[0067] The bending mode of the internal electrode 15 can be adjusted, for example, by adjusting the positional relationship between the step-eliminating paste 104 and the internal electrode pattern 103, by adjusting the thickness of the step-eliminating paste 104 or the thickness of the internal electrode pattern 103, or by adjusting the shape of the end of the step-eliminating paste 104 or the shape of the end of the internal electrode pattern 103.

[0068] 7(a) to 7(c), the higher the viscosity of the step-eliminating paste 104, the thicker the step-eliminating paste 104 (first end face side adjustment region 142A) becomes, and the shape of the end of the step-eliminating paste 104 becomes more sheer. The same applies to the internal electrode pattern 103 (second effective portion 15Ba).

[0069] The greater the thickness of the step-eliminating paste 104 and the thickness of the internal electrode pattern 103, the greater the bending of the first curved portion 16A in the stacking direction T, and the greater the width direction W dimension of the first curved portion 16A. The greater the thickness of the step-eliminating paste 104, the closer the end of the first curved portion 16A to the center in the length direction L of the laminate 2 becomes to the center in the length direction L of the laminate 2. The greater the thickness of the internal electrode pattern 103, the farther the end of the first curved portion 16A to the center in the length direction L of the laminate 2 becomes from the center in the length direction L of the laminate 2.

[0070] Furthermore, in the pressing process, the mother block is pressed from both sides in the stacking direction T. Therefore, the pressure acting on the laminate 2 decreases as the mother block approaches the center of the laminate 2 in the stacking direction T. For this reason, the magnitude of bending of the internal electrodes 15 tends to increase the farther they are from the center of the laminate 2 in the stacking direction T. The thickness of the internal electrodes tends to increase the closer they are to the center of the laminate 2 in the stacking direction T.

[0071] (Mother Block Cutting Process) Next, the mother block is divided along cutting lines corresponding to the dimensions of the laminate. The mother block is cut, for example, in the length direction L and the width direction W. This results in multiple rectangular blocks (referred to as "laminated chips"). It is preferable that the corners and ridges of the laminated chips are rounded, for example, by barrel polishing.

[0072] (Laminate Firing Step) Next, the laminated chip is heated at a predetermined firing temperature in a nitrogen atmosphere for a predetermined time, thereby obtaining the laminate 2.

[0073] (Base electrode layer forming process) Next, a base electrode layer 31 is formed on each end face C of the laminate 2. A conductive paste containing glass and metal is applied onto the laminate 2. Each base electrode layer 31 is formed, for example, so as to cover each end face C, a portion of each main face A, and a portion of each side face B. However, this is not limited to this, and each base electrode layer 31 may be disposed only on each end face C.

[0074] (Base Electrode Layer Baking Process) Next, the laminate 2 on which the base electrode layer 31 has been formed is heated in a nitrogen atmosphere at a predetermined baking temperature for a predetermined time, thereby baking the base electrode layer 31 to the laminate 2. Note that the laminate baking process and the base electrode layer baking process may be performed simultaneously after the material for the base electrode layer 31 has been placed on the laminate chip.

[0075] (Plating Process) Next, the plating layer 32 is formed on the base electrode layer 31. First, the first plating layer 321 is formed on the base electrode layer 31. Next, the second plating layer 322 is formed on the first plating layer 321. The first plating layer 321 is formed by, for example, Ni plating. The second plating layer 322 is formed by, for example, Sn plating. The first plating layer 321 and the second plating layer 322 are formed sequentially by, for example, electrolytic plating.

[0076] As a result of the above, the multilayer ceramic capacitor 1 shown in FIG. 1 is obtained.

[0077] (Effects of the Embodiment) According to the present embodiment, the following effects can be obtained.

[0078] The multilayer ceramic capacitor 1 includes an inner layer portion 11 including a plurality of alternately stacked dielectric layers 14 and a plurality of internal electrodes 15, a laminate 2 having first and second main faces AA and AB facing in a stacking direction T, first and second side faces BA and BB facing in a width direction W orthogonal to the stacking direction T, and first and second end faces CA and CB facing in a length direction L orthogonal to the stacking direction T and the width direction W, and a first external electrode 3A arranged on the first end face CA and a second external electrode 3B arranged on the second end face CB. The internal electrodes 15 include a first internal electrode 15A connected to the first external electrode 3A and a second internal electrode 15B connected to the second external electrode 3B. The first internal electrode 15A has a first effective portion 15Aa which is a portion facing the second internal electrode 15B, and a first drawn portion 15Ab which is a portion drawn from the first effective portion 15Aa toward the first end face CA. In a cross section parallel to the stacking direction T and the length direction L passing through the center of the width direction W of the laminate 2, the line formed by connecting the imaginary line segments connecting the ends of adjacent first effective portions 15Aa on the first end face CA side is defined as a first virtual line L1, the region of the laminate 2 from the first virtual line L1 to the first end face CA is defined as a first region F1, the region of the first region F1 from the center of the first region F1 in the length direction L to the first virtual line L1 is defined as a first effective portion side region F11, and the region of the first region F1 from the center of the first region F1 in the length direction L to the first end face CA is defined as a first end face side region F12. The length of the portion of the first drawn portion 15Ab located in the first effective portion side region F11 is greater than the length of the portion of the first drawn portion 15Ab located in the first end face side region F12.

[0079] The sinterability of the internal electrodes 15 and the sinterability of the dielectric layers 14 are different. Therefore, during firing of the laminate 2, cracks may occur in the dielectric layers 14 due to the difference in sinterability. If the cracks reach the opposing portions of the internal electrodes 15, the functionality of the multilayer ceramic capacitor 1 may be impaired. This problem is particularly likely to occur if the cracks occur near the opposing portions of the internal electrodes 15 (e.g., in the first effective portion side region F11). However, with this configuration, the contact area between the portion of the first lead portion 15Ab located in the first effective portion side region F11 and the dielectric layers 14 can be increased, thereby improving the adhesive strength therebetween. This prevents cracks from occurring near the opposing portions of the internal electrodes 15.

[0080] Therefore, it is possible to provide a multilayer ceramic capacitor 1 that can suppress the occurrence of structural defects.

[0081] The relationship between the distance T1 in the stacking direction T between adjacent first internal electrodes 15A and second internal electrodes 15B at the center of the longitudinal direction L of the laminate 2 and the distance T2 in the stacking direction T between adjacent first extraction portions 15Ab at the first end face CA satisfies T2 > 2 × T1.

[0082] This configuration can prevent the occurrence of steps near the boundary between the effective portion and the lead portion due to the thickness of the internal electrode 15. This makes it possible to effectively prevent the occurrence of structural defects.

[0083] The first lead portion 15Ab has a first bent portion 151A formed to include a portion of the first lead portion 15Ab located in the first effective portion side region F11.

[0084] According to this configuration, the anchor effect between the internal electrode 15 and the dielectric layer 14 can be enhanced in the first effective portion side region F11, thereby suppressing the occurrence of cracks in the first effective portion side region F11.

[0085] In a cross section parallel to the stacking direction T and the length direction L passing through the center of the width direction W of the laminate 2, if the ratio of the length of the portion of the first draw portion 15Ab located in the first effective portion side region F11 to the length of the portion of the first draw portion 15Ab located in the first end face side region F12 is defined as a first length ratio, the first length ratio of the first draw portion 15Ab that is closest to the first main surface AA is in the range of 1.05 or more and 1.40 or less.

[0086] According to this configuration, since the first length ratio is equal to or greater than a certain value, a sufficient anchor effect can be generated in the first effective portion side region F11. On the other hand, if the first length ratio is large, the length of the first lead portion 15Ab increases, which is thought to increase the ESR. However, according to this configuration, since the first length ratio is equal to or less than a certain value, it is possible to prevent the ESR from becoming excessively large.

[0087] In a cross section parallel to the stacking direction T and the length direction L passing through the center of the width direction W of the laminate 2, if the ratio of the length of the portion of the first draw portion 15Ab located in the first end face side region F12 to the length of the portion of the first draw portion 15Ab located in the first effective portion side region F11 is defined as a first length ratio, the maximum first length ratio is either the first length ratio of the first draw portion 15Ab that is closest to the first main surface AA of the first draw portion 15Ab or the first length ratio of the first draw portion 15Ab that is closest to the second main surface AB of the first draw portion 15Ab, and the minimum first length ratio is the first length ratio of the first draw portion 15Ab that is closest to the center of the stacking direction T of the laminate 2 of the first draw portion 15Ab.

[0088] Within the laminate 2, the closer to the outer surface, the more susceptible to heat during firing. Therefore, it is thought that within the laminate 2, the closer to the outer surface, the greater the difference in sinterability between the dielectric layers 14 and the internal electrodes 15, making internal defects more likely to occur during firing. However, with this configuration, the first length ratio can be increased in the internal electrodes 15 closest to the first main surface AA and the second main surface AB. Increasing the first length ratio can increase the anchor effect between the internal electrodes 15 and the dielectric layers 14. This can suppress the occurrence of structural defects around the internal electrodes 15 close to the outer surface of the laminate 2.

[0089] In a cross section parallel to the stacking direction T and the length direction L passing through the center of the width direction W of the laminate 2, the position in the stacking direction T of the portion of the first draw-out portion 15Ab located in the first end face side region F12 overlaps with the position in the stacking direction T of the effective portion.

[0090] According to this configuration, the current loop can be shortened, and therefore the ESR can be reduced.

[0091] In a cross section parallel to the stacking direction T and width direction W passing through the center of the length direction L of the laminate 2, if an imaginary line passing through the end of the internal electrode 15 on the first side surface BA side and the center of the width direction W of the internal electrode 15 is defined as a third imaginary line L3, and an imaginary line passing through the end of the internal electrode 15 on the second side surface BB side and the center of the width direction W of the internal electrode 15 is defined as a fourth imaginary line L4, the angle at which the third imaginary line L3 and the fourth imaginary line L4 intersect with each other in the stacking direction T is greater than or equal to 170° and less than or equal to 180°.

[0092] Defects inside the laminate 2 are thought to be more likely to occur in regions of the laminate 2 closer to the outer surface. However, with this configuration, the ends of the internal electrodes 15 in the width direction W are curved in the stacking direction T. This makes it easier to ensure the distance between the internal electrodes 15 and each side surface, thereby suppressing the occurrence of defects inside the laminate 2. Furthermore, if the internal electrodes 15 are excessively curved, there is a risk that short circuits between the internal electrodes 15 may easily occur. However, with this configuration, it is possible to prevent the internal electrodes 15 from becoming excessively curved, thereby suppressing the occurrence of short circuits between the internal electrodes 15.

[0093] Although the embodiments of the present invention have been described above, the present invention is not limited to the above-described embodiments, and various changes and modifications are possible.

[0094] In the above embodiment, the entire first bent portion 151A is disposed within the first effective portion side region F11, but this is not limited thereto. For example, the end of the first bent portion 151A on the first end face CA side may be disposed within the first end face side region F12, or may overlap the boundary between the first effective portion side region F11 and the first end face side region F12. The end of the first bent portion 151A on the central side in the longitudinal direction L of the laminate 2 may be disposed outside the first region F1. In other words, the first bent portion 151A may be formed from the first lead portion 15Ab to the first effective portion 15Aa. Note that the positions of each end of the first bent portion 151A in the longitudinal direction L can be adjusted by adjusting the arrangement of the internal electrode pattern 103 and the step-eliminating paste 104 (see FIG. 7 ).

[0095] In the above embodiment, the bending of the internal electrode 15 is caused by the step-eliminating paste 104, but this is not limiting. For example, the bending of the internal electrode 15 may be formed by pressing a pressing member against the mother block in the stacking direction. For example, the pressing member is pressed into a position on the surface of the mother block that overlaps in the stacking direction with the portion of the internal electrode 15 where the bending is desired. As the pressing member is pressed against the mother block, the internal electrode 15 is bent toward the center of the mother block in the stacking direction. For example, the pressing member is pressed against the mother block simultaneously from both sides in the stacking direction. The shape of the pressing member can be changed as needed to match the desired curved shape of the internal electrode 15.

[0096] In the above embodiment, the portion of the first lead portion 15Ab located in the first end face side region F12 is formed in a linear shape extending parallel to the longitudinal direction L. However, the shape of the portion of the first lead portion 15Ab located in the first end face side region F12 is not particularly limited. For example, the portion of the first lead portion 15Ab located in the first end face side region F12 may be inclined or curved in the stacking direction T. However, in terms of being able to reduce ESR by shortening the current loop, it is preferable that the position in the stacking direction T of at least a portion of the portion of the first lead portion 15Ab located in the first end face side region F12 is the same as the position in the stacking direction T of at least a portion of the first effective portion 15Aa.

[0097] In the above embodiment, in a cross section parallel to the stacking direction T and the width direction W that passes through the center of the length direction L of the laminate 2, the internal electrodes 15 are bent at each end in the width direction W. However, in a cross section parallel to the stacking direction T and the width direction W that passes through the center of the length direction L of the laminate 2, the internal electrodes 15 do not necessarily have to be bent.

[0098] In this case, for example, the laminate 2 may have side margins disposed on either side of the inner layer portion 11 and the outer layer portion 12 in the width direction W. The side margins are formed, for example, from a dielectric ceramic material. The side margins may be made of the same dielectric ceramic material as the dielectric layers 14 of the inner layer portion 11, or may be made of a different dielectric ceramic material.

[0099] It should be noted that even in a multilayer ceramic capacitor having side margins, each end of the internal electrode 15 in the width direction W can be curved by applying pressure with a pressure member during manufacturing.

[0100] In the above embodiment, the first end surface side adjusting region 142A is close to the second internal electrode 15B, but the first end surface side adjusting region 142A may be in contact with the second internal electrode 15B. The gap V does not necessarily have to be formed between the first end surface side adjusting region 142A and the second internal electrode 15B.

[0101] The present invention also includes the following combinations:

[0102] <1> A laminate having an inner layer portion including a plurality of alternately stacked dielectric layers and a plurality of inner electrodes, a first main surface and a second main surface opposing each other in a stacking direction, a first side surface and a second side surface opposing each other in a width direction perpendicular to the stacking direction, and a first end surface and a second end surface opposing each other in a length direction perpendicular to the stacking direction and the width direction, a first external electrode disposed on the first end surface, and a second external electrode disposed on the second end surface, wherein the inner electrodes include a first inner electrode connected to the first external electrode and a second inner electrode connected to the second outer electrode, and the first inner electrode has a first effective portion that is a portion facing the second inner electrode, and a first lead portion that is a portion led from the first effective portion toward the first end surface, a first virtual line is a line formed by connecting virtual line segments connecting end portions of adjacent first effective portions on the first end face side in a cross section passing through a center portion in the width direction and parallel to the stacking direction and the length direction; a first region is a region of the laminate from the first virtual line to the first end face; a first effective portion-side region is a region of the first region from a center portion of the first region in the length direction to the first virtual line; and a first end face-side region is a region of the first region from a center portion of the first region in the length direction to the first end face; and a first end face-side region is a region of the first region from a center portion of the first region in the length direction to the first end face. A multilayer ceramic capacitor has a length in which a portion of the first lead portion located in the first effective portion-side region is longer than a length in which a portion of the first lead portion located in the first end face-side region is longer than a length in which a portion of the first lead portion located in the first end face-side region is longer.

[0103] <2> The multilayer ceramic capacitor according to <1>, wherein a relationship between the stacking direction distance T1 between adjacent first internal electrodes and second internal electrodes at the longitudinal center of the laminate and the stacking direction distance T2 between adjacent first lead portions at the first end face satisfies T2>2×T1.

[0104] <3> The multilayer ceramic capacitor according to <1> or <2>, wherein the first lead portion has a first bent portion formed to include a portion of the first lead portion located in the first effective portion side region.

[0105] <4> The multilayer ceramic capacitor according to any one of <1> to <3>, wherein, in a cross section passing through the widthwise center portion of the laminate and parallel to the stacking direction and the lengthwise direction, the ratio of the length of a portion of the first lead portion located in the first effective portion side region to the length of a portion of the first lead portion located in the first end face side region is defined as a first length ratio, and the first length ratio of the first lead portion that is closest to the first main surface is within a range of 1.05 to 1.40.

[0106] <5> The multilayer ceramic capacitor according to any one of <1> to <4>, wherein, in a cross section passing through the width direction center of the laminate and parallel to the stacking direction and the length direction, a ratio of a length of a portion of the first lead portion located in the first end face side region to a length of a portion of the first lead portion located in the first effective portion side region is defined as a first length ratio, the maximum first length ratio of the first lead portion that is closest to a first main surface or the first length ratio of the first lead portion that is closest to a second main surface, and the minimum first length ratio of the first length ratios is the first length ratio of the first lead portion that is closest to a center of the laminate in the stacking direction.

[0107] <6> A multilayer ceramic capacitor according to any one of <1> to <5>, wherein, in a cross section passing through the widthwise center of the laminate and parallel to the stacking direction and the lengthwise direction, a position in the stacking direction of a portion of the first drawn portion located in the first end face side region overlaps with a position in the stacking direction of the first effective portion.

[0108] <7> The multilayer ceramic capacitor according to <6>, wherein, in a cross section parallel to the stacking direction and the width direction, passing through the center portion in the length direction of the laminate, an imaginary line passing through an end portion of the internal electrode on the first side surface side and the center portion in the width direction of the internal electrode is defined as a third imaginary line, and an imaginary line passing through an end portion of the internal electrode on the second side surface side and the center portion in the width direction of the internal electrode is defined as a fourth imaginary line, and among the angles formed by the third imaginary line and the fourth imaginary line, a pair of angles in the stacking direction is 170° or more and 180° or less.

[0109] REFERENCE SIGNS LIST 1 Multilayer ceramic capacitor 2 Laminate 3 External electrode 14 Dielectric layer 15 Internal electrode 15A First internal electrode 15Aa First effective portion 15Ab First lead portion 15B Second internal electrode 151A First bent portion AA First main surface AB Second main surface BA First side surface BB Second side surface CA First end surface CB Second end surface F1 First region F11 First effective portion side region F12 First end surface side region L1 First virtual line L3 Third virtual line L4 Fourth virtual line

Claims

1. A laminate having an inner layer portion including a plurality of alternately stacked dielectric layers and a plurality of inner electrodes, first and second main surfaces facing each other in the stacking direction, first and second side surfaces facing each other in a width direction perpendicular to the stacking direction, and first and second end surfaces facing each other in a length direction perpendicular to the stacking direction and the width direction; a first external electrode disposed on the first end surface; and a second external electrode disposed on the second end surface, wherein the inner electrodes have a first inner electrode connected to the first outer electrode and a second inner electrode connected to the second outer electrode, and the first inner electrode has a first effective portion that is a portion facing the second inner electrode, and a first drawn-out portion that is a portion drawn out from the first effective portion toward the first end surface, and in a cross section passing through a center portion in the width direction of the laminate and parallel to the stacking direction and the length direction, a line formed by connecting imaginary line segments that connect the ends of adjacent first effective portions on the first end surface side is defined as a first imaginary line, A multilayer ceramic capacitor in which a region of the laminate from the first imaginary line to the first end face is defined as a first region, a region of the first region from a center of the first region in the length direction to the first imaginary line is defined as a first effective portion side region, and a region of the first region from the center of the first region in the length direction to the first end face is defined as a first end face side region, wherein a length of a portion of the first drawn portion located in the first effective portion side region is longer than a length of a portion of the first drawn portion located in the first end face side region.

2. The multilayer ceramic capacitor according to claim 1, wherein the relationship between the stacking direction distance T1 between adjacent first internal electrodes and second internal electrodes at the longitudinal center of the laminate and the stacking direction distance T2 between adjacent first lead portions at the first end face satisfies T2 > 2 × T1.

3. A multilayer ceramic capacitor according to claim 1 or 2, wherein the first lead portion has a first bent portion formed to include a portion of the first lead portion located in the first effective portion side region.

4. A multilayer ceramic capacitor according to any one of claims 1 to 3, wherein, in a cross section passing through the widthwise center of the laminate and parallel to the stacking direction and the lengthwise direction, the ratio of the length of the portion of the first lead portion located in the first effective portion side region to the length of the portion of the first lead portion located in the first end face side region is defined as a first length ratio, and the first length ratio of the first lead portion that is closest to the first main surface is within the range of 1.05 to 1.

40.

5. The multilayer ceramic capacitor according to any one of claims 1 to 4, wherein, in a cross section passing through the widthwise center of the laminate and parallel to the stacking direction and the lengthwise direction, the ratio of the length of a portion of the first extracted portion located in the first end face side region to the length of a portion of the first extracted portion located in the first effective portion side region is defined as a first length ratio, the maximum first length ratio of the first extracted portion that is closest to the first main surface or the first length ratio of the first extracted portion that is closest to the second main surface, and the minimum first length ratio of the first extracted portion that is closest to the stacking direction center of the laminate.

6. A multilayer ceramic capacitor according to any one of claims 1 to 5, wherein, in a cross section passing through the widthwise center of the laminate and parallel to the lamination direction and the lengthwise direction, the position in the lamination direction of a portion of the first drawn-out portion located in the first end face side region overlaps with the position in the lamination direction of the first effective portion.

7. The multilayer ceramic capacitor according to claim 6, wherein, in a cross section of the laminate parallel to the lamination direction and the width direction, passing through the center part in the length direction, an imaginary line passing through an end part of each internal electrode on the first side surface side and the center part in the width direction of the internal electrode is defined as a third imaginary line, and an imaginary line passing through an end part of each internal electrode on the second side surface side and the center part in the width direction of the internal electrode is defined as a fourth imaginary line, and the angle formed by the third imaginary line and the fourth imaginary line in a pair in the lamination direction is 170° or more and 180° or less.

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