Substrate processing method, substrate processing system, and parameter correction method

Abstract

In this substrate processing method for processing a substrate, the substrate includes a first substrate and a second substrate that is processed after the first substrate, and the method includes: using an optimization technique to determine an estimated etching amount distribution that can be implemented on the first substrate, and determining the optimal etching conditions at this time, from a predetermined first target etching amount distribution of an etching target on the first substrate, determined in advance using a plurality of items of training data including the radial direction etching amount distribution of an etching target on the substrate when the etching target is etched under a plurality of different etching conditions; etching the etching target on the first substrate on the basis of the optimal etching conditions; acquiring an actual measured etching amount distribution by measuring the thickness of the first substrate after the etching; acquiring the difference between the estimated etching amount distribution and the actual measured etching amount distribution; and correcting either or both of the training data and a predetermined second target etching amount distribution of the etching target on the second substrate on the basis of the difference.

Description

Substrate processing method, substrate processing system, and parameter correction method

[0001] The present disclosure relates to a substrate processing method, a substrate processing system, and a parameter correction method.

[0002] Patent Document 1 discloses a method for manufacturing a semiconductor wafer, which includes a step of planarizing at least the front surface of a wafer obtained by slicing a semiconductor ingot, and a step of etching the front surface of the planarized wafer by spin etching.

[0003] Japanese Patent Application Publication No. 11-135464

[0004] The technology according to the present disclosure appropriately controls the surface shape of a substrate after etching the surface of the substrate.

[0005] One aspect of the present disclosure is a substrate processing method for processing substrates, the substrates including a first substrate and a second substrate processed after the first substrate, the method including: determining a feasible estimated etching amount distribution for the first substrate by an optimization technique from a predetermined first target etching amount distribution of the etching object for the first substrate, which is determined by using a plurality of learning data including a radial etching amount distribution of the etching object when the etching object for the substrate is etched under a plurality of different etching conditions; determining optimal etching conditions for the determination; etching the etching object for the first substrate based on the optimal etching conditions; measuring a thickness of the first substrate after the etching to obtain an actual etching amount distribution; obtaining a difference between the estimated etching amount distribution and the actual etching amount distribution; and correcting, based on the difference, one or both of the learning data and the predetermined second target etching amount distribution of the etching object for the second substrate.

[0006] According to the present disclosure, it is possible to appropriately control the surface shape of a substrate after etching the surface of the substrate.

[0007] FIG. 1 is a plan view showing an outline of the configuration of a wafer processing system. FIG. 2 is a side view showing an outline of the configuration of an etching apparatus. FIG. 3 is an explanatory diagram showing how a nozzle moves in a radial direction. FIG. 4 is a side view showing an example of the configuration of a grinding unit and a chuck. FIG. 5 is a flow chart showing main steps of a wafer processing method. FIG. 6 is a flow chart showing main steps of a method for determining optimal etching conditions. FIG. 7 is a flow chart showing main steps of a method for correcting learning data. FIG. 8 is a block diagram showing main steps of a method for correcting learning data. FIG. 9 is a flow chart showing main steps of a method for correcting target etching amount distribution. FIG. 10 is a block diagram showing main steps of a method for correcting target etching amount distribution. FIG. 11 is a flow chart showing main steps of a method for correcting target etching amount distribution. FIG. 12 is a block diagram showing main steps of a method for correcting target etching amount distribution. FIG. 13 is an explanatory diagram showing an example of a disturbance component in a residual.

[0008] Hereinafter, a wafer processing system as a substrate processing system and a wafer processing method as a substrate processing method according to the present embodiment will be described with reference to the drawings. Note that in this specification and the drawings, elements having substantially the same functional configurations are designated by the same reference numerals, and redundant description will be omitted.

[0009] In the wafer processing system 1 according to this embodiment, a wafer W serving as a substrate obtained by slicing an ingot is subjected to processing to improve the in-plane thickness uniformity. Hereinafter, the slicing surfaces of the wafer W will be referred to as the first surface Wa and the second surface Wb. The first surface Wa is the surface opposite the second surface Wb. The first surface Wa and the second surface Wb may also be collectively referred to as the surfaces of the wafer W.

[0010] 1, the wafer processing system 1 has a configuration in which a loading / unloading station 2 and a processing station 3 are integrally connected. In the loading / unloading station 2, for example, a cassette C capable of accommodating a plurality of wafers W is loaded and unloaded between the loading / unloading station 2 and the outside. The processing station 3 is equipped with various processing devices that perform desired processing on the wafers W.

[0011] The loading / unloading station 2 is provided with a cassette mounting table 10 on which a plurality of cassettes C, for example, three cassettes C, are mounted. A wafer transfer device 20 is provided adjacent to the cassette mounting table 10 on the negative side of the X-axis of the cassette mounting table 10. The wafer transfer device 20 is configured to be movable on a transfer path 21 extending in the Y-axis direction. The wafer transfer device 20 also has, for example, two transfer arms 22 that hold and transfer wafers W. Each transfer arm 22 is configured to be movable horizontally, vertically, around a horizontal axis, and around a vertical axis. The configuration of the transfer arms 22 is not limited to this embodiment and may have any configuration. The wafer transfer device 20 is configured to be able to transfer wafers W to the cassettes C on the cassette mounting table 10 and to a transition device 30, which will be described later.

[0012] In the loading / unloading station 2 , a transition device 30 for transferring the wafer W to and from the processing station 3 is provided adjacent to the wafer transfer device 20 on the negative side of the X axis of the wafer transfer device 20 .

[0013] For example, three processing blocks G1 to G3 are provided in the processing station 3. The first processing block G1, the second processing block G2, and the third processing block G3 are arranged in this order from the positive side of the X axis (the side of the loading / unloading station 2) to the negative side.

[0014] The first processing block G1 is provided with an etching device 40, a thickness measurement device 50, a reversing device 51, and a wafer transfer device 60. The etching device 40, the thickness measurement device 50, and the reversing device 51 are arranged in a stacked configuration. Note that the number and arrangement of the etching devices 40, the thickness measurement devices 50, and the reversing devices 51 are not limited to this.

[0015] The etching device 40 etches silicon (Si) on the first surface Wa or the second surface Wb after grinding by the grinding device 90 described below. In order to improve the throughput of wafer processing, a plurality of etching devices 40 may be provided.

[0016] As shown in FIG. 2, the etching device 40 includes a wafer holder 41 , a rotating mechanism 42 , a nozzle 43 , and a moving mechanism 44 .

[0017] The wafer holding unit 41 holds the outer edge of the wafer W at multiple points, three points in this embodiment. The configuration of the wafer holding unit 41 is not limited to the example shown in the figure, and for example, the wafer holding unit 41 may include a chuck (not shown) that suction-holds the wafer W from below. The wafer holding unit 41 is configured to be rotatable about a vertical rotation center line 41a by a rotation mechanism 42, thereby allowing the wafer W held on the wafer holding unit 41 to rotate.

[0018] The nozzle 43 supplies the etching liquid E to the first surface Wa or the second surface Wb of the wafer W held by the wafer holder 41. The nozzle 43 is connected to an etching liquid supply source (not shown) that supplies the etching liquid E to the nozzle 43. The nozzle 43 is provided above the wafer holder 41 and configured to be movable in the horizontal and vertical directions by a movement mechanism 44. In one example, the nozzle 43 is configured to be capable of reciprocating movement (scan movement) or swiveling along a rotation center line 41 a of the wafer holder 41, i.e., above the center of the wafer W as shown in FIG. 3 .

[0019] The etching solution E contains hydrofluoric acid (HF), nitric acid (HNO ３ ) and phosphoric acid (H ３ P.O. ４ In one example, the etching solution E is a mixed solution containing hydrofluoric acid, nitric acid, phosphoric acid, and water. The etching target may be, for example, amorphous silicon.

[0020] 1 includes, in one example, a measurement unit (not shown) and a calculation unit (not shown). The measurement unit includes a sensor that measures the thickness of the wafer W after etching at multiple points. The calculation unit acquires the thickness distribution of the wafer W from the measurement results (thickness of the wafer W) by the measurement unit, and further calculates the thickness deviation (TTV: Total Thickness Variation) of the wafer W. Note that the calculation of the thickness distribution and flatness of the wafer W may be performed by a control device 130 (described later) instead of the calculation unit. In other words, a calculation unit (not shown) may be provided within the control device 130 (described later). Note that the configuration of the thickness measurement device 50 is not limited to this and may be configured arbitrarily.

[0021] The reversing device 51 vertically reverses the first surface Wa and the second surface Wb of the wafer W. The reversing device 51 may have any configuration.

[0022] The wafer transfer device 60 is disposed on the negative side of the transition device 30 in the X-axis direction. The wafer transfer device 60 has, for example, two transfer arms 61 that hold and transfer a wafer W. Each transfer arm 61 is configured to be movable horizontally, vertically, around a horizontal axis, and around a vertical axis. The wafer transfer device 60 is configured to be able to transfer the wafer W to the transition device 30, the etching device 40, the thickness measurement device 50, the inversion device 51, the cleaning device 70 described below, the thickness measurement device 71 described below, the buffer device 72 described below, and the inversion device 73 described below.

[0023] The second processing block G2 is provided with a cleaning device 70, a thickness measuring device 71, a buffer device 72, an inverting device 73, and a wafer transfer device 80. The cleaning device 70, the thickness measuring device 71, the buffer device 72, and the inverting device 73 are arranged in a stacked configuration. Note that the number and arrangement of the cleaning devices 70, the thickness measuring devices 71, the buffer device 72, and the inverting device 73 are not limited to this.

[0024] The cleaning device 70 cleans at least the first surface Wa or the second surface Wb after grinding by the grinding device 90 described below.

[0025] In one example, the thickness measuring device 71 has the same configuration as the above-described thickness measuring device 50. However, the configuration of the thickness measuring device 71 is not limited to this, and can be configured arbitrarily.

[0026] The buffer device 72 temporarily holds unprocessed wafers W that are transferred from the first processing block G1 to the second processing block G2. The configuration of the buffer device 72 is optional. The buffer device 72 may also include an alignment mechanism (not shown) that adjusts the center position of the wafer W relative to chucks 93 a, 93 b (described later) and / or the horizontal orientation of the wafer W.

[0027] The reversing device 73 vertically reverses the first surface Wa and the second surface Wb of the wafer W. The reversing device 73 may have any configuration.

[0028] The wafer transfer device 80 is disposed, for example, on the Y-axis positive side of the cleaning device 70, the thickness measurement device 71, the buffer device 72, and the inverting device 73. The wafer transfer device 80 has, for example, two transfer arms 81 that suction-hold and transport the wafer W using a suction-holding surface (not shown). Each transfer arm 81 is supported by an articulated arm member 82 and is configured to be movable horizontally, vertically, around a horizontal axis, and around a vertical axis. The wafer transfer device 80 is configured to be able to transport the wafer W to the etching device 40, the thickness measurement device 50, the inverting device 51, the cleaning device 70, the thickness measurement device 71, the buffer device 72, the inverting device 73, and a grinding device 90, which will be described later.

[0029] The third processing block G3 is provided with a grinding device 90. The grinding device 90 grinds and flattens the first surface Wa or the second surface Wb of the wafer W.

[0030] The grinding device 90 has a rotary table 91. The rotary table 91 is configured to be rotatable about a vertical rotation center line 92 by a rotation mechanism (not shown). Four chucks 93a, 93b that suction-hold the wafer W are provided on the rotary table 91. Porous chucks, for example, are used as the chucks 93a, 93b. The surfaces of the chucks 93a, 93b, i.e., the holding surfaces for the wafer W, have a convex shape in which the central portion protrudes compared to the outer periphery in a side view. Note that although this protrusion in the central portion is minute, in the following description, the protrusion in the central portion of the chucks 93a, 93b may be illustrated exaggerated for clarity.

[0031] Of the four chucks 93a, 93b, two first chucks 93a are chucks used for grinding at a first processing position B1, which will be described later. These two first chucks 93a are arranged in positions that are point-symmetrical with respect to the rotation center line 92. The remaining two second chucks 93b are chucks used for grinding at a second processing position B2, which will be described later. These two second chucks 93b are also arranged in positions that are point-symmetrical with respect to the rotation center line 92. In other words, the first chucks 93a and the second chucks 93b are arranged alternately in the circumferential direction.

[0032] As shown in FIG. 4 , the four chucks 93a, 93b are respectively held by four chuck bases 94. The chuck base 94 is provided with a tilt adjustment mechanism 95 that adjusts the relative tilt between the grinding units 101, 111 (described later) and the chucks 93a, 93b. The tilt adjustment mechanism 95 has a fixed shaft 96 provided on the underside of the chuck base 94 and multiple, for example, two, lift shafts 97. Each lift shaft 97 is configured to be extendable and retractable, and raises and lowers the chuck base 94. The tilt adjustment mechanism 95 tilts the chucks 93a, 93b and the chuck base 94 by vertically raising and lowering the other end of the chuck base 94 using one end of the outer periphery of the chuck base 94 (a position corresponding to the fixed shaft 96) as a base point. This allows the relative tilt between the grinding surfaces of the grinding units 101, 111 at processing positions B1 to B2 (described later) and the upper surfaces of the chucks 93a, 93b to be adjusted. The configuration of the tilt adjustment mechanism 95 is not limited to this, and it is sufficient if it can adjust the relative angle (parallelism) of the surfaces (holding surfaces) of the chucks 93a and 93b with respect to the grinding surfaces of the grinding portions 101 and 111.

[0033] 1, the four chucks 93a, 93b can be moved to delivery positions A1-A2 and processing positions B1-B2 by rotating the rotary table 91. Furthermore, each of the four chucks 93a, 93b is configured to be rotatable about a vertical axis by a rotation mechanism (not shown).

[0034] The first transfer position A1 is a position on the positive X-axis side and the positive Y-axis side of the rotation center line 92 of the turntable 91, where the wafer W is transferred to the first chuck 93a when the first surface Wa is ground. The second transfer position A2 is a position on the positive X-axis side and the negative Y-axis side of the rotation center line 92 of the turntable 91, where the wafer W is transferred to the second chuck 93b when the second surface Wb is ground.

[0035] The first processing position B1 is a position on the negative X-axis side and the negative Y-axis side with respect to the rotation center line 92 of the rotary table 91, and the first grinding unit 100 is disposed therein. As an example, the first grinding unit 100 grinds the first surface Wa or the second surface Wb of the wafer W held by the first chuck 93 a.

[0036] As shown in FIG. 4 , the first grinding unit 100 has a grinding unit 101. The grinding unit 101 has a grinding stone 102, a grinding wheel 103, a mount 104, a spindle 105, and a drive unit 106. The grinding wheel 103 has an annular shape and supports the grinding stone 102 on its underside. The mount 104 supports the grinding wheel 103. The spindle 105 rotates the grinding wheel 103 and the grinding stone 102 via the mount 104. The drive unit 106 is attached to the spindle 105 and incorporates, for example, a motor (not shown), which rotates the spindle 105. As shown in FIG. 1 , the grinding unit 101 is configured to be movable vertically along a support 107 by a drive unit (not shown).

[0037] The second processing position B2 is a position on the negative X-axis side and the positive Y-axis side with respect to the rotation center line 92 of the rotary table 91, and the second grinding unit 110 is disposed thereat. The second grinding unit 110, for example, grinds the second surface Wb or the first surface Wa of the wafer W held by the second chuck 93b. The second grinding unit 110 has the same configuration as the first grinding unit 100. That is, as shown in FIGS. 1 and 4 , the second grinding unit 110 has a grinding section 111 (grinding stone 112, grinding wheel 113, mount 114, spindle 115, and drive section 116) and a support column 117.

[0038] As described above, the holding surfaces of the chucks 93 a, 93 b have a convex shape. Therefore, when the wafer W is ground using the grinding units 100, 110, the annularly arranged grinding wheels 102, 112 contact the wafer W in an arc-shaped line from the center to the outer periphery. In this state, the entire surface of the wafer W is ground by rotating the chucks 93 a, 93 b and the grinding wheels 103, 113, respectively.

[0039] In addition, in the grinding units 100, 110, the tilt adjustment mechanism 95 described above adjusts the relative angle (tilt) between the holding surfaces of the chucks 93a, 93b and the grinding surfaces of the grinding wheels 102, 112, thereby controlling the shape of the wafer W after grinding to one of a flat type, a central convex type, a central concave type (V-shaped), a W-shaped type, an M-shaped type, or a combination of any two of these. The flat type is a shape in which the entire surface of the wafer W is adjusted to a desired thickness deviation (TTV) or less, preferably a shape in which the thickness is controlled to be uniform over the entire surface. The central convex type is a shape in which the thickness at the center of the wafer W is greater than the thickness at the outer periphery. The central concave type is a shape in which the thickness at the central concave portion of the wafer W is smaller than the thickness at the outer periphery. The W-shaped shape is a shape in which the thickness at the radial center point of the wafer W is smaller than the thickness at the center and outer periphery. The M-shaped shape is a shape in which the thickness at the radial center point of the wafer W is greater than the thickness at the center and outer periphery.

[0040] A thickness measuring device (not shown) for measuring the thickness of the wafer W after grinding may be provided at the transfer positions A1, A2 or the processing positions B1, B2.

[0041] The above-described wafer processing system 1 is provided with a display panel 120. The display panel 120 is, for example, a monitor or a touch panel, and may be attached directly to the wafer processing system 1 or may be a panel that can be viewed remotely. The display panel 120 displays a screen for operating each process performed in the wafer processing system 1. A signal representing the operation result on the display panel 120 is output to a control device 130, which will be described later.

[0042] The wafer processing system 1 described above is provided with a controller 130. The controller 130 processes computer-executable instructions that cause the wafer processing system 1 to perform the various steps described in this disclosure. The controller 130 may be configured to control each element of the wafer processing system 1 to perform the various steps described herein. In one embodiment, some or all of the controller 130 may be included in the wafer processing system 1. The controller 130 is realized, for example, by a computer. The controller 130 may be one or more circuits, and may be provided as an integrated unit or partially separated. The controller 130 may include a processing unit, a memory unit, and a communication interface. The functions performed by the processing unit described in this disclosure may be implemented in circuitry or processing circuitry, including general-purpose processors, application-specific processors, integrated circuits, ASICs (Application Specific Integrated Circuits), CPUs (Central Processing Units), conventional circuitry, and / or combinations thereof, programmed to perform the described functions. A processor is considered to be a circuit or processing circuit including transistors and other circuitry. A processor may also be a programmed processor that executes a program stored in a memory unit. This program (computer program product) may be stored in a memory unit in advance or may be obtained via a medium H when needed. The medium H may be any of various computer-readable storage media, such as a removable storage medium such as a memory card, an optical disc, or a hard disk drive (HDD), and the program may be provided stored on the storage medium. The medium H may also be a communication line connected to the communication interface, and the program may be distributed by a remote server device or the like. The acquired program is stored in the storage unit, and is read from the storage unit and executed by the processing unit.The storage unit may include a storage medium such as a random access memory (RAM), a read-only memory (ROM), an electronically erasable programmable read-only memory (EEPROM), a hard disk drive (HDD), or a solid state drive (SSD), or a combination thereof. The communication interface may communicate with the wafer processing system 1 via a communication line such as a local area network (LAN). In this disclosure, a circuit, unit, or means is hardware programmed to realize the described functions or hardware configured to execute the functions. The hardware may be any hardware described in this disclosure or any hardware known to be programmed to realize the described functions or to execute the functions. If the hardware is a processor considered to be a type of circuit, the circuit, means, or unit is a combination of hardware and software used to configure the hardware and / or processor.

[0043] <Wafer Processing Method> Next, a description will be given of wafer processing performed using the wafer processing system 1 configured as described above. In this embodiment, processing is performed on a wafer W cut from an ingot using a wire saw or the like, or a lapped wafer W, to improve the in-plane thickness uniformity.

[0044] First, before processing the wafer W in the wafer processing system 1, the control device 130 determines a target thickness distribution (thickness profile) in the radial direction (within the wafer surface) when grinding the first surface Wa of the wafer W, which will be described later. Hereinafter, this target thickness distribution during grinding will be referred to as the "grinding target thickness distribution." The control device 130 also determines a target thickness distribution in the radial direction when grinding the second surface Wb of the wafer W, which will be described later (St1 in FIG. 5). Note that the method by which the control device 130 determines the grinding target thickness distribution of the first surface Wa and the grinding target thickness distribution of the second surface Wb will be described later.

[0045] Once the grinding target thickness distribution has been determined as pre-processing, wafer processing is then performed in the wafer processing system 1. In this wafer processing, first, a cassette C containing a plurality of wafers W is placed on the cassette mounting table 10 of the carry-in / out station 2. The wafers W are stored in the cassette C with their first surfaces Wa facing upward and their second surfaces Wb facing downward. Next, the wafer transfer device 20 removes the wafers W from the cassette C and transfers them to the transition device 30. The wafers W transferred to the transition device 30 are then transferred to the buffer device 72 by the wafer transfer device 60.

[0046] Next, the wafer W is transferred to the grinding device 90 by the wafer transfer device 80 and transferred to the first chuck 93a at the first transfer position A1. The second surface Wb of the wafer W is held by suction in the first chuck 93a.

[0047] Next, the turntable 91 is rotated to move the wafer W to the first processing position B1. Then, the first surface Wa is ground by the first grinding unit 100 based on the target grinding thickness distribution of the first surface Wa determined in St1 (St2 in FIG. 5).

[0048] Next, the rotary table 91 is rotated to move the wafer W to the first delivery position A1.

[0049] Next, the wafer W is transferred to the cleaning device 70 by the wafer transfer device 80. In the cleaning device 70, the first surface Wa of the wafer W is cleaned (St3 in FIG. 5). In St3, the second surface Wb of the wafer W may also be cleaned.

[0050] Next, the wafer W is transferred to the reversing device 73 by the wafer transfer device 80. In the reversing device 73, the first surface Wa and the second surface Wb of the wafer W are reversed upside down (St4 in FIG. 5). That is, the wafer W is reversed so that the first surface Wa faces downward and the second surface Wb faces upward.

[0051] Next, the wafer W is transferred to the grinding device 90 by the wafer transfer device 80 and transferred to the second chuck 93b at the second transfer position A2. The first surface Wa of the wafer W is held by suction on the second chuck 93b.

[0052] Next, the turntable 91 is rotated to move the wafer W to the second processing position B2. Then, the second surface Wb of the wafer W is ground by the second grinding unit 110 based on the target grinding thickness distribution of the second surface Wb determined in St1 (St5 in FIG. 5).

[0053] Next, the rotary table 91 is rotated to move the wafer W to the second delivery position A2.

[0054] Next, the wafer W is transferred by the wafer transfer device 80 to the cleaning device 70. In the cleaning device 70, the second surface Wb of the wafer W is cleaned (St6 in FIG. 5). In St6, the first surface Wa of the wafer W may also be cleaned.

[0055] Next, the wafer W is transferred to the thickness measuring device 71 by the wafer transfer device 80 or the wafer transfer device 60. The thickness measuring device 71 measures the thickness of the wafer W at multiple points after grinding the second surface Wb, thereby obtaining the thickness distribution of the wafer W, and further calculates the thickness deviation of the wafer W (St7 in FIG. 5 ). The calculated thickness distribution and thickness deviation of the wafer W are output to, for example, the control device 130. Note that if the grinding device 90 is provided with a thickness measuring device, the thickness of the wafer W after grinding may be measured by the thickness measuring device of the grinding device 90.

[0056] The control device 130 determines optimal etching conditions for the second surface Wb, optimizing the etching amount distribution (etching profile) in the etching process of the second surface Wb, from the thickness distribution and thickness deviation of the wafer W calculated in St7 and output to the control device 130 (St8 in FIG. 5 ). The etching amount is the amount of the wafer W removed by etching, and the etching amount distribution is the distribution of the etching amount in the radial direction of the wafer W (within the wafer surface). A method for determining the optimal etching conditions for the second surface Wb in the control device 130 will be described later. As will be described in detail later, when determining the optimal etching conditions, a feasible estimated etching amount distribution that approximates the target etching amount distribution is determined.

[0057] Next, the wafer W is transferred by the wafer transfer device 60 to the etching device 40. In the etching device 40, the second surface Wb of the wafer W is etched with the etching solution E under the optimal etching conditions determined in St8 (St9 in FIG. 5). In St9, the second surface Wb is etched under the optimal etching conditions, thereby processing the second surface Wb into a target shape.

[0058] Next, the wafer W is transferred to the reversing device 51 by the wafer transfer device 60. In the reversing device 51, the first surface Wa and the second surface Wb of the wafer W are reversed upside down (St10 in FIG. 5). That is, the wafer W is reversed so that the first surface Wa faces upward and the second surface Wb faces downward.

[0059] Next, the wafer W is transferred by the wafer transfer device 60 to the thickness measurement device 50. The thickness measurement device 50 measures the thickness of the wafer W at multiple points after etching on the second surface Wb to obtain the thickness distribution of the wafer W, and further calculates the thickness deviation of the wafer W (St11 in FIG. 5). The calculated thickness distribution and thickness deviation of the wafer W are output to, for example, the control device 130. The control device 130 calculates and stores the measured etching amount distribution as the difference between the actual measured values ​​of the thickness distribution of the second surface Wb of the wafer W before and after etching. The measured etching amount distribution is used, for example, in a correction method described below.

[0060] The control device 130 determines optimal etching conditions for the first surface Wa, which optimize the etching amount distribution in the etching process on the first surface Wa, from the thickness distribution and thickness deviation of the wafer W calculated in St11 and output to the control device 130 (St12 in FIG. 5). The method for determining the optimal etching conditions for the first surface Wa in the control device 130 will be described later.

[0061] Next, the wafer W is transferred by the wafer transfer device 60 to the etching device 40. In the etching device 40, the first surface Wa of the wafer W is etched with the etching solution E under the optimal etching conditions determined in St12 (St13 in FIG. 5). In St13, by etching the first surface Wa under the optimal etching conditions, the etching amount distribution is optimized and the first surface Wa is processed into a target shape.

[0062] Next, the wafer W is transferred by the wafer transfer device 60 to the thickness measurement device 50. The thickness measurement device 50 measures the thickness of the wafer W after etching at multiple points on both the first surface Wa and the second surface Wb, thereby obtaining a thickness distribution of the wafer W (St14 in FIG. 5). The thickness measurement device 50 may also calculate a thickness deviation of the wafer W. The obtained thickness distribution of the wafer W is output to, for example, the control device 130, and is used, for example, in processing another wafer W to be processed next in the wafer processing system 1. The control device 130 calculates and stores an actual etching amount distribution as the difference between the actual measured values ​​of the thickness distribution of the first surface Wa of the wafer W before and after etching. The actual etching amount distribution is used, for example, in a correction method described below.

[0063] Thereafter, the wafer W that has been subjected to all the processes is transferred to the cassette C on the cassette mounting table 10 via the transition device 30. In this way, a series of wafer processes in the wafer processing system 1 is completed.

[0064] In the above embodiment, the first surface Wa is ground in St 2 and then the second surface Wb is ground in St 5, but the order of grinding these surfaces may be reversed. Also, the second surface Wb is etched in St 9 and then the first surface Wa is etched in St 13, but the order of etching these surfaces may be reversed.

[0065] Furthermore, in the above embodiment, etching of the second surface Wb in St9 was performed under the optimal etching conditions determined in St8, but instead, etching may be performed under predetermined default etching conditions. In such a case, Sts7 and St8 of this embodiment are omitted. Similarly, etching of the first surface Wa in St13 was performed under the optimal etching conditions determined in St12, but instead, etching may be performed under predetermined default etching conditions. In such a case, Sts11 and St12 of this embodiment are omitted.

[0066] Next, the method for determining the above-mentioned optimal etching conditions (Steps 8 and 12 in FIG. 5) will be described. In the following description, the method for determining the optimal etching conditions for the first surface Wa in Step 12 will be described, but the method for determining the optimal etching conditions for the second surface Wb in Step 8 is similar.

[0067] First, before processing the wafer W in the wafer processing system 1, a plurality of learning data are acquired (St100 in FIG. 6). The learning data is an etching amount distribution of the wafer W under certain etching conditions. The plurality of learning data is used to determine optimal etching conditions as described below, and is also used to determine a target grinding thickness distribution as described below.

[0068] In St100, etching is performed on a dummy wafer under, for example, a plurality of different etching conditions. Specifically, the dummy wafer is etched by changing, for example, the rotation speed R (also referred to as the number of rotations) of the dummy wafer during etching, the scanning speed (also referred to as the swing speed) of the nozzle 43, the scanning width L (see the scanning width L in FIG. 3 , also referred to as the swing radius) of the nozzle 43, or the number of loops of the nozzle 43. In this case, the etching processing time for each dummy wafer is the same. Similar to the etching in St13, the dummy wafer is etched by rotating the dummy wafer and supplying etching solution E from the nozzle 43 to the dummy wafer while the nozzle 43 is reciprocating. In the following description, the reciprocating movement of the nozzle 43 between both ends of the dummy wafer is considered to be one loop.

[0069] Etching of the dummy wafer under each etching condition is carried out for a predetermined desired time (desired number of loops). Then, the etching amount distribution of the dummy wafer is acquired and output to the control device 130. Furthermore, the control device 130 compresses the output etching amount distribution under each etching condition into an etching amount distribution per unit time (unit number of loops), and stores each compressed etching amount distribution as the learning data. The learning data is an example of a parameter to be corrected in the correction method according to this embodiment, which will be described later.

[0070] Although the above description has been given taking the example of acquiring the learning data by etching a dummy wafer as an example, the etching target when acquiring the learning data is not limited to a dummy wafer. Specifically, for example, the etching process results of a product wafer W processed in the wafer processing system 1 may be stored as the learning data. Furthermore, for example, if a film is formed on the first surface Wa of the wafer W, the etching target may be the film, and the etching process results of the film may be stored as the learning data.

[0071] Furthermore, although the learning data is acquired in the wafer processing system 1, it may be acquired outside the wafer processing system 1. In such a case, the control device 130 determines the optimal etching conditions based on the plurality of learning data acquired outside the wafer processing system 1.

[0072] Next, a target etching amount distribution for the etching process in St13 is obtained based on the thickness distribution in the target shape of the wafer W after etching and the thickness distribution in the surface shape of the wafer W after etching the second surface Wb and before etching the first surface Wa (hereinafter referred to as the "measured shape") obtained in St11 (St110 in FIG. 6). The target etching amount distribution is an example of a parameter to be corrected in the correction method according to this embodiment, which will be described later. The target etching amount distribution for the etching process can be obtained, for example, by calculating the difference between the thickness distribution in the target shape of the wafer W and the thickness distribution in the measured shape.

[0073] Next, multiple pieces of learning data (etching amount distributions) are superimposed, and an optimization method is used to optimize the learning data used for the superimposition and the number of times the learning data is superimposed (St111 in FIG. 6 ) so that the target etching amount distribution obtained in St110 is obtained.

[0074] In St111, for example, the control of the etching amount distribution is applied to a knapsack problem to optimize the number of times the learning data and the learning data are overlapped. For example, the etching amount distribution is the knapsack in the knapsack problem, and the learning data are the items in the knapsack problem. Then, the number of times the learning data and the learning data are overlapped is optimized so that the difference between the overlapped etching amount distribution and the target etching amount distribution in St110 is minimized. In other words, the etching amount distribution overlapped with the optimized number of overlaps is estimated to approximate the target etching amount distribution. Hereinafter, the etching amount distribution overlapped with the optimized number of overlaps is referred to as the estimated etching amount distribution. This optimizes the etching amount distribution during etching of the first surface Wa in St13.

[0075] Next, the etching conditions corresponding to the learning data optimized in St111 are integrated to determine the optimal etching conditions (St112 in FIG. 6). Specifically, the optimal etching conditions are determined by integrating the selected etching conditions so that the optimal number of overlaps is used. In other words, the optimal etching conditions that provide the estimated etching amount distribution are determined.

[0076] As described above, the optimal etching conditions for the first surface Wa are determined in St 12. In this case, by etching the first surface Wa of the wafer W under the optimal etching conditions in St 13, the etching amount distribution can be optimized and the first surface Wa can be processed into the target shape.

[0077] The optimal etching conditions for the first surface Wa determined in St12 are stored in the control device 130, and a history of the etching conditions is maintained in the control device 130. At this time, the learning data used to determine the optimal etching conditions is also stored. Similarly, the optimal etching conditions (and learning data) for the second surface Wb determined in St8 are also stored in the control device 130, and a history of the etching conditions is maintained in the control device 130. Furthermore, these optimal etching conditions for the surfaces Wa and Wb may be displayed on an etching condition history screen (not shown) on the display panel 120.

[0078] As described above, the etching of the second surface Wb in St9 and the etching of the first surface Wa in St13 may be performed under predetermined etching conditions rather than the optimal etching conditions. For this reason, when setting the etching conditions, the user may be allowed to select whether or not to use the learning data.

[0079] <Correction Method> (First Embodiment) In a wafer processing method that can be executed in the wafer processing system described above, a method according to a first embodiment for correcting learning data used to determine optimal etching conditions will be described. Specifically, the correction method according to the first embodiment executes steps St200 to St202 as shown in FIGS.

[0080] First, the wafer processes St1 to St14 described above are performed multiple times in advance on a wafer W. Then, data (hereinafter referred to as "training data") such as the estimated etching amount distribution ("estimated p" in FIG. 8) and the measured etching amount distribution ("measured y" in FIG. 8) for each of the first surface Wa and second surface Wb of the wafer W to be processed are accumulated (St200 in FIG. 7). The training data includes the difference between the estimated etching amount distribution and the measured etching amount distribution of the wafer W, i.e., the residual ("residual y-p" in FIG. 8). The residual is calculated and stored, for example, by the control device 130 when accumulating the training data or before executing step S201, which will be described later. The training data may be accumulated by performing the wafer processes St1 to St14 on either a product wafer W or a dummy wafer W.

[0081] The training data according to this embodiment may be stored in advance prior to the execution of the correction method. In this case, Step 200 may be omitted.

[0082] Next, based on the residual, the error per overlap of the learning data (hereinafter referred to as the "learning error"; see "learning error e" in FIG. 8) is calculated (Step 201 in FIG. 7, "Calculation" in FIG. 8). The learning error is calculated and stored, for example, by the control device 130. Here, it can be assumed that the residual is equal to the sum of the learning errors accumulated by overlapping multiple pieces of learning data. Based on this assumption, the learning error can be calculated, for example, by the following means.

[0083] In the training data accumulated in St200, the matrix of the number of times each piece of learning data was superimposed in each process is defined as B. That is, matrix B is the number of times the mth piece of learning data (1≦m≦M) was superimposed in the nth process (1≦n≦N) out of N times. ｍｎ An M-row, N-column matrix (B∈R Ｍ×Ｎ ) and is represented by the following formula (1).

[0084] Furthermore, the learning error per overlap of learning data in a certain training data is defined as e. The learning error e is defined corresponding to each of M pieces of learning data, for example, and has M components (e∈R Ｍ ). In addition, the estimated etching amount distribution of the wafer W in the training data is represented by p, and the measured etching amount distribution is represented by y. In this case, the residual is represented by (y-p). The residual (y-p) is calculated for each of the N training data, for example, and has N components ((y-p)∈R Ｎ ). In this case, according to the above assumption, the residual (y-p) is equal to the sum of the learning errors e accumulated by overlapping the learning data with the matrix B. Therefore, in the following formula (2), the residual (y-p) is multiplied by the generalized inverse matrix B of the matrix B. ＋ By multiplying this, the learning error e per overlap of the learning data can be obtained. Here, the generalized inverse matrix B ＋ is a matrix that generalizes the inverse matrix to the case where M≠N.

[0085] In addition, in equation (2), a value is obtained only for the learning error e of the learning data that has been used in superposition at least once when the training data is accumulated, and the value of the learning error e of the learning data that has not been used at all is calculated as 0. Therefore, in St200, it is preferable to accumulate training data in which all learning data has been superposed at least once in any of the processes.

[0086] Next, the learning data is corrected based on the learning error e (Step 202 in FIG. 7). Specifically, the learning data is corrected using the following equation (3).

[0087] In formula (3), s ｏｌｄ is the training data before correction (s ｏｌｄ ∈R Ｍ ), and s ｎｅｗ is the corrected learning data (s ｎｅｗ ∈R Ｍ ) is shown. The learning error e obtained by equation (2) is substituted for the learning error e in equation (3). According to the correction of equation (3), the learning data s before correction ｏｌｄ The learning error e included in each of the above is removed, and the corrected learning data s ｎｅｗ is obtained.

[0088] According to the correction method of the first embodiment, the learning data can be corrected so that the learning error is not included or is included as little as possible, based on the residual between the estimated etching amount distribution and the actually measured etching amount distribution of the wafer W. Furthermore, according to the corrected learning data, an estimated etching amount distribution that is closer to the target etching amount distribution can be obtained in St8 or St12, and the optimal etching conditions at this time can be determined. This makes it possible to make the surface shape of the wafer W after etching closer to the target shape.

[0089] Second Embodiment A method according to a second embodiment for correcting the target etching amount distribution used to determine optimal etching conditions in a wafer processing method that can be performed in the wafer processing system described above will be described. Specifically, the correction method according to the second embodiment executes steps St300 to St302, as shown in FIGS.

[0090] First, one wafer W (hereinafter, for convenience, referred to as the "first wafer W") １ The wafer processing steps St1 to St14 are performed in advance for the first wafer W. １ The estimated etching amount distribution ("estimated p" in FIG. 10) and the actually measured etching amount distribution ("actual y" in FIG. 10) are obtained for each of the first surface Wa and the second surface Wb of the first wafer W (St300 in FIG. 9). １ The residual between the estimated etching amount distribution and the actually measured etching amount distribution ("residual y-p" in FIG. 10) is obtained. The residual is calculated and stored by, for example, the control device 130 during the wafer processing. １ The residual of (y １ -p １ ) is expressed as

[0091] Next, the first wafer W that has been processed by the above etching process is １ Another wafer W to be processed next (hereinafter, for convenience, referred to as the "second wafer W") ２ The correction value Δ of the target etching amount distribution ("target r" in FIG. 10) in the second wafer W is determined (Step 301 in FIG. 9). ２ Correction value Δ for ２ is the first wafer W １ Residual of (y １ -p １ )

[0092] Next, the correction value Δ given by the above formula (4) ２ The target etching amount distribution r is corrected based on the following equation (5):

[0093] In formula (6), r ｏｌｄ is the second wafer W before correction２ The target etching amount distribution of r ｎｅｗ is the second wafer W after correction ２ A is a weighting coefficient, and satisfies 0≦A≦1.

[0094] Next, the second wafer W ２ Another wafer W to be processed next (hereinafter, for convenience, referred to as the "third wafer W") ３ If there is a target etching amount distribution after correction, the process returns to Step 300 and the second wafer W is etched using the corrected target etching amount distribution. ２ In the subsequent step St301, the third wafer W ３ Correction value Δ for ３ is determined as follows:

[0095] In formula (5), p ２ is the second wafer W ２ y is the estimated etching amount distribution of the second wafer W ２ 1 shows the distribution of the etching amount measured in the

[0096] By using the above formula (6) in the above formula (5), the third wafer W ３ The target etching amount distribution r can be corrected. Similar correction is repeated for a desired number of subsequent wafers W, and the correction value Δ for the next wafer W to be processed is determined based on the residual (y-p) and the correction value Δ for the previously processed wafer W. The target etching amount distribution r is corrected based on the determined correction value Δ.

[0097] Furthermore, in the above-described repeated correction, the weighting coefficient A may be optimized so that the residual error (yp) of the next wafer W is minimized by the contribution of the residual error (yp) of the previous wafer W.

[0098] According to the correction method of the second embodiment, the first wafer W １ Based on the residual between the estimated etching amount distribution and the actually measured etching amount distribution, the second wafer W to be processed next is determined. ２The target etching amount distribution can be corrected. Furthermore, in St8 or St12, optimal etching conditions can be determined that correspond to an estimated etching amount distribution that approximates the corrected target etching amount distribution. Furthermore, when the wafer W is etched under the optimal etching conditions, the measured etching amount distribution can be made to be closer to the target etching amount distribution before correction. This makes it possible to make the surface shape of the wafer W after etching closer to the target shape. Furthermore, according to the correction method of this embodiment, the target etching amount distribution can be sequentially optimized.

[0099] Third Embodiment A method according to a third embodiment for correcting the target etching amount distribution used to determine optimal etching conditions in a wafer processing method that can be performed in the wafer processing system described above will be described. Specifically, the correction method according to the third embodiment executes steps St400 to St402 as shown in FIGS.

[0100] First, the above-described wafer processing steps St1 to St14 are performed on a wafer W multiple times in advance, and training data such as an estimated etching amount distribution ("estimated p" in FIG. 12) and a measured etching amount distribution ("measured y" in FIG. 12) for each of the first surface Wa and second surface Wb of the wafer W to be processed are accumulated (St400 in FIG. 11). The training data includes a residual between the estimated etching amount distribution and the measured etching amount distribution of the wafer W ("residual y-p" in FIG. 12). The residual is calculated and stored, for example, by the control device 130 when accumulating the training data or before executing step S401, which will be described later. The training data may be accumulated by performing the wafer processing steps St1 to St14 on either a product wafer W or a dummy wafer W.

[0101] The training data according to this embodiment may be stored in advance prior to the execution of the correction method. In this case, Step 400 may be omitted.

[0102] Next, the level components included in the residual etching amount distribution are extracted (Step 401 in FIG. 11). Here, it can be assumed that the residuals are caused by the influence of various disturbances for each process.

[0103] Assume that a certain disturbance makes a specific contribution to the etching amount distribution in the radial direction of the wafer W. In this case, the etching amount distribution related to this contribution is defined as a disturbance component. Note that one disturbance component may be generated by the contribution of two or more disturbances. In this case, it can be assumed that the residual is equal to the sum of various disturbance components.

[0104] 13 , each disturbance component is expressed as a relative value when the average value of the estimated etching amount distribution in the accumulated training data ("base" in FIG. 13 ) is set to 1. The level component ("level" in FIG. 13 ) to be extracted in St401 is a flat disturbance component of the residuals whose contribution to the etching amount distribution is constant within the surface of the wafer W. For example, a noise component ("noise" in FIG. 13 ) is a disturbance component that contributes randomly within the surface of the wafer W. A slope component ("slope" in FIG. 13 ) is a disturbance component that contributes so as to monotonically increase (or decrease) in the radial direction within the surface of the wafer W. A wave component ("wave" in FIG. 13 ) is a disturbance component that contributes to a sine curve shape within the surface of the wafer W. The level component can be extracted from the multiple residuals accumulated in St400 using a desired known algorithm. The level component is extracted and stored, for example, by the control device 130.

[0105] Next, the target etching amount distribution r of the wafer W to be processed is corrected based on the level component. Specifically, the target etching amount distribution r is corrected by the following equation (7).

[0106] In formula (7), r ｏｌｄ indicates the target etching amount distribution of the wafer W before correction, and r ｎｅｗ indicates the target etching amount distribution of the wafer W after correction. A is a weighting coefficient, and satisfies 0≦A≦1. d Ｌ is the level component.

[0107] According to the correction method of the third embodiment, the target etching amount distribution of the wafer W can be corrected using only the level component based on the residual between the estimated etching amount distribution and the actually measured etching amount distribution of the wafer W. The level component is a disturbance component whose contribution to the etching amount distribution is constant within the surface of the wafer W. Therefore, it is possible to prevent unreasonable correction of the target etching amount distribution due to noise components that change randomly with each process. Furthermore, even for regular disturbance components such as slope components and wave components, it is expected that the slope, period, amplitude, etc. will change randomly with each process. Therefore, by excluding these from the correction value, it is possible to prevent unreasonable correction of the target etching amount distribution.

[0108] Furthermore, in St8 or St12, optimal etching conditions can be determined that correspond to an estimated etching amount distribution that approximates the corrected target etching amount distribution. Furthermore, when the wafer W is etched under the optimal etching conditions, the measured etching amount distribution can be made to be closer to the target etching amount distribution before correction. This makes it possible to make the surface shape of the wafer W after etching closer to the target shape. Furthermore, according to the correction method of this embodiment, the target etching amount distribution can be sequentially optimized.

[0109] Fourth Embodiment Incidentally, the measured etching amount distribution used to calculate the residual in the first to third embodiments may include, in addition to the contributions of learning errors and disturbances, the contribution of observation noise (hereinafter simply referred to as "noise") related to the limit of measurement accuracy of the thickness measurement device 50. Therefore, in the fourth embodiment, such noise is removed from the measured etching amount distribution to correct the learning data.

[0110] Regarding noise removal, for example, in training data accumulated in the same manner as in the first embodiment, the distribution of measured etching amounts is expressed by a relational expression between the corrected learning data to be obtained, the number of times the learning data is superimposed, and noise.

[0111] As an example, a function for removing noise from the learning data is determined by machine learning based on training data. The learning data is then estimated by an optimization method so that the measured etching amount distribution from which noise has been removed by the noise-removing function and the estimated etching amount distribution from the superimposed learning data are similar. This allows corrected learning data with minimized residuals to be obtained based on the measured etching amount distribution from which noise has been removed.

[0112] As another example, it is possible to search for corrected learning data that directly gives the measured etching amount distribution by using an optimization method that estimates the learning data so that it does not match noise.

[0113] According to the correction method of the fourth embodiment, the learning data can be corrected so as to eliminate noise based on the residual between the estimated etching amount distribution and the actually measured etching amount distribution of the wafer W. Furthermore, according to the corrected learning data, an estimated etching amount distribution that more closely approximates the target etching amount distribution can be obtained in St8 or St12, and optimal etching conditions at this time can be determined. This makes it possible to make the surface shape of the wafer W after etching closer to the target shape.

[0114] In the above embodiment, the etching amount distribution is used as the etching index distribution (learning data) for controlling the etching process of the wafer W, but the etching amount deviation distribution may also be used. The etching amount deviation distribution is a distribution of values ​​obtained by subtracting the average value of the etching amount from the etching amount within the wafer surface. In such a case, when determining the optimal etching conditions in St8 and St12, the etching amount deviation distribution is used instead of the etching amount distribution. Furthermore, the etching amount deviation distribution is also used when determining the grinding target thickness distribution in St1.

[0115] In the above embodiment, an example has been described in which various processes are performed on both surfaces (first surface Wa and second surface Wb) of a wafer W that has been cut from an ingot using a wire saw or the like, or that has been lapped, but various processes may also be performed on only one surface of the wafer W.

[0116] In the above embodiment, various processes are performed on a wafer W that has been cut from an ingot using a wire saw or lapped. However, the technology of the present disclosure can also be applied to post-processing steps in the manufacturing process of semiconductor devices. Specifically, for example, in a laminated wafer formed by bonding a first wafer and a second wafer, the technology of the present disclosure can also be applied to a case where the first wafer is ground and then the surface of the ground first wafer is etched. Furthermore, although the above description has been given using an example in which the etching target is silicon or the like on the surface of the wafer W, the technology of the present disclosure can also be applied to a case in which the etching target is a desired film formed on the surface of the wafer W.

[0117] The embodiments disclosed herein should be considered to be illustrative in all respects and not restrictive. The above-described embodiments may be omitted, substituted, or modified in various ways without departing from the scope and spirit of the appended claims. For example, the components of the above-described embodiments may be arbitrarily combined. Such an arbitrary combination naturally provides the functions and effects of each of the components involved in the combination, and also provides other functions and effects that are apparent to those skilled in the art from the description of this specification.

[0118] Furthermore, the effects described herein are merely descriptive or exemplary and are not limiting. In other words, the technology according to the present disclosure may achieve other effects that are apparent to those skilled in the art from the description of this specification, in addition to or in place of the above-described effects.

[0119] 1 wafer processing system 40 etching device 130 control device W wafer Wa first surface Wb second surface

Claims

1. A substrate processing method for processing substrates, the substrates including a first substrate and a second substrate processed after the first substrate, comprising: determining a feasible estimated etching amount distribution for the first substrate by an optimization method from a predetermined first target etching amount distribution of the etching object for the first substrate, which is determined by using a plurality of learning data including a radial etching amount distribution of the etching object when the etching object on the substrate is etched under a plurality of different etching conditions, and determining optimal etching conditions at that time; etching the etching object on the first substrate based on the optimal etching conditions; obtaining an actual etching amount distribution by measuring the thickness of the first substrate after the etching; obtaining a difference between the estimated etching amount distribution and the actual etching amount distribution; and correcting either or both of the learning data and the predetermined second target etching amount distribution of the etching object on the second substrate based on the difference.

2. The substrate processing method of claim 1, wherein determining the estimated etching amount distribution includes optimizing a combination of the learning data used for the overlay and the number of times the learning data is overlaid so that the estimated etching amount distribution approximates the first target etching amount distribution for the first substrate by overlaying the learning data.

3. The substrate processing method of claim 2, wherein correcting the second target etching amount distribution based on the difference includes correcting the second target etching amount distribution using a product of the difference and a weighting coefficient, the weighting coefficient being determined in advance so as to minimize the difference to be calculated for the second substrate.

4. A substrate processing method as described in claim 2, wherein by processing a plurality of the first substrates, a plurality of training data are obtained, each of which includes the difference and the number of times each of the learning data used for superposition in determining the optimal etching conditions is superimposed.

5. The substrate processing method according to claim 4, wherein correcting the learning data based on the difference includes determining a learning error per overlap of the learning data based on a plurality of the training data.

6. The substrate processing method of claim 4, wherein in correcting the second target etching amount distribution based on the difference, a level component is extracted from the difference based on the training data, and the second target etching amount distribution is corrected based only on the level component.

7. The substrate processing method of claim 4, wherein, when the measured etching amount distribution contains observation noise, the measured etching amount distribution in a plurality of training data is expressed by a relational expression between the corrected learning data, the number of times the corrected learning data is superimposed, and noise, and correcting the learning data based on the difference includes: determining a function that removes the observation noise based on the training data; and searching for the corrected learning data that gives the measured etching amount distribution from which the observation noise has been removed.

8. The substrate processing method according to claim 4, wherein, when the measured etching amount distribution contains observation noise, correcting the learning data based on the difference includes searching for the corrected learning data estimated by an optimization technique so as not to match the observation noise.

9. A substrate processing method according to any one of claims 1 to 8, comprising: determining optimal etching conditions for the etching target on the second substrate using either or both of the learning data corrected based on the difference or the second target etching amount distribution; and etching the etching target on the second substrate based on the optimal etching conditions for the second substrate.

10. A substrate processing system for processing substrates, comprising: an etching apparatus for etching a surface of the substrate; and a control device, wherein the substrates include a first substrate and a second substrate processed after the first substrate, and the control device performs control including: determining an estimated etching amount distribution from a predetermined first target etching amount distribution of the etching object on the first substrate by an optimization method using a plurality of learning data including an etching amount distribution in a radial direction of the etching object when the etching object on the substrate is etched under a plurality of different etching conditions, and determining optimal etching conditions at that time; etching the etching object on the first substrate based on the optimal etching conditions; obtaining an actual etching amount distribution by measuring the thickness of the first substrate after the etching; obtaining a difference between the estimated etching amount distribution and the actual etching amount distribution; and correcting either or both of the learning data and the predetermined second target etching amount distribution of the etching object on the second substrate based on the difference.

11. A method for correcting predetermined parameters used to optimize an etching amount distribution of a substrate when the substrate is processed by etching, wherein the parameters are either or both of: a plurality of learning data including a radial etching amount distribution of the etching target on the substrate when the etching target on the substrate is etched under a plurality of different etching conditions; and a target etching amount distribution when etching the substrate, and the correction method includes: using the learning data to determine an estimated etching amount distribution from the predetermined target etching amount distribution of the etching target on the substrate by an optimization method, and determining optimal etching conditions for this; etching the etching target on the substrate based on the optimal etching conditions; measuring the thickness of the substrate after the etching to obtain an actual etching amount distribution; and obtaining a difference between the estimated etching amount distribution and the actual etching amount distribution.

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