Back contact heterojunction solar cell and preparation method

Abstract

A back contact heterojunction solar cell and a preparation method. The back contact heterojunction solar cell comprises: a silicon substrate (10), a first functional region (11), an isolation region (12), and a second functional region (13) being arranged on a first main surface of the silicon substrate (10); a first carrier collection layer (20), disposed on the first functional region (11) and extending to the isolation region (12); a first conductive layer (30), disposed on the first carrier collection layer (20); a second carrier collection layer (40), disposed on the second functional region (13) and extending to the isolation region (12), said layer covering the first carrier collection layer (20) within the isolation region (12); a second conductive layer (50), disposed on the second carrier collection layer (40); an insulating layer (61), disposed in the isolation region (12) and located between the first carrier collection layer (20) and the second carrier collection layer (40); and a laser blocking layer (62), disposed in the isolation region (12) and located on a side of the second carrier collection layer (40) away from the silicon substrate (10). The two carrier collection layers have opposite conductivity types. The first conductive layer (30) and the second conductive layer (50) cover the laser blocking layer (62), and an isolation recess (63) is formed between the first conductive layer (30) and the second conductive layer (50). The described structure effectively improves photoelectric conversion efficiency.

Description

Back contact heterojunction solar cell and preparation method

[0001] Cross-reference to related applications

[0002] This application claims priority to Chinese patent application No. 202410852709.8, filed on June 27, 2024, the entire contents of which are incorporated herein by reference. TECHNICAL FIELD

[0003] The present disclosure relates to a back contact heterojunction solar cell and a preparation method. BACKGROUND

[0004] For the back contact heterojunction solar cell, the heterojunction structure and the grid lines are arranged on the back surface of the solar cell, which removes the shading of the grid lines to the front surface of the back contact heterojunction solar cell, and increases the absorption efficiency of the incident light.

[0005] The existing back contact heterojunction solar cell inevitably has an overlapping area of the n-type functional region and the p-type functional region. If the metal electrode contacts the overlapping area and the overlapping area is not effectively electrically insulated, the internal short circuit mechanism of the cell will be triggered or a large leakage problem will occur, thereby seriously reducing the conversion efficiency of the back contact heterojunction solar cell. SUMMARY

[0006] Therefore, the present disclosure provides a back contact heterojunction solar cell, a photovoltaic module and a preparation method, which can effectively ensure the electrical insulation of the overlapping area and effectively improve the conversion efficiency of the back contact heterojunction solar cell.

[0007] To solve the above technical problems, the present disclosure provides the following technical solutions:

[0008] In a first aspect, the present disclosure provides a back contact heterojunction solar cell, comprising:

[0009] a silicon substrate, wherein a first main surface of the silicon substrate is arranged with a first functional region, an isolation region and a second functional region;

[0010] a first carrier collection layer arranged on the first functional region and extending to the isolation region;

[0011] a first conductive layer arranged on the first carrier collection layer;

[0012] a second carrier collection layer arranged on the second functional region and extending to the isolation region, and covering the first carrier collection layer in the isolation region;

[0013] a second conductive layer arranged on the second carrier collection layer;

[0014] an insulating layer disposed in the isolation region and between the first carrier collection layer and the second carrier collection layer;

[0015] a laser blocking layer disposed in the isolation region and on a side of the second carrier collection layer away from the silicon substrate;

[0016] the first carrier collection layer and the second carrier collection layer are of opposite conductivity types;

[0017] the first conductive layer and the second conductive layer cover the laser blocking layer, and an isolation groove is formed between the first conductive layer and the second conductive layer.

[0018] In a second aspect, the embodiments of the present disclosure provide a preparation method of a back contact heterojunction solar cell, comprising:

[0019] Step A, providing a silicon substrate, the silicon substrate comprising a first main surface and a second main surface opposite to each other, the first main surface comprising a first functional region, an isolation region and a second functional region;

[0020] Step B, sequentially forming a first carrier collection layer and an insulating layer on the silicon substrate corresponding to the first functional region and the isolation region;

[0021] Step C, forming a second carrier collection layer of a conductivity type opposite to that of the first carrier collection layer on the silicon substrate corresponding to the second functional region and on the insulating layer;

[0022] Step D, forming a laser blocking layer on the second carrier collection layer corresponding to the isolation region;

[0023] Step E, forming a conductive layer on the first main surface of the silicon substrate, and forming an isolation groove in the conductive layer corresponding to the isolation region by laser.

[0024] The technical solution of the first aspect of the above-mentioned application has the following advantages or beneficial effects:

[0025] The isolation region of the back contact heterojunction solar cell provided by the embodiments of the present disclosure can effectively block the electrical connection between the first functional region and the second functional region through the combination of the designed laser blocking layer and the isolation groove of the cut-off conductive layer, and through the design of the laser blocking layer, the laser can be blocked from damaging other film layers or the silicon substrate corresponding to the isolation region during the process of forming the isolation groove by laser, which can completely avoid the electrical connection between the first functional region and the second functional region, and effectively improve the performance and photoelectric conversion efficiency of the back contact heterojunction solar cell. BRIEF DESCRIPTION OF DRAWINGS

[0026] FIG. 1 is a partial cross-sectional structure schematic diagram of a back contact heterojunction solar cell according to an embodiment of the present disclosure;

[0027] Fig. 2 is a main flow diagram of a method for preparing a back contact heterojunction solar cell according to an embodiment of the present disclosure;

[0028] Fig. 3 is a schematic diagram of structural changes corresponding to steps S201 to S202 according to an embodiment of the present disclosure;

[0029] Fig. 4 is a schematic diagram of structural changes corresponding to step S203 according to an embodiment of the present disclosure;

[0030] Fig. 5 is a schematic diagram of structural changes corresponding to steps S204 to S205 according to an embodiment of the present disclosure.

[0031] The reference signs are as follows: 10-silicon substrate; 11-first functional region; 12-isolation region; 13-second functional region; 20-first carrier collection layer; 21-tunneling oxide layer; 22-first doped layer; 30-first conductive layer; 40-second carrier collection layer; 41-second intrinsic silicon-containing thin film layer; 42-second doped layer; 50-second conductive layer; 61-insulating layer; 62-laser blocking layer; 63-isolation groove; 64-dielectric layer; 65-sacrificial layer; 70-passivation layer; 80-antireflection layer; 90-metal electrode. DETAILED DESCRIPTION

[0032] The structure involved in the embodiments of the present disclosure is generally referred to as inside to outside, which refers to the direction away from the structure based on the structure. For example, the inside to outside in the thickness direction of the silicon substrate 10 refers to the direction away from a main surface (such as the first main surface) of the silicon substrate 10 based on the main surface.

[0033] The first main surface and the second main surface of the silicon substrate 10 involved in the embodiments of the present disclosure refer to two opposite main surfaces of the silicon substrate 10, one of which is the first main surface and the other is the second main surface.

[0034] It is worth noting that the "first", "second", and the like mentioned in the embodiments of the present disclosure are used to distinguish different functional layers or functional parts or functional regions, and are not intended to sort or number the functional layers or functional parts or functional regions. For example, the first doped layer and the second doped layer are used to distinguish the doped layers formed by different doping elements or the doped layers with different doping types; for example, the first functional region and the second functional region are used to distinguish the p-type doped region and the n-type doped region (for example, the first functional region is a p-type doped region, and correspondingly, the second functional region is an n-type doped region; for example, the first functional region is an n-type doped region, and correspondingly, the second functional region is a p-type doped region)

[0035] The laminated multiple structures involved in the embodiments of the present disclosure generally refer to one structure being laid above or below another structure.

[0036] It is worth mentioning that the structure of the embodiment of the present disclosure is located on another structure, and is not particularly located above another structure in the use process of the back contact heterojunction solar cell, but in the preparation process of the back contact heterojunction solar cell, the structure is formed above another structure under the condition that the main surface (such as the first main surface) of the two structures faces upward.

[0037] The back contact heterojunction solar cell is more and more favored by the industry due to the characteristics of low preparation process temperature, high conversion efficiency, good high temperature characteristics, high light absorption rate and the like. However, since the overlapping area of the n-type functional region and the p-type functional region in the current back contact heterojunction solar cell is not effectively electrically insulated, the internal short circuit mechanism of the cell is triggered or a large leakage problem occurs, thereby seriously reducing the conversion efficiency of the back contact heterojunction solar cell.

[0038] The embodiment of the present disclosure improves the structure of the back contact heterojunction solar cell and the preparation method thereof to solve the problem of electrical insulation of the overlapping area of the n-type functional region and the p-type functional region in the back contact heterojunction solar cell, improve the performance of the back contact heterojunction solar cell, and improve the yield of the back contact heterojunction solar cell.

[0039] Among them, FIG. 1 shows a partial cross-sectional structure schematic diagram of a back contact heterojunction solar cell provided by the embodiment of the present disclosure; FIG. 2 shows a main flow schematic diagram of a preparation method of a back contact heterojunction solar cell provided by the embodiment of the present disclosure; FIGS. 3 to 5 show structure change schematic diagrams corresponding to each step provided by the embodiment of the present disclosure.

[0040] As shown in FIG. 1, the embodiment of the present disclosure provides a back contact heterojunction solar cell. The back contact heterojunction solar cell can include:

[0041] A silicon substrate 10, wherein a first main surface of the silicon substrate 10 is arranged with a first functional region 11, an isolation region 12 and a second functional region 13;

[0042] A first carrier collection layer 20 arranged on the first functional region 11 and extending to the isolation region 12;

[0043] A first conductive layer 30 arranged on the first carrier collection layer 20;

[0044] A second carrier collection layer 40 arranged on the second functional region 13 and extending to the isolation region 12, and covering the first carrier collection layer 20 in the isolation region 12;

[0045] A second conductive layer 50 arranged on the second carrier collection layer 40;

[0046] An insulating layer 61 is arranged in the isolation region 12 and between the first carrier collection layer 20 and the second carrier collection layer 40;

[0047] A laser blocking layer 62 is arranged in the isolation region 12 and on the side of the second carrier collection layer 40 away from the silicon substrate 10.

[0048] The first carrier collection layer 20 and the second carrier collection layer 40 are of opposite conductivity types.

[0049] The first conductive layer 30 and the second conductive layer 50 cover the laser blocking layer 62, and an isolation groove 63 is formed between the first conductive layer 30 and the second conductive layer 50.

[0050] The laser blocking layer 62 included in the isolation region 12 is generally formed of a non-transparent non-conductive paste and can resist laser etching. For example, the non-transparent non-conductive paste can be a paste containing inorganic fillers, organic fillers, and additives (metallic conductive particles are removed) or a non-transparent insulating glue-like substance.

[0051] The thickness of the laser blocking layer 62 is ≥1 μm. For example, the thickness of the laser blocking layer 62 can be 1 μm, 2 μm, 3 μm, 4 μm, 5 μm, 6 μm, 7 μm, 8 μm, etc. The laser blocking layer 62 can effectively block the laser from damaging the functional layer and the silicon substrate 10 during the process of making the isolation groove 63 by laser. The laser blocking layer 62 can be formed by printing.

[0052] The isolation region of the back contact heterojunction solar cell provided in the above embodiment can effectively block the electrical connection between the first functional region and the second functional region through the combination of the designed laser blocking layer and the isolation groove cutting the conductive layer, and through the design of the laser blocking layer, the laser can be blocked from damaging other film layers corresponding to the isolation region or the silicon substrate during the process of forming the isolation groove by laser treatment, which can completely avoid the electrical connection between the first functional region and the second functional region and effectively improve the performance and photoelectric conversion efficiency of the back contact heterojunction solar cell.

[0053] In addition, the isolation groove 63 formed in the isolation region by cutting the conductive layer achieves the purpose of blocking the electrical connection between the first functional region 11 and the second functional region 13, i.e., only the conductive layer is cut, and other parts in the stacked structure are not damaged; because only the conductive layer is cut, the required laser energy is low, which further reduces the energy consumption required for production, i.e., reduces the process cost.

[0054] The second conductive layer 50 disposed on the second carrier collection layer 40 and the first conductive layer 30 disposed on the first carrier collection layer 20 can be formed synchronously. The first conductive layer 30 and the second conductive layer 50 formed synchronously on the first functional region 11 and the second functional region 13 are generally formed by a single layer or a stacked layer of a metal oxide and / or a metal nitride doped with a metal element, wherein the metal oxide is one or more combinations of indium oxide, tin oxide, zinc oxide, cadmium oxide, and titanium nitride, the metal nitride is titanium nitride, and the doped element in the first conductive layer 30 and the second conductive layer 50 is one or more of indium, tin, calcium, aluminum, cadmium, zinc, cerium, and fluorine.

[0055] The silicon substrate 10 can be a p-type silicon substrate or an n-type silicon substrate. The main surface of the silicon substrate 10 can be a textured structure or a planar structure. The first functional region 11 can be an n-type functional region, and the first carrier collection layer 20 is an electron collection layer. Correspondingly, the second functional region 13 is a p-type functional region, and the second carrier collection layer 40 is a hole collection layer. The first functional region 11 can be a p-type functional region, and the first carrier collection layer 20 is a hole collection layer. Correspondingly, the second functional region 13 is an n-type functional region, and the second carrier collection layer 40 is an electron collection layer.

[0056] The first carrier collection layer 20 can have two structures. Specifically, as shown in FIG. 1, the first carrier collection layer 20 can include a tunneling oxide layer 21 and a first doped layer 22 stacked from inside to outside along the thickness direction of the silicon substrate 10.

[0057] The tunneling oxide layer 21 is generally a silicon oxide layer formed by chemical vapor deposition, plasma vapor deposition, physical vapor deposition, etc. The thickness of the tunneling oxide layer 21 is generally 0.5-3 nm. For example, the thickness of the tunneling oxide layer 21 can be 0.5 nm, 0.8 nm, 1 nm, 1.3 nm, 1.5 nm, 1.8 nm, 2 nm, 2.2 nm, 2.5 nm, 2.8 nm, 3 nm, etc.

[0058] The first doped layer 22 is generally a doped polysilicon layer with a thickness of 30-300 nm. For example, the thickness of the first doped layer 22 can be 30 nm, 35 nm, 40 nm, 50 nm, 70 nm, 80 nm, 90 nm, 120 nm, 150 nm, 170 nm, 200 nm, 220 nm, 240 nm, 250 nm, 270 nm, 270 nm, 300 nm, etc.

[0059] The second structure of the first carrier collecting layer 20 can include a first intrinsic silicon-containing thin film layer (not shown in the figure) and the first doped layer 22 arranged in the thickness direction of the silicon substrate 10 from inside to outside. That is, the second structure of the first carrier collecting layer 20 replaces the tunneling oxide layer 21 in the first structure of the first carrier collecting layer 20 with the first intrinsic silicon-containing thin film layer.

[0060] The second structure of the first carrier collecting layer 20 can include a first intrinsic silicon-containing thin film layer and the first doped layer 22 arranged in the thickness direction of the silicon substrate 10 from inside to outside. The first intrinsic silicon-containing thin film layer is generally intrinsic amorphous silicon, and the thickness of the intrinsic amorphous silicon is generally 0.5-3 nm. For example, the thickness of the intrinsic amorphous silicon can be 0.5 nm, 1 nm, 1.2 nm, 1.5 nm, 1.7 nm, 2 nm, 2.3 nm, 2.6 nm, 2.8 nm, 3 nm, etc. Correspondingly, the first doped layer 22 corresponding to the first intrinsic silicon-containing thin film layer is a single layer or a stacked film layer formed by one or more of doped amorphous silicon, doped microcrystalline silicon, and doped nanocrystalline silicon. The thickness of the first doped layer 22 corresponding to the first intrinsic silicon-containing thin film layer can be 30-300 nm. For example, the thickness of the first doped layer 22 corresponding to the first intrinsic silicon-containing thin film layer can be 30 nm, 35 nm, 40 nm, 50 nm, 70 nm, 90 nm, 100 nm, 120 nm, 150 nm, 180 nm, 200 nm, 220 nm, 240 nm, 250 nm, 270 nm, 280 nm, 300 nm, etc.

[0061] Based on either of the two structures of the first carrier collecting layer 20 described above, the second carrier collecting layer 40 can include a second intrinsic silicon-containing thin film layer 41 and a second doped layer 42 arranged in the thickness direction of the silicon substrate 10 from inside to outside, as shown in FIG. 1. The second doped layer 42 is generally a single-layer silicon-containing thin film doped with a doping element or a stacked silicon-containing thin film doped with a doping element. Each layer of the single-layer silicon-containing thin film or the stacked silicon-containing thin film can be formed by chemical vapor deposition, plasma vapor deposition, physical vapor deposition, etc. The thickness of the second doped layer 42 can be 0-15 nm. For example, the thickness of the second doped layer 42 can be 0.2 nm, 0.5 nm, 0.8 nm, 1 nm, 1.4 nm, 1.8 nm, 2 nm, 4 nm, 5 nm, 7 nm, 8 nm, 9 nm, 10 nm, 11 nm, 12 nm, 13 nm, 14 nm, 15 nm, etc.

[0062] On the basis of the structure of the first carrier collection layer 20 and the structure of the second carrier collection layer 40, the p-type functional region and the n-type functional region, the first carrier collection layer 20 and the second carrier collection layer 40 are mainly determined by the doping elements in the doped layers. For example, the carrier collection layer of the p-type functional region includes a p-type doping element such as boron or the like in the doped layer; the carrier collection layer of the n-type functional region includes an n-type doping element such as phosphorus or the like in the doped layer.

[0063] In addition, the first intrinsic silicon-containing thin film layer of the first carrier collection layer 20 and the second intrinsic silicon-containing thin film layer 41 of the second carrier collection layer 40 are generally single-layer or laminated film layers formed by chemical vapor deposition, plasma vapor deposition, physical vapor deposition, etc., wherein each of the single-layer or laminated film layers of the first intrinsic silicon-containing thin film layer and the second intrinsic silicon-containing thin film layer 41 includes one or more of microcrystalline silicon, nanosilicon, amorphous silicon, silicon oxide, and silicon carbide. Among them, microcrystalline silicon, nanosilicon, and amorphous silicon are silicon with different structures or crystal forms. Understandably, the materials for forming the first intrinsic silicon-containing thin film layer and the second intrinsic silicon-containing thin film layer 41 can be the same or different, i.e., the formation of the first intrinsic silicon-containing thin film layer and the second intrinsic silicon-containing thin film layer 41 does not restrict each other. The thickness of the first intrinsic silicon-containing thin film layer is generally 1-15 nm, for example, the thickness of the first intrinsic silicon-containing thin film layer can be 1 nm, 1.5 nm, 2 mm, 3 nm, 3.7 nm, 4 nm, 5 nm, 6 nm, 8 nm, 9 nm, 10 nm, 11 nm, 12 nm, 14 nm, 15 nm, etc. The thickness of the second intrinsic silicon-containing thin film layer 41 is also generally 1-15 nm, for example, the thickness of the second intrinsic silicon-containing thin film layer 41 can be 1 nm, 1.5 nm, 1.7 nm, 3 nm, 5 nm, 7 nm, 8 nm, 10 nm, 12 nm, 15 nm, etc.

[0064] Further, in order to simplify the process flow of the back contact heterojunction solar cell, facilitate the formation of various film layers, and further improve the isolation effect of the isolation region, for the first structure of the first carrier collection layer 20 (the first carrier collection layer 20 includes the tunneling oxide layer 21), as shown in FIG. 1, for the isolation region 12, the tunneling oxide layer 21, the first doped layer 22, the insulating layer 61, the second intrinsic silicon-containing thin film layer 41, the second doped layer 42, the laser blocking layer 62, the first conductive layer 30, and the second conductive layer 50 can be sequentially deposited from the inside to the outside in the thickness direction of the silicon substrate 10, and the laser blocking layer 62 is partially covered by the first conductive layer 30 and the second conductive layer 50. Among them, the first doped layer 22 and the conductive layer (the first conductive layer 30 and the second conductive layer 50) corresponding to the isolation region 12 are formed synchronously with the first doped layer 22 and the first conductive layer 30 of the first functional region 11, and the second doped layer 42 corresponding to the isolation region 12 is formed synchronously with the second doped layer 42 of the second functional region 13. That is, during the preparation of various film layers, the isolation region 12 can not be processed, and various film layers can be formed in the isolation region. Among them, the existence of the second intrinsic silicon-containing thin film layer 41 can isolate the first doped layer 22 and the second doped layer 42, and by introducing the insulating layer 61 between the first doped layer 22 and the second intrinsic silicon-containing thin film layer 41, the electrical isolation between the first doped layer 22 and the second doped layer 42 is further ensured. It is worth noting that the tunneling oxide layer 21, the first doped layer 22, the insulating layer 61, the second intrinsic silicon-containing thin film layer 41, the second doped layer 42, the laser blocking layer 62, and the conductive layer (the first conductive layer 30 and the second conductive layer 50) in the isolation region 12 are formed on the entire first major surface of the silicon substrate 10, that is, during the formation of various functional film layers for the first functional region and various functional film layers for the second functional region, no special treatment such as covering is required for the isolation region 12, so as to effectively reduce the processing procedures of the back contact heterojunction solar cell, and facilitate the industrialized production of the entire back contact heterojunction solar cell.

[0065] In addition, for the second structure of the first carrier collection layer 20 (the first carrier collection layer 20 comprises a first intrinsic silicon-containing thin film layer), for the isolation region 12, the first intrinsic silicon-containing thin film layer, the first doped layer 22, the insulating layer 61, the second intrinsic silicon-containing thin film layer 41, the second doped layer 42, and the laser blocking layer 62 are sequentially stacked from inside to outside in the thickness direction of the silicon substrate 10; and the first conductive layer 30 and the second conductive layer 50 cover a part of the laser blocking layer 62, respectively. In the back contact heterojunction solar cell with the second structure of the first carrier collection layer 20, the formation of each functional layer (the first intrinsic silicon-containing thin film layer, the first doped layer 22, the insulating layer 61, the second intrinsic silicon-containing thin film layer 41, the second doped layer 42, the laser blocking layer 62, the first conductive layer 30, and the second conductive layer 50) in the isolation region 12 is similar to that in the back contact heterojunction solar cell with the first structure of the first carrier collection layer 20, except that the tunneling oxide layer 21 in the first structure of the first carrier collection layer 20 is replaced by the first intrinsic silicon-containing thin film layer. Therefore, the formation of the isolation region 12 in the back contact heterojunction solar cell with the second structure of the first carrier collection layer 20 will not be described here.

[0066] Regardless of the back contact heterojunction solar cell with the first structure of the first carrier collection layer 20 or the back contact heterojunction solar cell with the second structure of the first carrier collection layer 20, the isolation region 12 is substantially the intersection area of the first functional region 11 and the second functional region 13. For example, in the structure shown in FIG. 1, the intersection area can be divided into a first intersection area C1 corresponding to the isolation groove 63 and a second intersection area C2 disposed on both sides of the first intersection area C1 and adjacent to the first functional region 11 and the second functional region 13, respectively. In the example shown in FIG. 1, the first intersection area C1 corresponding to the isolation groove 63 comprises the tunneling oxide layer 21, the first doped layer 22, the insulating layer 61, the second intrinsic silicon-containing thin film layer 41, the second doped layer 42, and the laser blocking layer 62, which are sequentially stacked from inside to outside. In addition, for the first intersection area C1, part of the laser blocking layer 62 can be removed during the removal of the conductive layer, without damaging the tunneling oxide layer 21, the first doped layer 22, the insulating layer 61, the second intrinsic silicon-containing thin film layer 41, and the second doped layer 42. In addition, the second intersection area C2 comprises the tunneling oxide layer 21, the first doped layer 22, the insulating layer 61, the second intrinsic silicon-containing thin film layer 41, the second doped layer 42, the laser blocking layer 62, and the conductive layer (the first conductive layer 30 adjacent to the first functional region 11 and the second conductive layer 50 adjacent to the second functional region 13), which are sequentially stacked from inside to outside.

[0067] The width of the isolation region 12 is generally not less than 40 μm. Preferably, the width of the isolation region 12 is 50-100 μm. For example, the width of the isolation region 12 can be 50 μm, 55 μm, 60 μm, 70 μm, 80 μm, 90 μm, 100 μm, etc. to achieve electrical isolation while helping to improve the carrier collection capability of the first functional region 11 and the second functional region 13.

[0068] The formation of the tunneling oxide layer 21 (or the first intrinsic silicon-containing thin film layer), the first doped layer 22, the second intrinsic silicon-containing thin film layer 41, the second doped layer 42 and the conductive layer in the isolation region 12 is the same as the formation of the tunneling oxide layer 21 (or the first intrinsic silicon-containing thin film layer), the first doped layer 22 and the second functional region 13 to form the second intrinsic silicon-containing thin film layer 41, the second doped layer 42, and the conductive layer formed synchronously in the first functional region 11 and the second functional region 13, which will not be described here.

[0069] The insulating layer 61 in the isolation region 12 is generally a single layer or a laminated film layer formed by chemical vapor deposition, plasma vapor deposition, physical vapor deposition, etc. Each layer of the single layer or laminated film layer can include any one or more of silicon oxide, silicon nitride and silicon oxynitride. The thickness of the insulating layer can be 3-500 nm, preferably, the thickness of the insulating layer is 20-200 nm, for example, the thickness of the insulating layer can be 20 nm, 30 nm, 40 nm, 45 nm, 50 nm, 60 nm, 70 nm, 80 nm, 90 nm, 100 nm, 120 nm, 140 nm, 160 nm, 180 nm, 200 nm, etc.

[0070] In a preferred embodiment, the first doped layer 22 is an n-type doped layer, and the second doped layer 42 is a p-type doped layer. For the case where the first doped layer 22 is an n-type doped layer, the second doped layer 42 is a p-type doped layer, and the isolation region 12 has the second doped layer 42, the sheet resistance of the second doped layer 42 is ≥500 Ω / sq, for example, the sheet resistance of the second doped layer 42 can be 500 Ω / sq, 550 Ω / sq, 600 Ω / sq, 650 Ω / sq, 700 Ω / sq, 800 Ω / sq, 900 Ω / sq, 1000 Ω / sq, etc. By controlling the sheet resistance of the second doped layer 42, the slot damage caused by the isolation groove 63 in the isolation region 12 can be effectively reduced, the isolation effect can be achieved, and the existence of leakage current can be avoided, so that the first functional region 11 and the second functional region 13 can achieve better performance.

[0071] It is worth mentioning that the first main surface of the silicon substrate 10 can be designed with only one first functional area 11, one isolation area 12 and one second functional area 13. In addition, the first main surface of the silicon substrate 10 can also be designed with first functional areas 11, isolation areas 12 and second functional areas 13 arranged alternately. Whether it is designed with only one first functional area 11, one isolation area 12 and one second functional area 13 on the first main surface, or whether it is designed with first functional areas 11, isolation areas 12 and second functional areas 13 arranged alternately on the first main surface, the first main surface can be a polished surface with a tower base. That is, the first main surface is formed by polishing the textured structure.

[0072] In addition, as shown in FIG. 1, the first functional area 11 and the second functional area 13 are arranged in the thickness direction of the silicon substrate 10. By arranging the first functional area 11 and the second functional area 13 in this way, the first functional area 11 and the second functional area 13 can be completely isolated, further improving the reliability of the back contact heterojunction solar cell.

[0073] Further, as shown in FIG. 1, the back contact heterojunction solar cell further comprises a passivation layer 70 and an anti-reflection layer 80 stacked on the second main surface of the silicon substrate 10. The passivation layer 70 and the anti-reflection layer 80 can effectively improve the photoelectric conversion efficiency of the back contact heterojunction solar cell. The anti-reflection layer 80 can be at least one of aluminum oxide, silicon oxide, gallium oxide, silicon nitride, aluminum nitride, silicon oxynitride, aluminum oxynitride, magnesium fluoride, lithium fluoride, ITO, and zinc oxide. The thickness of the anti-reflection layer 80 can be 40-200 nm. For example, the thickness of the anti-reflection layer 80 can be 40 nm, 50 nm, 80 nm, 100 nm, 120 nm, 150 nm, 170 nm, 180 nm, 200 nm, etc.

[0074] Further, as shown in FIG. 1, the back contact heterojunction solar cell further comprises a metal electrode 90 arranged separately in the first functional area 11 and the second functional area 13 and electrically connected to the conductive layer (the first conductive layer and the second conductive layer).

[0075] In addition, compared with the existing structure which needs to cut off the doped layer to avoid leakage, the structure provided by the present disclosure reduces the slotting damage, further improving the photoelectric conversion efficiency of the back contact heterojunction solar cell. Moreover, by cutting off the conductive layer 40 to obtain the isolation groove 63, the required laser energy is relatively low, further reducing the energy consumption required for production, thereby reducing the production cost of the back contact heterojunction solar cell.

[0076] Further, the present disclosure provides a preparation method of a back contact heterojunction solar cell. As shown in FIG. 2, the preparation method can comprise:

[0077] Step S201: providing a silicon substrate 10, the silicon substrate 10 comprising a first main surface and a second main surface opposite to each other, the first main surface comprising a first functional region 11, an isolation region 12 and a second functional region 13.

[0078] For the silicon substrate 10 provided in the step S201, before the step S202, a mask layer 14 can be formed on the second main surface of the silicon substrate 10; the first main surface of the silicon substrate 10 is polished to form a polished surface with a tower base on the first main surface.

[0079] The step can make the first main surface of the silicon substrate 10 face upward and the second main surface face downward in the subsequent process of forming the functional layers on the first main surface by forming the mask layer 14. The second main surface of the silicon substrate 10 is protected by the mask layer 14 to avoid damage and contamination of the second main surface when the second main surface faces downward. In addition, the polishing process of the first main surface of the silicon substrate 10 is generally performed by using an alkali solution. The polishing process can be completed by using the existing polishing process in the production process of the solar cell, without introducing new polishing materials and processes, thereby effectively controlling the cost. In addition, the polished surface with a tower base formed on the first main surface of the silicon substrate 10 after the polishing process can ensure the uniformity of the subsequent preparation of the functional layers.

[0080] The mask layer 14 can be a film layer formed by deposition, which can include any one or more of silicon oxide, silicon nitride and silicon oxynitride. That is, the materials used to form the mask layer 14, i.e. silicon oxide, silicon nitride and silicon oxynitride, can be the same as the materials used in the subsequent functional layers, thereby avoiding the introduction of new materials to effectively control the production cost of the back contact heterojunction solar cell.

[0081] Further, before forming the mask layer 14 on the second main surface of the silicon substrate 10, the silicon substrate 10 can be further subjected to a double-sided texturing process. Through the double-sided texturing process, the light-receiving surface of the prepared back contact heterojunction solar cell can be a textured structure, which can increase the light-limiting property of the light-receiving surface to improve the light utilization rate of the back contact heterojunction solar cell.

[0082] For the silicon substrate 10 provided in the step S201, before the step S202, the structure change of the double-sided texturing and the single-sided preparation of the mask layer 14 can be as shown in FIG. 3 from the structure of the step S201 to the structure of the step S202.

[0083] Step S202: sequentially forming a first carrier collection layer 20 and an insulating layer 61 on the silicon substrate 10 corresponding to the first functional region 11 and the isolation region 12.

[0084] In this step S202, taking the first structure of the first carrier collection layer 20 provided in the above embodiment as an example, the specific implementation of this step can include: sequentially laminating a tunneling oxide layer 21, a first doped layer 22 and an insulating layer 61 on the first main surface of the silicon substrate 10; removing the tunneling oxide layer 21, the first doped layer 22 and the insulating layer 61 on the first main surface of the silicon substrate 10 corresponding to the second functional region 13 by laser, so as to expose the silicon substrate 10 of the second functional region 13. The structural change of the silicon substrate 10 corresponding to this step S202 is shown in FIG. 3. In addition, it can be understood that for the first structure of the first carrier collection layer 20 provided in the above embodiment, the tunneling oxide layer 21 is replaced by a first intrinsic silicon-containing thin film layer, which will not be described here.

[0085] The tunneling oxide layer 21 (or the first intrinsic silicon-containing thin film layer), the first doped layer 22 and the insulating layer 61 can all be formed by using the deposition process in the existing solar cell production process, without introducing new processing equipment.

[0086] Specifically, the tunneling oxide layer 21 (or the first intrinsic silicon-containing thin film layer), the first doped layer 22 and the insulating layer 61 can all be obtained by using the existing preparation process, and the preparation process thereof is not limited here.

[0087] Step S203: Forming a second carrier collection layer 40 with a conductive type opposite to that of the first carrier collection layer 20 on the silicon substrate 10 corresponding to the second functional region 13 and on the insulating layer 61.

[0088] As shown in the structural change corresponding to this step S203 in FIG. 4, the specific implementation of this step S203 can include: sequentially laminating a second intrinsic silicon-containing thin film layer 41, a second doped layer 42, a dielectric layer 64 and a sacrificial layer 65 on the first main surface of the silicon substrate 10; the second doped layer 42 is opposite to the first doped layer 22 in doping type; removing the insulating layer 61 and the second carrier collection layer 40 corresponding to the first functional region 11. For the case that the second doped layer 42 is a p-type doped layer, the sheet resistance of the second doped layer 42 formed in this step is controlled to be not less than 500 Ω / sq. The sheet resistance can be achieved by adjusting the doping atomic concentration.

[0089] In addition, the dielectric layer 64 is generally one or more of silicon oxide, silicon nitride and silicon oxynitride. The sacrificial layer 65 is generally an intrinsic silicon-containing thin film layer. That is, the dielectric layer 64 and the sacrificial layer 65 are both obtained by using the conventional materials required for the preparation of solar cells, without introducing new materials or components for solar cells, so as to effectively control the performance and cost of the back contact heterojunction solar cell.

[0090] In addition, the medium layer 64 and the sacrificial layer 65 can be deposited by chemical vapor deposition, physical vapor deposition or the like. The thickness of the medium layer 64 is generally 3-500 nm, and preferably, the thickness of the medium layer 64 is 20-200 nm. For example, the thickness of the medium layer 64 can be 20 nm, 40 nm, 70 nm, 90 nm, 120 nm, 130 nm, 150 nm, 170 nm, 180 nm, 200 nm or the like. The thickness of the sacrificial layer 65 is generally 1-90 nm. For example, the thickness of the sacrificial layer 65 can be 1 nm, 5 nm, 10 nm, 20 nm, 30 nm, 40 nm, 50 nm, 70 nm, 70 nm, 80 nm, 90 nm or the like.

[0091] Further, the specific embodiment of the above-mentioned removing the insulating layer 61 and the second carrier collection layer 40 corresponding to the first functional area 11 can include: step S203-1: removing the sacrificial layer 65 of the first functional area 11 by laser; and step S203-2: removing the medium layer 64, the second doped layer 42, the second intrinsic silicon-containing thin film layer 41 and the insulating layer 61 of the first functional area 11, the sacrificial layer 65 and the medium layer 64 of the second functional area 12, and the sacrificial layer 65 and the medium layer 64 of the isolation area 12 by chemical etching.

[0092] Further, the specific embodiment of the above-mentioned step S203-2 can include: step S203-21: removing the medium layer 64 of the first functional area 11 by cleaning the first main surface of the silicon substrate 10 with hydrofluoric acid; step S203-22: removing the sacrificial layer 65 of the second functional area 13 and the isolation area 12, the second doped layer 42 and the second intrinsic silicon-containing thin film layer 41 of the first functional area 11 by cleaning the first main surface of the silicon substrate 10 with sodium bicarbonate or sodium carbonate; and step S203-23: removing the medium layer of the isolation area 12, the insulating layer 61 of the first functional area 11 by cleaning the first main surface and the second main surface of the silicon substrate 10 with hydrofluoric acid.

[0093] For the structure shown in FIG. 3, in which the mask layer 14 is formed on the second main surface of the silicon substrate 10, in this step, the mask layer 14 is removed at the same time as the second carrier collection layer 40 is removed.

[0094] In this step, the first main surface of the silicon substrate 10 is cleaned with sodium bicarbonate or sodium carbonate, which can remove the sacrificial layer 65 of the second functional area 13 and the isolation area 12, the second doped layer 42 and the second intrinsic silicon-containing thin film layer 41 of the first functional area 11, and further remove the residual tunnel oxide layer 21 and the first doped layer 22 in the second functional area, so as to avoid the residual first doped layer 22 in the second functional area, thereby effectively improving the performance and yield of the produced back contact heterojunction solar cell.

[0095] In this step, the process of removing the sacrificial layer 65 of the first functional region 11 by laser needs to consider the width of the isolation region 12 to ensure that the width of the isolation region 12 is not less than 40 μm, preferably, the width of the isolation region 12 is 50-90 μm.

[0096] Specifically, for the second doped layer 42 being a p-type doped layer, for the process of removing each film layer by chemical etching: first, the first main surface of the silicon substrate 10 is cleaned by mass percentage 8% to 20% hydrofluoric acid to remove the dielectric layer 64 of the first functional region 11, wherein the acid solution cleaning time of the process can be controlled according to requirements, for example, the cleaning time can be controlled to be 20 to 500 seconds, such as 20 seconds, 40 seconds, 50 seconds, 90 seconds, 120 seconds, 150 seconds, 170 seconds, 240 seconds, 300 seconds, 330 seconds, 360 seconds, 380 seconds, 420 seconds, 450 seconds, 470 seconds, 500 seconds, etc.; then the first main surface of the silicon substrate 10 is cleaned by mass percentage 0.5% to 3% sodium hydroxide or potassium hydroxide to remove the sacrificial layer 65 of the second functional region 13 and the isolation region 12, the second doped layer 42 and the second intrinsic silicon-containing thin film layer 41 of the first functional region 11, wherein the alkali solution cleaning time of the process can be controlled according to requirements, for example, the alkali solution cleaning time can be 200 to 2000 seconds, such as 200 seconds, 240 seconds, 270 seconds, 300 seconds, 360 seconds, 420 seconds, 450 seconds, 500 seconds, 600 seconds, 620 seconds, 700 seconds, 900 seconds, 1200 seconds, 1500 seconds, 2000 seconds, etc.; finally, the first main surface and the second main surface of the silicon substrate 10 are cleaned by mass percentage 8% to 20% hydrofluoric acid to remove the dielectric layer 64 of the isolation region 12, the insulating layer 61 of the first functional region 11 and the mask layer 14 on the second main surface of the silicon substrate 10, wherein the acid solution cleaning time of the process can be controlled according to requirements, for example, the cleaning time can be controlled to be 20 to 500 seconds, such as 20 seconds, 40 seconds, 50 seconds, 90 seconds, 120 seconds, 150 seconds, 170 seconds, 240 seconds, 300 seconds, 330 seconds, 360 seconds, 380 seconds, 420 seconds, 450 seconds, 470 seconds, 500 seconds, etc. It is worth noting that the mass percentage of the above-mentioned acid solution and the mass percentage of the alkali solution refer to the mass ratio of the acid (hydrofluoric acid) or the base (sodium hydroxide or potassium hydroxide) contained in the cleaning solution to the cleaning solution. For example, mass percentage 8% to 20% hydrofluoric acid refers to the mass ratio of hydrofluoric acid to the cleaning solution in the cleaning solution being 8% to 20%. For example, the mass ratio of hydrofluoric acid to the cleaning solution in the cleaning solution can be 8%, 10%, 12%, 14%, 15%, 17%, 18%, 20%, etc. For mass percentage 0.5% to 3% sodium hydroxide or potassium hydroxide, it refers to the mass ratio of sodium hydroxide or potassium hydroxide contained in the cleaning solution to the cleaning solution being 0.5% to 3%. For example, the mass ratio of sodium hydroxide or potassium hydroxide to the cleaning solution in the cleaning solution can be 0.5%, 1%, 1.2%, 1.5%, 1.7%, 1.9%, 2%, 2.3%, 2.5%, 2.8%, 3%, etc.

[0097] Through the chemical etching of the film layers to be removed in each functional area, the film layers to be reserved in each functional area can be well reserved, and the performance of the back contact heterojunction solar cell produced can be ensured.

[0098] Step S204: forming a laser blocking layer 62 on the second carrier collection layer 40 corresponding to the isolation region 12. By forming the laser blocking layer 62 on the isolation region 12, in the subsequent process of forming the isolation groove 63 by laser grooving, the laser can be avoided to cause damage to the second doped layer 42.

[0099] Further, after step S203 and before step S204, there is further comprising: sequentially forming a passivation layer 70 and an anti-reflection layer 80 on the second main surface of the silicon substrate 10. By sequentially forming the passivation layer 70 and the anti-reflection layer 80 on the second main surface of the silicon substrate 10 first, and then performing step S204, the second main surface of the silicon substrate 10 can be avoided from being contaminated.

[0100] Step S205: forming a conductive layer on the first main surface of the silicon substrate 10, and opening the isolation groove 63 on the conductive layer corresponding to the isolation region 12 by laser.

[0101] In addition, after this step, a metal electrode 90 is formed on the conductive layer corresponding to the first functional area 11 and the conductive layer corresponding to the second functional area 13.

[0102] After the above steps S204, this step S205 processing and forming the metal electrode 90, the structure change on the silicon substrate 10 can be as shown in FIG. 5.

[0103] The grooving process of this step S205 can allow the laser to have a certain etching on the laser blocking layer 62, so that the laser grooving has a relatively large process window, which is convenient for process implementation, is conducive to industrialized production, and can effectively improve the yield of the back contact heterojunction solar cell.

[0104] The preparation method of the back contact heterojunction solar cell provided by the embodiment of the present disclosure can effectively improve the photoelectric conversion efficiency of the back contact heterojunction solar cell produced by setting the laser blocking layer in the isolation region (i.e. the intersection region of the first functional area and the second functional area), and only cutting off the conductive layer in the subsequent laser in the layered structure of the isolation region without damaging other parts in the layered structure. In addition, since only the conductive layer is cut off, the required laser energy is low, which reduces the energy consumption required for production, that is, reduces the process cost.

[0105] In addition, in the preparation process, for the case that the second doped layer is a p-type doped layer, by controlling the sheet resistance of the second doped layer to be not less than 500 Ω / sq, the risk of lateral transmission generated leakage can be well controlled, the first functional area and the second functional area are well electrically insulated, the purpose of avoiding leakage can be achieved without cutting off the doped layer, the laser grooving damage is further reduced, and the photoelectric conversion efficiency of the produced back contact heterojunction solar cell is further improved.

[0106] The above steps provide an introduction for helping to understand the method, structure and core idea of the present disclosure. For those skilled in the art, some improvements and modifications can be made to the present disclosure without departing from the principles of the present disclosure, and these improvements and modifications also belong to the protection scope of the present disclosure.

Claims

1. A back contact heterojunction solar cell, wherein, The back contact heterojunction solar cell comprises: a silicon substrate (10), wherein a first main surface of the silicon substrate (10) is arranged with a first functional region (11), an isolation region (12) and a second functional region (13); a first carrier collection layer (20) arranged on the first functional region (11) and extending to the isolation region (12); a first conductive layer (30) arranged on the first carrier collection layer (20); a second carrier collection layer (40) arranged on the second functional region (13) and extending to the isolation region (12) and covering the first carrier collection layer (20) in the isolation region (12); a second conductive layer (50) arranged on the second carrier collection layer (40); an insulating layer (61) arranged in the isolation region (12) and between the first carrier collection layer (20) and the second carrier collection layer (40); a laser blocking layer (62) arranged in the isolation region (12) and on a side of the second carrier collection layer (40) away from the silicon substrate (10); the first carrier collection layer (20) and the second carrier collection layer (40) are of opposite conductivity types; the first conductive layer (30) and the second conductive layer (50) cover the laser blocking layer (62), and an isolation groove (63) is formed between the first conductive layer (30) and the second conductive layer (50).

2. The back contact heterojunction solar cell according to claim 1, wherein the first carrier collection layer (20) comprises a first intrinsic silicon-containing thin film layer and a first doped layer (22) arranged from inside to outside along the thickness direction of the silicon substrate (10); or the first carrier collection layer (20) comprises a tunneling oxide layer (21) and a first doped layer (22) arranged from inside to outside along the thickness direction of the silicon substrate (10).

3. The back contact heterojunction solar cell according to claim 2, wherein the second carrier collection layer (40) comprises a second intrinsic silicon-containing thin film layer (41) and a second doped layer (42) arranged from inside to outside along the thickness direction of the silicon substrate (10).

4. The back contact heterojunction solar cell according to claim 3, wherein for the structure in which the first carrier collection layer (20) comprises the first intrinsic silicon-containing thin film layer, for the isolation region (12), a first intrinsic silicon-containing thin film layer, a first doped layer (22), an insulating layer (61), a second intrinsic silicon-containing thin film layer (41), a second doped layer (42) and a laser blocking layer (62) are laminated from inside to outside along the thickness direction of the silicon substrate (10); the first conductive layer (30) and the second conductive layer (50) respectively cover a part of the laser blocking layer (62); or for the structure in which the first carrier collection layer (20) comprises the tunneling oxide layer (21), ​ For the isolation region (12), a through-oxidation layer (21), a first doped layer (22), an insulation layer (61), a second intrinsic silicon-containing thin film layer (41), a second doped layer (42), and a laser blocking layer (62) are sequentially arranged from the inside to the outside in the thickness direction of the silicon substrate (10). The first conductive layer (30) and the second conductive layer (50) cover a part of the laser blocking layer (62) respectively.

5. The back contact heterojunction solar cell according to any one of claims 1 to 4, wherein, The first functional region (11), the isolation region (12), and the second functional region (13) are arranged alternately.

6. The back contact heterojunction solar cell according to any one of claims 1 to 4, wherein, The back contact heterojunction solar cell further comprises a passivation layer (70) and an anti-reflection layer (80) sequentially arranged on the second main surface of the silicon substrate (10); And / or, The back contact heterojunction solar cell further comprises a metal electrode (90) separately arranged on the first functional region (11) and the second functional region (13) and electrically connected with the conductive layer; And / or, The first functional region (11) and the second functional region (13) are arranged in dislocation in the thickness direction of the silicon substrate (10).

7. The back contact heterojunction solar cell according to claim 3, wherein, The first doped layer (22) is a doped polysilicon layer; And / or, The second doped layer (42) is formed by doping a doping element in a single layer or a stacked silicon thin film layer formed by one or more of microcrystalline, nanocrystalline, amorphous silicon, silicon oxide, and silicon carbide; And / or, The first conductive layer (30) is formed by doping a doping element in a single layer or a stacked thin film formed by a metal oxide and / or a metal nitride, wherein the metal oxide is one or more of indium oxide, tin oxide, zinc oxide, cadmium oxide, and titanium nitride, the metal nitride is titanium nitride, and the doping element doped in the first conductive layer (30) is one or more of indium, tin, calcium, aluminum, cadmium, zinc, cerium, and fluorine; And / or, The second conductive layer (50) is formed by doping a doping element in a single layer or a stacked thin film formed by a metal oxide and / or a metal nitride, wherein the metal oxide is one or more of indium oxide, tin oxide, zinc oxide, cadmium oxide, and titanium nitride, the metal nitride is titanium nitride, and the doping element doped in the second conductive layer (50) is one or more of indium, tin, calcium, aluminum, cadmium, zinc, cerium, and fluorine; And / or, The sheet resistance of the second doped layer (42) is not less than 500 Ω / sq.

8. The back contact heterojunction solar cell according to any one of claims 1 to 4 and 7, wherein, The insulation layer (61) is one or more of silicon oxide, silicon nitride, and silicon oxynitride; And / or, The laser blocking layer (62) is a non-transparent non-conductive paste with a thickness not less than 1 μm; And / or, The width of the isolation region (12) is not less than 40 μm.

9. A method of fabricating a back contact heterojunction solar cell, wherein, Comprise: Step A, providing a silicon substrate (10) comprising opposite first and second main surfaces, the first main surface comprising a first functional region (11), an isolation region (12) and a second functional region (13); Step B, sequentially forming a first carrier collection layer (20) and an insulating layer (61) on the silicon substrate (10) corresponding to the first functional region (11) and the isolation region (12); Step C, forming a second carrier collection layer (40) of a type opposite to that of the first carrier collection layer (20) on the silicon substrate (10) corresponding to the second functional region (13) and on the insulating layer (61); Step D, forming a laser blocking layer (62) on the second carrier collection layer (40) corresponding to the isolation region (12); Step E, forming a conductive layer on the first main surface of the silicon substrate (10) and opening an isolation groove (63) in the conductive layer corresponding to the isolation region (12) by laser.

10. The method of producing a back contact heterojunction solar cell according to claim 9, wherein, Step B comprises: Step B1, sequentially forming a tunneling oxide layer (21), a first doped layer (22) and an insulating layer (61) on the first main surface of the silicon substrate (10); Step B2, removing the tunneling oxide layer (21), the first doped layer (22) and the insulating layer (61) on the first main surface of the silicon substrate (10) corresponding to the second functional region (13) by laser, so that the second functional region (13) is exposed to the silicon substrate (10).

11. The method of producing a back contact heterojunction solar cell according to claim 10, wherein, Step C comprises: Step C1, sequentially forming a second intrinsic silicon-containing thin film layer (41), a second doped layer (42), a dielectric layer (64) and a sacrificial layer (65) on the first main surface of the silicon substrate (10); the second doped layer (42) is opposite in doping type to the first doped layer (22); Step C2, removing the insulating layer (61) and the second carrier collection layer (40) corresponding to the first functional region (11).

12. The method of producing a back contact heterojunction solar cell according to claim 10, wherein, Step C2 comprises: Step C21, removing the sacrificial layer (65) of the first functional region (11) by laser; Step C22, removing the dielectric layer (64), the second doped layer (42), the second intrinsic silicon-containing thin film layer (41) and the insulating layer (61) of the first functional region (11), and the sacrificial layer (65) and the dielectric layer (64) of the second functional region (12), and the sacrificial layer (65) and the dielectric layer (64) of the isolation region (12) by chemical etching.

13. The method for preparing a back contact heterojunction solar cell according to claim 12, wherein step C22 comprises: Step C221, cleaning the first main surface of the silicon substrate (10) by hydrofluoric acid to remove the dielectric layer (64) of the first functional region (11); Step C222, cleaning the first main surface of the silicon substrate (10) by sodium bicarbonate or sodium carbonate to remove the sacrificial layer (65) of the second functional region (13) and the isolation region (12), the second doped layer (42) and the second intrinsic silicon-containing thin film layer (41) of the first functional region (11). Step C223: cleaning the first main surface and the second main surface of the silicon substrate (10) by hydrofluoric acid to remove the dielectric layer (64) of the isolation region (12), the insulating layer (61) of the first functional region (11).

14. The method of claim 10, further comprising, before step B: forming a mask layer (14) on the second main surface of the silicon substrate (10); polishing the first main surface of the silicon substrate (10) to form a polished surface with a tower base on the first main surface; in step D, removing the mask layer (14) while removing the second carrier collection layer (40).

15. The method of claim 14, further comprising, before forming the mask layer (14) on the second main surface of the silicon substrate (10): double-side texturing the silicon substrate (10).

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