Display apparatus and display panel thereof

Abstract

A display apparatus and a display panel thereof. The display panel (PNL) comprises a base substrate (SBT), a display layer (DBP), a thin film encapsulation layer (TFE), an organic protective layer (TOC) and a color filter layer (CFL) which are sequentially stacked. The display panel (PNL) comprises a flat area (FA) and a ramp area (TCA). In the direction from the center of the display panel (PNL) to an edge of the display panel (PNL), the height difference between the surface of the thin film encapsulation layer (TFE) away from the base substrate (SBT) and the base substrate (SBT) gradually decreases in the ramp area (TCA). The color filter layer (CFL) comprises a first color filter structure (CFA) located in the flat area (FA) and a second color filter structure (CFB) located in the ramp area (TCA), the thickness of the second color filter structure (CFB) being not less than 0.85 times the thickness of the first color filter structure (CFA). The display panel (PNL) can achieve the purpose of relieving adverse display of peripheral brightness.

Description

Display device and display panel thereof

[0001] Cross-reference to related applications

[0002] The present disclosure claims priority to Chinese Patent Application No. 202410831514.5, filed on June 25, 2024, entitled “Display device and display panel thereof”, the entire contents of which are incorporated herein by reference in its entirety. TECHNICAL FIELD

[0003] The present disclosure relates to the technical field of display, in particular, to a display device and a display panel thereof. BACKGROUND

[0004] The COE (Color filter On Encapsulation, also known as PLP, pol-less panel) technology uses a color filter to replace a polarizer to obtain a wider color gamut and lower power consumption, and has a broad application prospect in the field of AMOLED (Active-matrix organic light-emitting diode) display.

[0005] The thin film encapsulation process is currently the main OLED (Organic Electroluminescence Display) display packaging method, which is mainly used to prevent water vapor from invading and causing the failure of light-emitting materials. However, this process causes a climbing area to be formed from the DAM (dam, preventing organic encapsulation layer from escaping) to the display area at the edge of the display panel. At the same time, to adapt to the current trend of narrow bezel extreme display, part of the climbing area is arranged at the edge of the display area. In this way, for COE products, when the color filter process is performed, the glue flow speed in the climbing area is fast, which will cause the color filter to be thinner in the climbing area, resulting in poor display of the surrounding light.

[0006] It should be noted that the information disclosed in the above background section is only used to strengthen the understanding of the background of the present disclosure, and therefore can include information that does not constitute prior art known to those of ordinary skill in the art. SUMMARY

[0007] The present disclosure aims to overcome the shortcomings of the prior art, and provides a display device and a display panel thereof, which can improve the poor display of surrounding light.

[0008] According to one aspect of the present disclosure, a display panel is provided, comprising a substrate substrate, a display layer, a thin film encapsulation layer, an organic protection layer and a color filter layer which are sequentially stacked.

[0009] The display panel comprises a planar region and a ramp region; along a direction from a center of the display panel to an edge of the display panel, a height difference between the thin film encapsulation layer and a surface of the substrate is gradually reduced in the ramp region;

[0010] The color film layer comprises a first color film structure in the planar region and a second color film structure in the ramp region; a thickness of the second color film structure is not less than 0.85 times of a thickness of the first color film structure.

[0011] In an embodiment of the present disclosure, the thickness of the second color film structure is not less than 0.95 times of the thickness of the first color film structure.

[0012] In an embodiment of the present disclosure, the organic protective layer comprises a first sub-organic protective structure in the planar region and a second sub-organic protective structure in the ramp region;

[0013] The second sub-organic protective structure comprises a first sub-organic structure adjacent to the first sub-organic protective structure and a second sub-organic structure on a side of the first sub-organic structure away from the first sub-organic protective structure;

[0014] A tilt angle of a surface of the first sub-organic structure is less than a tilt angle of a surface of the second sub-organic structure adjacent to the first sub-organic structure.

[0015] In an embodiment of the present disclosure, a surface of the first sub-organic structure away from the substrate is flush with a surface of the first sub-organic protective structure away from the substrate.

[0016] In an embodiment of the present disclosure, the organic protective layer comprises a first sub-organic protective structure in the planar region and a second sub-organic protective structure in the ramp region;

[0017] The second sub-organic protective structure comprises a first sub-organic structure adjacent to the first sub-organic protective structure and a second sub-organic structure on a side of the first sub-organic structure away from the first sub-organic protective structure; a surface of the first sub-organic structure away from the substrate is a flat surface;

[0018] A distance between the surface of the first sub-organic structure away from the substrate and the substrate is less than a distance between a surface of the first sub-organic protective structure away from the substrate and the substrate.

[0019] In an embodiment of the present disclosure, the display panel further comprises a black matrix layer; the black matrix layer comprises a plurality of arrayed first openings in the planar region and a plurality of arrayed second openings in the ramp region;

[0020] The display layer comprises a pixel layer; the pixel layer comprises a plurality of arrayed first pixel structures in the ramp region and a plurality of arrayed second pixel structures in the planar region;

[0021] The first openings and the first pixel structures correspond one-to-one, and the second openings and the second pixel structures correspond one-to-one.

[0022] The horizontal distance between the sidewall of the first opening and the first pixel structure is greater than the horizontal distance between the sidewall of the second opening and the second pixel structure.

[0023] In an embodiment of the present disclosure, the height difference between the distance between the first sub-organic protection structure and the substrate and the distance between the first sub-organic structure and the substrate is 0-3 μm.

[0024] The difference between the horizontal distance between the sidewall of the first opening and the first pixel structure and the horizontal distance between the sidewall of the second opening and the second pixel structure is 0-2 μm.

[0025] In an embodiment of the present disclosure, the display layer comprises a pixel layer; the pixel layer comprises a plurality of arrayed first pixel structures in the ramp region and a plurality of arrayed second pixel structures in the planar region;

[0026] The organic protection layer comprises a first sub-organic protection structure in the planar region and a second sub-organic protection structure in the ramp region; the second sub-organic protection structure comprises a first sub-organic structure adjacent to the first sub-organic protection structure and a second sub-organic structure on the side of the first sub-organic structure away from the first sub-organic protection structure;

[0027] The side of the second sub-organic structure away from the substrate comprises a blocking structure.

[0028] The blocking structure does not overlap the first pixel structure in the orthographic projection of the substrate.

[0029] In an embodiment of the present disclosure, the blocking structure is disposed in the same layer as the organic protection layer.

[0030] In an embodiment of the present disclosure, the thickness of the blocking structure is not less than the thickness of the second color film structure.

[0031] In an embodiment of the present disclosure, the surface of the blocking structure on the side close to the planar region is perpendicular to the surface of the ramp region.

[0032] According to another aspect of the present disclosure, there is provided a display device comprising the display panel described above.

[0033] It should be understood that the general description above and the following detailed description are only exemplary and explanatory and are not restrictive of the present disclosure. BRIEF DESCRIPTION OF DRAWINGS

[0034] The accompanying drawings, which are incorporated herein and form part of the specification, illustrate embodiments consistent with the present disclosure and, together with the description, further serve to explain the principles of the disclosure. It is to be expressly understood that the drawings are only exemplary and are provided to further facilitate an understanding of the present disclosure. In the drawings:

[0035] The accompanying drawings, which are incorporated herein and form part of the specification, illustrate embodiments consistent with the present disclosure and, together with the description, further serve to explain the principles of the disclosure. It is to be expressly understood that the drawings are only exemplary and are provided to further facilitate an understanding of the present disclosure. In the drawings:

[0036] FIG. 1 is a schematic diagram of a structure of a display panel according to an embodiment of the present disclosure.

[0037] FIG. 2 is a schematic diagram of a structure of a display panel according to an embodiment of the present disclosure.

[0038] FIG. 3 is a schematic diagram of a structure of a display panel according to an embodiment of the present disclosure.

[0039] FIG. 4 is a schematic diagram of a structure of a display panel according to an embodiment of the present disclosure.

[0040] FIG. 5 is a schematic diagram of a structure of a display panel according to an embodiment of the present disclosure.

[0041] FIG. 6 is a schematic diagram of a structure of a display panel according to an embodiment of the present disclosure.

[0042] FIG. 7 is a schematic diagram of a structure of a display panel according to an embodiment of the present disclosure.

[0043] FIG. 8a is a simulation of the relationship between the viewing angle and the luminance white-state luminance decay when the organic encapsulation layer IJP is 6 μm.

[0044] FIG. 8b is a simulation of the relationship between the viewing angle and the luminance white-state luminance decay when the organic encapsulation layer IJP is 8 μm.

[0045] FIG. 8c is a simulation of the relationship between the viewing angle and the luminance white-state luminance decay when the organic encapsulation layer IJP is 10 μm.

[0046] Figure 8d is a graph integration of Figures 8a-8c.

[0047] Figure 9a is a measured relationship between the viewing angle and the luminance white-state luminance decay when the organic encapsulation layer IJP is 6 μm.

[0048] Figure 9b is a measured relationship between the viewing angle and the luminance white-state luminance decay when the organic encapsulation layer IJP is 8 μm.

[0049] Figure 9c is a measured relationship between the viewing angle and the luminance white-state luminance decay when the organic encapsulation layer IJP is 10 μm.

[0050] Figure 9d is a graph integration of Figures 9a-9c.

[0051] Figure 10 is a comparison of the data of Figures 8d and 9d.

[0052] Figure 11a is a simulated relationship between the viewing angle and the luminance white-state luminance decay when the BM OUT is 2 μm.

[0053] Figure 11b is a simulated relationship between the viewing angle and the luminance white-state luminance decay when the BM OUT is 4 μm.

[0054] Figure 11c is a simulated relationship between the viewing angle and the luminance white-state luminance decay when the BM OUT is 6 μm.

[0055] Figure 11d is a graph integration of Figures 11a-11c.

[0056] Figure 12a is a measured relationship between the viewing angle and the luminance white-state luminance decay when the BM OUT is 2 μm.

[0057] Figure 12b is a measured relationship between the viewing angle and the luminance white-state luminance decay when the BM OUT is 4 μm.

[0058] Figure 12c is a measured relationship between the viewing angle and the luminance white-state luminance decay when the BM OUT is 6 μm.

[0059] Figure 12d is a graph integration of Figures 12a-12c.

[0060] Figure 13 is a comparison of the data of Figures 11d and 12d.

[0061] Figure 14 is a schematic diagram of a structure of a display panel in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0062] Example embodiments now will be described more fully hereinafter with reference to the accompanying drawings. Example embodiments, however, can be implemented in many different forms and should not be construed as limited to the implementations set forth herein; rather, these implementations are provided so that this disclosure will be thorough and complete, and will fully convey the concept of example embodiments to those skilled in the art. Like reference numerals refer to like elements throughout the specification. Additionally, the drawings are merely schematic and are not drawn to scale.

[0063] Although relative terms such as "on", "above", "upper", "lower", and the like can be used herein to describe one element's relationship to another element as the device is oriented in a particular direction, such terms are used in this specification to describe the exemplary example's orientation as shown in the figures. It is understood that if the device were turned over, such that the upper portion is then a lower portion, the elements described as being "on" could then be oriented "below" the other element. Such terms as used herein to describe the relative and actual positions of an object unless otherwise stated will be understood to encompass such apparent positional relationships.

[0064] The use of the terms "a" and "an" and "the" and "said" herein is intended to include the plural, unless the context clearly indicates otherwise. The use of the term "at least one" herein is intended to mean one or more, unless the context clearly indicates otherwise. The use of the terms "first", "second", and the like does not imply any particular order but are used for naming purposes only.

[0065] The structure layer E is located on the side of the structure layer F away from the substrate. It can be understood that the structure layer E is formed on the side of the structure layer F away from the substrate. When the structure layer F is a patterned structure, part of the structure layer E can also be located at the same physical height as the structure layer F or below the physical height of the structure layer F, wherein the substrate is the height reference.

[0066] A transistor refers to an element including at least a gate, a drain, and a source. A transistor has a channel region between a drain (drain electrode terminal, drain region, or drain electrode) and a source (source electrode terminal, source region, or source electrode), and current can flow through the drain, the channel region, and the source. The channel region refers to a region through which current mainly flows, and the channel region maintains a semiconductor property, and both the source and the drain are conductorized. In the embodiments of the present disclosure, the functions of the "source" and the "drain" are sometimes interchanged with each other, i.e., the "source" and the "drain" can be interchanged with each other, in the case of using a transistor of opposite polarity or in the case of changing the current direction in the operation of a circuit, etc.

[0067] In the present disclosure, the display panel comprises a display area and a non-display area, the display area comprises a ramp area and a flat area; in the flat area, the inorganic encapsulation layer is equidistant between the surface of the substrate and the substrate; in the ramp area, the distance between the surface of the substrate and the substrate gradually decreases in the direction from the center to the edge.

[0068] In the present disclosure, the thickness refers to the thickness of the film layer in the normal direction.

[0069] In recent years, the self-luminous display technology of AMOLED (Active-matrix organic light-emitting diode) and QLED (Quantum Dot Light Emitting Diodes) has developed rapidly, especially the AMOLED technology. Compared with the currently commonly used LCD (Liquid Crystal Display), the AMOLED has the advantages of wide color gamut, fast response speed, wide viewing angle, and foldable, etc., and has attracted many manufacturers to invest a large amount of funds for research and development. At present, there are a large number of display products on the market that use AMOLED technology, and it is a trend to replace LCD as the next generation of mainstream display.

[0070] The COE (Color filter On Encapsulation) technology uses color filter instead of polarizer to obtain wider color gamut and lower power consumption, and has broad application prospects in the field of AMOLED (Active-matrix organic light-emitting diode) display.

[0071] In an embodiment of the present disclosure, a display device based on COE technology is provided, comprising a display panel PNL.

[0072] In an embodiment of the present disclosure, referring to FIG. 1, the display panel PNL comprises a display area AA and a non-display area BB located at least one side of the display area AA. In the display area AA, the display panel PNL is provided with an array of display units UU, the display unit UU comprises a sub-pixel PIX and a pixel driving circuit PDC for driving the sub-pixel PIX. The display panel PNL does not set the display unit UU in the non-display area BB, or the display unit UU set is not used for displaying the picture.

[0073] In an embodiment of the present disclosure, referring to FIG. 1, the display panel PNL is provided with a plurality of scan wires GL extending along the row direction DH in the display area AA, each of which is arranged one-to-one corresponding to each display unit row. The pixel driving circuit PDC of each display unit UU in the display unit row is electrically connected to the corresponding scan wire GL, and the scan wire GL is used to load a scan signal to the pixel driving circuit PDC. The display panel PNL is also provided with a plurality of data wires DL extending along the column direction DV in the display area AA, each of which is arranged one-to-one corresponding to each display unit column. The pixel driving circuit PDC of each display unit UU in the display unit column is electrically connected to the corresponding data wire DL, and the data wire DL is used to load a data voltage to the pixel driving circuit PDC. In this way, the pixel driving circuit PDC of each display unit UU is connected to one scan wire GL and one data wire DL. When a scan signal is loaded on the scan wire GL, the voltage loaded on the data wire DL can be written into the pixel driving circuit PDC, so that the pixel driving circuit PDC can control the brightness of the sub-pixel PIX according to the written voltage.

[0074] In an embodiment of the present disclosure, referring to FIG. 2 and FIG. 3, the display panel PNL includes a substrate substrate SBT and a display layer DBP which are sequentially stacked.

[0075] In an embodiment of the present disclosure, the substrate SBT can be a substrate of inorganic material, a substrate of organic material, or a substrate of alternating layers of organic and inorganic materials. For example, in an embodiment of the present disclosure, the substrate SBT can be made of soda-lime glass, quartz glass, sapphire glass, or other glass materials. In another embodiment of the present disclosure, the substrate SBT can be made of Polymethyl methacrylate (PMMA), Polyvinyl alcohol (PVA), Polyvinyl phenol (PVP), Polyether sulfone (PES), polyimide, polyamide, polyacetal, Poly carbonate (PC), Polyethylene terephthalate (PET), Polyethylene naphthalate (PEN), or a combination thereof. In another embodiment of the present disclosure, the substrate SBT can also be a flexible substrate, for example, the substrate SBT can be made of Polyimide (PI). The substrate SBT can also be a composite of multiple layers, for example, in an embodiment of the present disclosure, the substrate SBT can include a Bottom Film, a pressure sensitive adhesive layer, a first Polyimide layer, and a second Polyimide layer, which are sequentially stacked.

[0076] In an embodiment of the present disclosure, referring to FIG. 2, the display layer DBP includes a driving layer DRL and a pixel layer PIXL, which are sequentially stacked on the substrate SBT. In this example, the substrate SBT and the driving layer DRL can form a driving backplane.

[0077] In an embodiment of the present disclosure, referring to FIG. 3 and FIG. 2, the pixel driving circuit PDC is disposed on the driving layer DRL, and the driving layer DRL can include an array of pixel driving circuits PDC, which are configured to drive corresponding sub-pixels PIX to display an image on the display panel PNL. The pixel layer PIXL can be provided with light emitting elements LD, which are electrically connected to the pixel driving circuits PDC, and the light emitting elements LD can serve as the sub-pixels PIX of the display panel PNL. Thus, the pixel layer PIXL is provided with an array of light emitting elements LD, and each light emitting element LD emits light under the control of a corresponding pixel driving circuit PDC.

[0078] In one embodiment of the present disclosure, in the drive layer DRL, any one of the pixel driving circuits PDC can include a thin film transistor and a storage capacitor. Further, the thin film transistor can be selected from a top-gate thin film transistor, a bottom-gate thin film transistor, or a dual-gate thin film transistor; the material of the active layer of the thin film transistor can be amorphous silicon semiconductor material, low-temperature polysilicon semiconductor material, metal oxide semiconductor material, organic semiconductor material, carbon nanotube semiconductor material, or other types of semiconductor material; and the thin film transistor can be an N-type thin film transistor or a P-type thin film transistor.

[0079] It can be understood that in each of the transistors in the pixel driving circuit PDC, the types of any two of the transistors can be the same or different. For example, in some embodiments, in one pixel driving circuit PDC, some of the transistors can be N-type transistors and some of the transistors can be P-type transistors. For another example, in some other embodiments, in one pixel driving circuit PDC, the material of the active layer of some of the transistors can be low-temperature polysilicon semiconductor material and the material of the active layer of some of the transistors can be metal oxide semiconductor material. In some embodiments of the present disclosure, the thin film transistor is a low-temperature polysilicon transistor. In some other embodiments of the present disclosure, some of the thin film transistors are low-temperature polysilicon transistors and some of the thin film transistors are metal oxide transistors.

[0080] In an embodiment of the present disclosure, referring to FIG. 4, the driving layer DRL can include a semiconductor layer SCL, a gate insulating layer GI, a gate layer GT, an interlayer dielectric layer ILD, a source-drain metal layer SD, a planarization layer PLN, etc. which are stacked between the substrate base plate SBT and the pixel layer PIXL. Each thin film transistor TFT and storage capacitor can be formed by the semiconductor layer SCL, the gate insulating layer GI, the gate layer GT, the interlayer dielectric layer ILD, the source-drain metal layer SD, etc. The positional relationship of each film layer can be determined according to the film layer structure of the thin film transistor. Further, the semiconductor layer SCL can be used to form the channel region of the transistor, and can also be used to form part of the wiring or conductive structure by being made conductive when necessary. The gate layer GT can be used to form one or more of the gate layer wiring such as the scan wiring, the reset control wiring, the light-emitting control wiring, etc., and can also be used to form the gate electrode of the transistor, and can also be used to form part or all of the electrode plate of the storage capacitor. The source-drain metal layer SD can be used to form the source-drain metal layer wiring such as the data wiring, the driving power voltage wiring, etc., and can also be used to form part of the electrode plate of the storage capacitor. Of course, in other embodiments of the present disclosure, the driving layer DRL can also include other film layers as needed, for example, it can also include a light shielding layer, an inorganic buffer layer BUF, etc. between the semiconductor layer SCL and the substrate base plate SBT. Any one of the above-mentioned semiconductor layer SCL, gate layer GT, source-drain metal layer SD, etc. can also be multi-layered as needed, for example, the driving layer DRL can include two different semiconductor layers SCL, or two or three source-drain metal layers SD, or two or three gate layers GT; accordingly, the insulating film layers in the driving layer DRL (such as the gate insulating layer GI, the interlayer dielectric layer ILD, the planarization layer PLN, etc.) can be adaptively increased or decreased, or new insulating film layers can be added as needed.

[0081] In an embodiment of the present disclosure, the driving layer DRL can also include a passivation layer, which can be arranged on the surface of the source-drain metal layer SD away from the substrate base plate SBT, so as to protect the source-drain metal layer SD.

[0082] As an example, referring to FIG. 4, the driving layer DRL can include an inorganic buffer layer BUF, a semiconductor layer SCL, a gate insulating layer GI, a gate layer GT, an interlayer dielectric layer ILD, a source-drain metal layer SD, and a planarization layer PLN which are sequentially stacked, and the thin film transistor TFT formed in this way is a top-gate type thin film transistor.

[0083] It can be understood that the above-mentioned examples of the driving backplane are only one possible way of the driving backplane in an embodiment of the present disclosure. In other embodiments of the present disclosure, the driving backplane can also have other structures, for example, the driving backplane can also be a passive driving glass substrate, a silicon-based driving substrate, etc.

[0084] In the embodiments of the present disclosure, referring to FIG. 4, the light emitting element LD in the pixel layer PIXL can be a thin film type light emitting element, which can include two electrodes and a light emitting functional unit interposed between the two electrodes. For example, referring to FIG. 4, the pixel layer PIXL can include a pixel electrode layer PEL, a light emitting functional layer EFL and a common electrode layer COML which are sequentially stacked. The pixel electrode layer PEL includes a plurality of pixel electrodes arranged in an array in the display area AA of the display panel PNL. The light emitting functional layer EFL has a part connected with the pixel electrode as a light emitting functional unit of the light emitting element LD. The common electrode layer COML is electrically connected with the light emitting functional unit of each light emitting element LD as a common electrode. Further, the pixel layer PIXL can further include a pixel definition layer PDL between the pixel electrode layer PEL and the light emitting functional layer EFL. The pixel definition layer PDL includes a plurality of through pixel openings corresponding to the plurality of pixel electrodes one by one. Any one pixel opening exposes at least a part of the corresponding pixel electrode. For example, the pixel definition layer PDL covers the edges of the pixel electrode and exposes at least a part of the internal area of the pixel electrode, so that the pixel definition layer PDL can effectively define the actual effective area (the area directly connected with the light emitting functional unit) of the pixel electrode, and further define the light emitting area and the light emitting area of the light emitting element LD (wherein the light emitting area of the light emitting element LD is defined as the pixel structure). The light emitting functional layer EFL covers at least the pixel electrode exposed by the pixel definition layer PDL. The common electrode layer COML can cover the light emitting functional layer EFL in the display area AA. The pixel electrode and the common electrode layer COML provide carriers such as electrons and holes to the light emitting functional layer EFL, so that the light emitting functional layer EFL emits light. The part of the light emitting functional layer EFL between the pixel electrode and the common electrode layer COML can be a light emitting functional unit. The pixel electrode, the common electrode layer COML and the light emitting functional unit form the light emitting element LD. One of the pixel electrode and the common electrode layer COML is an anode of the light emitting element LD, and the other is a cathode of the light emitting element LD.

[0085] In an example, the pixel electrode is an anode of the light emitting element LD, and the common electrode layer COML is a cathode of the light emitting element LD.

[0086] In some embodiments of the present disclosure, the light-emitting element LD is of different types, and the light-emitting functional layer EFL is of different materials and film layers. In an example, the display panel PNL is an OLED (Organic Light-Emitting Diode) display panel. The light-emitting functional layer EFL can include an organic light-emitting layer, and can include one or more of a hole injection layer, a hole transport layer, an electron blocking layer, a hole blocking layer, an electron transport layer, and an electron injection layer. Further, the organic light-emitting layer can include a light-emitting layer host material and a light-emitting layer guest material, which can be a fluorescent dopant or a phosphorescent dopant, and in particular can be a thermally activated delayed fluorescence material.

[0087] It can be understood that the display panel PNL can also be other types of display panels, such as a QLED display panel, a QD-OLED display panel, or other types of display panels.

[0088] In embodiments of the present disclosure, referring to FIGS. 2, 3, and 4, the display panel PNL can further include a thin film encapsulation layer TFE disposed on a side of the pixel layer PIXL away from the substrate substrate SBT. Referring to FIG. 4, the thin film encapsulation layer TFE can be disposed on a surface of the pixel layer PIXL away from the substrate substrate SBT, and can include inorganic encapsulation layers and organic encapsulation layers alternately stacked. The inorganic encapsulation layers can effectively block moisture and oxygen from the outside, preventing water and oxygen from invading the pixel layer PIXL and causing the materials in the pixel layer PIXL to age. Optionally, the edges of the inorganic encapsulation layers can be located in the non-display area. The organic encapsulation layers are located between two adjacent inorganic encapsulation layers to achieve planarization and reduce stress between the inorganic encapsulation layers. The edges of the organic encapsulation layers can be located between the edges of the display area and the edges of the inorganic encapsulation layers.

[0089] Illustratively, referring to FIG. 5, the non-display area BB of the display panel PNL includes a plurality of barrier walls RW, which are arranged in sequence along the center to the edge of the display panel PNL, and have gaps between adjacent barrier walls RW. The height of the orthographic projection of the barrier wall RW located on the inner side in the direction perpendicular to the substrate substrate SBT is not greater than the height of the orthographic projection of the barrier wall RW located on the outer side in the direction perpendicular to the substrate substrate SBT. The barrier wall RW can block water and oxygen in the air from entering the display area AA, and can also disperse stress on possible cracks, enhancing the ability to block cracks.

[0090] In this example, referring to FIG. 4 and FIG. 5, the thin film encapsulation layer TFE includes a first inorganic encapsulation layer CVD1, an organic encapsulation layer IJP and a second inorganic encapsulation layer CVD2 which are sequentially stacked on a side of the pixel layer PIXL away from the substrate base plate SBT. The first inorganic encapsulation layer CVD1 covers the display area AA and extends to a side of the barrier wall RW (not shown in the figure); the organic encapsulation layer IJP covers the display area AA and extends to an inner side of the barrier wall RW; and the second inorganic encapsulation layer CVD2 covers the organic encapsulation layer IJP and extends to a side of the barrier wall RW. On the side of the barrier wall RW, the second inorganic encapsulation layer CVD2 is in contact with the first inorganic encapsulation layer CVD1. In this way, the organic encapsulation layer IJP is enclosed by the first inorganic encapsulation layer CVD1 and the second inorganic encapsulation layer CVD2, and the stress on the first inorganic encapsulation layer CVD1 and the second inorganic encapsulation layer CVD2 is balanced. The first inorganic encapsulation layer CVD1 and the second inorganic encapsulation layer CVD2 enclose the organic encapsulation layer IJP, and isolate the organic encapsulation layer IJP from water and oxygen. Specifically, the first inorganic encapsulation layer CVD1 extends from the display area AA to the non-display area BB; the organic encapsulation layer IJP can extend from the display area AA to the inner side of the barrier wall RW of the non-display area BB; and the second inorganic encapsulation layer CVD2 extends from the display area AA to the non-display area BB and is in contact with the first inorganic encapsulation layer CVD1.

[0091] In some embodiments of the present disclosure, referring to FIG. 2, FIG. 3 and FIG. 4, the display panel PNL can further include a touch function layer TSL, which can be disposed on a side of the thin film encapsulation layer TFE away from the substrate base plate SBT, so that the display panel PNL has a touch function. Exemplarily, the touch function layer TSL includes a touch buffer layer TBUF, a first touch metal layer TMA, a touch dielectric layer TLD and a second touch metal layer TMB which are sequentially stacked on a side of the thin film encapsulation layer TFE away from the substrate base plate SBT.

[0092] In an embodiment of the present disclosure, referring to FIG. 2, the display panel PNL can further include an organic protection layer TOC, which can be disposed on a side of the touch function layer TSL away from the substrate base plate SBT, so as to protect the touch function layer TSL and other structures.

[0093] In an embodiment of the present disclosure, referring to FIG. 2, the display panel PNL can further include a color filter layer CFL, which can include a plurality of color filter structures arranged in an array, and the color filter layer CFL can be disposed on a side of the organic protection layer TOC away from the substrate base plate SBT.

[0094] In an embodiment of the present disclosure, the display panel PNL can further include a black matrix layer BM, which includes a plurality of openings arranged in an array, the plurality of openings correspond one-to-one to the plurality of color filter structures, and the openings expose partial areas of the color filter structures.

[0095] In the thin film packaging process of the related art, due to the particularity of the setting position of the organic encapsulation layer (the organic encapsulation layer covers the display area and extends to the inner side of the barrier wall), the center of the display area of the display panel is a flat area, the edge of the display area of the display panel is a ramp area, and the subsequent film layer on the organic encapsulation layer will form a difference (the difference between the thickness of the ramp area (the edge of the display area) and the thickness of the flat area (the center of the display area)) in the flat area and the ramp area, thereby causing the color film layer to also have a difference in the flat area and the ramp area of the display area, and the difference in the color film layer will cause the COE product to display unevenly around the light.

[0096] To solve the above problems, the structure of the organic protective layer TOC is optimized in the present disclosure, the organic protective layer TOC film layer in the ramp area of the display area is relatively flat through exposure, development, etching and the like, so that the thickness of the color film in the ramp area and the flat area can be basically consistent when the color film process is performed; and through the design of the blocking structure, the color film glue is slowed down or prevented from flowing down along the ramp area when the color film process is performed, so as to improve the display of the light around the poor display.

[0097] In an embodiment of the present disclosure, the display panel PNL includes a flat area FA and a ramp area TCA; along the direction from the center of the display panel PNL to the edge of the display panel PNL, the height difference between the surface of the thin film encapsulation layer TFE away from the substrate substrate SBT and the substrate substrate SBT gradually decreases in the ramp area TCA; the color film layer CFL includes a first color film structure CFA located in the flat area FA and a second color film structure CFB located in the ramp area TCA, wherein the first color film structure CFA and the second color film structure CFB are both located in the display area AA of the display panel PNL; the thickness of the second color film structure CFB located in the ramp area TCA is not less than 0.85 times the thickness of the first color film structure CFA located in the flat area FA. For example, the thickness of the second color film structure CFB is not less than 0.87 times the thickness of the first color film structure CFA. For another example, the thickness of the second color film structure CFB is not less than 0.9 times the thickness of the first color film structure CFA. For another example, the thickness of the second color film structure CFB is not less than 0.92 times the thickness of the first color film structure CFA. In an example, the thickness of the second color film structure CFB is not less than 0.95 times the thickness of the first color film structure CFA, so that the thickness of the second color film structure CFB and the first color film structure CFA can be considered as basically consistent, and the problem of uneven display of light can be improved.

[0098] In order to achieve the above ratio, the gap needs to be optimized before the color filter process. The organic protective layer TOC is the last layer before the color filter process, which also forms a planar area and a ramp area. Therefore, in order to reduce the gap between the second color filter structure CFB and the first color filter structure CFA, the structure of the organic protective layer TOC can be optimized so that the ramp area of the organic protective layer TOC adjacent to the planar area FA tends to be gentle, so that the flow of the color filter glue can be slowed down when preparing the second color filter structure CFB, and the thickness gap between the second color filter structure CFB and the first color filter structure CFA is reduced.

[0099] Based on this, in the first embodiment of the present disclosure, the structure of the organic protective layer TOC is optimized so that the inclination angle of the organic protective layer TOC of the ramp area TCA adjacent to the planar area FA is as small as possible, so that the flow speed of the color filter glue can be slowed down, thereby reducing the gap between the second color filter structure CFB and the first color filter structure CFA. In other words, in the present disclosure, as long as the inclination angle of the organic protective layer TOC of the projection area in the direction perpendicular to the substrate substrate SBT coincides with the first pixel structure PXA, the problem of uneven bright display can be improved. Specifically, referring to FIG. 5, the pixel layer PIXL includes a plurality of arrayed first pixel structures PXA located in the ramp area TCA, and a plurality of arrayed second pixel structures PXB located in the planar area FA; the organic protective layer TOC includes a first sub-organic protective structure TOCB located in the planar area FA and a second sub-organic protective structure TOCA located in the ramp area TCA; the second sub-organic protective structure TOCA includes a first sub-organic structure TOCA1 adjacent to the first sub-organic protective structure TOCB and a second sub-organic structure TOCA2 located away from the first sub-organic protective structure TOCB on one side of the first sub-organic structure TOCA1; the first sub-organic structure TOCA1 covers the first pixel structure PXA, and the inclination angle of the surface of the first sub-organic structure TOCA1 is smaller than the inclination angle of the surface of the second sub-organic structure TOCA2 adjacent to the first sub-organic structure TOCA1, and the inclination angle of the surface of the second sub-organic structure TOCA2 away from the first sub-organic structure TOCA1 is not limited, referring to FIG. 5, the inclination angle of the surface of the second sub-organic structure TOCA2 away from the first sub-organic structure TOCA1 tends to be horizontal due to the support of the barrier wall RW. In this way, the smaller the inclination angle of the surface of the first sub-organic structure TOCA1, the more the first sub-organic structure TOCA1 tends to be horizontal (the side of the first sub-organic structure TOCA1 away from the substrate substrate SBT tends to be flat), and the smaller the gap between the center of the display area AA and the edge of the display area AA of the organic protective layer TOC, and when the color filter process is performed, the flow of the color filter glue along the ramp area can be slowed down, so that the thickness of the second color filter structure CFB of the ramp area TCA can be improved, the thickness difference (gap) between the second color filter structure CFB and the first color filter structure CFA can be reduced, and the problem of uneven bright display can be improved.

[0100] In an embodiment of the present disclosure, the first sub-organic structure TOCA1 is flush with the first sub-organic protective structure TOCB on the side surface facing away from the substrate SBT. In this way, the first sub-organic structure TOCA1 can form an integral planar region with the first sub-organic protective structure TOCB, and the color film process can be performed on the planar region of the organic protective structure TOCB, so that the second color film structure CFB and the first color film structure CFA are substantially equal in thickness, thereby further improving the problem of uneven display of light emission. In this example, the distance between the first sub-organic structure TOCA1 and the substrate SBT is substantially equal to the distance between the first sub-organic protective structure TOCB and the substrate SBT. For example, the distance of both can be defined as not more than 0.05 μm, which can be considered as the first sub-organic structure TOCA1 being flush with the first sub-organic protective structure TOCB on the side surface facing away from the substrate SBT. In other examples, other parameter definitions can also be used.

[0101] In an example, when the organic protective layer TOC is prepared, the organic protective layer TOC can be thickened as a whole by increasing the amount of glue, and then a portion of the organic protective layer TOC in the display area AA is removed in a direction perpendicular to the substrate SBT by exposure and development. In this example, the planar region FA of the display area AA only needs to be set to one exposure amount, and the thickened portion (6 μm) is removed so that the organic protective layer TOC of the planar region FA is maintained at the required thickness, and in an example, the organic protective layer TOC of the planar region FA is maintained at about 3 μm. The ramp region TCA of the display area AA is exposed by gradient exposure, which is similar to the PDL (pixel definition layer) process, and the exposure amount is continuously changed to pattern exposure, so that the inclination angle of the organic protective layer TOC of the ramp region TCA of the display area AA is reduced, or the organic protective layer TOC of the ramp region TCA is flush with the organic protective layer TOC of the planar region FA, so as to reduce or even fill the color film gap between the planar region FA and the ramp region TCA during the color film process. In this example, the mask plate does not need to be increased, and the mask plate for the touch function layer TSL can be modified and adjusted, thereby saving costs. Based on the above, the exposure and development process is added between the preparation processes of the organic protective layer TOC and the color film layer CFL in the original process flow, so as to optimize the structure of the organic protective layer TOC, thereby improving the problem of uneven display of light emission.

[0102] In the second embodiment of the present disclosure, the structure of the organic protective layer TOC can be optimized in different ways so that the organic protective layer TOC in the ramping area TCA tends to be flat, so that the flow speed of the color film glue can be slowed down, thereby reducing the thickness difference between the second color film structure CFB and the first color film structure CFA. In other words, in the present disclosure, as long as the projection area in the direction perpendicular to the substrate SBT is made to coincide with the region of the organic protective layer TOC in the first pixel structure PXA, the problem of bright display unevenness can be improved. Specifically, referring to FIG. 6, the pixel layer PIXL includes a plurality of arrayed first pixel structures PXA in the ramping area TCA and a plurality of arrayed second pixel structures PXB in the flat area FA; the organic protective layer TOC includes a first sub-organic protective structure TOCB in the flat area FA and a second sub-organic protective structure TOCA in the ramping area TCA; the second sub-organic protective structure TOCA includes a first sub-organic structure TOCA1 adjacent to the first sub-organic protective structure TOCB and a second sub-organic structure TOCA2 located on the side of the first sub-organic structure TOCA1 away from the first sub-organic protective structure TOCB; the first sub-organic structure TOCA1 covers the first pixel structure PXA, and the surface of the first sub-organic structure TOCA1 away from the substrate SBT is a flat plane (in other words, the first sub-organic structure TOCA1 and the substrate SBT are equidistant. In this example, the first sub-organic structure TOCA1 and the substrate SBT can be defined as equidistant if the difference between the maximum distance and the minimum distance between the first sub-organic structure TOCA1 and the substrate SBT is not greater than 0.05 μm, and in other examples, parameters such as 0.06 μm can also be defined); the distance between the surface of the first sub-organic structure TOCA1 away from the substrate SBT and the substrate SBT is less than the distance between the surface of the first sub-organic protective structure TOCB away from the substrate SBT and the substrate SBT. In this way, the second color film structure CFB in the ramping area TCA is also parallel and equal in thickness to the first color film structure CFA in the flat area FA (in one example, the thickness difference between the second color film structure CFB and the first color film structure CFA can be defined as not greater than 0.05 μm, which can be considered as equal thickness), so that during the preparation of the color film layer CFL, the color film glue in the ramping area TCA will not flow thin, and the thickness of the obtained first color film structure CFA and second color film structure CFB can remain equal (not considering process errors, etc.), so that the purpose of improving the display of the four bright display can also be achieved.

[0103] In this example, the first color film structure CFA and the second color film structure CFB have a height difference, see FIGS. 7-13 (FIG. 7 is a light path diagram between the planar area and the ramp area, the black matrix layer on the top represents the black matrix layer of the planar area, the black matrix layer on the bottom represents the black matrix layer of the planar area, as can be seen from the figure, the black matrix layers of different heights have different effects on the angle of the outgoing light, in other words, the light path angle of the light emitting element LD is affected by the distance between the black matrix layer BM and the light emitting element LD, the greater the distance between the black matrix layer BM and the light emitting element LD, the smaller the light path angle of the light emitting element LD. In FIGS. 8 and 9, the horizontal coordinate is the viewing angle (human eye observation angle), and the vertical coordinate is the decayed brightness, FIGS. 8 and 9 show the relationship between the viewing angle and the white state brightness decay under different organic packaging layer IJP thicknesses (wherein FIG. 8a is the simulation of the relationship between the viewing angle and the white state brightness decay when the organic packaging layer IJP is 6μm; FIG. 8b is the simulation of the relationship between the viewing angle and the white state brightness decay when the organic packaging layer IJP is 8μm; FIG. 8c is the simulation of the relationship between the viewing angle and the white state brightness decay when the organic packaging layer IJP is 10μm; FIG. 8d is the integration of FIGS. 8a-8c. FIG. 9a is the measured relationship between the viewing angle and the white state brightness decay when the organic packaging layer IJP is 6μm; FIG. 9b is the measured relationship between the viewing angle and the white state brightness decay when the organic packaging layer IJP is 8μm; FIG. 9c is the measured relationship between the viewing angle and the white state brightness decay when the organic packaging layer IJP is 10μm; FIG. 9d is the integration of FIGS. 9a-9c); In FIGS. 11 and 12, the horizontal coordinate is the viewing angle (human eye observation angle), and the vertical coordinate is the decayed brightness, FIGS. 11 and 12 show the relationship between the viewing angle and the white state brightness decay under different BM Out values (wherein FIG. 11a is the simulation of the relationship between the viewing angle and the white state brightness decay when the BM OUT is 2μm; FIG. 11b is the simulation of the relationship between the viewing angle and the white state brightness decay when the BM OUT is 4μm; FIG. 11c is the simulation of the relationship between the viewing angle and the white state brightness decay when the BM OUT is 6μm; FIG. 11d is the integration of FIGS. 11a-11c.Fig. 12a is a measured relationship between a lower viewing angle and a luminance white-state luminance decay when BM OUT is 2 pm; Fig. 12b is a measured relationship between a lower viewing angle and a luminance white-state luminance decay when BM OUT is 4 pm; Fig. 12c is a measured relationship between a lower viewing angle and a luminance white-state luminance decay when BM OUT is 6 pm; Fig. 12d is an integrated graph of Figs. 12a-12c, wherein the BM OUT value refers to the horizontal spacing between the black matrix layer BM and the pixel structure, and the light-out effect of the display panel is verified. As can be seen from Figs. 8-10, at a 45° viewing angle, the luminance decay degree is different under different thicknesses of the organic encapsulating layer IJP, and the luminance decay degree increases by about 1%-3% when the thickness of the organic encapsulating layer IJP increases by 2 pm; as can be seen from Figs. 11-13, at a 45° viewing angle, the luminance decay degree decreases by about 2%-4% when the BM OUT value increases by 2 pm (the simulation and the measurement are slightly different). According to the above rules, the BM out value can be designed according to different height differences, for example, when the height difference is 2 pm, the luminance decay of the climbing area TCA is slightly lower by about 2% at a 45° viewing angle, and then the BM out value of the climbing area TCA can be set to be about 1 pm smaller to alleviate the luminance decay difference caused by the height difference, so that the viewing angle light-out of the climbing area TCA position and the viewing angle light-out of the flat area FA become very small. Therefore, in this example, the present disclosure optimizes the structure of the black matrix layer BM to further improve the display problem of four-side light-emitting failure. Specifically, the display panel PNL further includes a black matrix layer BM; the black matrix layer BM includes a plurality of arrayed first openings in the flat area FA and a plurality of arrayed second openings in the climbing area TCA; the plurality of first openings correspond one-to-one to the plurality of first pixel structures PXA, and the plurality of second openings correspond one-to-one to the plurality of second pixel structures PXB; the horizontal spacing between the first opening sidewall and the first pixel structure PXA is greater than the horizontal spacing between the second opening sidewall and the second pixel structure PXB. In one example, the height difference between the first sub-organic protection structure TOCB and the first sub-organic structure TOCA1 is 0-3 pm; the horizontal spacing between the first opening sidewall and the first pixel structure PXA is 0-2 pm greater than the horizontal spacing between the second opening sidewall and the second pixel structure PXB.

[0104] In this example, the organic protective layer TOC is thickened by D μm (D > H), and then exposed and developed to 3 μm (thinned by D μm again, 3 μm is the thickness of the organic protective layer TOC) in the planar area, while exposed and developed to form a flat area slightly lower than the non-ramp area (the thickness difference between this area and the planar area is: 3+H-D, generally 0-3 μm, when D-H=3, it is the first example), which is similar to the PDL process; when the color film process is performed, the color gel in this area will not thin out, thereby ensuring that the thickness of the first color film structure and the second color film structure in this area remains consistent. Based on the above, the present disclosure adds an exposure & development process between the preparation processes of the original process flow of the organic protective layer TOC and the color film layer CFL, so as to optimize the structure of the organic protective layer TOC and achieve the purpose of improving the display of the four surrounding bright light.

[0105] In the third embodiment of the present disclosure, the structure of the organic protective layer TOC is optimized, so that when the color film layer CFL is prepared, the flow speed of the color film gel can be slowed down, thereby achieving the purpose of reducing the difference between the first color film structure CFA and the second color film structure CFB. Specifically, referring to FIG. 14, the pixel layer PIXL includes a plurality of arrayed first pixel structures PXA located in the ramp area TCA, and a plurality of arrayed second pixel structures PXB located in the planar area FA; the organic protective layer TOC includes a first sub-organic protective structure TOCB located in the planar area FA and a second sub-organic protective structure TOCA located in the ramp area TCA; the second sub-organic protective structure TOCA includes a first sub-organic structure TOCA1 adjacent to the first sub-organic protective structure TOCB and a second sub-organic structure TOCA2 located on the side of the first sub-organic structure TOCA1 away from the first sub-organic protective structure TOCB; the side of the second sub-organic structure TOCA2 away from the substrate SBT includes a blocking structure BS; the orthogonal projection of the blocking structure BS on the substrate SBT does not coincide with the orthogonal projection of the first pixel structure PXA on the substrate SBT. In this way, the blocking structure BS can slow down the flow speed of the color film gel without interfering with normal display, thereby reducing the difference between the first color film structure CFA and the second color film structure CFB, and achieving the purpose of improving the display of the four surrounding bright light.

[0106] In one embodiment of the present disclosure, the blocking structure BS is disposed in the same layer as the organic protective layer TOC. In this way, the blocking structure BS can be prepared in the same layer as the organic protective layer TOC, without the need for additional mask plates, thereby reducing cost and difficulty of preparation.

[0107] In one embodiment of the present disclosure, the thickness of the blocking structure BS is not less than the thickness of the second color film structure CFB, so that a better effect of slowing down the flow speed of the color film gel can be achieved.

[0108] In one embodiment of the present disclosure, the blocking structure BS is perpendicular to the surface of the ramping area TCA near the surface of the side of the flat area FA. In this way, the preparation difficulty can be reduced, and the effect of slowing down the flow speed of the color film glue can be achieved.

[0109] In this embodiment, a blocking structure BS is arranged near the position of the second sub-organic structure TOCA2 and away from the substrate SBT, so as to block the downward flow of the color film glue during the color film process, thereby ensuring the film thickness of the second color film structure CFB. Specifically, the organic protective layer TOC is thickened, and then the display area AA is thinned to 3 μm through exposure and development, and the blocking structure BS is formed in the ramping area below the edge of the display area AA. In this example, the mask plate does not need to be increased, and the modification can be performed on the existing mask plate (for example, the mask plate of the touch function layer TSL can be modified and adjusted), thereby saving the cost. Based on the above, the present disclosure thickens the film layer when preparing the organic protective layer TOC, forms the organic protective layer TOC including the blocking structure BS through exposure and development, and then performs the color film process based on the original process flow.

[0110] Other embodiments of the present disclosure will be apparent to those skilled in the art with the consideration of the specification and practice of the disclosure disclosed herein. The present application is intended to cover any variations, uses, or adaptive changes of the present disclosure that follow the general principles of the present disclosure and include common knowledge or conventional technical means in the art that are not disclosed by the present disclosure. The specification and examples are only regarded as exemplary, and the true scope and spirit of the present disclosure are indicated by the appended claims.

Claims

1. A display panel, wherein, It includes a substrate, a display layer, a thin film encapsulation layer, an organic protective layer, and a color filter layer that are stacked in sequence. The display panel includes a planar area and a ramped area; along the direction from the center of the display panel to the edge of the display panel, the height difference between the surface of the thin film encapsulation layer away from the substrate and the substrate gradually decreases in the ramped area; The color filter layer includes a first color filter structure located in the planar region and a second color filter structure located in the climbing region; the thickness of the second color filter structure is not less than 0.85 times the thickness of the first color filter structure.

2. The display panel according to claim 1, wherein, The thickness of the second color filter structure is not less than 0.95 times the thickness of the first color filter structure.

3. The display panel according to claim 1, wherein, The organic protective layer includes a first sub-organic protective structure located in the planar region and a second sub-organic protective structure located in the climbing region; The second sub-organic protective structure includes a first sub-organic structure adjacent to the first sub-organic protective structure and a second sub-organic structure located on the side of the first sub-organic structure away from the first sub-organic protective structure; The tilt angle of the surface of the first sub-organic structure is smaller than the tilt angle of the surface of the second sub-organic structure adjacent to the first sub-organic structure.

4. The display panel according to claim 3, wherein, The surface of the first sub-organic structure facing away from the substrate is flush with the surface of the first sub-organic protective structure facing away from the substrate.

5. The display panel according to claim 1, wherein, The organic protective layer includes a first sub-organic protective structure located in the planar region and a second sub-organic protective structure located in the climbing region; The second sub-organic protective structure includes a first sub-organic structure adjacent to the first sub-organic protective structure and a second sub-organic structure located on the side of the first sub-organic structure away from the first sub-organic protective structure; the surface of the first sub-organic structure facing away from the substrate is a flat surface; The distance between the surface of the first sub-organic structure facing away from the substrate and the substrate is less than the distance between the surface of the first sub-organic protective structure facing away from the substrate and the substrate.

6. The display panel according to claim 5, wherein, The display panel further includes a black matrix layer; the black matrix layer includes a first opening with multiple arrays arranged in the planar area, and a second opening with multiple arrays arranged in the climbing area; The display layer includes a pixel layer; the pixel layer includes a plurality of first pixel structures arranged in an array in the climbing area, and a plurality of second pixel structures arranged in an array in the planar area; Each of the first openings corresponds one-to-one with a plurality of first pixel structures, and each of the second openings corresponds one-to-one with a plurality of second pixel structures; The horizontal distance between the first opening sidewall and the first pixel structure is greater than the horizontal distance between the second opening sidewall and the second pixel structure.

7. The display panel according to claim 6, wherein, The height difference between the distance between the surface of the first sub-organic protective structure facing away from the substrate and the substrate, and the distance between the surface of the first sub-organic structure facing away from the substrate and the substrate, is 0-3μm; The difference between the horizontal distance between the first opening sidewall and the first pixel structure and the horizontal distance between the second opening sidewall and the second pixel structure is 0-2μm.

8. The display panel according to claim 1, wherein, The display layer includes a pixel layer; the pixel layer includes a plurality of first pixel structures arranged in an array in the climbing area, and a plurality of second pixel structures arranged in an array in the planar area; The organic protective layer includes a first sub-organic protective structure located in the planar region and a second sub-organic protective structure located in the climbing region; the second sub-organic protective structure includes a first sub-organic structure adjacent to the first sub-organic protective structure and a second organic structure located on the side of the first sub-organic structure away from the first organic protective structure; The second sub-organic structure includes a barrier structure on the side facing away from the substrate. The orthographic projection of the blocking structure onto the substrate does not coincide with the orthographic projection of the first pixel structure onto the substrate.

9. The display panel according to claim 8, wherein, The barrier structure is disposed in the same layer as the organic protective layer.

10. The display panel according to claim 8, wherein, The thickness of the blocking structure is not less than the thickness of the second color filter structure.

11. The display panel according to claim 8, wherein, The surface of the barrier structure near the planar area is perpendicular to the surface of the climbing area.

12. A display device, wherein, Includes the display panel as described in any one of claims 1 to 11.

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