Data processing method, apparatus and system, electronic device, storage medium, and computer program product

Abstract

The present disclosure provides a data processing method, apparatus and system, an electronic device, a storage medium, and a computer program product. The method is applied to a first processor of a first board, and comprises: in response to detecting a trigger event, determining a target first memory cell from among at least one first memory cell of a memory of the first board, wherein the at least one first memory cell is generated on the basis of a configuration file corresponding to the first board, and each first memory cell is used for storing data shared by the first board to a corresponding second board (S11); determining a latch state of the target first memory cell (S12); and when the latch state of the target first memory cell is an unlocked state, sending first shared data of the target first memory cell to the corresponding second board, wherein the first shared data is written by a second processor of the first board (S13), and the type of the second processor is different from that of the first processor.

Description

Data processing method, device and system, electronic device, storage medium and computer program product

[0001] Cross-reference to related applications

[0002] The present disclosure is based on and claims priority to Chinese Patent Application No. 202410865873.2, filed on June 28, 2024, entitled "Data processing method, device and system, electronic device and storage medium", the entire contents of which are incorporated herein by reference. TECHNICAL FIELD

[0003] The present disclosure relates to, but is not limited to, the embedded technical field, and in particular to a data processing method, device and system, electronic device, storage medium and computer program product. BACKGROUND

[0004] In related technologies, most embedded devices include multiple boards, and complex functions are realized through cooperative processing of the multiple boards. For data interaction between the multiple boards, customized development is basically performed according to requirements, and there are problems such as poor universality, long development cycle, high complexity, and poor real-time performance. SUMMARY

[0005] Therefore, the present disclosure provides a data processing method, device and system, electronic device, storage medium and computer program product, which triggers a trigger event to trigger data of a shared storage unit between boards at a time, not only reduces the complexity of communication and improves the real-time performance of data sharing, but also realizes decoupling between data sharing and underlying communication, improves the universality and portability of software and hardware, and thus improves the development efficiency while reducing the development cost.

[0006] The technical solution of the present disclosure embodiment is implemented as follows:

[0007] The present disclosure provides a data processing method, applied to a first processor of a first board, and the method comprises the following steps:

[0008] In response to detecting a trigger event, determining a target first storage unit from at least one first storage unit of a memory of the first board; wherein the at least one first storage unit is generated based on a configuration file corresponding to the first board, and each first storage unit is used to store data shared by the first board to a corresponding second board;

[0009] Determine the latch state of the target first storage unit;

[0010] In a case where the latch state of the target first storage unit is the unlocked state, the first shared data of the target first storage unit is sent to the corresponding second board card; the first shared data is written by the second processor of the first board card, and the type of the second processor is different from the type of the first processor.

[0011] In the embodiments of the present disclosure, first, the memory is allocated in real time by the configuration file corresponding to the board card to obtain a storage unit for storing data shared to other board cards, thereby improving the accuracy of the storage unit; second, the first processor is triggered by a trigger event to share data at a timing, thereby improving the frequency of data sharing and the efficiency and real-time performance of data sharing; third, the shared data is read when the storage unit is in the unlocked state, thereby reducing the possibility of data reading exception; and finally, the first processor sends the data in the storage unit to other board cards to realize data sharing between the second processor and other board cards, thereby not only realizing decoupling between data sharing and underlying communication, improving the universality and portability of software and hardware, thereby reducing the development cost and improving the development efficiency, and simplifying the board data communication because the first processor does not need to communicate with the second processor to obtain shared data, thereby reducing the complexity of communication, and because the second processor only needs to write data into the storage unit and does not need to focus on subsequent processing (such as transmission, update, etc.) of the data, thereby reducing the complexity of software development in the second processor and improving the real-time performance of the data, thereby shortening the software development cycle.

[0012] In some embodiments, sending the first shared data of the target first storage unit to the corresponding second board card includes: switching the latch state of the target first storage unit to the locked state; taking the first shared data from the target first storage unit; switching the latch state of the target first storage unit to the unlocked state, and sending the first shared data to the corresponding second board card.

[0013] In the embodiments of the present disclosure, the shared data is read by timely switching the latch state of the storage unit, thereby reducing the possibility of access exception of the storage unit.

[0014] In some embodiments, sending the first shared data to the corresponding second board card includes: generating a first data packet based on the first shared data and the first communication information corresponding to the target first storage unit according to a preset communication protocol; and sending the first data packet to the corresponding second board card through the communication interface corresponding to the target first storage unit.

[0015] In the embodiments of the present disclosure, on the one hand, the data sharing between the boards is performed through a unified communication protocol, which greatly reduces the development cost and improves the reusability and portability of the software and hardware, as compared with developing different protocols for supporting the data sharing in view of multiple communication data and multiple communication interfaces; on the other hand, the data packet is transmitted through the communication interface corresponding to the storage unit, which improves the accuracy of data transmission.

[0016] In some embodiments, the memory further comprises at least one second storage unit, the at least one second storage unit is generated based on the configuration file corresponding to the first board, each second storage unit is used for storing the data shared by the corresponding third board to the first board, and the method further comprises: determining the second shared data based on the second data packet transmitted by the target third board; wherein the second data packet is generated according to the preset communication protocol, the second data packet comprises the second communication information corresponding to the target second storage unit and the to-be-shared data; determining the latch state of the target second storage unit; and in the case that the latch state of the target second storage unit is the unlocked state, writing the second shared data into the target second storage unit.

[0017] In the embodiments of the present disclosure, first, the memory is allocated in real time through the configuration file corresponding to the board, so as to obtain the storage unit for storing the data shared by other boards, which improves the accuracy of the storage unit; second, the shared data is determined in real time through the second data packet, which not only improves the accuracy of the shared data, but also greatly reduces the development cost and improves the reusability and portability of the software and hardware, as compared with developing different protocols for supporting the data sharing in view of multiple communication data and multiple communication interfaces; and finally, the shared data is written when the storage unit is in the unlocked state, which reduces the possibility of data writing exception.

[0018] In some embodiments, writing the second shared data into the target second storage unit comprises: switching the latch state of the target second storage unit to the locked state; writing the second shared data into the target second storage unit; and switching the latch state of the target second storage unit to the unlocked state.

[0019] In the embodiments of the present disclosure, the shared data is written by timely switching the latch state of the storage unit, which reduces the possibility of access exception of the storage unit.

[0020] In some embodiments, determining the second shared data based on the second data packet transmitted by the target third board comprises: determining the verification result of the second data packet based on the second communication information corresponding to the target second storage unit; and in the case that the verification result of the second data packet represents that the verification is passed, taking the to-be-shared data in the second data packet as the second shared data.

[0021] In the embodiments of the present disclosure, on the one hand, the check result of the data packet is determined according to the second communication information corresponding to the second storage unit, so that the accuracy of the check result is improved; on the other hand, the possibility of abnormality of the shared data is reduced by checking the received data packet.

[0022] In some embodiments, the method further comprises: obtaining a configuration file corresponding to the first board card; and initializing a target object of the first board card based on the configuration file corresponding to the first board card; wherein the target object comprises at least one of the following: a memory, and a reference timer of the first board card, the reference timer being configured to generate a trigger event.

[0023] In the embodiments of the present disclosure, the object in the board card is initialized according to the configuration file corresponding to the board card, which not only improves the accuracy of the initialization, but also realizes the decoupling of the software and the hardware, and improves the reusability and portability of the software and the hardware.

[0024] In some embodiments, the configuration file comprises at least one of the following: first shared configuration information and second shared configuration information, the first shared configuration information comprising a frequency field, a memory field and a sharing field, and the second shared configuration information comprising a memory field and a sharing field; the target object of the first board card is initialized based on the configuration file corresponding to the first board card, which comprises at least one of the following: the reference timer is initialized based on the frequency field of the first shared configuration information, and the reference timer is started; the memory is initialized based on the memory field of the first shared configuration information, and at least one first storage unit is obtained; the correspondence between the at least one first storage unit, at least one second board card and at least one communication interface is established based on the sharing field of the first shared configuration information; the memory is initialized based on the memory field of the second shared configuration information, and at least one second storage unit is obtained; and the correspondence between the at least one second storage unit, at least one third board card and at least one communication interface is established based on the sharing field of the second shared configuration information.

[0025] In the embodiments of the present disclosure, on the one hand, the memory is allocated in real time based on the configuration file corresponding to the board card, so that the storage unit for storing the data shared by other board cards and / or the storage unit for storing the data shared to other board cards is obtained, and the accuracy of the storage unit is improved; on the other hand, each object in the board card is initialized according to each field in the configuration file, so that the accuracy of the initialization of each object is improved, and the data sharing function between the board cards is accurately realized.

[0026] In some embodiments, the method further comprises at least one of: determining the first communication information corresponding to each first storage unit based on the memory field of the first shared configuration information and the shared field of the first shared configuration information; and determining the second communication information corresponding to each second storage unit based on the memory field of the second shared configuration information and the shared field of the second shared configuration information.

[0027] In the embodiments of the present disclosure, the communication information corresponding to each storage unit is determined according to the memory field and the shared field in the configuration file, which improves the accuracy of the communication information and thus improves the accuracy of the communication between the boards.

[0028] The embodiments of the present disclosure provide a data processing method applied to a second processor of a first board card, and the method comprises:

[0029] determining the latch state of a target first storage unit of a memory of the first board card; wherein the memory comprises at least one first storage unit, and the at least one first storage unit is generated based on a configuration file corresponding to the first board card, and each first storage unit is used to store data shared by the first board card to a corresponding second board card;

[0030] in a case where the latch state of the target first storage unit is an unlocked state, writing the first shared data into the target first storage unit, so that the first processor of the first board card sends the first shared data of the target first storage unit to the corresponding second board card in a case where a trigger event is detected; wherein the type of the second processor is different from the type of the first processor.

[0031] In the embodiments of the present disclosure, first, the memory is allocated in real time through the configuration file corresponding to the board card to obtain a storage unit for storing data shared to other board cards, thereby improving the accuracy of the storage unit; second, the shared data is written again when the storage unit is in the unlocked state, thereby reducing the possibility of data writing exception; third, the shared data is written again when the storage unit is in the unlocked state, thereby reducing the possibility of data writing exception; fourth, the first processor is triggered by a trigger event to share data at a fixed time, thereby improving the frequency of data sharing and improving the efficiency and real-time performance of data sharing; and finally, the first processor sends the data in the storage unit to other board cards to realize data sharing between the second processor and other board cards, thereby realizing decoupling between data sharing and underlying communication, improving the universality and portability of software and hardware, thereby reducing the development cost and improving the development efficiency, and because the first processor does not need to communicate with the second processor to obtain shared data, the in-board data communication is simplified, the complexity of communication is reduced, and because the second processor only needs to write data into the storage unit and does not need to pay attention to subsequent processing (such as transmission, update, etc.) of the data, the complexity of software development in the second processor is reduced and the real-time performance of the data is improved, thereby shortening the software development cycle.

[0032] In some embodiments, writing the first shared data to the target first storage unit comprises: switching the lock state of the target first storage unit to the locked state; writing the first shared data into the target first storage unit; and switching the lock state of the target first storage unit to the unlocked state.

[0033] In the embodiments of the present disclosure, the lock state of the storage unit is switched in time to write the shared data, thereby reducing the possibility of access exception of the storage unit.

[0034] In some embodiments, the memory further comprises at least one second storage unit, the at least one second storage unit being generated based on the configuration file corresponding to the first board card, each second storage unit being used for storing data shared by a corresponding third board card to the first board card, and the method further comprises: determining the lock state of a target second storage unit; and in a case where the lock state of the target second storage unit is the unlocked state, taking out second shared data from the target second storage unit.

[0035] In the embodiments of the present disclosure, on the one hand, the memory is allocated in real time through the configuration file corresponding to the board card to obtain a storage unit for storing data shared by other board cards, thereby improving the accuracy of the storage unit; on the other hand, the shared data is taken out again when the storage unit is in the unlocked state, thereby reducing the possibility of data taking-out exception.

[0036] In some embodiments, taking out the second shared data from the target second storage unit comprises: switching the lock state of the target second storage unit to the locked state; taking out the second shared data from the target second storage unit; and switching the lock state of the target second storage unit to the unlocked state.

[0037] In the embodiments of the present disclosure, by switching the lock state of the storage unit in time to take out the shared data, the possibility of access exception of the storage unit is reduced.

[0038] The embodiments of the present disclosure provide a data processing system, comprising a first board card and at least one second board card, the first board card comprising a first processor, a second processor and a memory, the memory comprising at least one first storage unit, the at least one first storage unit being generated based on a configuration file corresponding to the first board card, each first storage unit being used to store data shared by the first board card to a corresponding second board card, wherein:

[0039] The second processor is configured to determine the lock state of the target first storage unit, and write the first shared data into the target first storage unit if the lock state of the target first storage unit is the unlocked state.

[0040] The first processor is configured to determine the target first storage unit from the at least one first storage unit in response to detecting a trigger event, determine the lock state of the target first storage unit, and send the first shared data of the target first storage unit to the corresponding second board card if the lock state of the target first storage unit is the unlocked state.

[0041] In the embodiments of the present disclosure, first, the memory is allocated in real time by the configuration file corresponding to the board card to obtain the storage unit for storing the data shared to other board cards, thereby improving the accuracy of the storage unit; second, the first processor is triggered by the trigger event to share the data at a certain frequency, thereby improving the frequency of data sharing and the efficiency and real-time performance of data sharing; third, the shared data is read and written when the storage unit is in the unlocked state, thereby reducing the possibility of data read / write exception; and finally, the first processor sends the data in the storage unit to other board cards to realize data sharing between the second processor and other board cards, thereby not only realizing decoupling between data sharing and underlying communication, improving the universality and portability of software and hardware, thereby reducing the development cost and improving the development efficiency, but also simplifying the board data communication and reducing the complexity of communication, since the first processor does not need to communicate with the second processor to obtain the shared data, and since the second processor only needs to write the data into the storage unit without needing to focus on the subsequent processing (such as transmission, update, etc.) of the data, thereby reducing the complexity of software development in the second processor and improving the real-time performance of the data, and further shortening the software development cycle.

[0042] In some embodiments, the data processing system further comprises at least one third board card, the memory further comprises at least one second storage unit, the at least one second storage unit is generated based on a configuration file corresponding to the first board card, and each second storage unit is used for storing data shared by a corresponding third board card to the first board card; the first processor is further configured to determine second shared data based on a second data packet sent by a target third board card; the second data packet is generated according to a preset communication protocol, and the second data packet comprises second communication information corresponding to a target second storage unit and to-be-shared data; determine the latch state of the target second storage unit; and in the case that the latch state of the target second storage unit is an unlocked state, write the second shared data into the target second storage unit; the second processor is further configured to determine the latch state of the target second storage unit; and in the case that the latch state of the target second storage unit is the unlocked state, take the second shared data from the target second storage unit.

[0043] In the embodiments of the present disclosure, first, the memory is allocated in real time through the configuration file corresponding to the board card to obtain a storage unit for storing data shared by other board cards, which improves the accuracy of the storage unit; second, the shared data is determined in real time through the second data packet, which not only improves the accuracy of the shared data, but also greatly reduces the development cost and improves the reusability and portability of the software and hardware, compared with developing different protocols to support data sharing for a plurality of communication data and a plurality of communication interfaces; third, the shared data is read and written when the storage unit is in the unlocked state, which reduces the possibility of data read / write exception.

[0044] In some embodiments, the first board card integrates a system on chip, and the first processor, the second processor and the memory are located in the system on chip.

[0045] In the embodiments of the present disclosure, by integrating the SoC in the first board card, the characteristics of different processors in the SoC are fully utilized, which not only realizes the data sharing between different board cards, but also improves the efficiency and real-time performance of data sharing.

[0046] An embodiment of the present disclosure provides a data processing apparatus, which is applied to a first processor of a first board card, and the apparatus comprises:

[0047] A first determination module is configured to determine a target first storage unit from at least one first storage unit of a memory of the first board card in response to detecting a trigger event; wherein the at least one first storage unit is generated based on a configuration file corresponding to the first board card, and each first storage unit is used for storing data shared by the first board card to a corresponding second board card;

[0048] The second determining module is configured to determine a latch state of a target first storage unit.

[0049] The sending module is configured to send the first shared data of the target first storage unit to the corresponding second board card in a case that the latch state of the target first storage unit is an unlocked state; wherein the first shared data is written by the second processor of the first board card, and the type of the second processor is different from the type of the first processor.

[0050] The present disclosure provides a data processing apparatus, which is applied to a second processor of a first board card, and the apparatus comprises:

[0051] The third determining module is configured to determine a latch state of a target first storage unit of a memory of the first board card; wherein the memory comprises at least one first storage unit, and the at least one first storage unit is generated based on a configuration file corresponding to the first board card, and each first storage unit is used to store data shared by the first board card to a corresponding second board card.

[0052] The writing module is configured to write the first shared data to the target first storage unit in a case that the latch state of the target first storage unit is an unlocked state, so that the first processor of the first board card sends the first shared data of the target first storage unit to the corresponding second board card in a case that a trigger event is detected; wherein the type of the second processor is different from the type of the first processor.

[0053] The present disclosure provides an electronic device, which comprises a processor and a memory, and the memory stores a computer program capable of running on the processor, and the processor implements any one of the above methods when executing the computer program.

[0054] The present disclosure provides a computer readable storage medium, which stores a computer program, and the computer program is executed by a processor to implement any one of the above methods.

[0055] The present disclosure provides a computer program product, which comprises a computer program or instructions, and the computer program or instructions are executed by a processor to implement any one of the above methods.

[0056] It should be understood that the above general description and the following detailed description are only exemplary and explanatory, but not limiting the present disclosure. BRIEF DESCRIPTION OF DRAWINGS

[0057] The accompanying drawings incorporated in the specification and forming a part of it, illustrate embodiments consistent with the present disclosure and, together with the description, serve to explain the technical solutions of the present disclosure.

[0058] FIG. 1 is a schematic diagram of an implementation process of a data processing method according to an embodiment of the present disclosure;

[0059] Fig. 2 is a second implementation flow diagram of a data processing method according to an embodiment of the present disclosure;

[0060] Fig. 3A is a first structural diagram of a data processing system according to an embodiment of the present disclosure;

[0061] Fig. 3B is a second structural diagram of a data processing system according to an embodiment of the present disclosure;

[0062] Fig. 3C is a schematic diagram of a memory according to an embodiment of the present disclosure;

[0063] Fig. 3D is a third implementation flow diagram of a data processing method according to an embodiment of the present disclosure;

[0064] Fig. 4 is a first structural diagram of a data processing apparatus according to an embodiment of the present disclosure;

[0065] Fig. 5 is a second structural diagram of a data processing apparatus according to an embodiment of the present disclosure;

[0066] Fig. 6 is a hardware entity diagram of an electronic device according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0067] In order to make the objectives, technical solutions and advantages of the present disclosure clearer, the following will further describe the present disclosure in conjunction with the accompanying drawings, and the described embodiments should not be regarded as limiting the present disclosure, and all other embodiments obtained by those of ordinary skill in the art without creative labor fall within the scope of the present disclosure.

[0068] In the following description, "some embodiments" are described, which describe a subset of all possible embodiments, but it can be understood that "some embodiments" can be the same subset or different subset of all possible embodiments, and can be combined with each other without conflict.

[0069] In the following description, the terms "first\second\third" are only to distinguish similar objects, and do not represent a specific order of the objects, and it can be understood that "first\second\third" can be interchanged with a specific order or sequence as allowed, so that the embodiments of the present disclosure described herein can be implemented in an order other than that illustrated or described herein.

[0070] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the present disclosure belongs. The terms used herein are only for the purpose of describing the embodiments of the present disclosure, and are not intended to limit the present disclosure.

[0071] In the related art, most embedded devices include multiple boards, and complex functions are realized through cooperative processing of the multiple boards. The devices realize interconnection between the multiple boards through bus technology and the like in hardware, and realize data interaction between the multiple boards in software.

[0072] For data interaction between boards of a fusion SoC (System on Chip) platform, generally, a communication interface for data interaction between boards is provided by driver software in a first processor (for example, FPGA) of a board, and application software in a second processor (for example, CPU, ARM, etc.) of the board sends data to realize interaction by calling the interface provided by the driver software. There are the following problems:

[0073] (1) Data interaction between boards needs to be separately formulated and maintained, different protocols need to be supported for data of different formats and sizes, and there are problems such as poor universality and long development cycle;

[0074] (2) Data transmission, updating, and the like are initiated by application software, and data transmission and processing have relevance, which improves the complexity of development of the application software;

[0075] (3) The application software generally runs in a CPU, and transmission, reception, and processing of data consume resources of the overall system, there are problems such as poor real-time performance and high resource occupation, and the requirements of data synchronization in a high real-time system cannot be met.

[0076] The embodiment of the present disclosure provides a data processing method, first, the memory is allocated in real time through the configuration file corresponding to the board card, so as to obtain a storage unit for storing data shared to other board cards, and the accuracy of the storage unit is improved; second, the sharing of data is triggered by the first processor in a time triggered manner through a trigger event, the frequency of data sharing is improved, and the efficiency and real-time performance of data sharing are improved; third, the shared data is read when the storage unit is in an unlocked state, and the possibility of data reading exception is reduced; finally, the first processor sends the data in the storage unit to other board cards, so as to realize the data sharing between the second processor and other board cards, not only the decoupling between data sharing and underlying communication is realized, the versatility and portability of software and hardware are improved, so that the development cost is reduced, the development efficiency is improved, and because the first processor does not need to communicate with the second processor to obtain shared data, the in-board data communication is simplified, the complexity of communication is reduced, and because the second processor only needs to write data into the storage unit, it does not need to pay attention to the subsequent processing (such as transmission, update, etc.) of the data, so that the complexity of software development in the second processor is reduced, the real-time performance of the data is improved, and the software development cycle is shortened. The method provided by the embodiment of the present disclosure can be executed by an electronic device, and the electronic device can be a notebook computer, a tablet computer, a desktop computer, a set-top box, a mobile device (such as a mobile phone, a portable music player, a personal digital assistant, a dedicated message device, a portable game device) and various types of terminals. It can also be implemented as a server. The server can be a standalone physical server, a server cluster or a distributed system composed of multiple physical servers, or a cloud server providing cloud services, cloud databases, cloud computing, cloud functions, cloud storage, network services, cloud communication, middleware services, domain name services, security services, content distribution networks (Content Delivery Network, CDN), and big data and artificial intelligence platforms. Basic cloud computing services such as platform.

[0077] In the following, the technical solutions in the embodiments of the present disclosure will be clearly and completely described with reference to the drawings in the embodiments of the present disclosure.

[0078] FIG. 1 is a schematic diagram of the implementation process of a data processing method provided by the embodiment of the present disclosure, applied to the first processor of the first board card, as shown in FIG. 1, the method comprises steps S11 to S13, wherein:

[0079] Step S11, in response to detecting a trigger event, determining a target first storage unit from at least one first storage unit of the memory of the first board card; wherein the at least one first storage unit is generated based on the configuration file corresponding to the first board card, and each first storage unit is used to store data shared by the first board card to the corresponding second board card.

[0080] Here, the board card (including the first board card and other board cards hereinafter) can be a board card implementing any function. For example, a board card implementing a control function, a board card implementing a communication function, etc. Different board cards can implement the same or different functions.

[0081] The first board card at least includes a first processor, which can be any suitable processor, for example, an FPGA (Field Programmable Gate Array) or the like.

[0082] The trigger event can be any suitable event, for example, a timing trigger event, a random trigger event, a specified trigger event, etc. The timing trigger event is mainly an event triggered by a timer. The random trigger event can be a trigger event generated by a random number. The specified trigger event can be a pre-specified trigger event. For example, clicking a certain key generates the trigger event.

[0083] The first board card at least includes a memory, which can be any suitable unit capable of implementing a data storage function, for example, a RAM (Random Access Memory) or the like. The memory can be divided into a plurality of storage blocks according to a preset size, and the size of each storage block is consistent.

[0084] The first storage unit is mainly used for storing data that needs to be shared to the second board card. The data of different first storage units can be shared to the same second board card or different second board cards. The first storage unit can include at least one storage block.

[0085] The configuration file can at least include association information of the first storage unit, and the memory is dynamically configured according to the association information to obtain each first storage unit. The association information of the first storage unit can include but is not limited to an identifier of the first storage unit, a size of the first storage unit, a base address of the first storage unit, a direction, a source end, a destination end, a timing duration, etc. The direction can include but is not limited to outflow, inflow, etc. The source end refers to the sending end of data. The destination end refers to the receiving end of data. The timing duration represents the sharing frequency of the data in the first storage unit. For example, if the timing duration is 100us (microsecond), it represents that the first processor shares the data in the first storage unit to the corresponding board card according to 100us. The configuration file can be any form of file, for example, an XML (Extensible Markup Language) file, a WORD, an EXCEL, an HTML (Hyper Text Markup Language) file, etc.

[0086] The number of the target first storage unit can be at least one. The determination manner of the target first storage unit can be any suitable manner. For example, a correspondence between a trigger event and the first storage unit is established in advance, and the first storage unit corresponding to the trigger event is taken as the target first storage unit according to the correspondence. For another example, a correspondence between a timer and the first storage unit is established in advance, and the first storage unit corresponding to the timer is taken as the target first storage unit when the trigger event is generated by the timer. For yet another example, a correspondence between a sharing time length and the first storage unit is established in advance, and the first storage unit corresponding to the sharing time length is taken as the target first storage unit when the trigger event is generated by the count time length of the reference timer matching the sharing time length.

[0087] In step S12, the latch state of the target first storage unit is determined.

[0088] Here, the latch state can include, but is not limited to, an unlocked state, a locked state, etc. The unlocked state means that the target first storage unit is not operated (e.g., read, write, etc.) by other objects. The locked state means that the target first storage unit is being operated by other objects.

[0089] The determination manner of the latch state can be any suitable manner. For example, the latch state can be determined by reading the latch identifier of the target first storage unit. For example, if the latch identifier of the target first storage unit is a first preset value, it means that the target first storage unit is being operated by other objects, and the latch state is the locked state. If the latch identifier of the target first storage unit is a second preset value, it means that the target first storage unit is not operated by other objects, and the latch state is the unlocked state. The first preset value can be any suitable value, such as 1, TRUE, etc. The second preset value can be any suitable value, such as 0, FALSE, etc., and the second preset value is different from the first preset value.

[0090] In step S13, the first shared data of the target first storage unit is sent to the corresponding second board card when the latch state of the target first storage unit is the unlocked state. The first shared data is written by the second processor of the first board card, and the type of the second processor is different from the type of the first processor.

[0091] Here, the first board card further includes a second processor, which can be any suitable processor, for example, an ARM (Advanced RISC Machines) processor, a CPU (Central Processing Unit), a DSP (Digital Signal Processing), etc. In some embodiments, a system on chip can be integrated in the first board card, and the first processor, the second processor and the memory are located in the system on chip. In some embodiments, the first processor, the second processor and the memory can communicate through a bus of the system on chip.

[0092] The first shared data can be any suitable data. In implementation, the application software in the second processor can first write the first shared data into the target first storage unit, so that the first processor shares the first shared data to other board cards.

[0093] The sending manner of the shared data can be any suitable manner, for example, a bus, a communication interface, etc. The bus can include but is not limited to a CAN (Controller Area Network) bus, an Ethernet bus, etc. The communication interface can be any suitable interface, for example, an LVDS (Low-Voltage Differential Signaling) interface, an SRIO (Serial RapidIO) interface, an Ethernet interface, etc.

[0094] In some embodiments, the step of "sending the first shared data of the target first storage unit to the corresponding second board card" in the step S13 includes steps S131 to S133, wherein:

[0095] The step S131 switches the latch state of the target first storage unit to a locked state.

[0096] Here, the switching manner of the latch state can be any suitable manner. For example, the latch identifier of the target first storage unit is set to a first preset value, and then the latch state of the target first storage unit is switched to the locked state. In some embodiments, the latch identifier of the target first storage unit can be read first, and if the latch identifier is the first preset value, the waiting is needed until the latch identifier becomes a second preset value, and then the latch identifier is set to the first preset value again.

[0097] The step S132 takes out the first shared data from the target first storage unit.

[0098] Here, the first shared data can be obtained by performing a read operation on the target first storage unit.

[0099] Step S133, switching the latch state of the target first storage unit to an unlocked state, and sending the first shared data to the corresponding second board card.

[0100] Here, the switching manner of the latch state can be any suitable manner. For example, setting the latch identifier of the target first storage unit to a second preset value, and switching the latch state of the target first storage unit to the unlocked state.

[0101] The delivery manner of the shared data can be any suitable manner, such as a data packet, a data frame, etc. For example, according to a preset communication protocol, a data packet (at least including the shared data) is generated, and the data packet is sent to the other board card.

[0102] In some embodiments, the "sending the first shared data to the corresponding second board card" in step S133 includes steps S1331 to S1332, wherein:

[0103] Step S1331, according to a preset communication protocol, generating a first data packet based on the first communication information corresponding to the target first storage unit and the first shared data.

[0104] Here, the communication protocol refers to the rules and agreements that both entities must follow to complete communication or service. The communication protocol can be any suitable protocol. For example, the communication protocol can set the format, content, etc. The communication information (including the first communication information and other communication information mentioned later) can include but is not limited to the base address of the storage unit, the size of the storage unit, the latch identifier of the storage unit, the source, the destination, etc.

[0105] The first communication information corresponding to different first storage units can be different. In some embodiments, the first communication information corresponding to the first storage unit can be obtained according to the association information of the first storage unit in the configuration file corresponding to the first board card.

[0106] The first data packet at least includes the first communication information and the first shared data. In implementation, the first communication information and the first shared data can be assembled according to the communication protocol to obtain the first data packet.

[0107] Step S1332, sending the first data packet to the corresponding second board card through the communication interface corresponding to the target first storage unit.

[0108] Here, the communication interface can include but is not limited to an LVDS interface, an SRIO interface, an Ethernet interface, etc. Different first storage units can correspond to the same or different communication interfaces. In some embodiments, the communication interface corresponding to the target first storage unit can be obtained through the association information of the first storage unit in the configuration file corresponding to the first board card.

[0109] In some embodiments, the first board card comprises at least one communication interface, and the number of each communication interface can be at least one.

[0110] In this way, on the one hand, the data sharing between the board cards is performed through a unified communication protocol, which greatly reduces the development cost and improves the reusability and portability of the software and hardware, as compared with developing different protocols to support the data sharing for multiple communication data and multiple communication interfaces; on the other hand, the data packet is sent through the communication interface corresponding to the storage unit, which improves the accuracy of data sending.

[0111] In the embodiments of the present disclosure, the shared data is read by timely switching the latch state of the storage unit, which reduces the possibility of access exception of the storage unit.

[0112] In some embodiments, different target first storage units can correspond to the same or different second board cards. For example, the target first storage unit A1 and the target first storage unit A2 correspond to the same second board card B1. For another example, the target first storage unit A1 corresponds to the second board card B1, and the target second storage unit A2 corresponds to the second board card B2. In implementation, the correspondence between the first storage unit and the board card can be established in advance, and according to the correspondence, the second board card corresponding to the target first storage unit can be obtained.

[0113] In the embodiments of the present disclosure, first, the memory is allocated in real time through the configuration file corresponding to the board card, so as to obtain the storage unit for storing the data shared to other board cards, which improves the accuracy of the storage unit; second, the first processor is triggered to share the data at a timing triggered by a trigger event, which improves the frequency of data sharing, thereby improving the efficiency and real-time performance of data sharing; third, the shared data is read when the storage unit is in the unlocked state, which reduces the possibility of data reading exception; and finally, the first processor sends the data in the storage unit to other board cards to realize the data sharing between the second processor and other board cards, which not only realizes the decoupling between the data sharing and the underlying communication, improves the universality and portability of the software and hardware, thereby reducing the development cost and improving the development efficiency, but also simplifies the board data communication since the first processor does not need to communicate with the second processor to obtain the shared data, which reduces the complexity of communication, and at the same time, since the second processor only needs to write data into the storage unit and does not need to focus on the subsequent processing (such as transmission, update, etc.) of the data, the complexity of software development in the second processor is reduced, and the real-time performance of the data is improved, thereby shortening the software development cycle.

[0114] In some embodiments, the memory further comprises at least one second storage unit, each second storage unit is generated based on a configuration file corresponding to the first board card, and each second storage unit is used to store data shared by a corresponding third board card to the first board card. The method further comprises steps S141 to S143, wherein:

[0115] Step S141, determining second shared data based on a second data packet sent by a target third board card.

[0116] Here, the second storage unit is mainly used to store data shared by the third board card to the first board card. The data of different second storage units can be data shared by the same third board card or data shared by different third board cards. The second storage unit can comprise at least one storage block.

[0117] The configuration file can comprise at least association information of the second storage unit, and the memory is dynamically configured based on the association information to obtain each second storage unit. The association information of the second storage unit can comprise, but is not limited to, an identifier of the second storage unit, a size of the second storage unit, a base address of the second storage unit, a direction, a source end, a destination end, etc. The third board card can be the same as or different from the second board card.

[0118] The second data packet is generated according to a preset communication protocol, and the second data packet comprises second communication information corresponding to a target second storage unit and to-be-shared data. In implementation, the second communication information and the to-be-shared data can be assembled according to the communication protocol to obtain the second data packet.

[0119] The second communication information corresponding to different second storage units can be different. In some embodiments, the second communication information corresponding to the second storage unit can be obtained based on the association information of the second storage unit in the configuration file corresponding to the first board card.

[0120] The second shared data can be to-be-shared data in the second data packet, data obtained by converting the to-be-shared data, invalid data, etc.

[0121] In some embodiments, the step S141 comprises steps S1411 to S1412, wherein:

[0122] Step S1411, determining a check result of the second data packet based on second communication information corresponding to a target second storage unit.

[0123] Here, the check result can comprise, but is not limited to, a first check result, a second check result, etc. The first check result indicates that the check is passed, and the second check result indicates that the check is not passed.

[0124] In some embodiments, the second communication information can be checked according to a preset checking rule to obtain the checking result. The checking rule can include, but is not limited to, whether the content of the second communication information is correct, whether it is legal, and the like. For example, whether the base address of the storage unit is correct, whether the size of the storage unit is legal, whether the source end is correct, whether the destination end is correct, whether the latch identification of the storage unit is legal, and the like. In implementation, if the second communication information is correct / legal, the first checking result is taken as the checking result of the second data packet; otherwise, if the second communication information is incorrect / illegal, the second checking result is taken as the checking result of the second data packet.

[0125] In step S1412, in a case where the checking result of the second data packet represents that the checking is passed, the to-be-shared data in the second data packet is taken as the second shared data.

[0126] Here, after the checking is passed, the to-be-shared data is directly taken as the second shared data. In some embodiments, in a case where the checking is not passed, invalid data can be taken as the second shared data.

[0127] In the embodiments of the present disclosure, on one hand, the checking result of the data packet is determined according to the second communication information corresponding to the second storage unit, which improves the accuracy of the checking result; on the other hand, by checking the received data packet, the possibility of abnormality of the shared data is reduced.

[0128] In step S142, the latch state of the target second storage unit is determined.

[0129] Here, the latch state can include, but is not limited to, an unlocked state, a locked state, and the like. The determination manner of the latch state of the target second storage unit is similar to that of the latch state of the target first storage unit, and in implementation, the specific embodiments of the foregoing step S12 can be referred to.

[0130] In some embodiments, in a case where the second shared data is invalid data, the latch state of the target second storage unit does not need to be determined; in a case where the second shared data is non-invalid data, the latch state of the target second storage unit needs to be determined.

[0131] In step S143, in a case where the latch state of the target second storage unit is the unlocked state, the second shared data is written into the target second storage unit.

[0132] Here, when the latch state of the target second storage unit is the unlocked state, the first processor can read and write the target second storage unit. In implementation, the second processor writes the second shared data into the target second storage unit for use by the application software in the second processor.

[0133] In some embodiments, the step of writing the second shared data into the target second storage unit in step S143 comprises steps S1431-S1433, wherein:

[0134] In step S1431, the latch state of the target second storage unit is switched to the locked state.

[0135] Here, the switching manner of the latch state can be any suitable manner. For example, the latch identifier of the target second storage unit is set to the first preset value, and the latch state of the target second storage unit is switched to the locked state. In some embodiments, the latch identifier of the target second storage unit can be read first. If the latch identifier is the first preset value, the target second storage unit needs to be waited until the latch identifier becomes the second preset value, and then the latch identifier is set to the second preset value again.

[0136] In step S1432, the second shared data is written into the target second storage unit.

[0137] Here, by performing a write operation on the target second storage unit, the second shared data can be written into the target second storage unit.

[0138] In step S1433, the latch state of the target second storage unit is switched to the unlocked state.

[0139] Here, the switching manner of the latch state can be any suitable manner. For example, the latch identifier of the target second storage unit is set to the second preset value, and the latch state of the target second storage unit is switched to the unlocked state.

[0140] In this way, by switching the latch state of the storage unit in time to write the shared data, the possibility of access exception of the storage unit is reduced.

[0141] In the embodiments of the present disclosure, first, the memory is allocated in real time through the configuration file corresponding to the board card to obtain the storage unit for storing the data shared by other board cards, which improves the accuracy of the storage unit; second, the shared data is determined in real time through the second data packet, which not only improves the accuracy of the shared data, but also greatly reduces the development cost and improves the reusability and portability of the software and hardware, compared with developing different protocols to support data sharing for a plurality of communication data and a plurality of communication interfaces; and finally, the shared data is written when the storage unit is in the unlocked state, which reduces the possibility of data writing exception.

[0142] In some embodiments, the method further comprises steps S151-S152, wherein:

[0143] In step S151, the configuration file corresponding to the first board card is obtained.

[0144] Here, the configuration file can be acquired in any suitable manner. For example, the configuration file is pre-stored in the first board card. For another example, the configuration file is sent to the first board card by other devices or other board cards.

[0145] In step S152, the target object of the first board card is initialized based on the configuration file corresponding to the first board card.

[0146] Here, the configuration file can include, but is not limited to, at least one of the first shared configuration information, the second shared configuration information, and the like.

[0147] The first shared configuration information mainly describes the association information of at least one first storage unit. The first shared configuration information can include, but is not limited to, at least one of a frequency field, a memory field, a shared field, and the like. The frequency field mainly describes a field of a timing duration in the association information of the first storage unit. The memory field mainly describes a field of an identifier, a base address, a size, and the like in the association information of the storage unit. The shared field mainly describes a field of a direction, a source end, a destination end, a communication interface, and the like in the association information of the storage unit.

[0148] The second shared configuration information mainly describes the association information of at least one second storage unit. The second shared configuration information can include, but is not limited to, at least one of a memory field, a shared field, and the like.

[0149] Taking the configuration file shown below as an example:

[0150] …

[0151] <SHARED MEMORY>

[0152] <GENERATED RAMS count="3">

[0153] <RAM id="GEN 1" direction="output" port="LVDS" src="1" dst="2" ram_addr="0x21000000" size="1024" cycle="100" unit="us">

[0154] <RAM id="GEN 2" direction="output" port="SRIO" src="1" dst="3" ram_addr="0x30000000" size="512" cycle="50" unit="us">

[0155] <RAM id="GEN 3" direction="output" port="SRIO" src="1" dst="3" ram_addr="0x30001000" size="4096" cycle="30" unit="us">

[0156] < / GENERATED_RAMS>

[0157] <CONSUMPTION RAMS count="2">

[0158] <RAM id="CPT 1" direction="input" port="SRIO" src="2" dst="1" ram_addr="0x10000000" size="128">

[0159] <RAM id="CPT_2" direction="input" port="SRIO" src="3" dst="1" ram_addr="0x10001000" size="512">

[0160] < / CONSUMPTION RAMS>

[0161] < / SHARED MEMORY>

[0162] …

[0163] The frequency field mainly includes the cycle field and the unit field, the memory field mainly includes the id, the ram_addr, the size and the like, and the shared field mainly includes the direction, the port, the src, the dst and the like.

[0164] The target object of the first board card can include, but is not limited to, at least one of a memory, a reference timer of the first board card and the like. The reference timer is used for timing to generate a trigger event.

[0165] In some embodiments, the step S152 includes at least one of the step S1521 to the step S1523, wherein:

[0166] The step S1521 initializes the reference timer based on the frequency field of the first shared configuration information, and starts the reference timer.

[0167] Here, the timing duration of the reference timer is determined according to the timing duration in the association information of each first storage unit described in the frequency field. For example, according to the configuration file of the example, the configuration file includes three timing durations, i.e., 100us, 50us and 30us, and the timing duration of the reference timer can be the greatest common divisor of the three timing durations (i.e., 10us) or other common divisors (e.g., 5us, 1us, etc.).

[0168] In step S1522, the memory is initialized to obtain at least one first storage unit based on the memory field of the first shared configuration information, and a correspondence between the at least one first storage unit, at least one second board card and at least one communication interface is established based on the sharing field of the first shared configuration information.

[0169] Here, the memory is divided to obtain each first storage unit according to the base address, size, etc. in the association information of each first storage unit described in the memory field. For example, according to the configuration file of the example, the memory includes three first storage units, the base address of the first first storage unit is 0x21000000 and the size is 1024KB, the base address of the second first storage unit is 0x30000000 and the size is 512KB, and the base address of the third first storage unit is 0x30001000 and the size is 4096KB.

[0170] The correspondence between each first storage unit, each second board card and each communication interface is established according to the direction, source, destination, communication interface, etc. in the association information of each first storage unit described in the sharing field. For example, according to the configuration file of the example, the direction of the first first storage unit is output, the communication port is LVDS, the source is 1 (the number of the first board card), and the destination is 2 (the number of the second board card), the direction of the second first storage unit is output, the communication port is SRIO, the source is 1 (the number of the first board card), and the destination is 3 (the number of another second board card), and the direction of the third first storage unit is output, the communication port is SRIO, the source is 1 (the number of the first board card), and the destination is 3 (the number of another second board card).

[0171] In step S1523, the memory is initialized to obtain at least one second storage unit based on the memory field of the second shared configuration information, and a correspondence between the at least one second storage unit, at least one third board card and at least one communication interface is established based on the sharing field of the second shared configuration information.

[0172] Here, the memory is divided according to the base address, size, etc. in the association information of each second storage unit described in the memory field, to obtain each second storage unit. For example, according to the configuration file of the example, it is known that the memory includes two second storage units, the base address of the first second storage unit is 0x10000000, and the size is 128 KB, and the base address of the second second storage unit is 0x10001000, and the size is 512 KB.

[0173] According to the direction, source, destination, communication interface, etc. in the association information of each second storage unit described in the sharing field, a corresponding relationship between each second storage unit, each second board card, and each communication interface is established. For example, according to the configuration file of the example, it is known that the direction of the first second storage unit is input, the communication port is SRIO, the destination is 1 (the number of the first board card), and the source is 2 (the number of the second board card), and the direction of the second second storage unit is input, the communication port is SRIO, the destination is 1 (the number of the first board card), and the source is 3 (the number of another second board card).

[0174] In this way, on the one hand, the memory is allocated in real time by the configuration file corresponding to the board card, to obtain a storage unit for storing data shared by other board cards and / or a storage unit for storing data shared to other board cards, improving the accuracy of the storage unit; on the other hand, each object in the board card is initialized according to each field in the configuration file, improving the precision of the initialization of each object, to accurately realize the data sharing function between the board cards.

[0175] In the embodiments of the present disclosure, the objects in the board card are initialized according to the configuration file corresponding to the board card, not only improving the accuracy of the initialization, but also realizing the decoupling of the software and the hardware, improving the reusability and portability of the software and the hardware.

[0176] In some embodiments, the method further includes steps S161 and / or S162, wherein:

[0177] Step S161, determining the first communication information corresponding to each first storage unit based on the memory field of the first sharing configuration information and the sharing field of the first sharing configuration information.

[0178] Here, the first communication information corresponding to each first storage unit is obtained according to the base address, size, etc. in the association information of each first storage unit described in the memory field, and the source end, destination end, etc. in the association information of each first storage unit described in the sharing field. For example, according to the configuration file of the example, the first communication information corresponding to the direction of the first first storage unit includes a base address of 0x21000000, a size of 1024 KB, a communication port of LVDS, a source end of 1, a destination end of 2, etc.

[0179] In step S162, the second communication information corresponding to each second storage unit is determined based on the memory field of the second sharing configuration information and the sharing field of the second sharing configuration information.

[0180] Here, the second communication information corresponding to each second storage unit is obtained according to the base address, size, etc. in the association information of each second storage unit described in the memory field, and the source end, destination end, etc. in the association information of each second storage unit described in the sharing field. For example, according to the configuration file of the example, the first communication information corresponding to the direction of the first first storage unit includes a base address of 0x21000000, a size of 1024 KB, a communication port of LVDS, a source end of 1, a destination end of 2, etc.

[0181] In the embodiments of the present disclosure, the communication information corresponding to each storage unit is determined according to the memory field and the sharing field in the configuration file, which improves the accuracy of the communication information and thus improves the accuracy of the communication between the boards.

[0182] FIG. 2 is a schematic diagram of the implementation process of a data processing method provided by an embodiment of the present disclosure, which is applied to a second processor of a first board, as shown in FIG. 2, the method includes steps S21 to S22, wherein:

[0183] In step S21, the latch state of a target first storage unit of a memory of the first board is determined; wherein the memory includes at least one first storage unit, and the at least one first storage unit is generated based on a configuration file corresponding to the first board, and each first storage unit is used to store data shared by the first board to a corresponding second board.

[0184] Here, the second processor can be any suitable processor, for example, an ARM processor, a CPU, a DSP, etc. The generation process of the first storage unit can refer to the specific embodiments of the aforementioned step S11.

[0185] The latch state can include, but is not limited to, an unlocked state, a locked state, and the like. In implementation, the second processor determines that the latch state of the target first storage unit is similar to the latch state of the target first storage unit determined by the first processor. In implementation, reference can be made to the specific implementation of the aforementioned step S12.

[0186] Step S22, in the case that the latch state of the target first storage unit is the unlocked state, the first shared data is written into the target first storage unit, so that the first processor of the first board card sends the first shared data of the target first storage unit to the corresponding second board card in the case that a trigger event is detected; wherein the type of the second processor is different from the type of the first processor.

[0187] Here, the second processor can read and write the target first storage unit only when the latch state of the target first storage unit is the unlocked state. In implementation, the application software of the second processor writes the first shared data into the target first storage unit, so that the first processor shares the first shared data with other board cards.

[0188] In some embodiments, the step S22 of "writing the first shared data into the target first storage unit" includes steps S221 to S223, wherein:

[0189] Step S221, switching the latch state of the target first storage unit to the locked state.

[0190] Here, the aforementioned step S221 corresponds to the aforementioned step S131. In implementation, reference can be made to the specific implementation of the aforementioned step S131.

[0191] Step S222, writing the first shared data into the target first storage unit.

[0192] Here, the first shared data can be written into the target first storage unit by writing operation on the target first storage unit.

[0193] Step S223, switching the latch state of the target first storage unit to the unlocked state.

[0194] Here, the switching mode of the latch state can be any suitable mode. For example, the latch state of the target first storage unit is switched to the unlocked state by setting the latch identifier of the target first storage unit to the second preset value.

[0195] In this way, the latch state of the storage unit is switched in time to write the shared data, which reduces the possibility of access exception of the storage unit.

[0196] The process that the first processor sends the first shared data according to the trigger event can refer to the specific embodiments of the foregoing steps S11 to S13.

[0197] In some embodiments, a system on chip can be integrated in the first board card, and the first processor, the second processor and the memory are located in the system on chip. In some embodiments, the first processor, the second processor and the memory can communicate through a bus of the system on chip.

[0198] In the embodiments of the present disclosure, first, the memory is allocated in real time through the configuration file corresponding to the board card to obtain a storage unit for storing data shared to other board cards, which improves the accuracy of the storage unit; second, the shared data is written when the storage unit is in the unlocked state, which reduces the possibility of data writing exception; third, the first processor is triggered to share data at a timing trigger event, which improves the frequency of data sharing and thus improves the efficiency and real-time performance of data sharing; and finally, the first processor sends the data in the storage unit to other board cards to realize data sharing between the second processor and other board cards, which not only realizes decoupling between data sharing and underlying communication, improves the universality and portability of software and hardware, and thus improves the development efficiency while reducing the development cost, but also simplifies the board data communication and reduces the complexity of communication, since the first processor does not need to communicate with the second processor to obtain shared data, and since the second processor only needs to write data into the storage unit and does not need to focus on subsequent processing (such as transmission, update, etc.) of the data, which reduces the complexity of software development in the second processor and improves the real-time performance of the data, thereby shortening the software development cycle.

[0199] In some embodiments, the memory further includes at least one second storage unit, and each second storage unit is used for storing data shared by a corresponding third board card to the first board card, and the method further includes steps S231 to S232, wherein:

[0200] Step S231, determining the latch state of the target second storage unit.

[0201] Here, the second storage unit is mainly used for storing data shared by the third board card to the first board card, and the data of different second storage units can be data shared by the same third board card or data shared by different third board cards. The second storage unit can include at least one storage block. The generation process of the second storage unit can refer to the specific embodiments of the foregoing step S141.

[0202] The latch state can include, but is not limited to, an unlocked state, a locked state, and the like. The step S231 corresponds to the aforementioned step S142, and in implementation, the specific implementation of the step S231 can refer to the specific implementation of the step S142.

[0203] The step S232 includes steps S2321 to S2323, wherein:

[0204] Here, the second processor can read and write the target second storage unit when the latch state of the target second storage unit is in the unlocked state.

[0205] In some embodiments, the step S232 of "taking out the second shared data from the target second storage unit" includes steps S2321 to S2323, wherein:

[0206] The step S2321 switches the latch state of the target second storage unit to the locked state.

[0207] Here, the step S2321 corresponds to the aforementioned step S1431, and in implementation, the specific implementation of the step S2321 can refer to the specific implementation of the step S1431.

[0208] The step S2322 takes out the second shared data from the target second storage unit.

[0209] Here, the second shared data can be taken out by performing a read operation on the target second storage unit.

[0210] The step S2323 switches the latch state of the target second storage unit to the unlocked state.

[0211] Here, the step S2323 corresponds to the aforementioned step S1433, and in implementation, the specific implementation of the step S2323 can refer to the specific implementation of the step S1433.

[0212] In this way, the shared data is taken out by timely switching the latch state of the storage unit, thereby reducing the possibility of access exception of the storage unit.

[0213] In the embodiments of the present disclosure, on the one hand, the memory is allocated in real time by the configuration file corresponding to the board card to obtain the storage unit for storing the data shared by other board cards, thereby improving the accuracy of the storage unit; on the other hand, the shared data is taken out when the storage unit is in the unlocked state, thereby reducing the possibility of data taking exception.

[0214] Based on the above embodiments, the embodiments of the present disclosure further provide a data processing system, and FIG. 3A is a schematic diagram of a constituent structure of a data processing system according to an embodiment of the present disclosure. As shown in FIG. 3A, the data processing system 30 includes a first board card 31 and at least one second board card 32. The first board card 31 includes a first processor 311, a second processor 312, and a memory 313. The memory 313 includes at least one first storage unit. Each first storage unit is used to store data shared by the first board card to a corresponding second board card, wherein:

[0215] The second processor 312 is configured to determine a lock state of a target first storage unit, and write the first shared data into the target first storage unit when the lock state of the target first storage unit is an unlocked state.

[0216] The first processor 311 is configured to determine a target first storage unit from the at least one first storage unit in response to detecting a trigger event, determine a lock state of the target first storage unit, and send the first shared data of the target first storage unit to the corresponding second board card when the lock state of the target first storage unit is an unlocked state.

[0217] Here, the functions of the first board card and the second board card can be the same or different. In implementation, the first board card and the second board card are in communication connection. In some embodiments, the second board card can also include a first processor, a second processor, a memory, etc. The memory of the second board card can also include at least one first storage unit, at least one second storage unit, etc. In implementation, at least one first storage unit, at least one second storage unit, etc. in the memory of the second board card can be generated through a corresponding configuration file of the second board card.

[0218] The first storage unit is mainly used to store data that needs to be shared to the second board card. In implementation, the generation process of the first storage unit can refer to the specific embodiments of the foregoing step S11.

[0219] The second processor can be any suitable processor, such as an ARM processor, a CPU, a DSP, etc. The second processor determining the lock state of the target first storage unit can refer to the specific embodiments of the foregoing step S21. The process of the second processor writing the first shared data into the target first storage unit can refer to the specific embodiments of the foregoing step S22.

[0220] The first processor can be any suitable processor, for example, an FPGA, etc. The process of determining the target first storage unit by the first processor can refer to the specific embodiments of the foregoing step S11. The process of determining the latch state of the target first storage unit by the first processor can refer to the specific embodiments of the foregoing step S12. The process of sending the first shared data by the first processor can refer to the specific embodiments of the foregoing step S13.

[0221] In some embodiments, the SOC is integrated in the first board card, and the first processor, the second processor and the memory are located in the SOC. In this way, by integrating the SoC in the first board card, the characteristics of different processors in the SoC are fully utilized, not only the data sharing between different board cards is realized, but also the efficiency and real-time performance of data sharing are improved.

[0222] In some embodiments, the SoC can also be integrated in the second board card, and the first processor, the second processor and the memory of the second board card are located in the SoC.

[0223] FIG. 3B is a schematic diagram of a second component structure of a data processing system according to an embodiment of the present disclosure. As shown in FIG. 3B, the data processing system includes a first board card 31 and a second board card 32, and the first board card 31 and the second board card 32 are connected in communication through a bus 33. Wherein:

[0224] The SoC is integrated in the first board card 31, and the SoC includes a first FPGA processor (corresponding to the foregoing first processor) 311A, a first ARM processor (corresponding to the foregoing first processor) 312A and a first memory 313A.

[0225] The SoC is integrated in the second board card 32, and the SoC includes a second FPGA processor (corresponding to the foregoing first processor) 321B, a second ARM processor (corresponding to the foregoing first processor) 322B and a second memory 323B.

[0226] In some embodiments, the data processing system further comprises at least one third board card, the memory further comprises at least one second storage unit, the at least one second storage unit is generated based on the configuration file corresponding to the first board card, and each second storage unit is used for storing data shared by a corresponding third board card to the first board card; the first processor 311 is further configured to determine second shared data based on a second data packet sent by a target third board card; the second data packet is generated according to a preset communication protocol, and the second data packet comprises second communication information corresponding to a target second storage unit and to-be-shared data; determine the latch state of the target second storage unit; and in the case that the latch state of the target second storage unit is an unlocked state, write the second shared data into the target second storage unit; and the second processor 312 is further configured to determine the latch state of the target second storage unit; and in the case that the latch state of the target second storage unit is an unlocked state, take out the second shared data from the target second storage unit.

[0227] Here, the third board card can be the second board card or other board cards.

[0228] The second storage unit is mainly used for storing data shared by the third board card to the first board card. In implementation, the generation process of the second storage unit can refer to the specific embodiments of the foregoing step S141.

[0229] In some embodiments, the data of different second storage units can be data shared by the same third board card or data shared by different third board cards. The process in which the first processor determines the second shared data can refer to the specific embodiments of the foregoing step S141. The process in which the first processor determines the latch state of the target second storage unit can refer to the specific embodiments of the foregoing step S142. The process in which the first processor writes the second shared data can refer to the specific embodiments of the foregoing step S143.

[0230] FIG. 3C is a schematic diagram of a memory provided by an embodiment of the present disclosure, as shown in FIG. 3C, the memory comprises a plurality of generated shared memories (GSMs, corresponding to the foregoing first storage units) 3131 and a plurality of consumption shared memories (CSMs, corresponding to the foregoing second storage units) 3132.

[0231] The process in which the second processor determines the latch state of the target second storage unit can refer to the specific embodiments of the foregoing step S231. The process in which the second processor takes out the second shared data can refer to the specific embodiments of the foregoing step S232.

[0232] In the embodiments of the present disclosure, firstly, the memory is allocated in real time through the configuration file corresponding to the board card to obtain a storage unit for storing shared data of other board cards, thereby improving the accuracy of the storage unit; secondly, the shared data is determined in real time through the second data packet, which not only improves the accuracy of the shared data, but also greatly reduces the development cost and improves the reusability and portability of the software and hardware, compared with developing different protocols to support the sharing of data for various communication data and multiple communication interfaces; and finally, the shared data is read and written when the storage unit is in the unlocked state, thereby reducing the possibility of data read / write exception.

[0233] In some embodiments, the first processor 311 is further configured to: obtain a configuration file corresponding to the first board card; and initialize a target object of the first board card based on the configuration file corresponding to the first board card.

[0234] Here, the configuration file can include, but is not limited to, at least one of the first shared configuration information, the second shared configuration information, and the like. The first shared configuration information can include, but is not limited to, at least one of a frequency field, a memory field, a shared field, and the like. The second shared configuration information can include, but is not limited to, at least one of a memory field, a shared field, and the like.

[0235] The target object can include, but is not limited to, at least one of a memory, a reference timer of the first board card, and the like. In implementation, the process of initializing the target object of the first board card by the first processor can refer to the specific embodiments of the foregoing step S152.

[0236] In some embodiments, the first processor 311 is further configured to: determine first communication information corresponding to each first storage unit based on the memory field of the first shared configuration information and the shared field of the first shared configuration information; and / or determine second communication information corresponding to each second storage unit based on the memory field of the second shared configuration information and the shared field of the second shared configuration information.

[0237] Here, the communication information (including the first communication information and the second communication information) can include, but is not limited to, a base address of the storage unit, a size of the storage unit, a latch identification of the storage unit, a source end, a destination end, and the like. In implementation, the process of determining the communication information corresponding to the storage unit by the first processor can refer to the specific embodiments of the foregoing steps S161 to S162.

[0238] FIG. 3D is a schematic diagram of an implementation process of a data processing method according to an embodiment of the present disclosure. As shown in FIG. 3D, the method includes steps S301 to S322, wherein:

[0239] Step S301, the FPGA initializes the memory and the reference timer according to the configuration file corresponding to the first board card;

[0240] Here, the first processor can also initialize each communication interface, such as communication rate, communication address, etc.

[0241] Step S302, the FPGA starts the reference timer, and enters step S303, step S307, step S312, or step S319;

[0242] Step S303, when the application software in the ARM has a refreshing requirement, the ARM determines the latch state of the target GSM;

[0243] Step S304, the ARM judges whether the latch state of the target GSM is the unlocked state, if yes, it enters step S305, otherwise, it enters step S303;

[0244] Step S305, the ARM switches the latch state of the target GSM to the locked state;

[0245] Step S306, the ARM writes the first shared data into the target GSM, and switches the latch state of the target GSM to the unlocked state;

[0246] Step S307, when the FPGA detects the trigger event generated by the reference timer, it determines the latch state of the target GSM;

[0247] Step S308, the FPGA judges whether the latch state of the target GSM is the unlocked state, if yes, it enters step S309, otherwise, it enters step S307;

[0248] Here, the FPGA needs to wait for the next trigger event generated by the reference timer to enter step S307.

[0249] Step S309, the FPGA switches the latch state of the target GSM to the locked state;

[0250] Step S310, the FPGA takes out the first shared data from the target GSM, and switches the latch state of the target GSM to the unlocked state;

[0251] Step S311, the FPGA generates a first data packet according to the first shared data and the first communication information corresponding to the target GSM according to the preset communication protocol, and sends the first data packet to other board cards through the communication interface corresponding to the target GSM;

[0252] Step S312, the FPGA checks the second data packet sent by other board cards to obtain a checking result;

[0253] Step S313, the FPGA determines whether the check result is the first check result, if yes, step S314 is entered, otherwise, step S312 is entered;

[0254] Step S314, the FPGA takes the to-be-shared data in the second data packet as second shared data;

[0255] Step S315, the FPGA determines the latch state of the target CSM according to the second communication information corresponding to the target CSM in the second data packet;

[0256] Step S316, the FPGA determines whether the latch state of the target CSM is the unlocked state, if yes, step S317 is entered, otherwise, step S316 is entered;

[0257] Step S317, the FPGA switches the latch state of the target CSM to the locked state;

[0258] Step S318, the FPGA writes the second shared data into the target CSM, and switches the latch state of the target CSM to the unlocked state;

[0259] Step S319, when the ARM has a reading demand, the ARM determines the latch state of the target CSM;

[0260] Step S320, the ARM determines whether the latch state of the target CSM is the unlocked state, if yes, step S321 is entered, otherwise, step S320 is entered;

[0261] Step S321, the ARM switches the latch state of the target CSM to the locked state;

[0262] Step S322, the ARM takes the second shared data from the target CSM, and switches the latch state of the target CSM to the unlocked state.

[0263] In the embodiments of the present disclosure, first, the memory is allocated in real time through the configuration file corresponding to the board card to obtain a storage unit for storing data shared to other board cards, thereby improving the accuracy of the storage unit; second, the first processor is triggered in time to share data through a trigger event, thereby improving the frequency of data sharing and the efficiency and real-time performance of data sharing; third, shared data is read and written when the storage unit is in an unlocked state, thereby reducing the possibility of data read / write exceptions; and finally, the first processor sends data in the storage unit to other board cards to realize data sharing between the second processor and other board cards, thereby realizing decoupling between data sharing and underlying communication, improving the universality and portability of software and hardware, thereby reducing the development cost and improving the development efficiency, and because the first processor does not need to communicate with the second processor to obtain shared data, the in-board data communication is simplified, the complexity of communication is reduced, and because the second processor only needs to write data into the storage unit and does not need to focus on subsequent processing (such as transmission, update, etc.) of the data, the complexity of software development in the second processor is reduced and the real-time performance of the data is improved, thereby shortening the software development cycle.

[0264] Based on the above embodiments, the present disclosure provides a data processing apparatus applied to a first processor of a first board card, and Fig. 4 is a schematic diagram of a component structure of a data processing apparatus according to an embodiment of the present disclosure. As shown in Fig. 4, the data processing apparatus 40 comprises a first determination module 41, a second determination module 42 and a sending module 43, wherein:

[0265] The first determination module 41 is configured to determine a target first storage unit from at least one first storage unit of the memory of the first board card in response to detecting a trigger event; wherein the at least one first storage unit is generated based on a configuration file corresponding to the first board card, and each first storage unit is used to store data shared by the first board card to a corresponding second board card;

[0266] The second determination module 42 is configured to determine the latch state of the target first storage unit.

[0267] The sending module 43 is configured to send first shared data of the target first storage unit to the corresponding second board card in the case that the latch state of the target first storage unit is an unlocked state; wherein the first shared data is written by a second processor of the first board card, and the type of the second processor is different from the type of the first processor.

[0268] In some embodiments, the sending module 43 is further configured to switch the lock state of the target first storage unit to the locked state, take the first shared data from the target first storage unit, switch the lock state of the target first storage unit to the unlocked state, and send the first shared data to the corresponding second board card.

[0269] In some embodiments, the sending module 43 is further configured to generate a first data packet based on the first shared data and the first communication information corresponding to the target first storage unit according to a preset communication protocol, and send the first data packet to the corresponding second board card through the communication interface corresponding to the target first storage unit.

[0270] In some embodiments, the memory further comprises at least one second storage unit, the at least one second storage unit being generated based on a configuration file corresponding to the first board card, each second storage unit being used to store data shared by a corresponding third board card to the first board card, and the device further comprises a fourth determination module configured to determine second shared data based on a second data packet sent by a target third board card, wherein the second data packet is generated according to a preset communication protocol, the second data packet comprising second communication information corresponding to the target second storage unit and the to-be-shared data, determine the lock state of the target second storage unit, and write the second shared data into the target second storage unit if the lock state of the target second storage unit is the unlocked state.

[0271] In some embodiments, the fourth determination module is further configured to switch the lock state of the target second storage unit to the locked state, write the second shared data into the target second storage unit, and switch the lock state of the target second storage unit to the unlocked state.

[0272] In some embodiments, the fourth determination module is further configured to determine a check result of the second data packet based on the second communication information corresponding to the target second storage unit, and take the to-be-shared data in the second data packet as the second shared data if the check result of the second data packet indicates that the check is passed.

[0273] In some embodiments, the device further comprises an initialization module configured to obtain a configuration file corresponding to the first board card, and initialize a target object of the first board card based on the configuration file corresponding to the first board card, wherein the target object comprises at least one of the following: the memory, and a reference timer of the first board card, the reference timer being used to generate a trigger event at a time.

[0274] In some embodiments, the configuration file comprises at least one of: the first shared configuration information, the second shared configuration information, the first shared configuration information comprises a frequency field, a memory field and a sharing field, and the second shared configuration information comprises a memory field and a sharing field; the initialization module is further configured to at least one of: initializing the reference timer based on the frequency field of the first shared configuration information, and starting the reference timer; initializing the memory based on the memory field of the first shared configuration information to obtain at least one first storage unit, and establishing a correspondence between the at least one first storage unit, at least one second board card and at least one communication interface based on the sharing field of the first shared configuration information; initializing the memory based on the memory field of the second shared configuration information to obtain at least one second storage unit, and establishing a correspondence between the at least one second storage unit, at least one third board card and at least one communication interface based on the sharing field of the second shared configuration information.

[0275] In some embodiments, the initialization module is further configured to at least one of: determining the first communication information corresponding to each first storage unit based on the memory field of the first shared configuration information and the sharing field of the first shared configuration information; and determining the second communication information corresponding to each second storage unit based on the memory field of the second shared configuration information and the sharing field of the second shared configuration information.

[0276] The above device embodiments are similar to the descriptions of the above method embodiments, and have similar beneficial effects to the method embodiments. For technical details not disclosed in the device embodiments of the present disclosure, please refer to the description of the method embodiments of the present disclosure for understanding.

[0277] Based on the above embodiments, the present embodiment provides a data processing device applied to a second processor of a first board card, and Fig. 5 is a schematic diagram of the component structure of a data processing device provided by the present embodiment, as shown in Fig. 5, the data processing device 50 comprises a third determination module 51 and a writing module 52, wherein:

[0278] The third determination module 51 is configured to determine the latch state of a target first storage unit of a memory of the first board card; wherein the memory comprises at least one first storage unit, and the at least one first storage unit is generated based on the configuration file corresponding to the first board card, and each first storage unit is used to store data shared by the first board card to a corresponding second board card;

[0279] The write module 52 is configured to write the first shared data into the target first storage unit in a case where the latch state of the target first storage unit is the unlocked state, so that the first processor of the first board card sends the first shared data of the target first storage unit to the corresponding second board card in a case where a trigger event is detected.

[0280] In some embodiments, the write module 52 is further configured to: switch the latch state of the target first storage unit to the locked state; write the first shared data into the target first storage unit; and switch the latch state of the target first storage unit to the unlocked state.

[0281] In some embodiments, the memory further comprises at least one second storage unit, the at least one second storage unit being generated based on a configuration file corresponding to the first board card, each second storage unit being used to store data shared by a corresponding third board card to the first board card, and the device further comprises a fifth determination module configured to: determine a latch state of a target second storage unit; and in a case where the latch state of the target second storage unit is the unlocked state, take the second shared data from the target second storage unit.

[0282] In some embodiments, the fifth determination module is further configured to: switch the latch state of the target second storage unit to the locked state; take the second shared data from the target second storage unit; and switch the latch state of the target second storage unit to the unlocked state.

[0283] The above device embodiments are described similarly to the above method embodiments, and have similar beneficial effects to the method embodiments. For technical details not disclosed in the device embodiments of the present disclosure, please refer to the description of the method embodiments of the present disclosure for understanding.

[0284] It should be noted that, in the embodiments of the present disclosure, if the above method is implemented in the form of a software function module and sold or used as an independent product, it can also be stored in a computer readable storage medium. Based on such understanding, the technical solutions of the embodiments of the present disclosure can be embodied in the form of a software product in essence or the part that contributes to the related art, and the software product is stored in a storage medium, including a plurality of instructions for causing an electronic device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the method of the embodiments of the present disclosure. The aforementioned storage medium includes: a U disk, a mobile hard disk, a read-only memory (ROM), a magnetic disk or an optical disk, and various storage media that can store program codes. Thus, the embodiments of the present disclosure are not limited to any specific hardware and software combination.

[0285] The embodiment of the present disclosure provides an electronic device, comprising a memory and a processor, the memory stores a computer program which can run on the processor, and the processor implements the above method when executing the computer program.

[0286] The embodiment of the present disclosure provides a computer readable storage medium, which stores a computer program, and the computer program is executed by a processor to implement the above method. The computer readable storage medium can be transitory or non-transitory.

[0287] The embodiment of the present disclosure provides a computer program product, which comprises a non-transitory computer readable storage medium storing a computer program, and the computer program is read and executed by a computer to implement some or all steps of the above method. The computer program product can be implemented by hardware, software or a combination thereof. In an optional embodiment, the computer program product is embodied as a computer storage medium, and in another optional embodiment, the computer program product is embodied as a software product, such as a software development kit (SDK) and the like.

[0288] It should be noted that FIG. 6 is a schematic diagram of a hardware entity of an electronic device according to an embodiment of the present disclosure. As shown in FIG. 6, the hardware entity of the electronic device 60 includes a processor 61, a communication interface 62 and a memory 63, wherein:

[0289] The processor 61 generally controls the overall operation of the electronic device 60.

[0290] The communication interface 62 can enable the electronic device to communicate with other terminals or servers through a network.

[0291] The memory 63 is configured to store instructions and applications executable by the processor 61, and can also cache data to be processed by the processor 61 and modules in the electronic device 60 (for example, image data, audio data, voice communication data and video communication data) that have been processed or have been processed, which can be realized by FLASH or RAM. The processor 61, the communication interface 62 and the memory 63 can transmit data through the bus 64.

[0292] It should be noted that the above description of the storage medium and the device embodiment is similar to the description of the above method embodiment, and has similar beneficial effects as the method embodiment. For technical details not disclosed in the storage medium and device embodiments of the present disclosure, please refer to the description of the method embodiments of the present disclosure.

[0293] It should be understood that every feature, structure, or characteristic described above that is recited in means-plus-function or other functional claim is implemented by a method described herein and is not a signal per se. It should be understood that "one embodiment" or "an embodiment" as described throughout this specification means that a particular feature, structure, or characteristic described is included in at least one embodiment of the disclosure. Thus, appearances of "in one embodiment" or "in an embodiment" are not necessarily referring to the same embodiment. Furthermore, the particular features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. It should be understood that the sequence of processes described above in various embodiments of the disclosure does not mean the order of execution, and the execution order of the processes should be determined according to their functions and inherent logic, and should not constitute any limitation on the implementation process of the embodiments of the disclosure. The sequence number of the above-mentioned embodiments of the disclosure is only for description, and does not represent the advantages and disadvantages of the embodiments. It should be noted that in this paper, the term "include", "contain" or any other variant thereof is intended to cover non-exclusive inclusion, so that the process, method, article or device including a series of elements not only includes those elements, but also includes other elements not explicitly listed, or includes elements inherent to such process, method, article or device. Without more limitations, the element defined by the statement "including a" does not exclude the presence of other identical elements in the process, method, article or device including the element.

[0294] In several embodiments provided by the disclosure, it should be understood that the disclosed devices and methods can be implemented in other manners. The above-described device embodiments are only schematic. For example, the division of the units is only a logical function division. There can be other division manners in actual implementation. For example, a plurality of units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the displayed or discussed coupling, direct coupling or communication connection between the components can be indirect coupling or communication connection through some interface, device or unit, and can be electrical, mechanical or in other forms.

[0295] The units described as separate components can or can not be physically separate, and the components shown as units can or can not be physical units; they can be located in one place, or distributed on a plurality of network units; some or all of the units can be selected according to actual needs to achieve the purpose of the embodiment. In addition, each functional unit in the embodiments of the disclosure can be integrated into a processing unit, or each unit can be a separate unit, or two or more units can be integrated into a unit; the integrated unit can be implemented in the form of hardware, or in the form of hardware plus software functional units.

[0296] Those skilled in the art can understand that all or part of the steps of the above-mentioned method embodiments can be completed by program instruction related hardware, and the foregoing program can be stored in a computer readable storage medium, and the program executes the steps of the method embodiments when executed; and the foregoing storage medium includes a mobile storage device, a read only memory (ROM), a magnetic disc or an optical disc, and various storage medium that can store program codes.

[0297] Alternatively, the integrated units of the present disclosure can be stored in a computer readable storage medium if they are implemented in the form of software function modules and sold or used as independent products. Based on this understanding, the technical solutions of the present disclosure can be embodied in the form of a software product, and the computer software product is stored in a storage medium, includes a plurality of instructions to make an electronic device (which can be a personal computer, a server, or a network device, etc.) execute all or part of the embodiments of the present disclosure. The foregoing storage medium includes a mobile storage device, a ROM, a magnetic disc or an optical disc, and various storage medium that can store program codes.

[0298] The above is only an embodiment of the present disclosure, but the protection scope of the present disclosure is not limited thereto, and any person skilled in the art can easily think of changes or replacements within the technical range disclosed by the present disclosure, which should be covered within the protection scope of the present disclosure.

Claims

1. A data processing method, applied in a first processor of a first board, the method comprising: In response to the detection of a trigger event, a target first storage unit is determined from at least one first storage unit of the memory of the first board; wherein, the at least one first storage unit is generated based on the configuration file corresponding to the first board, and each first storage unit is used to store data shared by the first board to the corresponding second board; Determine the latching state of the target first storage unit; When the latched state of the target first storage unit is unlocked, the first shared data of the target first storage unit is sent to the corresponding second board; wherein the first shared data is written by the second processor of the first board, and the type of the second processor is different from the type of the first processor.

2. The data processing method according to claim 1, wherein, The step of sending the first shared data of the target first storage unit to the corresponding second board includes: Switch the latch state of the target first storage unit to the locked state; Retrieve the first shared data from the target first storage unit; Switch the latched state of the target first storage unit to the unlocked state, and send the first shared data to the corresponding second board.

3. The data processing method according to claim 2, wherein, Sending the first shared data to the corresponding second board includes: According to a preset communication protocol, a first data packet is generated based on the first communication information corresponding to the target first storage unit and the first shared data; The first data packet is sent to the corresponding second board through the communication interface corresponding to the first target storage unit.

4. The data processing method according to any one of claims 1 to 3, wherein, The memory further includes at least one second storage unit, which is generated based on the configuration file corresponding to the first board. Each second storage unit is used to store data shared by the corresponding third board to the first board. The method further includes: Based on the second data packet sent by the target third board, the second shared data is determined; wherein, the second data packet is generated according to a preset communication protocol, and the second data packet includes the second communication information corresponding to the target second storage unit and the data to be shared; Determine the latching state of the target second storage unit; When the latched state of the target second storage unit is unlocked, the second shared data is written to the target second storage unit.

5. The data processing method according to claim 4, wherein, The step of writing the second shared data into the target second storage unit includes: Switch the latch state of the target second storage unit to the locked state; Write the second shared data into the target second storage unit; Switch the latched state of the target second storage unit to the unlocked state.

6. The data processing method according to claim 4, wherein, The determination of the second shared data based on the second data packet sent by the target third board includes: Based on the second communication information corresponding to the target second storage unit, the verification result of the second data packet is determined; If the verification result of the second data packet indicates that the verification is successful, the data to be shared in the second data packet shall be used as the second shared data.

7. The data processing method according to any one of claims 1 to 6, wherein, The method further includes: Obtain the configuration file corresponding to the first board; Based on the configuration file corresponding to the first board, the target object of the first board is initialized; wherein, the target object includes at least one of the following: the memory, the reference timer of the first board, and the reference timer is used to generate the trigger event at regular intervals.

8. The data processing method according to claim 7, wherein, The configuration file includes at least one of the following: first shared configuration information and second shared configuration information, wherein the first shared configuration information includes a frequency field, a memory field, and a shared field, and the second shared configuration information includes a memory field and a shared field; The initialization of the target object of the first board based on the configuration file corresponding to the first board includes at least one of the following: Based on the frequency field of the first shared configuration information, the reference timer is initialized and started; Based on the memory field of the first shared configuration information, the memory is initialized to obtain the at least one first storage unit. Based on the shared field of the first shared configuration information, a correspondence is established between the at least one first storage unit, the at least one second board, and the at least one communication interface. Based on the memory field of the second shared configuration information, the memory is initialized to obtain at least one second storage unit. Based on the shared field of the second shared configuration information, a correspondence is established between the at least one second storage unit, at least one third board, and at least one communication interface.

9. The data processing method according to claim 8, wherein, The method further includes at least one of the following: Based on the memory field and the shared field of the first shared configuration information, determine the first communication information corresponding to each of the first storage units; Based on the memory field and the shared field of the second shared configuration information, the second communication information corresponding to each second storage unit is determined.

10. A data processing method, applied to a second processor of a first board, the method comprising: Determine the latching state of the target first storage unit of the memory of the first board; wherein, the memory includes at least one first storage unit, the at least one first storage unit is generated based on the configuration file corresponding to the first board, and each first storage unit is used to store data shared by the first board to the corresponding second board; When the latched state of the target first storage unit is unlocked, first shared data is written to the target first storage unit, so that when the first processor of the first board detects a trigger event, it sends the first shared data of the target first storage unit to the corresponding second board; wherein the type of the second processor is different from the type of the first processor.

11. The data processing method according to claim 10, wherein, The step of writing the first shared data to the target first storage unit includes: Switch the latch state of the target first storage unit to the locked state; Write the first shared data into the target first storage unit; Switch the latched state of the target first storage unit to the unlocked state.

12. The data processing method according to claim 10 or 11, wherein, The memory further includes at least one second storage unit, which is generated based on the configuration file corresponding to the first board. Each second storage unit is used to store data shared by the corresponding third board to the first board. The method further includes: Determine the latch state of the target second memory cell; When the latched state of the target second storage unit is unlocked, the second shared data is retrieved from the target second storage unit.

13. The data processing method according to claim 12, wherein, Retrieving the second shared data from the target second storage unit includes: Switch the latch state of the target second storage unit to the locked state; Retrieve the second shared data from the target second storage unit; Switch the latched state of the target second storage unit to the unlocked state.

14. A data processing system, comprising a first board and at least one second board, the first board comprising a first processor, a second processor, and a memory, the memory comprising at least one first storage unit, the at least one first storage unit being generated based on a configuration file corresponding to the first board, each of the first storage units being used to store data shared by the first board to a corresponding second board, wherein: The second processor is used to determine the latching state of the target first storage unit; When the latch state of the target first storage unit is unlocked, the first shared data is written to the target first storage unit; The first processor is configured to determine a target first storage cell from the at least one first storage cell in response to detecting a triggering event; Determine the latching state of the target first storage unit; When the latched state of the target first storage unit is unlocked, the first shared data of the target first storage unit is sent to the corresponding second board.

15. The data processing system according to claim 14, wherein, The data processing system further includes at least one third board, and the memory further includes at least one second storage unit. The at least one second storage unit is generated based on the configuration file corresponding to the first board, and each second storage unit is used to store the data shared by the corresponding third board to the first board. The first processor is further configured to determine second shared data based on a second data packet sent by the target third board; wherein the second data packet is generated according to a preset communication protocol, and the second data packet includes second communication information and data to be shared corresponding to the target second storage unit; determine the latching state of the target second storage unit; and write the second shared data into the target second storage unit when the latching state of the target second storage unit is unlocked. The second processor is further configured to determine the latch state of the target second storage unit; and, if the latch state of the target second storage unit is unlocked, retrieve the second shared data from the target second storage unit.

16. The data processing system according to claim 14 or 15, wherein, The first board integrates a system-on-a-chip, and the first processor, the second processor, and the memory are all located in the system-on-a-chip.

17. A data processing apparatus, applied in a first processor of a first board, the apparatus comprising: The first determining module is configured to determine a target first storage unit from at least one first storage unit of the memory of the first board in response to detecting a trigger event; wherein the at least one first storage unit is generated based on the configuration file corresponding to the first board, and each first storage unit is used to store data shared by the first board to the corresponding second board; The second determining module is used to determine the latching state of the target first storage unit; The sending module is configured to send the first shared data of the target first storage unit to the corresponding second board when the latched state of the target first storage unit is unlocked; wherein the first shared data is written by the second processor of the first board, and the type of the second processor is different from the type of the first processor.

18. A data processing apparatus, applied in a second processor of a first board, the apparatus comprising: The third determining module is configured to determine the latching state of the target first storage unit of the memory of the first board; wherein the memory includes at least one first storage unit, the at least one first storage unit is generated based on the configuration file corresponding to the first board, and each first storage unit is used to store data shared by the first board to the corresponding second board; The write module is configured to write first shared data to the target first storage unit when the latch state of the target first storage unit is unlocked, so that when the first processor of the first board detects a trigger event, it sends the first shared data of the target first storage unit to the corresponding second board; wherein the type of the second processor is different from the type of the first processor.

19. An electronic device comprising a processor and a memory, the memory storing a computer program executable on the processor, the processor executing the computer program to implement the method of any one of claims 1 to 13.

20. A computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the method of any one of claims 1 to 13.

21. A computer program product comprising a computer program or instructions which, when executed by a processor, implement the method of any one of claims 1 to 13.

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