Wide input voltage range discontinuous PWM control for flying capacitor PV inverter

Abstract

A three phase power conversion apparatus with carrier based wide range discontinuous PWM (WDPWM) control for three phase flying capacitor multilevel inverter is disclosed. The power conversion apparatus of the disclosed embodiments provides a wide inverter input voltage range, such as for example 600 – 800Vdc operation with WDPWM, which provides high efficiency.

Description

WIDE INPUT VOLTAGE RANGE DISCONTINUOUS PWM CONTROL FOR FLYING CAPACITOR PV INVERTER TECHNICAL FIELD

[0001] The aspects of the disclosed embodiments relate generally to three phase power conversion apparatus andmore particularly to discontinuous pulse width modulation (DPWM) controlled three phase power converters. BACKGROUND

[0002] Multilevel converters are widely used in power conversion applications, such as motor drive, electricvehicle (EV) charging, and photovoltaic (PV) inverters. They provide many advantages including low total harmonic distortion(THD), use of low voltage rating devices, reduced dv / dt across power devices, and lower filtering requirements.

[0003] Typical PV systems have issues of narrow input voltage range with DPWM modulation, presence of lowfrequency harmonics in the half DC bus voltage of the T-type based PV solution and in the flying capacitor inverter solution.This low frequency harmonics causes huge half DC bus voltage ripple for the T-type solution and huge flying capacitor voltage ripple in the flying capacitor inverter solution. Due to the high DC bus ripple voltage DPWM cannot be used at high inputvoltage (e.g. 800V) that is low modulation index. Therefore, in order to guarantee the DC bus stability there is a need to switchto SVPWM modulation at low modulation index. This switching between both modulation methods causes the control to be complex and at the same time a compromise of the system efficiency when using SVPWM. The high DC bus voltage andflying capacitor voltage ripple create the need for a high capacitance value which in turn reduce the power density of theconverter.

[0004] Thus, there is a need for improved power converters which are suitable for PV and EV applications, thatreduce the size and cost of reactive components, and have better overall converter efficiency. Accordingly, it would bedesirable to provide methods and apparatus that addresses at least some of the problems described above.SUMMARY

[0005] The aspects of the disclosed embodiments are directed to three phase power conversion apparatus withcarrier based wide range discontinuous PWM (WDPWM) control for three phase flying capacitor multilevel inverter. Thepower conversion apparatus of the disclosed embodiments provides a wide inverter input voltage range, such as for example,600 – 800Vdc operation with WDPWM, which provides high efficiency.

[0006] According to a first aspect, the above and further advantages are obtained by a power converter apparatusincluding a first phase switching cell, a second phase switching cell, and a third phase switching cell coupled in parallel betweena positive DC bus (BUS+) and a negative DC bus (BUS-). The power converter apparatus is configured to receive a DC input voltage (VDC) and produce a three phase AC output voltage (3ϕVac). Each of the first phase switching cell, second phase switching cell, and third phase switching cell is configured as a flying capacitor converter. A topology of the flying capacitor converter includes a first switching leg with a first switching device (S1) and a second switching device (S2) coupled in seriesbetween the positive DC bus (BUS+) and a switched AC voltage, forming a first central node. A second switching leg includesa third switching device (S3) and a fourth switching device (S4) coupled in series between the negative DC bus (BUS-) and theswitched AC voltage, forming a second central node. A first flying capacitor (CF1) is coupled between the first central nodeand the second central node. A first RCD clamping device (RCD1) is coupled in parallel with the first switching device (S1), asecond RCD clamping device (RCD2) is coupled in parallel with the second switching device (S2), (RCD3) a third RCD clamping device (RCD3) is coupled in parallel with the third switching device (S3) and a fourth RCD clamping device (RCD4) is coupled in parallel with the fourth switching device (S4). Each RCD clamping device (RCD1, RCD2, RCD3, RCD4) comprises a parallel connected resistor (R1) and capacitor (C1) coupled in series with a diode (D1). The inverter of the disclosedembodiments provides a wide input voltage range (600 – 800Vdc) operation with WDPWM which provides high efficiency.

[0007] In a possible implementation form, the first phase switching cell, the second phase switching cell, and thethird phase switching cell are operated with a discontinuous pulse width modulation control method based on a wide rangediscontinuous pulse width modulation signal. The control method includes generating a phase a modulating signal, a phase bmodulating signal, and a phase c modulating signal based on a three-phase reference signal (Va, Vb, Vc); determining a firstphase a signal, wherein the first phase a signal is equal to a negative of the phase a modulating signal when the phase amodulating signal is less than zero, and is equal to one minus the phase a modulating signal when the phase a modulating signalis greater than or equal to zero; determining a first phase b signal, wherein the first phase b signal is equal to a negative of thephase b modulating signal when the phase b modulating signal is less than zero, and is equal to one minus the phase bmodulating signal when the phase b modulating signal is greater than or equal to zero; determining a first phase c signal,wherein the first phase c signal is equal to a negative of the phase c modulating signal when the phase c modulating signal isless than zero, and is equal to one minus the phase c modulating signal when the phase c modulating signal is greater than orequal to zero; determining a second phase a signal, wherein the second phase a signal is equal to one plus the phase a modulatingsignal when the phase a modulating signal is less than zero, and is equal to the phase a modulating signal when the phase amodulating signal is greater than or equal to zero; determining a second phase b signal, wherein the second phase b signal isequal to one plus the phase b modulating signal when the phase b modulating signal is less than zero, and is equal to the phaseb modulating signal when the phase b modulating signal is greater than or equal to zero; determining a second phase c signal,wherein the second phase c signal is equal to one plus the phase c modulating signal when the phase c modulating signal is lessthan zero, and is equal to the phase c modulating signal when the phase c modulating signal is greater than or equal to zero;selecting a minimum first phase signal as a minimum of the first phase a signal, the first phase b signal, and the first phase csignal, and select a minimum second phase signal as a minimum of the second phase a signal, the second phase b signal, andthe second phase c signal; determining a zero sequence wherein when the minimum first phase signal is less than the minimumsecond phase signal (P_1min<P_2min), the zero sequence is equal to the minimum first phase signal (P_1min), and when the minimum first phase signal is greater than or equal to the minimum second phase signal (P_1min≥P_2min), the zero sequenceis equal to a negative of the minimum second phase signal (-P_2min); and generating the wide range discontinuous pulse widthmodulation signal by adding the zero sequence to each of the phase a modulating signal, the phase b modulating signal, andthe phase c modulating signal. WDPWM modulation reduces switching loss and reduces control complexity.

[0008] In a possible implementation form, the three phase modulating signals are generated by multiplying eachphase in the three phase reference signals by a corresponding modulation index, wherein the corresponding modulation index is a ratio between a peak voltage of a corresponding phase of the three phase AC output voltage (3ϕVac) and half of apredetermined nominal DC input voltage. The inverter topology provides frequency multiplication feature for string PVinverter. This makes the inverter inductor smaller in size.

[0009] In a possible implementation form, a first gate control signal is generated based on a triangular carriersignal, and a second gate control signal is generated based on a one hundred eighty-degree (180˚) phase shifted triangularcarrier signal. Maximum Power Point Tracking (MPPT) control allows the PV inverter to track the optimum power point whenthe boost converter is bypassed.

[0010] According to a second aspect, the above and further advantages are obtained by a method for controlling athree-phase power converter apparatus that includes three flying capacitor switching cells configured to receive a DC inputvoltage (VDC) and produce a three phase AC output voltage (3ϕVac). In one embodiment, the method includes generating aphase a modulating signal, a phase b modulating signal and a phase c modulating signal based on a three-phase reference signal(Va, Vb, Vc); determining a first phase a signal, where the first phase a signal is equal to a negative of the phase a modulatingsignal when the phase a modulating signal is less than zero and is equal to one minus the phase a modulating signal when thephase a modulating signal is greater than or equal to zero; determining a first phase b signal, where the first phase b signal isequal to a negative of the phase b modulating signal when the phase b modulating signal is less than zero and is equal to oneminus the phase b modulating signal when the phase b modulating signal is greater than or equal to zero; determining a firstphase c signal, where the first phase c signal is equal to a negative of the phase c modulating signal when the phase c modulatingsignal is less than zero and is equal to one minus the phase c modulating signal when the phase c modulating signal is greaterthan or equal to zero; determining a second phase a signal, wherein the second phase a signal is equal to one plus the phase amodulating signal when the phase a modulating signal is less than zero, and is equal to the phase a modulating signal when thephase a modulating signal is greater than or equal to zero; determining a second phase b signal, where the second phase b signalis equal to one plus the phase b modulating signal when the phase b modulating signal is less than zero, and is equal to thephase b modulating signal when the phase b modulating signal is greater than or equal to zero; determining a second phase csignal, where the second phase c signal is equal to one plus the phase c modulating signal when the phase c modulating signalis less than zero, and is equal to the phase c modulating signal when the phase c modulating signal is greater than or equal tozero; selecting a minimum first phase signal (DPWMh_min) as a minimum of the first phase a signal, the first phase b signal,and the first phase c signal, and selecting a minimum second phase signal (DPWMl_min) as a minimum of the second phase asignal, second phase b signal, and second phase c signal; determining a zero sequence (Vzero_new) wherein when the minimumfirst phase signal is less than the minimum second phase signal (DPWMh_min < DPWMl_min) the zero sequence (Vzero_new) is equal to the minimum first phase signal (DPWMh_min), and when the minimum first phase signal is greater than or equal to the minimum second phase signal (DPWMh_min ≥ DPWMl_min) the zero sequence (Vzero_new) is equal to a negative ofthe minimum second phase signal (-DPWMl_min); and generating three wide range discontinuous pulse width modulationsignals (VA_PWM, VB_PWM, VC_PWM) corresponding to each phase in the three-phase reference signal (Va, Vb, Vc) basedon the zero sequence (Vzero_new) and the three-phase reference signal (Va, Vb, Vc). The inverter of the disclosed embodimentsprovides a wide input voltage range (600 – 800Vdc) operation with WDPWM which provides high efficiency.

[0011] In a possible implementation form, generating the three phase modulating signals (ma, mb, mc) includesmultiplying each phase in the three phase reference signals (Va, Vb, Vc) by a corresponding modulation index (mx), wherein the corresponding modulation index (mx) is a ratio between a peak voltage of a corresponding phase of the three phase ACoutput voltage (3ϕVac) and half of a predetermined nominal DC input voltage (VDC).

[0012] In a possible implementation form, generating the three phase modulating signals (ma, mb, mc) includesgenerating, when a corresponding phase modulating signal (ma, mb, mc) is greater than or equal to zero, a corresponding positive signal (VA_P, VB_P, VC_P) based on the corresponding phase modulating signal (ma, mb, mc) and the zero sequence (Vzero_new), and, when the corresponding phase modulating signal (ma, mb, mc) is not greater than or equal to zero,generating a corresponding negative signal (VA_N, VB_N, VC_N); and adding the corresponding positive signal (VA_P,VB_P, VC_P) with the corresponding negative signal (VA_N, VB_N, VC_N) to form the corresponding wide range discontinuous pulse width modulation signal (VA_PWM, VB_PWM, VC_PWM). WDPWM modulation reduces switching loss and reduces control complexity.

[0013] In a possible implementation form, a first gate control signal is generated based on a triangular carriersignal, and a second gate control signal is generated based on a one hundred eighty-degree (180˚) phase shifted triangularcarrier signal. Maximum Power Point Tracking (MPPT) control allows the PV inverter to track the optimum power point when the boost converter is bypassed.

[0014] These and other aspects, implementation forms, and advantages of the exemplary embodiments willbecome apparent from the embodiments described herein considered in conjunction with the accompanying drawings. It is to be understood, however, that the description and drawings are designed solely for purposes of illustration and not as a definition of the limits of the disclosed invention, for which reference should be made to the appended claims. Additional aspects and advantages of the invention will be set forth in the description that follows, and in part will be obvious from the description, or may be learned by practice of the invention. Moreover, the aspects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out in the appended claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In the following detailed portion of the present disclosure, the invention will be explained in more detailwith reference to the example embodiments shown in the drawings, in which like references indicate like elements and:

[0016] Figure 1 illustrates a schematic diagram of an exemplary power converter apparatus incorporating aspectsof the disclosed embodiments;

[0017] Figure 2 illustrates a set of switching states used to operate the exemplary power converter apparatusincorporating aspects of the disclosed embodiments;

[0018] Figure 3 illustrates graphs showing exemplary operating waveforms of a power converter apparatusincorporating aspects of the disclosed embodiments;

[0019] Figure 4 illustrates graphs showing exemplary operating waveforms of a power converter apparatusincorporating aspects of the disclosed embodiments;

[0020] Figure 5 illustrates an exemplary flow diagram for a control method for a power converter apparatusincorporating aspects of the disclosed embodiments; and

[0021] Figure 6 illustrates graphs showing exemplary total harmonic distortion comparison for a power converterapparatus incorporating aspects of the disclosed embodiments. DETAILED DESCRIPTION OF THE DISCLOSED EMBODIMENTS

[0022] Figure 1 illustrates a schematic diagram of an exemplary power converter apparatus 100 incorporatingaspects of the disclosed embodiments. The aspects of the disclosed embodiments are directed to a carrier based wide range discontinuous PWM (WDPWM) control for three phase flying capacitor multilevel inverter. The term “flying capacitor inverter” is also used herein to refer to the power converter apparatus 100.

[0023] Referring to Figure 1, in one embodiment, the power converter apparatus 100 includes a first phaseswitching cell 102a, a second phase switching cell 102b, and a third phase switching cell 102c coupled in parallel between apositive DC bus (BUS+) and a negative DC bus (BUS-). The power converter apparatus 100 is configured to receive a DCinput voltage (VDC) and produce a three phase AC output voltage (3ϕVac). Each of the first phase switching cell 102a, secondphase switching cell 102b, and third phase switching cell 102c is configured as a flying capacitor converter.

[0024] In one embodiment, a topology of the flying capacitor converter includes a first switching leg 104 with afirst switching device S1 and a second switching device S2 coupled in series between the positive DC bus (BUS+) and a switched AC voltage 108, forming a first central node 110. A second switching leg 106 includes a third switching device S3 and a fourth switching device S4 coupled in series between the negative DC bus (BUS-) and the switched AC voltage 108, forming a second central node 112. A first flying capacitor (CF1) is coupled between the first central node 110 and the second central node 112.

[0025] In the example of Figure 1, a first RCD clamping device (RCD1) is coupled in parallel with the firstswitching device (S1), a second RCD clamping device (RCD2) is coupled in parallel with the second switching device (S2), (RCD3) a third RCD clamping device (RCD3) is coupled in parallel with the third switching device (S3) and a fourth RCD clamping device (RCD4) is coupled in parallel with the fourth switching device (S4). Each RCD clamping device (RCD1, RCD2, RCD3, RCD4) comprises a parallel connected resistor (R1) and capacitor (C1) coupled in series with a diode (D1). Each RCD clamping device can also be referred to as a “snubber” circuit.

[0026] As used herein the term “circuit topology” or “topology” refers to the form taken by a network of circuitcomponents and their interconnections within an electronic circuit. Changes to the type, values, and ratings of components areregarded as the same circuit topology. The term “circuit topology” does not refer to the physical layout or positions ofcomponents within a circuit diagram, but instead refers only to the components themselves and the connections that existbetween the components.

[0027] As shown in Figure 1, the power converter apparatus 100 of the disclosed embodiments includes a DCinput voltage stage VDC, and a flying capacitor inverter stage. The flying capacitor inverter stage is generally made up of thefirst phase switching cell 102a, the second phase switching cell 102b and the third phase switching cell 102c.

[0028] As shown in the example of Figure 1, the first phase switching cell 102a generally comprises a phase aprecharge, balancing and clamping circuit; the second phase switching cell 102b a phase b precharge, balancing and clampingcircuit; and the third phase switching cell 102c a phase c precharge, balancing and clamping circuit. The pre-charge, balancingand clamping networks comprise a snubber diode, such as D1, connected in series with a parallel connection of a snubbercapacitor, such as C1, and a resistor, such as R1.

[0029] There are four switches per phase (^^ , ^^ , ^^ , ^^), (^^ , ^^ , ^^ , ^^) and (^^, ^^^ , ^^^ , ^^^), together with thepre-charge, balancing and clamping network connected in parallel with each switch per phase. Switches ^^ , ^^ , ^^ ^^^ ^^ areconnected in parallel with (^^ , ^^ , ^^), (^^ , ^^, ^^), (^^ , ^^, ^^) and (^^ , ^^ , ^^), respectively. Switches ^^ , ^^ , ^^ , ^^^ ^^ areconnected in parallel with (^^ , ^^ , ^^), (^^ , ^^, ^^), (^^ , ^^ , ^^) and (^^ , ^^, ^^), respectively. Switches ^^, ^^^ , ^^^ , ^^^ ^^^are connected in parallel with (^^, ^^, ^^), (^^^, ^^^ , ^^^),and (^^^, ^^^ , ^^^), respectively.

[0030] Flying capacitors ^^^, ^^^ and ^^^ have their positive terminal connected between the source and drain ofswitches (^^ , ^^), (^^ , ^^) , (^^, ^^^). Their negative terminal is connected between the source and drain of switches(^^ , ^^), (^^ , ^^), (^^^ , ^^^), respectively.

[0031] The AC filter inductors ^^, ^^ , ^^ are for each phase a, b and c, respectively. The filter inductors ^^, ^^ ,^^are connected between the sources and drain of (^^ , ^^), (^^ , ^^) and (^^^ , ^^^) respectively.

[0032] The positive terminals of filter capacitors ^^, ^^ , ^^ are connected in parallel with respective AC filterinductors^^, ^^ , ^^. The other ends of the filter capacitors ^^, ^^ , ^^ are connected together, and also to the mid point of theDC bus capacitors ^^^ and ^^^ .

[0033] As is further described herein, the flying capacitor inverter stage uses a WDPWM modulation scheme tomeet the wide input voltage range requirement (600 - 800Vdc). A 180 degrees phase shifted carrier is used instead of a levelshifted carrier and MPPT control allows the power converter apparatus 100 to track the optimum power point when the boostconverter is bypassed.

[0034] In the example of Figure 1, the flying capacitor inverter stage is a 3-level type inverter. While a 3-leveltype inverter is generally referred to herein, the aspects of the disclosed embodiments are not so limited. In alternate embodiments, the flying capacitor inverter stage of the power converter apparatus can be adaptable to any suitable number of levels which operate in CCM.

[0035] In one embodiment, not shown, the input the power converter apparatus 100 of the disclosed embodimentscan also include a boost converter stage, such as a DC / DC boost converter. The boost converter stage can be configured toprovide the input voltage VDC. For example, in one embodiment, the boost converter state can include a front end two boost DC / DC converter connected in parallel to the DC bus of a three-phase bidirectional flying capacitor power converter for converting DC input to AC output voltage or AC input to output DC voltage.

[0036] In one embodiment, the DC / DC boost converter can comprise a conventional boost converter. Bypassdiodes can be added for each boost converter. The positive output of each boost converter can be connected together and thenconnected to the positive of DC-bus capacitor ^^^ (BUS+) of the flying capacitor inverter 100. The negative terminal of eachboost converter is connected to the common negative terminal BUS-.

[0037] In one embodiment, the boost converter stage can comprise a two channel boost DC / DC converter that isconfigured to operate in continuous conduction mode (CCM). The boost converter stage can be configured to use duty cyclecontrol with a fixed switching frequency for regulating the DC bus voltage (^_^1,^_^2), shown in Figure 1.

[0038] The boost converter stage can be configured to boost the DC bus voltage to the required level when the PVvoltage is less than DC bus voltage set value (e.g. <600V). Bypass diodes can be used to bypass the boost converter when thePV voltage is high enough for the PV inverter to operate.

[0039] In one embodiment, not shown, the power converter apparatus 100 can also include one or moreelectromagnetic interference (EMI) filters. For example, each DC / DC boost converter input can be connected to an EMI filter.With a DC / DC EMI filter on the input and a DC / AC EMI filter on the output, the differential and the common mode noise canbe filtered in order to fit the applicable EMI standard.

[0040] As an example, an EMI filter network can be composed of a three terminal common mode choke withintegrated differential mode filter. The common mode noise is filtered by the common mode choke and common mode capacitors and the differential mode noise is filtered by the differential mode inductor and capacitors so as to meet the standard by the differential mode filter.

[0041] An operation mode of the first phase switching cell 102a will be described. It will be understood that theoperation of the second and third phase switching cells 102b, 102c shown in Figure 1 can be configured to follow the sameoperation pattern.

[0042] In the example of Figure 1, the output current is considered to be in a positive direction. ^^ and ^^ areactive switches while ^^ and ^^ are complementary switches. This operation pattern is the same in the negative direction, butwith the exception of ^^and ^^being the active switches while ^^and ^^are the complementary switches. A summary of the operation modes follows:

[0043] In mode 1, ^^ and ^^ are turned on, therefore the inverter inductor is being charged by BUS+. The voltageof the flying capacitor is held constant in this mode as zero output voltage 3ϕVac is synthesized.

[0044] In mode 2, ^^ and ^^ are turned on. The energy is being transferred from BUS+ to the flying capacitor,causing its voltage to increase and at the same time energy is being transferred from the inverter inductor La to the load.

[0045] In mode 3, ^^ and ^^ are turned on. The energy is being transferred from the flying capacitor through theinverter inductor La to the load. Thus, the voltage of the flying capacitor is decreasing.

[0046] In mode 4, ^^ and ^^ are turned on. The behaviour in this mode is similar to mode 1. The inverter inductorLa is being charged by BUS-. The voltage of the flying capacitor is held constant in this mode as zero output voltage issynthesized.

[0047] Flying capacitor inverter topology switches can suffer from voltage stress, which is generally equal to theinput voltage ( ^^^) instead ofThis behaviour would create the need for higher voltage rating switches, which increasesthe switching loss and cost. However, the three-level structure of the topology of the power converter apparatus 100 of thedisclosed embodiments overcomes these disadvantages using a resistor, capacitor and diode (RCD) based network, such as first RCD clamping device RCD1, shown in Figure 1. In this example, first clamping device RCD1 comprises a diode D1, capacitor C1 and resistor R1, in one phase of the flying capacitor inverter 100. The respective RCD network provides pre-charge, balancing and clamping network across respective switches S1-S12.

[0048] The RCD based network of the disclosed embodiments is configured to perform the following functions:

[0049] 1. Pre-charging the flying capacitor tothrough a voltage divider resistive network.

[0050] 2. Balancing of the flying capacitor voltage during operation or switching of the voltage sourceinverter (VSI).

[0051] 3. Clamping of the switch voltage such that over voltage does not appear across the switches S1-S12during switching of the VSI.

[0052] The aspects of the disclosed embodiments provide a carrier based wide range discontinuous pulse widthmodulation (WDPWM) control for the three phase flying capacitor multilevel inverter 100 of the disclosed embodiments. Anexample of such a signal is shown in Figure 2, as WDPWM signal 206. The example of Figure 2 illustrates WDPWMmodulation with 180 degree phase shifted carrier for phase a in the flying capacitor converter 100.

[0053] In the example of Figure 2, time is shown on axis 202 and signal amplitude is shown on axis 204. The firstgate control signal is shown as signal 208, while the second gate control signal is shown as signal 210. In one embodiment,the first gate control signal 208 is generated based on a triangular carrier signal 212. The second gate control signal 210 canbe generated based on a one hundred eighty-degree (180˚) phase shifted triangular carrier signal 214.

[0054] Simulation results of the WDPWM signal 206 is shown at high and low modulation index in Figures 3 and4. Figure 3 illustrates a simulation result of a WDPWM signal 306 with a high modulation index, while Figure 4 illustrates asimulation result of a WDPWM signal 406 with a low modulation index.

[0055] In these examples, the time axes 302, 402 of Figures 3 and 4, respectively, increase to the right. Therespective voltage axes 304, 404 increase in the vertical direction. Graphs 308, 408 represent the Vzero_new signal, as is furtherdescribed below.

[0056] For example, let ^^, ^^ and ^^ represent a three-phase sinusoidal reference signal with modulation index^^ for the three-phase inverter system 100. For purposes of this example, the reference signal is normalized to 1, and variesfrom -1 to 1.

[0057] As illustrated in example of Figures 3 and 4, the maximum value of the modulation index ^^ for WDPWMsignal 306, 406 is 1.1. The lowest value is 0.8. Thus, in this example 0.8 ≤ ^^ ≤ 1.1.

[0058] A high modulation index ^^corresponds to a low inverter DC input voltage VDC and a low modulationindex ^^ corresponds to high inverter DC input voltage VDC. In the example of Figure 3 with ^^ = 1.1, the input voltage VDCis approximately 600V. In the example of Figure 4, with ^^ = 0.88, the input voltage VDC is approximately 750V. Therefore,two signals ^^^^^ and ^^^^^ needs to be computed first for each reference signal as shown in equations (1) and (2) below:Where ^^ is the modulating signal of each phase i.e. ^^ ( ^ = ^^, ^^ , ^^)

[0059] Taking the minimum signal for ^^^^^(^^) and ^^^^^(^^)

[0060] Hence the zero-sequence which will be added to the original reference signal is evaluated below:

[0061] Therefore, the WDPWM modulating signal 306, 406 of Figures 3 and 4, respectively, is evaluated fromabove as below:

[0062] In accordance with the aspects of the disclosed embodiments, the first phase switching cell 102a, the secondphase switching cell 102b, and the third phase switching cell 102c are operated with a discontinuous pulse width modulation control method based on a wide range discontinuous pulse width modulation signal 206. In one embodiment, the controlmethod includes generating a phase a modulating signal, a phase b modulating signal, and a phase c modulating signal basedon a three-phase reference signal (Va, Vb, Vc).

[0063] Figure 5 illustrates an exemplary control scheme 500 for WDPWM control in accordance with the aspectsof the disclosed embodiments. In one embodiment, the control scheme or method 500 includes generating 520 the phasemodulating signals. This includes generating a phase a modulating signal, a phase b modulating signal and a phase cmodulating signal based on a three-phase reference signal (Va, Vb, Vc).

[0064] The method includes determining 506 the signals for each phase. This includes determining 506:

[0065] a first phase a signal, where the first phase a signal is equal to a negative of the phase a modulating signalwhen the phase a modulating signal is less than zero, and is equal to one minus the phase a modulating signal when the phasea modulating signal is greater than or equal to zero;

[0066] a first phase b signal, where the first phase b signal is equal to a negative of the phase b modulating signalwhen the phase b modulating signal is less than zero and is equal to one minus the phase b modulating signal when the phaseb modulating signal is greater than or equal to zero;

[0067] a first phase c signal, where the first phase c signal is equal to a negative of the phase c modulating signalwhen the phase c modulating signal is less than zero, and is equal to one minus the phase c modulating signal when the phasec modulating signal is greater than or equal to zero;

[0068] a second phase a signal, where the second phase a signal is equal to one plus the phase a modulating signalwhen the phase a modulating signal is less than zero, and is equal to the phase a modulating signal when the phase a modulatingsignal is greater than or equal to zero;

[0069] a second phase b signal, where the second phase b signal is equal to one plus the phase b modulating signalwhen the phase b modulating signal is less than zero, and is equal to the phase b modulating signal when the phase b modulatingsignal is greater than or equal to zero; and

[0070] a second phase c signal, where the second phase c signal is equal to one plus the phase c modulating signalwhen the phase c modulating signal is less than zero, and is equal to the phase c modulating signal when the phase c modulatingsignal is greater than or equal to zero.

[0071] In one embodiment, the control method further includes selecting 508: a minimum first phase signal(DPWMh_min) as a minimum of the first phase a signal, the first phase b signal, and the first phase c signal, and a minimumsecond phase signal (DPWMl_min) as a minimum of the second phase a signal, second phase b signal, and second phase c signal.

[0072] The control method also includes determining 510 a zero sequence (Vzero_new). When the minimum firstphase signal is less than the minimum second phase signal (DPWMh_min < DPWMl_min) the zero sequence (Vzero_new) is equal to the minimum first phase signal (DPWMh_min). When the minimum first phase signal is greater than or equal to the minimumsecond phase signal (DPWMh_min ≥ DPWMl_min) the zero sequence (Vzero_new) is equal to a negative of the minimum second phase signal (-DPWMl_min).

[0073] The method also includes generating 512, 514 three wide range discontinuous pulse width modulationsignals (VA_PWM, VB_PWM, VC_PWM) corresponding to each phase in the three-phase reference signal (Va, Vb, Vc) based on the zero sequence (Vzero_new) and the three-phase reference signal (Va, Vb, Vc). For example, the wide range discontinuous pulsewidth modulation signal is generated 516 by adding 514 the zero sequence to each of the phase a modulating signal, the phaseb modulating signal, and the phase c modulating signal.

[0074] As shown in Figure 5, in one embodiment, generating 504 the three phase modulating signals (ma, mb, mc)comprises multiplying each phase in the three phase reference signals (Va, Vb, Vc) by a corresponding modulation index (mx). The corresponding modulation index (mx) is a ratio between a peak voltage of a corresponding phase of the three phase AC output voltage (3ϕVac) and half of a predetermined nominal DC input voltage (VDC).

[0075] In one embodiment, generating 504 the three phase modulating signals (ma, mb, mc) can include generating512, when a corresponding phase modulating signal (ma, mb, mc) is greater than or equal to zero, a corresponding positive signal(VA_P, VB_P, VC_P) based on the corresponding phase modulating signal (ma, mb, mc) and the zero sequence (Vzero_new). Whenthe corresponding phase modulating signal (ma, mb, mc) is not greater than or equal to zero a corresponding negative signal(VA_N, VB_N, VC_N) is generated.

[0076] In one embodiment, the corresponding positive signal (VA_P, VB_P, VC_P) is added 514 with thecorresponding negative signal (VA_N, VB_N, VC_N) to form the corresponding wide range discontinuous pulse width modulation signal (VA_PWM, VB_PWM, VC_PWM).

[0077] In one embodiment, a first gate control signal is generated 516 based on a triangular carrier signal. Asecond gate control signal is generated 516 based on a one hundred eighty-degree (180˚) phase shifted triangular carrier signal.

[0078] Figure 6 illustrates comparison of total harmonic distortion (THD) in a flying capacitor inverter 100 of thedisclosed embodiments. In the example of Figure 6, graph 602 is a comparison of total harmonic distortion of a T-type flying capacitor inverter 100. Graph 604 illustrates the efficiency of the flying capacitor invertor 100. Line 610 represents a high modulation index, such as ^^=1.1, with an input voltage of 600Vdc. Line 612 represent a low modulation index, such as ^^=0.88 at 750Vdc.

[0079] As used herein, the term “switching leg” refers to a pair of series connected switching devices forming acentral circuit node, referred to herein as a midpoint, between the two switching devices.

[0080] Any appropriate type of switching device capable of switching the desired power, both voltage and current,at the desired frequency may be used as the switching devices S1-S12. For example, the switching devices S1-S12 may be anysuitable type of switching device, such as an insulated gate bipolar transistor (IGBT), metal oxide semiconductor field effecttransistor (MOSFET), silicon carbide (SiC) MOSFET, gallium nitride (GaN) transistor, or other suitable switching device, may be beneficially used without straying from the spirit and scope of the herein disclosed embodiments.

[0081] DC Power is received by the exemplary power conversion apparatus 100 through a single input port VDC.Power for the apparatus 100 may be received from any appropriate DC power source as desired. For example, in the illustratedembodiment shown in Figure 1, a photovoltaic source PV is directly connected to the input DC power VDC. Alternatively, abattery or other appropriate DC power source may be used to supply the input DC power VDC. When desired, a separate DC- DC converter stage may be used to condition the input power.

[0082] The aspects of the disclosed embodiments provide carrier based wide range discontinuous PWM(WDPWM) control for three phase flying capacitor multilevel inverter. This present a solution for a photovoltaic VSI systemwhere the flying capacitor VSI topology, together with a modified DPWM control, overcomes the drawbacks of other VSI topologies like T-type and NPC VSI. Wide input voltage range (e.g 600V-800V) together with high efficiency is achieved with the flying capacitor inverter 100 of the disclosed embodiments.

[0083] Advantages of the aspects of the disclosed embodiments, include but are not limited to:

[0084] -Eliminating the need to use SVPWM modulation, which helps reduce control complexity.

[0085] -Optimal switching loss reduction is provided with WDPWM modulation together with low output voltageand current THD.

[0086] -Realizing a balanced flying capacitor with half DC bus voltage despite the use of WDPWM modulation.

[0087] -No overvoltage across switches.

[0088] -Lower ripple current through the inverter inductor during the clamping region with the use of WDPWMmodulation.

[0089] Thus, while there have been shown, described, and pointed out, fundamental novel features of the inventionas applied to the exemplary embodiments thereof, it will be understood that various omissions, substitutions and changes in the form and details of devices and methods illustrated, and in their operation, may be made by those skilled in the art without departing from the spirit and scope of the presently disclosed invention. Further, it is expressly intended that all combinations of those elements, which perform substantially the same function in substantially the same way to achieve the same results, are within the scope of the invention. Moreover, it should be recognized that structures and / or elements shown and / or described in connection with any disclosed form or embodiment of the invention may be incorporated in any other disclosed or describedor suggested form or embodiment as a general matter of design choice. It is the intention, therefore, to be limited only asindicated by the scope of the claims appended hereto.

Claims

CLAIMS What is claimed is:

1. A power converter apparatus (100) comprising a first phase switching cell (102a), a second phase switching cell (102b), and a third phase switching cell (102c) coupled in parallel between a positive DC bus (BUS+) and a negative DC bus (BUS- )and configured to receive a DC input voltage (VDC) and produce a three phase AC output voltage (3ϕVac), wherein eachof the first phase switching cell (102a), the second phase switching cell (102b), and the third phase switching cell (102c) is configured as a flying capacitor converter, wherein a topology of the flying capacitor converter comprises: a first switching leg (104) comprising a first switching device (S1) and a second switching device (S2) coupled in series between the positive DC bus (BUS+) and a switched AC voltage (108), and forming a first central node (110); a second switching leg (106) comprising a third switching device (S3) and a fourth switching device (S4) coupled in series between the negative DC bus (BUS-) and the switched AC voltage (108), and forming a second central node (112); and a first flying capacitor (CF1) coupled between the first central node (110) and the second central node (112); wherein a first RCD clamping device (RCD1) is coupled in parallel with the first switching device (S1), a secondRCD clamping device (RCD2) is coupled in parallel with the second switching device (S2), (RCD3) a third RCD clamping device (RCD3) is coupled in parallel with the third switching device (S3) and a fourth RCD clamping device (RCD4) is coupled in parallel with the fourth switching device (S4), and each RCD clamping device (RCD1, RCD2, RCD3, RCD4) comprises a parallel connected resistor (R1) and capacitor (C1) coupled in series with a diode (D1).

2. The power converter apparatus (100) according to claim 1 wherein the first phase switching cell (102a), the second phase switching cell (102b), and the third phase switching cell (102c) are operated with a discontinuous pulse width modulation control method based on a wide range discontinuous pulse width modulation signal (206), the control method comprising: generating a phase a modulating signal, a phase b modulating signal, and a phase c modulating signal basedon a three-phase reference signal (Va, Vb, Vc); determining a first phase a signal, wherein the first phase a signal is equal to a negative of the phase amodulating signal when the phase a modulating signal is less than zero, and is equal to one minus the phase a modulatingsignal when the phase a modulating signal is greater than or equal to zero;determining a first phase b signal, wherein the first phase b signal is equal to a negative of the phase bmodulating signal when the phase b modulating signal is less than zero, and is equal to one minus the phase b modulatingsignal when the phase b modulating signal is greater than or equal to zero;determining a first phase c signal, wherein the first phase c signal is equal to a negative of the phase cmodulating signal when the phase c modulating signal is less than zero, and is equal to one minus the phase c modulatingsignal when the phase c modulating signal is greater than or equal to zero;determining a second phase a signal, wherein the second phase a signal is equal to one plus the phase amodulating signal when the phase a modulating signal is less than zero, and is equal to the phase a modulating signalwhen the phase a modulating signal is greater than or equal to zero;determining a second phase b signal, wherein the second phase b signal is equal to one plus the phase bmodulating signal when the phase b modulating signal is less than zero, and is equal to the phase b modulating signalwhen the phase b modulating signal is greater than or equal to zero;determining a second phase c signal, wherein the second phase c signal is equal to one plus the phase cmodulating signal when the phase c modulating signal is less than zero, and is equal to the phase c modulating signalwhen the phase c modulating signal is greater than or equal to zero;selecting a minimum first phase signal as a minimum of the first phase a signal, the first phase b signal, andthe first phase c signal, and select a minimum second phase signal as a minimum of the second phase a signal, the secondphase b signal, and the second phase c signal;determining a zero sequence wherein when the minimum first phase signal is less than the minimum second phase signal (^^^^^ < ^^^^^), the zero sequence is equal to the minimum first phase signal (^^^^^), and when theminimum first phase signal is greater than or equal to the minimum second phase signal (^^^^^ ≥ ^^^^^), the zerosequence is equal to a negative of the minimum second phase signal (−^^^^^); and generating the wide range discontinuous pulse width modulation signal (206) by adding the zero sequence toeach of the phase a modulating signal, the phase b modulating signal, and the phase c modulating signal.

3. The power converter apparatus (100) according to any one of the preceding claims wherein the three phase modulating signals are generated by multiplying each phase in the three phase reference signals by a corresponding modulation index, wherein the corresponding modulation index is a ratio between a peak voltage of a corresponding phase of the three phase AC output voltage (3ϕVac) and half of a predetermined nominal DC input voltage.

4. The power converter apparatus (100) according to any one of the preceding claims wherein a first gate control signal (208) is generated based on a triangular carrier signal (212), and a second gate control signal (210) is generated based on a one hundred eighty-degree (180˚) phase shifted triangular carrier signal (214).determining (510) a zero sequence (Vzero_new) wherein when the minimum first phase signal is less than the minimum second phase signal (DPWMh_min < DPWMl_min) the zero sequence (Vzero_new) is equal to the minimum first phase signal (DPWMh_min), and when the minimum first phase signal is greater than or equal to the minimum second phase signal (DPWMh_min ≥ DPWMl_min) the zero sequence (Vzero_new) is equal to a negative of the minimum second phase signal (-DPWMl_min); and generating (512, 514) three wide range discontinuous pulse width modulation signals (VA_PWM, VB_PWM, VC_PWM) corresponding to each phase in the three-phase reference signal (Va, Vb, Vc) based on the zero sequence (Vzero_new) and the three-phase reference signal (Va, Vb, Vc).VB_N, VC_N) to form the corresponding wide range discontinuous pulse width modulation signal (VA_PWM, VB_PWM, VC_PWM).

8. The method (500) according to any one of claims 5 through 7 wherein a first gate control signal is generated (516) based on a triangular carrier signal, and a second gate control signal is generated (516) based on a one hundred eighty-degree (180˚) phase shifted triangular carrier signal.

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