Display device and display device manufacturing method

Abstract

A display device (1) comprises: a subpixel (2) which includes both a light-emitting element (3) and a pixel circuit (4); a first driver (5) which is disposed on one side of a display region (28) including the subpixel (2) and which drives the pixel circuit (4); a first control line (6) which is connected to the first driver (5) and to the pixel circuit (4) and to which a control signal (S3) from the first driver (5) is input; and first repair wiring (7) which intersects the first control line (6).

Description

Display device and method for manufacturing the same

[0001] The present disclosure relates to a display device and a method for manufacturing a display device.

[0002] 2. Description of the Related Art Display devices are known that are provided with repair wiring for repairing defects that occur in wiring associated with display elements.

[0003] Japanese Patent Application Publication No. 2010-72397

[0004] Self-emitting panels require many processes, and defects such as leakage and disconnection of wiring due to foreign matter are unavoidable, which reduces yield.

[0005] An object of one aspect of the present disclosure is to provide a display device and a method for manufacturing the display device that can improve the yield related to foreign matter.

[0006] In order to solve the above-mentioned problems, the display device of the present disclosure includes sub-pixels each including a light-emitting element and a pixel circuit, a first driver disposed on one side of a display area including the sub-pixels and configured to drive the pixel circuit, a first control line connected to the first driver and the pixel circuit and receiving a control signal from the first driver, and a first repair wiring intersecting the first control line.A manufacturing method of a display device of the present disclosure includes sub-pixels each including a light-emitting element and a pixel circuit, a first driver disposed on one side of a display area including the sub-pixels and configured to drive the pixel circuit, and a first control line connected to the first driver and the pixel circuit and receiving a control signal from the first driver, the method comprising forming a first repair wiring intersecting the first control line, and when the first control line includes a defect in the display area, electrically connecting the first repair wiring and the first control line at the intersection.

[0007] One embodiment of the present disclosure can provide a display device that can improve the yield related to foreign matter.

[0008] 1 is a block diagram of a display device according to embodiment 1. FIG. 2 is a circuit diagram of a pixel circuit provided in the display device. FIG. 3 is a diagram showing a complementation mode of a control signal when a defect occurs according to a comparative example. FIG. 4 is a diagram showing a complementation mode of a control signal when a defect occurs according to a comparative example. FIG. 5 is a diagram showing a complementation mode of a control signal when a defect occurs according to a comparative example. FIG. 6 is a diagram showing a complementation mode of a control signal when a defect occurs according to embodiment 1. FIG. 7 is a diagram showing a complementation mode of a control signal when a leak defect occurs according to a comparative example. FIG. 8 is a diagram showing a complementation mode of a control signal when a leak defect occurs according to embodiment 1. FIG. 9 is a block diagram of a display device according to embodiment 2. FIG. 10 is a diagram showing a complementation mode of a control signal when a defect occurs according to embodiment 2. FIG. 11 is a diagram showing a complementation mode of a control signal when a defect occurs according to a comparative example. FIG. 12 is a block diagram showing a schematic configuration of a display device according to embodiment 3. FIG. 13 is a block diagram of the display device. FIG. 14 is a waveform diagram for explaining the timing of control signals and complement signals of the display device. FIG. 15 is a circuit diagram of a pixel circuit provided in the display device. FIG. 16 is a waveform diagram for explaining the operation timing of the display device. FIG. 17 is a block diagram of a display device according to embodiment 4. FIG. 18 is a block diagram of a display device according to embodiment 5.

[0009] (Embodiment 1) Fig. 1 is a block diagram of a display device 1 according to embodiment 1. Fig. 2 is a circuit diagram of a pixel circuit 4 provided in the display device 1. Figs. 3 and 4 are diagrams showing a complementary manner of the control signal S3 when a defect occurs according to a comparative example. Fig. 5 is a diagram showing a complementary manner of the control signals S3 and S4 when a defect occurs according to a comparative example. Fig. 6 is a diagram showing a complementary manner of the control signals S3 and S4 when a defect occurs according to embodiment 1.

[0010] The display device 1 includes a subpixel 2 including a light-emitting element 3 and a pixel circuit 4, a first driver 5 disposed on one side of a display region 28 including the subpixel 2 and driving the pixel circuit 4, and a first control line 6 connected to the first driver 5 and the pixel circuit 4 and receiving a control signal S3 from the first driver 5. The display device 1 also includes a first repair wiring 7 intersecting the first control line 6. The display device 1 also includes a first region 29 including the first driver 5, and a second region 30 facing the first region 29 across the display region 28. The first repair wiring 7 is located between the display region 28 and the second region 30. In this way, the first driver 5 is located in the first region 29 on one side of the display region 28, and drives the subpixel 2 via the first control line 6 using one-sided driving. Then, a first repair wiring 7 for repair is arranged between the display area 28 and the second area 30, and is arranged so that the first repair wiring 7 can be connected by laser repair at the first intersection 23 to the first control line 6 that is driven on one side.

[0011] The display device 1 includes a first signal circuit 8a that supplies a first complementary signal S1 to the first repair wiring 7. The first control line 6 includes a defective portion 20 located within the display region 28. The first repair wiring 7 and the first control line 6 are electrically connected at a first intersection 23. The signal circuit 8 supplies the first repair wiring 7 with a signal identical to the control signal S3 from the first driver 5 as the first complementary signal S1. The defective portion 20 is a broken portion or a leak portion. The first signal circuit 8a includes a buffer 25a. The first repair wiring 7 is connected to the buffer 25a. The second signal circuit 8b includes a buffer 25b. The second repair wiring 11 is connected to the buffer 25b. The display device 1 also includes a second driver 9 arranged in the second region, and a second control line 10 that is connected to the second driver 9 and the pixel circuit 4 and receives the control signal S4 from the second driver 9. The display device 1 includes a second repair wiring 11 that intersects with the second control line 10. The second repair wiring 11 is located between the display area 28 and the first area 29. The display device 1 includes a second signal circuit 8b that is connected to the second repair wiring 11 and supplies a second complementary signal S2. The second control line 10 includes a defective portion 31 located within the display area 28. The second repair wiring 11 and the second control line 10 are electrically connected at a second intersection 24. The second signal circuit 8b supplies the second repair wiring 11 with a signal that is the same as the control signal S4 from the second driver 9 as the second complementary signal S2. The display device 1 also includes a fourth driver 14 arranged in the second area 30, and a fourth control line 15 that is connected to the fourth driver 14 and the pixel circuit 4 and receives the control signal S6 from the fourth driver 14. The second repair wiring 11 intersects with the fourth control line 15. The first driver 5 may be, for example, an n-scan driver. The second driver 9 may be, for example, a discharge driver. The third driver 12 may be, for example, an emission driver. The fourth driver 14 may be, for example, an on-bias-stress (OBS) driver. The first driver 5, the second driver 9, the third driver 12, and the fourth driver 14 all drive the subpixel 2 in a one-sided manner.

[0012] The display device 1 includes a third driver 12 arranged in a first region 29, and a third control line 13 connected to the third driver 12 and the pixel circuit 4 and receiving a control signal S5 from the third driver. The first repair line 7 intersects with the third control line 13. The first repair line 7 is formed in a layer above the first control line 6. The display device 1 includes a data signal line 17 and a high-potential power supply line 18. The first repair line 7 is formed in the same layer as at least one of the data signal line 17 and the high-potential power supply line 18. The light-emitting element 3 is an organic light-emitting diode or a quantum dot light-emitting diode. The display device 1 includes the data signal line 17, the high-potential power supply line 18, and an initialization voltage line 19. The pixel circuit 4 includes first to seventh transistors T1 to T7 and a first capacitance element Cst. The source electrode of the fourth transistor T4, which is a drive transistor, is connected to a data signal line 17 via the third transistor T3 and to a high-potential power supply line 18 via the fifth transistor T5. The drain electrode of the fourth transistor T4 is connected to an anode of the light-emitting element 3 via the sixth transistor T6 and to a gate electrode of the fourth transistor T4. The gate electrode of the fourth transistor T4 is connected to the high-potential power supply line 18 via a first capacitance element Cst and to an initialization voltage line 19 via the first transistor T1. The drain electrode of the sixth transistor T6 is connected to the initialization voltage line 19 via a seventh transistor T7. A control signal S3 is supplied to the gates of the second transistor T2 and the third transistor T3 from the first scanning line 6, which is the scanning line of the current stage (n-th stage). A control signal S4 is supplied to the gate of the first transistor T1 from the second scanning line 10, which is the scanning line of the previous stage (n-1-th stage). A control signal S5 is supplied to the gate of the fifth transistor T5, the gate of the sixth transistor T6, and the seventh transistor T7 from a third control line 13, which is an emission control line. The first control line 13 is connected to the gate terminal of any one of the first transistor T1, the second transistor T2, the third transistor T3, the sixth transistor T6, and the seventh transistor T7. The pixel circuit 4 includes a second capacitance element Cob. The source electrode of the fourth transistor T4 is connected to one electrode of the second capacitance element Cob.The first control line 6 is connected to the other electrode of the second capacitance element Cob. Display panels equipped with self-luminous elements, particularly those compatible with high-speed and low-frequency drive, such as those used in smartphones, may be designed using the LTPO (Low Temperature Polycrystalline Oxide) process. In this case, the peripheral circuits driving the self-luminous elements must include various circuits, such as emission circuits, discharge circuits, and on-bias stress circuits, in addition to standard scan circuits. To reduce the frame size of the display panel, it is known that most of these circuits should be driven by single-sided drive to drive the self-luminous elements. However, adopting single-sided drive makes the wiring of these single-sided drive circuits vulnerable to leakage and breakage due to foreign matter generated during the manufacturing process, raising concerns about reduced display panel yields.

[0013] In particular, in self-emitting panels, the large number of processes makes wiring leak defects and disconnection defects due to foreign matter unavoidable, which is a factor in reducing yields. In particular, if a defect occurs in the active area (A.A.) region where the self-emitting elements are located, it causes malfunction of peripheral circuits, resulting in display defects, and is a factor in low yields.

[0014] The inventors have noticed that there tends to be a difference in the defect rate due to the above-mentioned foreign matter between the conventionally adopted double-sided drive and the newly configured single-sided drive. Therefore, in order to improve the above-mentioned low yield, the first repair wire 7 and the second repair wire 11, which are repair wires, are arranged inside the GDM circuit, so that when a defect portion 20 or a defect portion 31 occurs in the first control line 6 or the second control line 10, which are single-sided drive wires, a repair connection can be made between the first control line 6 and the first repair wire 7 at the first intersection 23 and / or the second control line 10 and the second repair wire 11 at the second intersection 24 by laser irradiation in the manufacturing process.

[0015] This allows a repair connection to be made to the stage where a defect such as a foreign object has occurred, and the first complementary signal S1 or the second complementary signal S2 is input as a pulse from an IC (Integrated Circuit) including a signal circuit 8 to the first repair wiring 7 or the second repair wiring 11, thereby achieving driving capabilities similar to those of double-sided driving, and a yield equivalent to that of double-sided driving can be expected.

[0016] As shown in Fig. 4, in the conventional double-sided driving, if there is a defective portion 20 (leakage or disconnection portion) in the active area (AA) of the first control line 6, if the defect is relatively minor, the control signal S3 can be complemented from the first drivers 5 (GDM circuits) arranged on both sides, and the product can potentially be considered non-defective. In contrast, as shown in Fig. 3, in the newly adopted single-sided driving, there is no complementing first driver 5 (GDM circuit), so there is a high possibility that the product will be deemed defective even if the defective portion 20 is relatively minor.

[0017] This embodiment is assumed to be an LTPO panel that is a self-emitting panel and supports both high-frequency driving for video playback, such as on smartphones and PCs, and low-frequency driving for standby mode. In this case, functions such as nScan and On-Bias-Stress are required in addition to scan, emission, and discharge, and corresponding driver circuits are arranged in a first region 29 and a second region 30 on both sides of the display region 28, as shown in Figure 1.

[0018] It has been found that in order to arrange these various circuits in a narrow frame, single-sided driving rather than double-sided driving offers great advantages.

[0019] Therefore, the first repair wiring 7 is arranged in a location close to the display area 28 and arranged so as to be able to make a repair connection with the first control line 6, which is the output wiring of the first driver 5 of the GDM circuit arranged on the opposite side. Then, the first repair wiring 7 is connected to a terminal of the IC so that a pulse can be input from the signal circuit 8 of the IC to the first repair wiring 7 arranged as described above.

[0020] 5A and 5B are diagrams showing how the control signals S3 and S4 are complemented when a defect occurs in a comparative example, and FIG. 6 is a diagram showing how the control signals S3 and S4 are complemented when a defect occurs in the first embodiment.

[0021] 5, if the first repair wiring 7 and the second repair wiring 11 are not provided, a defective portion 20 occurs in a location within the display area 28 of the first control line 6, and a defective portion 31 occurs in a location within the display area 28 of the second control line 10, the control signal S3 does not reach the second driver 9 side of the defective portion 20 of the first control line 6, and is not complemented. Furthermore, the control signal S4 does not reach the first driver 5 side of the defective portion 31 of the second control line 10, and is not complemented.

[0022] In this way, in the case of one-sided driving according to the comparative example, if there is a leak or broken wire in the display area (AA) 28, there is no complementary signal input from the other side, so even a relatively minor defect is likely to result in a defective product.

[0023] 6 , when the first repair wiring 7 and the second repair wiring 11 are provided, if a defective portion 20 occurs in the first control line 6 and a defective portion 31 occurs in the second control line 10, the first control line 6 and the first repair wiring 7 are connected by laser irradiation at the first intersection 23, the second control line 10 and the second repair wiring 11 are connected by laser irradiation at the second intersection 24, and the first complementary signal S1 is supplied to the first repair wiring 7 and the second complementary signal S2 is supplied to the second repair wiring 11. Therefore, the first complementary signal S1 is complemented on the second driver 9 side of the defective portion 20 of the first control line 6, and the second complementary signal S2 is complemented on the first driver 5 side of the defective portion 31 of the second control line 10.

[0024] As a result, it is expected that the yield will be improved at least to the same extent as when the first driver 5 and the second driver 9 are driven on both sides.

[0025] 7A and 7B are diagrams illustrating a complementary manner of the control signal S3 when a leakage defect occurs according to a comparative example, and FIG. 8A and FIG. 8B are diagrams illustrating a complementary manner of the control signal S3 when a leakage defect occurs according to the first embodiment.

[0026] If the defective portion 20 is a leak portion rather than a broken portion, the main possible leak modes are leak to the low power supply side and leak to the high power supply side. A defective waveform of the control signal S3 that occurs in this case is likely to be a symptom of a reduced amplitude waveform, such as the waveform shown in FIG. 7. That is, when leakage occurs to the low power supply side, a leak control signal S7 is generated whose amplitude is reduced compared to the normal control signal S3. Furthermore, when leakage occurs to the high power supply side, a leak control signal S8 is generated whose amplitude is reduced compared to the normal control signal S3.

[0027] In contrast, if the configuration including the first repair wiring 7 and the first intersection 23 according to the first embodiment is applied and High and Low signals are input at the appropriate timing, it is believed that the amplitude will tend to improve as shown in Fig. 8. That is, when leakage occurs from the defective portion 20 to the Low power supply side, a leak control signal S9 is generated whose amplitude is reduced compared to the control signal S3 in a normal state. Furthermore, when leakage occurs from the defective portion 20 to the High power supply side, a leak control signal S10 is generated whose amplitude is reduced compared to the control signal S3 in a normal state.

[0028] The leak control signal S9 has a smaller amplitude reduction than the leak control signal S7, so there is a tendency for the amplitude to improve. The leak control signal S10 has a smaller amplitude reduction than the leak control signal S8, so there is a tendency for the amplitude to improve. If the amplitude is improving in this way, it is considered to be moving in a direction that makes it easier to operate, so there is a high possibility that the next stage and subsequent stages will operate and improve.

[0029] A manufacturing method for a display device 1 includes a subpixel 2 including a light-emitting element 3 and a pixel circuit 4, a first driver 5 arranged on one side of a display area 28 including the subpixel 2 and driving the pixel circuit 4, and a first control line 6 connected to the first driver 5 and the pixel circuit 4 and receiving a control signal S3 from the first driver 5. The manufacturing method for the display device 1 includes the steps of forming a first repair wiring 7 intersecting the first control line 6, and, when the first control line 6 includes a defect 20 within the display area 28, electrically connecting the first repair wiring 7 and the first control line 6 at a first intersection 23. The manufacturing method for the display device 1 further includes the step of irradiating the first intersection 23 with a laser to form a melting connection between the first repair wiring 7 and the first control line 6. (Embodiment 2) FIG. 9 is a block diagram of a display device 1A according to embodiment 2. FIG. 10 is a diagram showing a complementary manner of the control signal S3 when a defect occurs according to embodiment 2. FIG. 11 is a diagram showing a complementary manner of the control signal S3 when a defect occurs according to a comparative example. Components similar to those previously described are given the same reference numerals, and detailed descriptions thereof will not be repeated.

[0030] The display device 1A includes a second repair wiring 11 located between a display region 28 and a first region 29 and intersecting a first control line 6, and a relay wiring 16 electrically connecting the first repair wiring 7 and the second repair wiring 11. The first control line 6 includes a defective portion 20 located within the display region 28. A first portion 26 of the first control line 6 located between the first region 29 and the defective portion 20 is electrically connected to the second repair wiring 11 at an intersection 32. A second portion 27 of the first control line 6 located between the second region 30 and the defective portion 20 is electrically connected to the first repair wiring 7 at an intersection 33. When a defective portion 20 occurs, the first portion 26 is connected to the second repair wiring 11 at the intersection 32, and the second portion 27 is connected to the first repair wiring 7 at the intersection 33, a control signal S3 from the first driver 5 is input to the second portion 27 via the second repair wiring 11, the relay wiring 16, and the first repair wiring 7. In this way, the first repair wiring 7 and the second repair wiring 11 on the left and right may be connected by the relay wiring 16. By connecting in this way, by repairing the defective stage, it becomes possible to complement from the opposite side a pulse having the same timing as the defective stage.

[0031] As shown in Figure 11, in the case of one-sided driving according to the comparative example, if there is a defective portion 20 in the display area 28, mainly at the point of disconnection, there is no signal input to complement the control signal S3 in the second portion 27 on the opposite side of the first driver 5 from the defective portion 20 in the first control line 6, so there is a high possibility that the display panel will be defective even if the defective portion 20 is a relatively minor defect.

[0032] 10 , when a first repair wiring 7, a second repair wiring 11, and a relay wiring 16 are provided, if a defect 20 occurs in the first control line 6, the first control line 6 and the second repair wiring 11 are connected by laser irradiation at the intersection 32, and the first control line 6 and the first repair wiring 7 are connected by laser irradiation at the intersection 33. Then, the control signal S3 is supplied not only to the first portion 26 of the first control line 6, but also to the second portion 27 of the first control line 6 through the intersection 32, the relay wiring 16, and the intersection 33. Therefore, the control signal S3 is supplied to the second portion 27 on the opposite side of the first driver 5 from the defect 20 of the first control line 6. Note that this configuration of the relay wiring 16 is not externally input with a drive signal, and is therefore more effective against disconnection-related defects than leakage-related defects.

[0033] (Embodiment 3) Fig. 12 is a block diagram showing a schematic configuration of a display device 1B according to embodiment 3. Fig. 13 is a block diagram of display device 1B. Fig. 14 is a waveform diagram for explaining the timing of control signals and complementary signals of display device 1B. Fig. 15 is a circuit diagram of pixel circuit 4 provided in display device 1B. Fig. 16 is a waveform diagram for explaining the operation timing of display device 1B. Components similar to those described above are given the same reference symbols, and detailed descriptions thereof will not be repeated.

[0034] The display device 1B includes a pair of fifth drivers 34 arranged in a first region 29 and a second region 30 on either side of the display region 28, respectively, and a fifth control line 35, both ends of which are connected to the pair of fifth drivers 34. The fifth driver 34 may be, for example, a p-scan driver.

[0035] In this way, the display device 1B may include the fifth driver 34 of double-sided driving in addition to the first driver 5, second driver 9, third driver 12, and fourth driver 14 of single-sided driving.

[0036] The first and second repair wirings 7 and 11 are arranged near the display area 28 and are arranged so as to enable repair connection with the output wiring of the GDM circuit arranged on the opposite side. In the example shown in Figure 13, the one-sided drive third driver 12 (Emission) and the first driver 5 (nScan) are arranged in the first area 29 to the left of the display area 28, and the one-sided drive second driver 9 (Discharge) and the fourth driver 14 (OBS) are arranged in the second area 30 to the right of the display area 28. Therefore, one first repair wiring 7 and one second repair wiring 11 are arranged on the left and right to correspond to them.

[0037] The signal input to the first repair wiring 7 and the second repair wiring 11 is a pulse similar to the start pulse input from the IC signal circuit 8. When repairing, a pulse with the same timing as the defective stage is input.

[0038] To assist the driving capability, buffers 25 a and 25 b may be provided at the inputs to the first repair wiring 7 and the second repair wiring 11 .

[0039] 13, the first control line 6 of the one-sided drive nSCAN line is disconnected. The pixel circuits 4 located between the first driver 5 (from the left side of the display area 28) and the disconnected defective section 20 are supplied with the control signal S3 and operate normally, but the pixel circuits 4 located to the right of the disconnected defective section 20 are not supplied with the control signal S3 and a malfunction occurs.

[0040] Therefore, at the first intersection 23 shown in Figure 13, the first repair wiring 7 and the first control line 6 are connected, and as shown in Figure 14, a pseudo signal (the same signal as the signal that is originally applied) is input from outside the first repair wiring 7 as the first complementary signal S1.

[0041] 15, the gate of the third transistor T3 of the pixel circuit 4 is connected to the p-scan driver (fifth driver 34). The gate of the second transistor T2 is connected to the n-scan driver (first driver 5). The gate of the sixth transistor T6 is connected to the emission driver (third driver 12). The gate of the first transistor T1 is connected to the discharge driver (second driver 9). The terminal of the second capacitance element Cob opposite to the fourth transistor T4 is connected to the on-bias stress (fourth driver 14).

[0042] 16, the p scan signal, discharge signal, and n scan signal are shifted by one stage each. The emission signal and on-bias stress signal are shifted by four stages each. However, the number of stages to be shifted is an example and can be changed.

[0043] 17 is a block diagram of a display device 1C according to an embodiment 4. Components similar to those described above are denoted by the same reference numerals, and detailed description thereof will not be repeated.

[0044] The difference between display device 1B and display device 1C described above with reference to Figure 13 is that a defective portion 31 has occurred in the fourth control line 15, and the fourth control line 15 is connected to the second repair wiring 11 at the second intersection 24.

[0045] In the above-described third embodiment, it is assumed that a defect occurs in one location, defective portion 20. When defects occur in two locations, defective portion 20 and defective portion 31, if defects occur in two or more locations in the output of the GDM circuits arranged on the same side, repair is not possible.

[0046] However, as shown in Fig. 17, if one defect 20 and one defect 31 occur in the output of the GDM circuits arranged on opposite sides, they can be repaired. Fig. 17 of this fourth embodiment shows an example in which the defect 20 occurs in the first control line 6 corresponding to nScan[3] of the first driver 5 on the left side, and the defect 31 occurs in the fourth control line 15 corresponding to OBS[3] of the fourth driver 14 on the right side.

[0047] Therefore, as shown in the first intersection 23 and second intersection 24 in Figure 17, the first repair wiring 7 arranged on the right side is connected to the first control line 6 corresponding to nScan [3] (first intersection 23), and further, the second repair wiring 11 arranged on the left side is connected to the fourth control line 15 corresponding to OBS [3] (second intersection 24), and a pseudo signal (the same signal as the control signal that is originally applied) is input from the external signal circuit 8.

[0048] 18 is a block diagram of a display device 1D according to an embodiment 5. Components similar to those described above are denoted by the same reference numerals, and detailed description thereof will not be repeated.

[0049] The display device 1D differs from the display device 1B described above with reference to FIG. 13 in that the display device 1D includes a relay wiring 16 that electrically connects the first repair wiring 7 and the second repair wiring 11.

[0050] In this way, the left and right first repair wirings 7 and second repair wirings 11 may be connected by the relay wiring 16 on the opposite side of the signal circuit 8 .

[0051] As described above, by connecting the first repair wiring 7 and the second repair wiring 11 on the opposite side of the signal circuit 8 and repairing the defective section where the defect 20 has occurred at the first intersection 23 and the second intersection 24, it becomes possible to supplement the defective section 20 from the opposite side of the first driver 5 with a pulse control signal having the same timing as the defective section through the second repair wiring 11, the relay wiring 16, and the first repair wiring 7.

[0052] The present disclosure is not limited to the above-described embodiments, and various modifications are possible within the scope of the claims. Embodiments obtained by appropriately combining the technical means disclosed in different embodiments are also included in the technical scope of the present disclosure. Furthermore, new technical features can be formed by combining the technical means disclosed in each embodiment.

[0053] REFERENCE SIGNS LIST 1 display device 2 sub-pixel 3 light-emitting element 4 pixel circuit 5 first driver 6 first control line 7 first repair wiring 8a first signal circuit 8b second signal circuit 9 second driver 10 second control line 11 second repair wiring 12 third driver 13 third control line 14 fourth driver 15 fourth control line 16 relay wiring 17 data signal line 18 high-potential side power supply line 19 initialization voltage line 20 defective portion 23 first intersection 24 second intersection 25a buffer 25b buffer 26 first portion 27 second portion 28 display area 29 first area 30 second area S1 first complementary signal S2 second complementary signal S3 control signal

Claims

1. A display device comprising: a sub-pixel including a light-emitting element and a pixel circuit; a first driver arranged on one side of a display area including the sub-pixel and driving the pixel circuit; a first control line connected to the first driver and the pixel circuit and receiving a control signal from the first driver; and a first repair wiring intersecting the first control line.

2. The display device according to claim 1, comprising a first region including the first driver and a second region facing the first region across the display region, wherein the first repair wiring is located between the display region and the second region.

3. The display device according to claim 2, further comprising a first signal circuit connected to the first repair wiring.

4. The display device according to claim 3, comprising: a second driver arranged in the second region; a second control line connected to the second driver and the pixel circuit and receiving a control signal from the second driver; and a second repair wiring intersecting the second control line.

5. The display device according to claim 4, wherein the second repair wiring is located between the display area and the first area.

6. The display device according to claim 5, further comprising a second signal circuit connected to the second repair wiring.

7. The display device according to claim 3, wherein the first control line includes a defective portion located within the display area, and the first repair wiring and the first control line are electrically connected at a first intersection.

8. The display device according to claim 7, wherein said first signal circuit supplies the same signal as the control signal from said first driver to said first repair wiring.

9. The display device according to claim 7, wherein the defective portion is a disconnection or a leak portion.

10. The display device according to claim 3, wherein the first signal circuit includes a buffer, and the first repair wiring is connected to the buffer.

11. The display device according to claim 6, wherein the second control line includes a defective portion located within the display area, and the second repair wiring and the second control line are electrically connected at a second intersection.

12. The display device according to claim 11, wherein the second signal circuit supplies the same signal as the control signal from the second driver to the second repair wiring.

13. A display device according to any one of claims 1 to 12, comprising: a third driver arranged in the first region; and a third control line connected to the third driver and the pixel circuit and receiving a control signal from the third driver, wherein the first repair wiring intersects with the third control line.

14. The display device according to claim 4, comprising: a fourth driver arranged in the second region; and a fourth control line connected to the fourth driver and the pixel circuit and receiving a control signal from the fourth driver; wherein the second repair wiring intersects with the fourth control line.

15. The display device according to claim 2, further comprising: a second repair wiring located between the display area and the first area and intersecting the first control line; and a relay wiring electrically connecting the first repair wiring and the second repair wiring.

16. A display device as described in claim 15, wherein the first control line includes a defective portion located within the display area, and a first portion of the first control line located between the first area and the defective portion is electrically connected to the second repair wiring, and a second portion of the first control line located between the second area and the defective portion is electrically connected to the first repair wiring.

17. The display device according to claim 16, wherein a control signal from the first driver is input to the second portion via the second repair wiring, the relay wiring, and the first repair wiring.

18. The display device according to any one of claims 1 to 17, wherein the first repair wiring is formed in a layer above the first control line.

19. The display device according to any one of claims 1 to 18, comprising a data signal line and a high-potential side power supply line, wherein the first repair wiring is formed in the same layer as at least one of the data signal line and the high-potential side power supply line.

20. The display device according to any one of claims 1 to 19, wherein the light-emitting element is an organic light-emitting diode or a quantum dot light-emitting diode.

21. The display device according to claim 20, comprising a data signal line, a high potential side power supply line, and an initialization voltage line, wherein the pixel circuit includes first to seventh transistors and a first capacitance element, wherein a source electrode of the fourth transistor, which is a drive transistor, is connected to the data signal line via the third transistor and to the high potential side power supply line via the fifth transistor, a drain electrode of the fourth transistor is connected to an anode of the light emitting element via the sixth transistor and to a gate electrode of the fourth transistor, a gate electrode of the fourth transistor is connected to the high potential side power supply line via the first capacitance element and to the initialization voltage line via the first transistor, and a drain electrode of the sixth transistor is connected to the initialization voltage line via the seventh transistor.

22. The display device according to claim 21, wherein the first control line is connected to a gate terminal of any one of the first transistor, the second transistor, the third transistor, the sixth transistor, and the seventh transistor.

23. The display device according to claim 21, wherein the pixel circuit includes a second capacitance element, a source electrode of the fourth transistor is connected to one electrode of the second capacitance element, and the first control line is connected to the other electrode of the second capacitance element.

24. A method for manufacturing a display device comprising: a sub-pixel including a light-emitting element and a pixel circuit; a first driver arranged on one side of a display area including the sub-pixel and driving the pixel circuit; and a first control line connected to the first driver and the pixel circuit and receiving a control signal from the first driver, the method comprising forming a first repair wiring that intersects with the first control line; and, when the first control line includes a defective portion within the display area, electrically connecting the first repair wiring and the first control line at the intersection.

25. The method for manufacturing a display device according to claim 24, wherein the first repair wiring and the first control line are melt-connected by irradiating the intersection with a laser.

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