Optical package, module, and method for manufacturing optical package

Abstract

Provided is an optical package capable of high-speed transmission.　The present invention provides an optical package comprising an interposer substrate, a semiconductor chip, and a high-speed transmission line. In addition, a convex part is formed along the outer periphery of a substrate surface of the interposer substrate except for a part of the region, and an opening is formed in a region surrounded by the convex part. In addition, the semiconductor chip is disposed in the opening. In addition, one end of the high-speed transmission line is connected to the semiconductor chip, and the other end of the high-speed transmission line protrudes to the outside of the interposer substrate via a part of the region.

Description

Optical package, module, and method for manufacturing optical package

[0001] The present technology relates to an optical package, and more particularly to an optical package and module having a hollow structure, and a method for manufacturing the optical package.

[0002] Conventionally, optical packages with a hollow structure have been used to protect semiconductor chips equipped with light-receiving elements, in which the hollow space in which the semiconductor chips are arranged is sealed with glass. For example, an optical package has been proposed in which a portion of the backside of the semiconductor chip is bonded to a substrate and connected by wire bonding, and the hollow space surrounded by the substrate and a glass mounting frame is sealed with glass (see, for example, Patent Document 1). This optical package is mounted on a mounting board via solder balls arranged on the backside of the substrate.

[0003] International Publication No. 2021 / 044703

[0004] In the above-mentioned conventional technology, when wiring high-speed transmission lines that transmit high-speed signals, such as signals at speeds of several tens of gigabits per second (Gbps), a substrate structure suitable for the high-speed transmission line is required. For example, it is necessary to arrange guard patterns, shorten the length of parallel lines with other lines, and increase the spacing between lines. These structures increase the area and thickness of the substrate, which in turn increases the size of the optical package. This makes it difficult to realize an optical package capable of high-speed transmission.

[0005] This technology was developed in light of these circumstances, and aims to realize an optical package capable of high-speed transmission.

[0006] The present technology has been made to solve the above-mentioned problems, and a first aspect thereof is an optical package including an interposer substrate having a convex portion formed on a substrate plane along an outer periphery except for a partial region and an opening formed in an area surrounded by the convex portion, a semiconductor chip disposed in the opening, and a high-speed transmission line having one end connected to the semiconductor chip and the other end protruding outside the interposer substrate via the partial region, and a control method thereof, which has the effect of suppressing an increase in the size of the optical package.

[0007] In addition, in this first aspect, the difference between the height from a predetermined reference plane to the terminal surface of the semiconductor chip and the height from the reference plane to the terminal surface of the high-speed transmission line is less than a predetermined tolerance, thereby providing the effect of facilitating mounting of the FPC cable.

[0008] In addition, in this first aspect, the difference between the height from a predetermined reference plane to the convex portion and the height from the reference plane to one of the two surfaces of the high-speed transmission line farthest from the reference plane is less than a predetermined tolerance, thereby providing the effect of facilitating sealing of the hollow portion.

[0009] In addition, in the first aspect, a pair of glasses may be further provided attached to both surfaces of the high-speed transmission line, respectively, thereby improving the adhesive properties of the high-speed transmission line.

[0010] Also, in this first aspect, the opening may not penetrate through the interposer substrate, and the semiconductor chip may be attached to the bottom surface of the opening.

[0011] In addition, in the first aspect, a heat dissipation member may be further provided, the opening may penetrate the interposer substrate, the opening may be blocked by the heat dissipation member, and the semiconductor chip may be bonded to the heat dissipation member, thereby improving heat dissipation performance.

[0012] In addition, in the first aspect, the interposer substrate may further include a land for mounting the interposer substrate on a mounting substrate, thereby providing the effect of mounting the interposer substrate.

[0013] In addition, in the first aspect, a connector for connecting the interposer substrate to a mounting substrate may be further provided, thereby providing the effect of mounting the interposer substrate.

[0014] In the first aspect, the high-speed transmission line may be an FPC (Flexible Printed Circuits) cable, thereby providing an effect of enabling electrical signals to be extracted from the semiconductor chip.

[0015] In addition, in this first aspect, the high-speed transmission line may be an optical waveguide including an optical wiring, thereby providing an effect of improving the transmission speed.

[0016] In addition, in the first aspect, a silicon bridge chip that connects the semiconductor chip and the interposer substrate may be further provided, thereby improving design freedom.

[0017] In addition, in the first aspect, a light-shielding member that covers at least a part of the surface of the silicon bridge chip may be further provided, thereby providing the effect of suppressing flare.

[0018] In this first aspect, the silicon bridge chip may include an electrical-optical conversion chip that converts between electrical signals and optical signals, the high-speed transmission line may be an optical waveguide including optical wiring, and one end of the high-speed transmission line may be connected to the semiconductor chip via the electrical-optical conversion chip, thereby improving the transmission speed.

[0019] In addition, in this first aspect, the semiconductor chip may include first and second semiconductor chips, and the silicon bridge chip may include a first silicon bridge chip connecting the first semiconductor chip and the interposer substrate, a second silicon bridge chip connecting the second semiconductor chip and the interposer substrate, and a third silicon bridge chip connecting the first semiconductor chip and the second semiconductor chip, thereby improving the functionality of the optical package.

[0020] In addition, in the first aspect, an anti-reflection material may be further provided to cover at least a part of the surface of the high-speed transmission line, thereby providing the effect of suppressing flare.

[0021] In this first aspect, at least a part of the surface of the high-speed transmission line may be subjected to an anti-reflection treatment, thereby providing the effect of suppressing flare.

[0022] In addition, in the first aspect, a heat sink may be further provided attached to at least one of both surfaces of the high-speed transmission line, thereby improving heat dissipation performance.

[0023] A second aspect of the present technology is a module including an interposer substrate having a convex portion formed on a substrate plane along an outer periphery except for a partial region and an opening formed in an area surrounded by the convex portion, a semiconductor chip disposed in the opening, a high-speed transmission line having one end connected to the semiconductor chip and the other end protruding outside the interposer substrate via the partial region, and a mounting substrate connected to the other end of the high-speed transmission line, thereby suppressing an increase in the size of the module.

[0024] 1 is an example of a cross-sectional view of a camera module according to a first embodiment of the present technology. FIG. 2 is an example of a cross-sectional view and an example of a perspective view of an optical package according to the first embodiment of the present technology. FIG. 3 is an example of a top view and an example of a bottom view of an optical package according to the first embodiment of the present technology. FIG. 4 is an example of a cross-sectional view of an extracted wiring portion of an FPC (Flexible Printed Circuit) cable according to the first embodiment of the present technology. FIG. 5 is a cross-sectional view showing an example of secondary mounting of an optical package according to the first embodiment of the present technology. FIG. 6 is a diagram for explaining a manufacturing process up to connection of an FPC cable according to the first embodiment of the present technology. FIG. 7 is a diagram for explaining a manufacturing process up to removal of a jig or tool according to the first embodiment of the present technology. FIG. 8 is an example of a top view of an optical package in the case where there are two or three FPC cables according to the first embodiment of the present technology. FIG. 9 is an example of a top view of an optical package in the case where there are four FPC cables according to the first embodiment of the present technology. FIG. 10 is a flowchart showing an example of a manufacturing process of an optical package according to the first embodiment of the present technology. FIG. 11 is an example of a cross-sectional view of an optical package according to a third embodiment of the present technology. FIG. 12 is an example of a cross-sectional view and an example of a bottom view of an optical package according to a fourth embodiment of the present technology. 10 is a cross-sectional view showing a secondary mounting example of an optical package according to a fourth embodiment of the present technology. FIG. 11 is an example of a cross-sectional view and a bottom view of an optical package when the second embodiment is applied to the fourth embodiment of the present technology. FIG. 12 is an example of a cross-sectional view of an optical package according to a fifth embodiment of the present technology. FIG. 13 is an example of a cross-sectional view and a top view of an optical package according to a sixth embodiment of the present technology. FIG. 14 is an example of a top view of a silicon bridge chip according to the sixth embodiment of the present technology. FIG. 15 is a cross-sectional view showing a secondary mounting example of an optical package according to the sixth embodiment of the present technology. FIG. 16 is a diagram for explaining a manufacturing process up to connection of a silicon bridge chip according to the sixth embodiment of the present technology. FIG. 17 is a diagram for explaining a manufacturing process up to bonding of a seal glass according to the sixth embodiment of the present technology. FIG. 18 is an example of a cross-sectional view and a top view of an optical package according to a first modified example of the sixth embodiment of the present technology. FIG. 19 is a diagram for explaining a manufacturing process in a first modified example of the sixth embodiment of the present technology.10 is an example of a cross-sectional view and a top view of an optical package in a second modified example of the sixth embodiment of the present technology. FIG. 11 is an example of a cross-sectional view of an electrical-optical conversion chip in a second modified example of the sixth embodiment of the present technology. FIG. 12 is a diagram for explaining a manufacturing process up to connection of a silicon bridge chip in a second modified example of the sixth embodiment of the present technology. FIG. 13 is a diagram for explaining a manufacturing process up to bonding of a seal glass in a second modified example of the sixth embodiment of the present technology. FIG. 14 is an example of a cross-sectional view and a top view of an optical package in which a first modified example of the sixth embodiment of the present technology is applied to a second modified example of the sixth embodiment of the present technology. FIG. 15 is an example of a cross-sectional view and a top view of an optical package in a third modified example of the sixth embodiment of the present technology. FIG. 16 is an example of a cross-sectional view of a silicon bridge chip in a third modified example of the sixth embodiment of the present technology. FIG. 17 is a diagram for explaining a manufacturing process up to connection of a silicon bridge chip in a third modified example of the sixth embodiment of the present technology. FIG. 18 is a diagram for explaining a manufacturing process up to bonding of a seal glass in a third modified example of the sixth embodiment of the present technology. 10 is an example of a cross-sectional view and a top view of an optical package in which a first modified example of the sixth embodiment is applied to a third modified example of the sixth embodiment of the present technology. FIG. 11 is a diagram for explaining a manufacturing process of an optical package in which a first modified example of the sixth embodiment is applied to a third modified example of the sixth embodiment of the present technology. FIG. 12 is an example of a cross-sectional view and a top view of an optical package in a seventh embodiment of the present technology. FIG. 13 is an example of a cross-sectional view and a top view of an optical package in a case where the range covered by the anti-reflection material is different in the seventh embodiment of the present technology. FIG. 14 is an example of a top view of an optical package in which anti-reflection processing is performed on an end surface in the seventh embodiment of the present technology. FIG. 15 is an example of a cross-sectional view and a top view of an optical package in an eighth embodiment of the present technology. FIG. 16 is an example of a cross-sectional view of an optical package in an eighth embodiment of the present technology. FIG. 17 is a block diagram showing an example of a schematic configuration of a vehicle control system. FIG. 18 is an explanatory diagram showing an example of installation positions of an outside vehicle information detection unit and an imaging unit.

[0025] Hereinafter, modes for carrying out the present technology (hereinafter referred to as embodiments) will be described. The descriptions will be made in the following order: 1. First embodiment (an example of drawing out an FPC cable) 2. Second embodiment (an example of drawing out an FPC cable in which a semiconductor chip is die-bonded to a heat sink) 3. Third embodiment (an example of drawing out an FPC cable with glass attached to both sides) 4. Fourth embodiment (an example of providing a connector and drawing out an FPC cable) 5. Fifth embodiment (an example of drawing out optical wiring) 6. Sixth embodiment (an example of connecting a semiconductor chip and an interposer substrate with a silicon bridge chip and drawing out an FPC cable) 7. Seventh embodiment (an example of drawing out an FPC cable coated with an anti-reflection material) 8. Eighth embodiment (an example of drawing out an FPC cable with a heat dissipation member attached) 9. Application example to a moving body

[0026] 1. First Embodiment [Configuration Example of Camera Module] Fig. 1 is an example cross-sectional view of a camera module 100 according to an embodiment of the present technology. This camera module 100 is mounted, for example, on a lens-interchangeable camera, and the camera module 100 in the figure is in a state before an interchangeable lens is attached. The camera module 100 includes a housing 110, mounting boards 121, 122, and 123, a heat dissipation block 130, a heat dissipation fan 150, and an optical package 200. Note that the camera module 100 is an example of a module described in the claims.

[0027] The optical package 200 includes a sealing glass 210, an interposer substrate 220, and an FPC cable 240. The structure of the optical package 200 will be described in detail later.

[0028] The interposer substrate 220 has a hollow portion (not shown), which is sealed by the seal glass 210. For example, a ceramic substrate is used as the interposer substrate 220. Hereinafter, the direction from the interposer substrate 220 to the seal glass 210 is referred to as the upward direction.

[0029] One end of the FPC cable 240 is connected to a semiconductor chip (not shown) in the hollow portion, and the other end protrudes outside the hollow portion. In other words, the other end of the FPC cable 240 is drawn out to the outside of the hollow portion.

[0030] Mounting substrate 121 is disposed below optical package 200, and has a through-hole formed in part thereof. Various circuits and components are provided on the upper and lower surfaces of mounting substrate 121, and the components on the lower surface are electrically connected to mounting substrate 122 via FPC cable 141.

[0031] The heat dissipation block 130 connects the lower surface of the optical package 200 to the protruding portion into the housing 110 via a through-hole in the mounting substrate 121 .

[0032] Mounting board 122 is disposed below mounting board 121, and various circuits and components such as a field programmable gate array (FPGA) 144 are provided on its upper and lower surfaces. In addition, the other end of FPC cable 240 is connected to mounting board 122.

[0033] The FPGA 144 is provided on the upper surface of the mounting board 122, and the upper surface of the FPGA 144 is connected to a protruding portion of the housing 110 via a TIM (Thermal Interface Material) 145. The FPGA 144 performs various image processing on image data from the semiconductor package 200, for example.

[0034] Furthermore, heat generated in the optical package 200 and the mounting substrate 122 is dissipated to the housing 110 via the heat dissipation block 130 and the TIM material 145. The white arrows in the figure indicate the heat conduction paths.

[0035] Mounting board 123 is connected to the lower side of mounting board 122, and various circuits and components such as external connection terminals 143 are provided on the upper and lower surfaces of mounting board 123. Mounting board 123 is also electrically connected to mounting board 122 via FPC cable 142.

[0036] The external connection terminal 143 is provided below the mounting substrate 123 and is electrically connected to the outside of the camera module 100 .

[0037] The heat dissipation fan 150 is provided below the housing 110 and serves to cool the housing 110. The gray arrows indicate the airflow.

[0038] 2A and 2B are an example of a cross-sectional view and a perspective view of an optical package 200 according to the first embodiment of the present technology. In the figure, "a" is an example of a cross-sectional view of the optical package 200, and "b" is an example of a perspective view of the optical package 200 before application of adhesive 251-1.

[0039] Hereinafter, the axis perpendicular to the seal glass 210 (i.e., the optical axis) will be referred to as the "Z axis," and a predetermined axis parallel to the upper surface of the seal glass 210 will be referred to as the "X axis." The axis perpendicular to the X axis and Z axis will be referred to as the "Y axis." In the same figure, "a" is a cross-sectional view seen from the Y axis direction.

[0040] As shown in FIG. 1A, the optical package 200 includes a sealing glass 210, an interposer substrate 220, a semiconductor chip 231, and an FPC cable 240. The space surrounded by the sealing glass 210 and the interposer substrate 220 is referred to as a "hollow portion."

[0041] A predetermined number of wirings 221 are formed in the interposer substrate 220 .

[0042] The lower surface of the interposer substrate 220 is flat, and a convex portion is formed on the upper surface along the periphery except for a small area. The area surrounded by the XZ coordinates (X0, Z2), (X0, Z4), (X1, Z2), and (X1, Z4) of a in the figure corresponds to the convex portion.

[0043] An opening is formed in the region surrounded by the convex portion on the upper surface of the interposer substrate 220 within the hollow portion. The opening does not penetrate the interposer substrate 220, and a step is created by the opening when viewed from the X-axis direction or the Y-axis direction. The portion surrounded by the XZ coordinates (X2, Z1), (X2, Z2), (X3, Z1), and (X3, Z2) of a in the figure corresponds to the opening.

[0044] The semiconductor chip 231 generates an electric signal by photoelectric conversion and has the function of, for example, a CIS (CMOS Image Sensor). The lower surface of the semiconductor chip 231 is adhered to the bottom surface of the opening of the interposer substrate 220 with adhesive 252. The semiconductor chip 231 is electrically connected to the interposer substrate 220 by wires 255 and wiring (not shown) in the FPC cable 240.

[0045] The adhesive 251-1 bonds the outer periphery of the interposer substrate 220 to the seal glass 210.

[0046] The FPC cable 240 has a higher transmission speed than the wiring 221, and the transmission speed is, for example, several tens of gigabits per second (Gbps). One end of the FPC cable 240 is connected to the top surface of the semiconductor chip 231, and the other end protrudes (in other words, is drawn out) to the outside of the interposer substrate 220 via an area where no protrusions are formed.

[0047] As illustrated in FIG. 1B, the convex portion of the interposer substrate 220 is formed in a "C" shape along the outer periphery of the interposer substrate 220, excluding a portion of the periphery. The area surrounded by coordinates (X4, Y2), (X4, Y3), (X5, Y2), and (X5, Y3) in FIG. 1B indicates a location where no convex portion is formed. The FPC cable 240 protrudes (is pulled out) through this location. The area surrounded by coordinates (X1, Y0), (X1, Y5), (X4, Y0), and (X4, Y5) in FIG. 1B indicates the inner periphery of the convex portion, where a step is formed.

[0048] In addition, the area surrounded by coordinates (X2, Y1), (X2, Y4), (X3, Y1) and (X3, Y4) of b in the figure indicates an opening.

[0049] Furthermore, it is preferable that the height from the bottom surface of the opening of the interposer substrate 220 to the terminal surface of the FPC cable 240 be approximately the same as the height from that bottom surface to the connection terminal surface of the semiconductor chip 231, and that the difference therebetween be less than a predetermined tolerance. In the figure, Z1 in a is the Z coordinate of the bottom surface of the opening. The Z coordinates of the terminal surface of the FPC cable 240 and the connection terminal surface of the semiconductor chip 231 are both Z3. By aligning the heights in this way, mounting of the FPC cable 240 becomes easier. Note that, as long as the above-mentioned height conditions are met, the height to the top surface of the semiconductor chip 231 may be lower than the height to the top surface of the interposer substrate 220.

[0050] Furthermore, it is preferable that the height from the bottom surface of the opening of interposer substrate 220 to the top end of the convex portion is approximately the same as the height from that bottom surface to the top surface of FPC cable 240, and the difference therebetween is less than a predetermined tolerance. In FIG. 1A, the Z coordinates of the top end of the convex portion and the top surface of FPC cable 240 are both Z4. By aligning the heights in this way, it becomes easier to seal the hollow portion by applying adhesive 251-1.

[0051] 3A and 3B are examples of a top view and a bottom view of the optical package 200 according to the first embodiment of the present technology. In the figure, "a" is an example of the top view of the optical package 200, and "b" is an example of the bottom view of the optical package 200.

[0052] As shown in the diagram a, adhesive 251-1 is applied along the outer periphery of interposer substrate 220. Furthermore, no protrusions are formed in the area surrounded by coordinates (X4, Y2), (X4, Y3), (X5, Y2), and (X5, Y3).

[0053] If the top, bottom, left, and right of the page are taken as the directions of east, west, north, and south, the north, south, and west sides of the semiconductor chip 231 are electrically connected to the interposer substrate 220 by a predetermined number of wires 255. Meanwhile, one end of an FPC cable 240 is connected to the east side of the semiconductor chip 231. The other end of the FPC cable 240 is drawn out to the outside of the interposer substrate 220 via a portion where no protrusion is formed.

[0054] Furthermore, the FPC cable 240 includes a predetermined number of signal lines, such as signal lines 241 and 242. The signal line 241 electrically connects the semiconductor chip 231 to the interposer substrate 220, and the signal line 242 electrically connects the semiconductor chip 231 to an external component. Note that the signal line 241 may not be provided, and the connection between the semiconductor chip 231 and the interposer substrate 220 may be made only by the wire 255.

[0055] As shown in FIG. 1B, a predetermined number of lands 256 for mounting are arranged on the lower surface of the interposer substrate 220. These lands 256 are arranged around the area directly below the semiconductor chip 231.

[0056] Here, an optical package in which the semiconductor chip 231 and the interposer substrate 220 are electrically connected only by wire bonding without using the FPC cable 240 will be considered as a comparative example.

[0057] Nowadays, high transmission speeds, such as several tens of gigabits per second (Gbps), are required. When wiring such high-speed transmission lines within the interposer substrate 220, a structure to suppress deterioration of transmission characteristics is required in the comparative example. Examples of such structures include a structure in which a guard pattern is arranged, a structure in which the length of parallel lines with other lines is shortened, and a structure in which the spacing between lines is widened. However, with these structures, it is difficult to reduce the area and thickness of the interposer substrate 220.

[0058] In contrast, in the first embodiment, one end of the FPC cable 240 is connected to the semiconductor chip 231, and the other end is drawn out through an area without a protrusion. In this structure, high-speed signals are not transmitted within the interposer substrate 220, so reflections do not occur at the vias, and the FPC cable 240 is isolated from the wiring within the interposer substrate 220. As a result, it is no longer necessary to use a structure (such as the placement of a guard pattern) within the interposer substrate 220 to suppress deterioration of transmission characteristics, as in the comparative example. This makes it possible to suppress an increase in the size (area and thickness) of the optical package 200 compared to the comparative example.

[0059] On the other hand, transmission paths (wires 255 and signal lines 241) other than the FPC cable 240 are isolated from the FPC cable 240 and connected to lands 256 on the back surface via wiring optimally arranged within the interposer substrate 220.

[0060] [Configuration example of FPC cable] Fig. 4 is an example of a cross-sectional view of a wiring portion of an FPC cable 240 according to the first embodiment of the present technology. A microstrip line or a strip line can be formed as a transmission path within the FPC cable 240. In the figure, "a" shows an example of a cross-sectional view when a microstrip line is formed, and "b" shows a cross-sectional view when a strip line is formed. In the figure, "a" and "b" show cross-sectional views as seen from the direction in which the FPC cable 240 is pulled out (i.e., the Y-axis direction).

[0061] In the microstrip line, as shown in FIG. 1A, ground lines 245 and 246 are formed on both sides of a signal line 244 in an FPC board 243, and ground patterns 247 and 248 are formed on the top and bottom surfaces.

[0062] On the other hand, in the stripline, as illustrated in b in the same figure, ground lines 245 and 246 are formed on both sides of a linear signal line 244 on the upper surface of the FPC board 243, and a ground pattern 248 is formed on the lower surface of the FPC board 243.

[0063] 5 is a cross-sectional view showing a secondary mounting example of the optical package 200 according to the first embodiment of the present technology. As illustrated in the drawing, for example, a predetermined number of solder connection portions 257 on the lower surface of the optical package 200 are connected to a secondary mounting substrate 310. These solder connection portions 257 are formed around an area directly below the semiconductor chip 231 on the lower surface of the optical package 200. Furthermore, through holes are formed in the area directly below the semiconductor chip 231 on the substrate plane of the secondary mounting substrate 310, and a heat dissipation member such as a heat sink 320 is connected to the area exposed through the through holes using a TIM material.

[0064] [Method of Manufacturing Optical Package] Next, a method of manufacturing the optical package 200 will be described with reference to FIGS.

[0065] First, as shown in FIG. 6A, the interposer substrate 220 is supported by a jig tool 410 .

[0066] Then, as shown in FIG. 1B, a semiconductor chip 231 is die-bonded to the bottom surface of the opening. Bumps 235, such as stud bumps, are provided on the upper surfaces of the semiconductor chip 231 and the interposer substrate. The bumps 235 are made of, for example, gold (Au).

[0067] Then, as illustrated in c in the figure, an anisotropic conductive film (ACF) 251-2 is attached around the bump 235, and an adhesive 251-1 is applied to the area where the FPC cable 240 is drawn out. Note that an anisotropic conductive paste (ACP) can also be used instead of the ACF.

[0068] Then, as shown in d in the figure, wires are bonded to the semiconductor chip 231 and the interposer substrate 220 by a wire bonding jig 420, and the FPC cable 240 is ACF-connected by an ACF jig 430 or the like.

[0069] 7A, adhesive 251-1 is applied to the convex portion and the upper surface of the FPC cable 240 along the outer periphery of the interposer substrate 220. The height of the adhesive 251-1 on the upper surface of the FPC cable 240 and the height of the adhesive 251-1 on the convex portion are adjusted to be approximately the same so that the planes of the seal glass 210 and the interposer substrate 220 are parallel to each other.

[0070] Then, as shown in FIG. 1B, a seal glass 210 is adhered to seal the hollow portion.

[0071] Then, the jig tool 410 is removed as shown in FIG.

[0072] Although the same adhesive 251-1 is used in the step c in FIG. 6 and the step a in FIG. 7, different types of adhesives may be used in each step.

[0073] Furthermore, the number of FPC cables 240 is not limited to one.

[0074] For example, two FPC cables 240-1 and 240-2 can be wired as shown in FIG. 8A. In this case, the FPC cables 240-1 and 240-2 are pulled out, for example, in the east and west directions. No convex portions are formed at the locations where they are pulled out. FIG. 8A is a top view before adhesive 251-1 is applied to the top surface of each FPC cable, and adhesive 251-1 is applied only to the locations where convex portions are to be formed. In a subsequent process, adhesive 251-1 is applied not only to the top surfaces of the convex portions but also across the top surfaces of each FPC cable.

[0075] Alternatively, three FPC cables 240-1, 240-2, and 240-3 can be wired as shown in FIG. 1B. In this case, the FPC cables 240-1, 240-2, and 240-3 are pulled out, for example, in the east, west, and north directions. No convex portions are formed at the locations where they are pulled out. FIG. 1A is a top view before adhesive 251-1 is applied to the top surface of each FPC cable, and adhesive 251-1 is applied only to the locations where convex portions are to be formed. In a subsequent process, adhesive 251-1 is applied not only to the top surfaces of the convex portions, but also across the top surfaces of each FPC cable.

[0076] Alternatively, as illustrated in FIG. 9, four FPC cables 240-1, 240-2, 240-3, and 240-4 can be wired. In this case, the FPC cables 240-1, 240-2, 240-3, and 240-4 are pulled out, for example, in the east, west, north, and south directions. No convex portions are formed at the locations where they are pulled out. This figure is a top view before adhesive 251-1 is applied to the top surface of each FPC cable, and adhesive 251-1 is applied only to the locations where convex portions are to be formed. In a subsequent process, adhesive 251-1 is applied not only to the top surfaces of the convex portions, but also across the top surface of each FPC cable.

[0077] 10 is a flowchart showing an example of a manufacturing process of the optical package according to the first embodiment of the present technology. First, the interposer substrate 220 is supported by the jig tool 410 (step S901).

[0078] Then, the semiconductor chip 231 is die-bonded (step S902), the ACF 251-2 is attached around the bumps 235, and the adhesive 251-1 is applied to the area where the FPC cable 240 is drawn out (step S903).

[0079] Then, the FPC cable 240 is ACF-connected to the semiconductor chip 231 and the interposer substrate 220, and wires are wire-bonded (step S904).

[0080] An adhesive 251-1 is applied to the protrusions and the upper surface of the FPC cable 240 along the outer periphery of the interposer substrate 220 (step S905), and the seal glass 210 is adhered (step S906). Then, the jig tool 410 is removed (step S907), and the manufacturing process is completed after various remaining steps.

[0081] As described above, according to the first embodiment of the present technology, the FPC cable 240 is wired such that one end is connected to the semiconductor chip 231 and the other end protrudes (is drawn out) to the outside, thereby suppressing an increase in the size of the optical package 200. This makes it possible to easily realize an optical package capable of high-speed transmission.

[0082] 2. Second Embodiment In the first embodiment described above, an opening that does not penetrate through the interposer substrate 220 is formed, and the semiconductor chip 231 is die-bonded to the bottom surface of the opening, but this structure may result in insufficient heat dissipation performance. The optical package 200 in this second embodiment differs from the first embodiment in that the opening is penetrated and is blocked with a heat dissipation member.

[0083] 11 is an example of a cross-sectional view of an optical package 200 according to a second embodiment of the present technology. The optical package 200 according to the second embodiment further includes a heat sink 260. An opening penetrating the interposer substrate 220 is formed therein, and the heat sink 260 closes the opening. The semiconductor chip 231 is die-bonded to an upper surface of the heat sink 260. The heat sink 260 is an example of a heat dissipation member as defined in the claims.

[0084] As shown in the figure, by penetrating the opening and covering it with a heat sink 260, the semiconductor chip 231 can be directly die-bonded to the upper surface of the heat sink 260. This improves heat dissipation performance compared to the first embodiment in which the opening is not penetrated. Note that the underside of the semiconductor chip 231 is not exposed to the outside, so there is no risk of external damage.

[0085] In this way, according to the second embodiment of the present technology, the opening is penetrated and the opening is blocked by the heat sink 260, so that the semiconductor chip 231 can be directly die-bonded to the upper surface of the heat sink 260, thereby improving heat dissipation performance.

[0086] 3. Third Embodiment In the first embodiment described above, the FPC cable 240 was pulled out through an area where no convex portions were formed, but this FPC cable 240 uses polyimide or the like, which may result in poor adhesion characteristics with the adhesive 251-1. In the optical package 200 of this third embodiment, an FPC cable 240 is separately prepared, with glass attached to both sides by thermocompression bonding or the like during the FPC manufacturing process. This differs from the first embodiment in that the adhesion characteristics are improved.

[0087] 12 is an example of a cross-sectional view of an optical package 200 according to the third embodiment of the present technology. The optical package 200 according to the third embodiment differs from the third embodiment in that it further includes glasses 211 and 212.

[0088] Glass 211 is disposed in an area of ​​the upper surface of FPC cable 240 where adhesive 251-1 is to be applied. Glass 212 is disposed in an area of ​​the lower surface of FPC cable 240 where adhesive 251-1 is to be applied. These glasses 211 and 212 are attached to FPC cable 240 in advance by thermocompression bonding or the like before applying adhesive 251-1. The material of glasses 211 and 212 is the same as that of seal glass 210. Attaching these glasses 211 and 212 improves adhesive properties.

[0089] The second embodiment can be applied to the third embodiment.

[0090] As described above, according to the third embodiment of the present technology, the glass sheets 211 and 212 are attached to both surfaces of the FPC cable 240, and therefore, the adhesive properties can be improved.

[0091] 4. Fourth Embodiment In the first embodiment described above, the optical package 200 is secondarily mounted using the solder connection portion 257, but is not limited to this configuration. The optical package 200 in this fourth embodiment differs from the first embodiment in that the optical package 200 is secondarily mounted using a connector.

[0092] 13A and 13B are an example of a cross-sectional view and a bottom view of an optical package 200 according to the fourth embodiment of the present technology. In the drawing, "a" shows the cross-sectional view of the optical package 200, and "b" shows the bottom view of the optical package 200.

[0093] The optical package 200 according to the fourth embodiment differs from the first embodiment in that a predetermined number of connectors 258 are provided on the underside of the optical package 200 instead of mounting lands. In addition, a predetermined number of screw holes 225 are formed between the end of the interposer substrate 220 and the connectors 258.

[0094] 14 is a cross-sectional view showing an example of secondary mounting of the optical package 200 according to the fourth embodiment of the present technology. As shown in the figure, the optical package 200 is electrically connected to a secondary mounting substrate 310 by a connector 258. Furthermore, the interposer substrate 220 is screwed to the housing 110 by a predetermined number of screws 330.

[0095] 15A and 15B, the second embodiment in which the semiconductor chip 231 is directly die-bonded to the heat sink 260 can be applied to the fourth embodiment. Also, the third embodiment can be applied to the fourth embodiment.

[0096] As described above, according to the fourth embodiment of the present technology, the connector 258 is provided on the lower surface of the optical package 200, so soldering is not required during secondary mounting.

[0097] 5. Fifth Embodiment In the first embodiment described above, the FPC cable 240 is used as the high-speed transmission line, but it is preferable to improve the transmission speed. The optical package 200 in this fifth embodiment differs from the first embodiment in that an optical waveguide is used instead of the FPC cable 240.

[0098] 16 is an example of a cross-sectional view of an optical package 200 according to the fifth embodiment of the present technology. This optical package 200 differs from the first embodiment in that it includes an optical waveguide 289 instead of the FPC cable 240.

[0099] The optical waveguide 289 includes a predetermined number of optical wirings. One end of the optical waveguide 289 is connected to the semiconductor chip 231, and the other end protrudes (is drawn out) to the outside of the hollow portion. The semiconductor chip 231 has a built-in electrical-optical conversion circuit that converts electrical signals into optical signals and vice versa, and transmits and receives optical signals via the optical waveguide 289. The optical wiring enables a higher transmission speed than when the FPC cable 240 is used.

[0100] It should be noted that the second, third, and fourth embodiments can be applied to the fifth embodiment.

[0101] Thus, according to the fifth embodiment of the present technology, an optical waveguide 289 is wired, one end of which is connected to the semiconductor chip 231 and the other end of which protrudes (is pulled out) to the outside, thereby improving the transmission speed.

[0102] 6. Sixth Embodiment In the first embodiment described above, the semiconductor chip 231 and the interposer substrate 220 are electrically connected by the wires 255, but it is preferable to improve the degree of design freedom. The optical package 200 in this sixth embodiment differs from the first embodiment in that the semiconductor chip 231 and the interposer substrate 220 are electrically connected by a silicon bridge chip.

[0103] 17A and 17B are an example of a cross-sectional view and a top view of an optical package 200 according to the sixth embodiment of the present technology. In the drawing, "a" is an example of a cross-sectional view of the optical package 200, and "b" is an example of a top view of the optical package 200.

[0104] The optical package 200 in the sixth embodiment differs from the first embodiment in that the semiconductor chip 231 and the interposer substrate 220 are electrically connected by silicon bridge chips 271, 272, and 273 instead of wires 255. Bumps on the undersides of the silicon bridge chips 271, 272, and 273 are connected to the semiconductor chip 231 and the interposer substrate 220. This bump connection allows the terminals of the semiconductor chip 231 to be taken out at a narrower pitch than when wire bonding is used. This improves the design flexibility for the number of terminals.

[0105] As shown in Fig. 1B, the western, northern and southern regions of the semiconductor chip 231 are connected to silicon bridge chips 271, 272 and 273. The dotted circles in Fig. 1B indicate the positions of the bumps.

[0106] It is also possible to combine connections using silicon bridge chips and wire bonding.

[0107] In addition, in FIG. 1B, the planar shapes of the silicon bridge chips 271, 272, and 273 are rectangular when viewed from the Z-axis (i.e., optical axis) direction, but are not limited to this shape.

[0108] 18A, the silicon bridge chip 273 may be T-shaped. This shape is used when the pitch of the bumps on the semiconductor chip 231 is narrower than the pitch of the bumps on the interposer substrate 220. Alternatively, the silicon bridge chip 273 may be U-shaped, as shown in FIG. 18B.

[0109] FIG. 19 is a cross-sectional view showing a secondary mounting example of the optical package 200 according to the sixth embodiment of the present technology.

[0110] The optical package 200 according to the sixth embodiment is electrically connected to a secondary mounting substrate 310 by solder joints 257, as shown in FIG.

[0111] Alternatively, as illustrated in FIG. 1B, the optical package 200 is fastened to the housing 110 by screws 330 and electrically connected to the secondary mounting substrate 310 by a connector 258 .

[0112] 20 and 21, a method for manufacturing the optical package 200 will be described. First, the interposer substrate 220 is supported by a jig 410 as shown in Fig. 20a, and the semiconductor chip 231 is die-bonded as shown in Fig. 20b.

[0113] Then, as shown in Fig. 1C, ACF 251-2 is attached to the connection points of the silicon bridge chip, and as shown in Fig. 1D, the silicon bridge chip 271 is ACF-connected. Silicon bridge chips 272 and 273 are similarly ACF-connected.

[0114] Then, as shown in FIG. 21a, an ACF 251-2 is attached to the connection portion of the FPC cable 240, and the FPC cable 240 is connected to the ACF as shown in FIG. 21b.

[0115] Then, as shown in FIG. 1C, adhesive 251-1 is applied to the protrusions and the upper surface of the FPC cable 240 along the outer periphery of the interposer substrate 220, and the seal glass 210 is adhered as shown in FIG. 1D.

[0116] It should be noted that each of the first to fifth embodiments can be applied to the sixth embodiment.

[0117] As described above, according to the sixth embodiment of the present technology, the semiconductor chip 231 and the interposer substrate 220 are electrically connected by the silicon bridge chips 271, 272, and 273, thereby improving the degree of freedom in design.

[0118] [First Modification] According to the sixth embodiment described above, the semiconductor chip 231 and the interposer substrate 220 are connected by a silicon bridge chip, but incident light is reflected on the surface of the silicon bridge chip, and this reflection may cause flare. The optical package 200 in this first modification of the sixth embodiment differs from the sixth embodiment in that the surface of the silicon bridge chip is covered with a light-shielding member.

[0119] 22A and 22B are an example of a cross-sectional view and a top view of an optical package 200 according to a first modified example of the sixth embodiment of the present technology. In the drawing, "a" is an example of a cross-sectional view of the optical package 200, and "b" is an example of a top view of the optical package 200.

[0120] The optical package 200 in the first modified example of the sixth embodiment differs from the sixth embodiment in that at least a portion of the surface of each of the silicon bridge chips 271, 272, and 273 is covered with a light-shielding member 279. A light-shielding resin or a light-shielding tape is used as the light-shielding member 279. In addition, the top and side surfaces of the silicon bridge chips 271, 272, and 273 are covered with the light-shielding member 279. This reduces reflection on the surface of the silicon bridge chip 271, etc., and suppresses flare.

[0121] It is also possible to cover not the entire surface of the silicon bridge chip but only a part of it (such as only the area adjacent to the semiconductor chip 231) with the light-shielding member 279.

[0122] In the first modification of the sixth embodiment, the manufacturing process up to the connection of the silicon bridge chip is the same as that of the sixth embodiment illustrated in FIG.

[0123] As shown in FIG. 23a, after the silicon bridge chip is connected, an ACF 251-2 is attached to the connection portion of the FPC cable 240, and the FPC cable 240 is connected to the ACF as shown in FIG. 23b.

[0124] Then, as shown in c in the figure, the surface of the silicon bridge chip is covered with a light-shielding member 279, and adhesive 251-1 is applied to the convex portion and the upper surface of the FPC cable 240 along the outer periphery of the interposer substrate 220. Then, as shown in d in the figure, the seal glass 210 is adhered.

[0125] Although the silicon bridge chip is covered with the light-shielding member 279 after being connected with the ACF, the silicon bridge chip may be covered with the light-shielding member 279 in advance before being connected with the ACF.

[0126] It should be noted that each of the second to fifth embodiments can be applied to the first modified example of the sixth embodiment.

[0127] As described above, according to the first modified example of the sixth embodiment of the present technology, the surface of the silicon bridge chip is covered with the light blocking member 279, so that flare due to reflection on the surface can be suppressed.

[0128] [Second Modification] In the sixth embodiment described above, the FPC cable 240 is used as the high-speed transmission line, but it is preferable to improve the transmission speed. The optical package 200 in this second modification of the sixth embodiment differs from the sixth embodiment in that an optical waveguide is used instead of the FPC cable 240.

[0129] 24A and 24B are an example of a cross-sectional view and a top view of an optical package 200 according to a second modified example of the sixth embodiment of the technology. In the figure, "a" is an example of a cross-sectional view of the optical package 200, and "b" is an example of a top view of the optical package 200.

[0130] In the second modification of the sixth embodiment, the north, south, and west sides of the semiconductor chip 231 are connected to the interposer substrate 220 by a predetermined number of wires 255. Meanwhile, the east side of the semiconductor chip 231 and the interposer substrate 220 are electrically connected by an electrical-optical conversion chip 281. Note that at least a portion of the north, south, and west sides of the semiconductor chip 231 can also be connected by silicon bridge chips 271, 272, and 273.

[0131] The electrical-optical conversion chip 281 converts electrical signals into optical signals and vice versa. Instead of the FPC cable 240, an optical waveguide 289 including a predetermined number of optical wirings is used. One end of the optical waveguide 289 is connected to the electrical-optical conversion chip 281, and the other end protrudes to the outside (in other words, is drawn out). In this way, the optical waveguide 289 is connected to the semiconductor chip 231 via the electrical-optical conversion chip 281. The optical wiring allows for a higher transmission speed than when the FPC cable 240 is used.

[0132] The electrical-optical conversion chip 281 is an example of a silicon bridge chip described in the claims.

[0133] 25 is an example of a cross-sectional view of an electrical-optical conversion chip 281 according to a second modified example of the sixth embodiment of the present technology. The electrical-optical conversion chip 281 includes a silicon optical waveguide 281-1, a wiring layer 281-2, a plurality of pads 281-3, a plurality of bumps 281-4, and a plurality of micromirrors 281-5.

[0134] The pads 281-3 are arranged on the lower surface of the electrical-optical conversion chip 281. Bumps 281-4 are provided on each of the pads 281-3 and are connected to the semiconductor chip 231 or the interposer substrate 220.

[0135] The silicon optical waveguide 281-1 is connected to a pad 281-3 via a wiring layer 281-2. Furthermore, the light is bent by a plurality of micromirrors 281-5, and light from one of the silicon optical waveguide 281-1 and the optical waveguide 289 is guided to the other.

[0136] 26 and 27, a method for manufacturing the optical package 200 will be described. First, the interposer substrate 220 is supported by a jig 410 as shown in Fig. 26a, and the semiconductor chip 231 is die-bonded as shown in Fig. 26b.

[0137] Then, as shown in c in the figure, an ACF 251-2 is attached to the electrical-optical conversion chip 281, and adhesive 251-1 is applied to the connection points of the optical waveguide 289. Then, as shown in d in the figure, the electrical-optical conversion chip 281 is connected to the ACF.

[0138] Then, as illustrated in Figure 27, the semiconductor chip 231 and the interposer substrate 220 are wire-bonded, and adhesive 251-1 is applied to the convex portion and the upper surface of the FPC cable 240 along the outer periphery of the interposer substrate 220, as illustrated in b in the same figure.

[0139] Then, as shown in FIG. 1C, a seal glass 210 is adhered to seal the hollow portion.

[0140] It should be noted that each of the second to fifth embodiments can be applied to the second modified example of the sixth embodiment.

[0141] Moreover, the first modified example of the sixth embodiment can be applied to the second modified example of the sixth embodiment.

[0142] 28A and 28B are examples of a cross-sectional view and a top view of an optical package in which the first modified example of the sixth embodiment of the present technology is applied to the second modified example of the sixth embodiment of the present technology, where a in the figure is an example of a cross-sectional view of the optical package 200, and b in the figure is an example of a top view of the optical package 200.

[0143] As illustrated in a and b in the figure, the surface of the electrical-optical conversion chip 281 is covered with a light-shielding member 279. In this case, the same steps as those illustrated in FIG.

[0144] 29A, the semiconductor chip 231 and the interposer substrate 220 are wire-bonded, and as shown in FIG. 29B, the surface of the electrical-optical conversion chip 281 is covered with a light-shielding member 279. Also, adhesive 251-1 is applied to the protrusions and the upper surface of the FPC cable 240 along the outer periphery of the interposer substrate 220. Then, as shown in FIG. 29C, a seal glass 210 is adhered to seal the hollow portion.

[0145] Thus, according to the second variant of the sixth embodiment of the present technology, an optical waveguide 289 is wired, one end of which is connected to the semiconductor chip 231 via the electrical-optical conversion chip 281 and the other end of which protrudes (is pulled out) to the outside, thereby improving the transmission speed.

[0146] [Third Modification] In the sixth embodiment described above, only the semiconductor chip 231 is arranged in the optical package 200, but multiple semiconductor chips may also be arranged. The optical package 200 in this third modification of the sixth embodiment differs from the sixth embodiment in that multiple semiconductor chips are arranged and these chips are connected to each other and to the chip and interposer substrate 220 by a silicon bridge chip.

[0147] 30A and 30B are an example of a cross-sectional view and a top view of an optical package 200 according to a third modified example of the sixth embodiment of the present technology. In the drawing, "a" is an example of a cross-sectional view of the optical package 200, and "b" is an example of a top view of the optical package 200.

[0148] As illustrated in FIG. 11A, in the third modified example of the sixth embodiment, a semiconductor chip 232 is further disposed. These semiconductor chips 231 and 232 are die-bonded to the bottom surface of the opening of the interposer substrate 220.

[0149] The semiconductor chip 231 has, for example, a CIS function. The semiconductor chip 232 performs various signal processing, such as image recognition, on the image data from the semiconductor chip 231.

[0150] As illustrated in FIG. 1B, the west, north, and south sides of the semiconductor chip 232 are electrically connected to the interposer substrate 220 by silicon bridge chips 271, 272, and 273. The east side of the semiconductor chip 232 is electrically connected to the west side of the semiconductor chip 231 by a silicon bridge chip 274. The north and south sides of the semiconductor chip 231 are electrically connected to the interposer substrate 220 by silicon bridge chips 275 and 276. The east side of the semiconductor chip 231 is connected to one end of the FPC cable 240. This type of structure is called a SiP (System in Package) structure.

[0151] The semiconductor chips 231 and 232 are examples of the first and second semiconductor chips set forth in the claims. The silicon bridge chips 275 and 276 are examples of the first silicon bridge chip set forth in the claims, the silicon bridge chips 271, 272, and 273 are examples of the second silicon bridge chip set forth in the claims, and the silicon bridge chip 274 is an example of the third silicon bridge chip set forth in the claims.

[0152] As in the sixth embodiment, the bump connection allows the terminals of the semiconductor chip 231 to be taken out at a narrower pitch than when wire bonding is used, thereby improving the degree of freedom in designing the number of terminals.

[0153] Furthermore, by mounting a plurality of semiconductor chips such as the semiconductor chips 231 and 232, the functionality of the optical package 200 can be improved.

[0154] Although two semiconductor chips 231 and 232 are provided, three or more semiconductor chips may be provided within the optical package 200 .

[0155] 31 is an example of a cross-sectional view of a silicon bridge chip 271 according to a third modified example of the sixth embodiment of the present technology. The silicon bridge chip 271 is provided with a wiring layer 271-1, a plurality of pads 271-2, and a plurality of bumps 271-3.

[0156] The pads 271-2 are arranged on the lower surface of the silicon bridge chip 271. Bumps 271-3 are provided on each of the pads 271-2 and are connected to the semiconductor chip 232 or the interposer substrate 220. The pads 271-2 are also connected to wiring within the wiring layer 271-1.

[0157] Next, a method for manufacturing the optical package 200 will be described with reference to Figures 32 and 33. First, the interposer substrate 220 is supported by a jig 410 as shown in Figure 32(a), and the semiconductor chips 231 and 232 are die-bonded to the interposer substrate 220 as shown in Figure 32(b).

[0158] Then, as shown in c in the figure, ACF 251-2 is attached to the connection points between the semiconductor chips 231 and 232 and the interposer substrate 220. Then, as shown in d in the figure, silicon bridge chips 271 and 274 are ACF-connected. The other silicon bridge chips are similarly ACF-connected.

[0159] Then, as shown in FIG. 33A, an ACF 251-2 is attached to the connection portion of the FPC cable 240, and the FPC cable 240 is connected to the ACF as shown in FIG. 33B.

[0160] Then, as illustrated in c in the figure, adhesive 251-1 is applied to the protrusions and the upper surface of the FPC cable 240 along the outer periphery of the interposer substrate 220. Then, as illustrated in d in the figure, seal glass 210 is adhered to seal the hollow portion.

[0161] It should be noted that each of the second to fifth embodiments can be applied to the third modified example of the sixth embodiment.

[0162] Moreover, the first modified example of the sixth embodiment can be applied to the third modified example of the sixth embodiment.

[0163] 34A and 34B are examples of a cross-sectional view and a top view of an optical package in which the first modified example of the sixth embodiment of the present technology is applied to the third modified example of the sixth embodiment of the present technology, where "a" in the figure is an example of a cross-sectional view of the optical package 200, and "b" in the figure is an example of a top view of the optical package 200.

[0164] As shown in a and b in the figure, the surface of the electrical-optical conversion chip 281 is covered with a light-shielding member 279. In this case, the same steps as those shown in FIG.

[0165] Then, as shown in FIG. 35A, an ACF 251-2 is attached to the connection portion of the FPC cable 240, and the FPC cable 240 is connected to the ACF as shown in FIG. 35B.

[0166] Then, as shown in FIG. 1C, the surfaces of the silicon bridge chips 271 to 276 are covered with a light-shielding member 279. Also, adhesive 251-1 is applied to the convex portions and the upper surface of the FPC cable 240 along the outer periphery of the interposer substrate 220. Then, as shown in FIG. 1D, a seal glass 210 is adhered to seal the hollow portion.

[0167] Thus, according to the third variant of the sixth embodiment of the present technology, the semiconductor chips 231 and 232 are connected to the interposer substrate 220 by a silicon bridge chip, thereby improving design freedom and functionality.

[0168] 7. Seventh Embodiment In the first embodiment described above, FPC cable 240 is wired with one end connected to semiconductor chip 231 and the other end protruding (pulled out) to the outside, but incident light is reflected on the surface of FPC cable 240, and this reflection may cause flare. Optical package 200 in this seventh embodiment differs from the first embodiment in that the surface of FPC cable 240 is covered with an anti-reflection material.

[0169] 36A and 36B are examples of a cross-sectional view and a bottom view of an optical package 200 according to the seventh embodiment of the present technology. In the drawing, "a" shows the cross-sectional view of the optical package 200, and "b" shows the bottom view of the optical package 200.

[0170] The optical package 200 according to the seventh embodiment differs from the first embodiment in that at least a portion of the surface of the FPC cable 240 is covered with an anti-reflection material 290 .

[0171] For example, as illustrated in a and b in the figure, only the area inside the hollow portion of the upper surface of the FPC cable 240 is covered with the anti-reflection material 290 .

[0172] Alternatively, as illustrated in FIG. 37, the entire upper surface of the FPC cable 240 is covered with an anti-reflection material 290 .

[0173] The anti-reflection material 290 may be a black cover film, an anti-reflection film, a black resin, or the like.

[0174] It is also possible to provide an anti-reflection treatment (such as a chevron pattern) on at least a part of the surface of the FPC cable 240 without providing the anti-reflection material 290 .

[0175] The above-described anti-reflection material 290 or anti-reflection treatment can suppress reflections on the surface of the FPC cable 240 .

[0176] 38, the top surface of the FPC cable 240 can be covered with an anti-reflection material 290, and the end surface can also be anti-reflection processed. This can further suppress reflection at the end surface. In the same figure, the top surface of the FPC cable 240 can also be anti-reflection processed. In the same figure, the end surface can also be covered with the anti-reflection material 290.

[0177] In the seventh embodiment, the same steps as those illustrated in FIG. 6 are carried out during manufacturing.

[0178] 39A, at least a portion of the surface of the FPC cable 240 is covered with an anti-reflection material 290. Also, an adhesive 251-1 is applied to the protrusions and the upper surface of the FPC cable 240 along the outer periphery of the interposer substrate 220.

[0179] Then, as shown in FIG. 1B, the seal glass 210 is adhered to seal the hollow portion, and the jig tool 410 is removed as shown in FIG.

[0180] It should be noted that each of the first to sixth embodiments and their respective modifications can be applied to the seventh embodiment.

[0181] As described above, according to the seventh embodiment of the present technology, at least a portion of the surface of the FPC cable 240 is covered with the anti-reflection material 290, so that reflection on the surface can be suppressed.

[0182] 8. Eighth Embodiment In the first embodiment described above, an FPC cable 240 is wired, one end of which is connected to the semiconductor chip 231 and the other end of which protrudes (is drawn out) to the outside, but it is preferable to improve the heat dissipation performance of this FPC cable 240. The optical package 200 in the eighth embodiment differs from the first embodiment in that a heat dissipation member is attached to at least one of both surfaces of the FPC cable 240.

[0183] 40 is an example of a cross-sectional view and a bottom view of an optical package 200 according to the eighth embodiment of the present technology. In the drawing, "a" shows the cross-sectional view of the optical package 200, and "b" shows the bottom view of the optical package 200.

[0184] The optical package 200 in the seventh embodiment differs from the first embodiment in that a heat sink 295 is attached to one of the upper and lower surfaces (the upper surface) of the FPC cable 240. The heat sink 295 may be, for example, a metal plate (aluminum, stainless steel, etc.), a heat dissipation sheet (graphite sheet, etc.), or a conductive film (thickened copper foil, etc.).

[0185] As shown in FIG. 41, heat sinks 295 may be attached to both the upper and lower surfaces of the FPC cable 240 .

[0186] By attaching the heat sink 295, the heat dissipation performance of the FPC cable 240 can be improved.

[0187] In addition, from the viewpoint of suppressing flare, it is preferable that at least a portion of the heat sink 295 on the upper surface side is covered with an anti-reflection material 290 or subjected to an anti-reflection treatment.

[0188] Furthermore, each of the first to sixth embodiments can be applied to the eighth embodiment.

[0189] As described above, according to the eighth embodiment of the present technology, since the heat dissipation member is attached to at least one of both surfaces of the FPC cable 240, the heat dissipation performance of the FPC cable 240 can be improved.

[0190] 9. Application Examples to Mobile Bodies The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure may be realized as a device mounted on any type of mobile body, such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, personal mobility, an airplane, a drone, a ship, or a robot.

[0191] FIG. 42 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a mobile object control system to which the technology according to the present disclosure can be applied.

[0192] The vehicle control system 12000 includes a plurality of electronic control units connected via a communication network 12001. In the example shown in Fig. 42, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an outside-vehicle information detection unit 12030, an inside-vehicle information detection unit 12040, and an integrated control unit 12050. Also shown as functional components of the integrated control unit 12050 are a microcomputer 12051, an audio / video output unit 12052, and an in-vehicle network I / F (Interface) 12053.

[0193] The drivetrain control unit 12010 controls the operation of devices related to the drivetrain of the vehicle in accordance with various programs. For example, the drivetrain control unit 12010 functions as a control device for a drive force generating device for generating a drive force of the vehicle, such as an internal combustion engine or a drive motor, a drive force transmission mechanism for transmitting the drive force to the wheels, a steering mechanism for adjusting the steering angle of the vehicle, and a braking device for generating a braking force of the vehicle.

[0194] The body system control unit 12020 controls the operation of various devices equipped in the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window device, or various lamps such as headlamps, backup lamps, brake lamps, turn signals, and fog lamps. In this case, radio waves transmitted from a portable device that serves as a key or signals from various switches can be input to the body system control unit 12020. The body system control unit 12020 receives these radio waves or signals and controls the vehicle's door lock device, power window device, lamps, etc.

[0195] The outside-vehicle information detection unit 12030 detects information outside the vehicle equipped with the vehicle control system 12000. For example, an imaging unit 12031 is connected to the outside-vehicle information detection unit 12030. The outside-vehicle information detection unit 12030 causes the imaging unit 12031 to capture images outside the vehicle and receives the captured images. The outside-vehicle information detection unit 12030 may perform object detection processing or distance detection processing for people, cars, obstacles, signs, characters on the road surface, etc. based on the received images.

[0196] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal corresponding to the amount of light received. The imaging unit 12031 can output the electrical signal as an image or as distance measurement information. The light received by the imaging unit 12031 may be visible light or invisible light such as infrared light.

[0197] The in-vehicle information detection unit 12040 detects information inside the vehicle. For example, a driver state detection unit 12041 that detects the state of the driver is connected to the in-vehicle information detection unit 12040. The driver state detection unit 12041 includes, for example, a camera that captures an image of the driver, and the in-vehicle information detection unit 12040 may calculate the degree of fatigue or concentration of the driver based on the detection information input from the driver state detection unit 12041, or may determine whether the driver is dozing off.

[0198] The microcomputer 12051 can calculate control target values ​​for the driving force generating device, steering mechanism, or braking device based on the information inside and outside the vehicle acquired by the outside-vehicle information detection unit 12030 or the inside-vehicle information detection unit 12040, and output control commands to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control aimed at realizing the functions of an ADAS (Advanced Driver Assistance System), including vehicle collision avoidance or impact mitigation, following driving based on the distance between vehicles, maintaining vehicle speed, vehicle collision warning, vehicle lane departure warning, etc.

[0199] In addition, the microcomputer 12051 can perform cooperative control for the purpose of autonomous driving, which allows the vehicle to travel autonomously without relying on driver operation, by controlling the driving force generating device, steering mechanism, braking device, etc. based on information about the surroundings of the vehicle obtained by the outside vehicle information detection unit 12030 or the inside vehicle information detection unit 12040.

[0200] Furthermore, the microcomputer 12051 can output a control command to the body system control unit 12020 based on the information outside the vehicle acquired by the outside information detection unit 12030. For example, the microcomputer 12051 can control the headlamps according to the position of a preceding vehicle or an oncoming vehicle detected by the outside information detection unit 12030, and perform cooperative control aimed at preventing glare, such as switching from high beams to low beams.

[0201] The audio / video output unit 12052 transmits at least one output signal of audio and / or video to an output device capable of visually or audibly notifying information to vehicle occupants or the outside of the vehicle. In the example of Fig. 42, the output devices are exemplified by an audio speaker 12061, a display unit 12062, and an instrument panel 12063. The display unit 12062 may include, for example, at least one of an on-board display and a head-up display.

[0202] FIG. 43 is a diagram showing an example of the installation position of the imaging unit 12031.

[0203] In FIG. 43, the imaging unit 12031 includes imaging units 12101, 12102, 12103, 12104, and 12105.

[0204] The imaging units 12101, 12102, 12103, 12104, and 12105 are provided, for example, at positions such as the front nose, side mirrors, rear bumper, back door, and the top of the windshield inside the vehicle cabin of the vehicle 12100. The imaging unit 12101 provided on the front nose and the imaging unit 12105 provided on the top of the windshield inside the vehicle cabin mainly acquire images of the front of the vehicle 12100. The imaging units 12102 and 12103 provided on the side mirrors mainly acquire images of the sides of the vehicle 12100. The imaging unit 12104 provided on the rear bumper or back door mainly acquires images of the rear of the vehicle 12100. The imaging unit 12105 provided on the top of the windshield inside the vehicle cabin is mainly used to detect preceding vehicles, pedestrians, obstacles, traffic lights, traffic signs, lanes, etc.

[0205] 43 shows an example of the imaging ranges of the imaging units 12101 to 12104. Imaging range 12111 indicates the imaging range of the imaging unit 12101 provided on the front nose, imaging ranges 12112 and 12113 indicate the imaging ranges of the imaging units 12102 and 12103 provided on the side mirrors, respectively, and imaging range 12114 indicates the imaging range of the imaging unit 12104 provided on the rear bumper or back door. For example, by overlaying the image data captured by the imaging units 12101 to 12104, an overhead image of the vehicle 12100 viewed from above can be obtained.

[0206] At least one of the image capturing units 12101 to 12104 may have a function of acquiring distance information. For example, at least one of the image capturing units 12101 to 12104 may be a stereo camera made up of multiple image capturing elements, or may be an image capturing element having pixels for phase difference detection.

[0207] For example, based on the distance information obtained from the imaging units 12101 to 12104, the microcomputer 12051 can calculate the distance to each three-dimensional object within the imaging ranges 12111 to 12114 and the change in this distance over time (relative speed with respect to the vehicle 12100), thereby extracting as a preceding vehicle, in particular, the three-dimensional object that is the closest three-dimensional object on the path of the vehicle 12100 and traveling in approximately the same direction as the vehicle 12100 at a predetermined speed (e.g., 0 km / h or higher). Furthermore, the microcomputer 12051 can set a vehicle-to-vehicle distance to be maintained in advance in front of the preceding vehicle, and perform automatic braking control (including follow-up stop control), automatic acceleration control (including follow-up start control), etc. In this way, cooperative control can be performed for the purpose of autonomous driving, which allows the vehicle to travel autonomously without relying on driver operation.

[0208] For example, the microcomputer 12051 classifies and extracts three-dimensional object data regarding three-dimensional objects into two-wheeled vehicles, ordinary vehicles, large vehicles, pedestrians, utility poles, and other three-dimensional objects based on distance information obtained from the imaging units 12101 to 12104, and can use the data for automatic obstacle avoidance. For example, the microcomputer 12051 distinguishes obstacles around the vehicle 12100 into obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see. The microcomputer 12051 then determines a collision risk that indicates the risk of collision with each obstacle, and when the collision risk is equal to or greater than a set value and a collision is possible, the microcomputer 12051 can provide driving assistance for collision avoidance by outputting an alarm to the driver via the audio speaker 12061 or the display unit 12062, or by performing forced deceleration or avoidance steering via the drive system control unit 12010.

[0209] At least one of the image capturing units 12101 to 12104 may be an infrared camera that detects infrared rays. For example, the microcomputer 12051 can recognize a pedestrian by determining whether a pedestrian is present in the images captured by the image capturing units 12101 to 12104. Such pedestrian recognition is performed, for example, by extracting feature points from the images captured by the image capturing units 12101 to 12104 as infrared cameras and performing pattern matching on a series of feature points that indicate the outline of an object to determine whether the object is a pedestrian. When the microcomputer 12051 determines that a pedestrian is present in the images captured by the image capturing units 12101 to 12104 and recognizes the pedestrian, the audio / image output unit 12052 controls the display unit 12062 to superimpose a rectangular outline on the recognized pedestrian for emphasis. The audio / image output unit 12052 may also control the display unit 12062 to display an icon or the like indicating the pedestrian at a desired position.

[0210] The above describes an example of a vehicle control system to which the technology according to the present disclosure can be applied. The technology according to the present disclosure can be applied to, for example, the image capture unit 12031 of the above-described configuration. Specifically, the optical package of FIG. 2 can be applied to the image capture unit 12031. By applying the technology according to the present disclosure to the image capture unit 12031, it is possible to suppress an increase in the size of the image capture unit 12031 when transmitting high-speed signals.

[0211] Note that the above-described embodiment shows an example for realizing the present technology, and the matters in the embodiment and the matters specifying the invention in the claims correspond to each other. Similarly, the matters specifying the invention in the claims and the matters in the embodiment of the present technology having the same name correspond to each other. However, the present technology is not limited to the embodiment, and can be realized by applying various modifications to the embodiment within the scope of the gist thereof.

[0212] The effects described in this specification are merely examples and are not limiting, and other effects may also be obtained.

[0213] The present technology can also be configured as follows. (1) An optical package comprising: an interposer substrate having a convex portion formed on a substrate plane along the periphery except for a partial area, and an opening formed in the area surrounded by the convex portion; a semiconductor chip disposed in the opening; and a high-speed transmission line having one end connected to the semiconductor chip and the other end protruding outside the interposer substrate via the partial area. (2) The optical package according to (1), in which a difference between a height from a predetermined reference plane to a terminal surface of the semiconductor chip and a height from the reference plane to a terminal surface of the high-speed transmission line is less than a predetermined tolerance. (3) The optical package according to (1) or (2), in which a difference between a height from a predetermined reference plane to the convex portion and a height from the reference plane to one of both surfaces of the high-speed transmission line farthest from the reference plane is less than a predetermined tolerance. (4) The optical package according to any of (1) to (3), further comprising a pair of glasses attached to both surfaces of the high-speed transmission line, respectively. (5) The optical package according to any one of (1) to (4), wherein the opening does not penetrate the interposer substrate, and the semiconductor chip is bonded to a bottom surface of the opening. (6) The optical package according to any one of (1) to (5), further comprising a heat dissipation member, wherein the opening penetrates the interposer substrate, the opening is blocked by the heat dissipation member, and the semiconductor chip is bonded to the heat dissipation member. (7) The optical package according to any one of (1) to (6), further comprising a land for mounting the interposer substrate to a mounting substrate. (8) The optical package according to any one of (1) to (6), further comprising a connector for connecting the interposer substrate to the mounting substrate. (9) The optical package according to any one of (1) to (8), wherein the high-speed transmission line is an FPC cable. (10) The optical package according to any one of (1) to (8), wherein the high-speed transmission line is an optical waveguide including optical wiring. (11) The optical package according to any one of (1) to (10), further comprising a silicon bridge chip that connects the semiconductor chip and the interposer substrate.(12) The optical package according to (11), further comprising a light-shielding member covering at least a portion of the surface of the silicon bridge chip. (13) The optical package according to (11) or (12), wherein the silicon bridge chip includes an electrical-optical conversion chip that converts between electrical signals and optical signals, the high-speed transmission line is an optical waveguide including optical wiring, and one end of the high-speed transmission line is connected to the semiconductor chip via the electrical-optical conversion chip. (14) The optical package according to (11) or (12), wherein the semiconductor chip includes first and second semiconductor chips, and the silicon bridge chip includes: a first silicon bridge chip connecting the first semiconductor chip and the interposer substrate, a second silicon bridge chip connecting the second semiconductor chip and the interposer substrate, and a third silicon bridge chip connecting the first semiconductor chip and the second semiconductor chip. (15) The optical package according to any one of (1) to (14), further comprising an anti-reflection material covering at least a portion of the surface of the high-speed transmission line. (16) The optical package according to any one of (1) to (15), wherein at least a portion of the surface of the high-speed transmission line is subjected to an anti-reflection treatment. (17) The optical package according to any one of (1) to (15), further comprising a heat sink attached to at least one of both surfaces of the high-speed transmission line. (18) A module comprising: an interposer substrate having a convex portion formed on a substrate surface along the periphery except for a partial area, and an opening formed in an area surrounded by the convex portion; a semiconductor chip placed in the opening; a high-speed transmission line having one end connected to the semiconductor chip and the other end protruding outside the interposer substrate via the partial area; and a mounting substrate connected to the other end of the high-speed transmission line. (19) A method for manufacturing an optical package, comprising the steps of: placing a semiconductor chip in the opening formed in the substrate plane of an interposer substrate; applying adhesive to the outer periphery of the substrate plane; and connecting one end of a high-speed transmission line, the other end of which protrudes outside the interposer substrate, to the semiconductor chip.

[0214] 100 Camera module 110 Housing 121 to 123 Mounting board 130 Heat dissipation block 141, 142, 240, 240-1, 240-2, 240-3, 240-4 FPC cable 143 External connection terminal 144 FPGA 145 TIM material 150 Heat dissipation fan 200 Optical package 210 Seal glass 211, 212 Glass 220 Interposer board 221 Wiring 225 Screw hole 231, 232 Semiconductor chip 235, 271-3, 281-4 Bump 241, 242 Signal line 243 FPC board 244 Signal line 245, 246 Ground line 247, 248 Ground pattern 251-1, 252 Adhesive 251-2 ACF 255 Wire 256 Land 257 Solder connection portion 258 Connector 260, 320 Heat sink 271 to 276 Silicon bridge chip 271-1, 281-2 Wiring layer 271-2, 281-3 Pad 279 Light shielding member 281 Electrical-optical conversion chip 281-1 Silicon optical waveguide 281-5 Micromirror 289 Optical waveguide 290 Anti-reflection material 295 Heat sink 310 Secondary mounting board 330 Screw 410 Jig 420 Wire bonding jig 430 ACF jig 12031 Imaging unit

Claims

1. An optical package comprising: an interposer substrate having a convex portion formed on the substrate plane along the periphery except for a partial area, and an opening formed in the area surrounded by said convex portion; a semiconductor chip placed in said opening; and a high-speed transmission line having one end connected to said semiconductor chip and the other end protruding outside said interposer substrate via said partial area.

2. The optical package according to claim 1, wherein the difference between the height from a predetermined reference plane to the terminal surface of said semiconductor chip and the height from said reference plane to the terminal surface of said high-speed transmission line is less than a predetermined tolerance.

3. The optical package according to claim 1, wherein the difference between the height from a predetermined reference plane to said convex portion and the height from said reference plane to the farthest of both faces of said high-speed transmission line from said reference plane is less than a predetermined tolerance.

4. The optical package according to claim 1, further comprising a pair of glasses attached to both sides of said high-speed transmission line.

5. The optical package according to claim 1, wherein the opening does not penetrate through the interposer substrate, and the semiconductor chip is bonded to the bottom surface of the opening.

6. The optical package according to claim 1, further comprising a heat dissipation member, wherein the opening penetrates the interposer substrate, the opening is closed by the heat dissipation member, and the semiconductor chip is bonded to the heat dissipation member.

7. The optical package according to claim 1, further comprising lands for mounting the interposer substrate to a mounting substrate.

8. The optical package according to claim 1, further comprising a connector for connecting the interposer substrate to a mounting substrate.

9. The optical package according to claim 1, wherein the high-speed transmission line is an FPC (Flexible Printed Circuits) cable.

10. The optical package according to claim 1, wherein the high-speed transmission line is an optical waveguide including optical wiring.

11. The optical package according to claim 1, further comprising a silicon bridge chip connecting said semiconductor chip and said interposer substrate.

12. The optical package according to claim 11, further comprising a light-shielding member covering at least a portion of the surface of said silicon bridge chip.

13. The optical package according to claim 11, wherein the silicon bridge chip includes an electrical-optical conversion chip that converts between electrical signals and optical signals, the high-speed transmission line is an optical waveguide including optical wiring, and one end of the high-speed transmission line is connected to the semiconductor chip via the electrical-optical conversion chip.

14. The optical package according to claim 11, wherein the semiconductor chips include first and second semiconductor chips, and the silicon bridge chips include: a first silicon bridge chip connecting the first semiconductor chip to the interposer substrate, a second silicon bridge chip connecting the second semiconductor chip to the interposer substrate, and a third silicon bridge chip connecting the first semiconductor chip to the second semiconductor chip.

15. The optical package according to claim 1, further comprising an anti-reflective material covering at least a portion of the surface of said high-speed transmission line.

16. The optical package according to claim 1, wherein at least a portion of the surface of the high-speed transmission line is subjected to an anti-reflection treatment.

17. The optical package according to claim 1, further comprising a heat dissipation member attached to at least one of both surfaces of said high-speed transmission line.

18. A module comprising: an interposer substrate having a convex portion formed on the substrate plane along the periphery except for a partial area, and an opening formed in the area surrounded by the convex portion; a semiconductor chip placed in the opening; a high-speed transmission line having one end connected to the semiconductor chip and the other end protruding outside the interposer substrate via the partial area; and a mounting substrate connected to the other end of the high-speed transmission line.

19. A method for manufacturing an optical package, comprising the steps of: placing a semiconductor chip in an opening formed in an area surrounded by a convex portion on the substrate plane of an interposer substrate, the area being surrounded by the convex portion except for a portion of the substrate plane; applying adhesive to the periphery of the substrate plane; and connecting one end of a high-speed transmission line, the other end of which protrudes outside the interposer substrate, to the semiconductor chip.

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