Photoresist smoothening and protection

Abstract

Methods and apparatuses for depositing a material onto a patterned photoresist material are provided herein. Methods include exposing the patterned photoresist material to a carbon-containing deposition precursor gas and an oxygen-containing passivation gas in a plasma environment, followed by trimming using an optional oxygen-containing etching plasma.

Description

PHOTORESIST SMOOTHENING AND PROTECTIONINCORPORATION BY REFERENCE

[0000] A PCT Request Form is filed concurrently with this specification as part of the present application. Each application that the present application claims benefit of or priority to as identified in the concurrently filed PCT Request Form is incorporated by reference herein in their entireties and for all purposes.BACKGROUND

[0001] Semiconductor processing methods and apparatuses may involve formation of photoresist material. As devices shrink, it becomes challenging to maintain certain critical dimension between patterned photoresist regions across a wafer.

[0002] The background description provided herein is for the purposes of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent it is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.SUMMARY

[0003] One aspect involves a method for processing substrates, the method including: providing a patterned substrate to a process chamber, the patterned substrate having a carbon-containing feature thereon; flowing one or more gases to the process chamber to expose the patterned substrate to the one or more gases in a plasma environment to form a material over the carbon-containing feature; and after flowing the one or more gases, flowing an etching gas to the process chamber in the plasma environment to remove some of the material over the carbon-containing feature while some of the material remains on the carbon-containing feature.

[0004] In various embodiments, the one or more gases includes a deposition precursor gas and a passivation gas.

[0005] In various embodiments, the one or more gases further includes one or more inert gases.

[0006] In various embodiments, the method also includes modulating a ratio of a flow rate of the deposition precursor gas to a flow rate of the passivation gas. For example in some embodiments, the ratio is about 3:1 to about 2:1.

[0007] In various embodiments, the method also includes modulating a flow rate of the passivation gas to control an amount of the material deposited over the carbon-containing feature.

[0008] In various embodiments, modulating reduces local critical dimension uniformity.

[0009] In various embodiments, the etching gas includes an oxygen-containing gas. In someembodiments, the oxygen-containing gas includes oxygen (O2).

[0010] In various embodiments, the method also includes modulating plasma power used to generate the plasma environment during the flowing of the one or more gases to the process chamber.

[0011] In various embodiments, the method also includes biasing the patterned substrate during at least one of flowing the one or more gases to the process chamber and flowing the etching gas.

[0012] In various embodiments, the passivation gas and the etching gas are the same.

[0013] In various embodiments, the one or more gases includes a mixture of carbon-containing gas and oxy gen-containing gas. In some embodiments, the carbon-containing gas has a chemical formula of CnHai+2, where n is an integer. In some embodiments, the carbon-containing gas is methane. In some embodiments, the oxygen-containing gas includes oxygen gas.

[0014] In various embodiments, the patterned substrate includes at least one gap having a critical dimension between two or more carbon-containing features, and whereby critical dimensions of gaps varies across a surface of the patterned substrate.

[0015] In various embodiments, prior to exposing the patterned substrate to the one or more gases, a surface of the carbon-containing feature includes at least one defect. In some embodiments, the defect is a crack, minimum roughness, or sloped sidewall.

[0016] In various embodiments, the plasma environment is generated by pulsing the plasma.

[0017] In various embodiments, the method also includes flowing an inert gas with the etching gas during flowing of the etching gas.

[0018] In various embodiments, the carbon-containing feature includes photoresist material.

[0019] Another aspect involves an apparatus for processing substrates, the apparatus including: one or more process chambers, each process chamber including a chuck; one or more gas inlets into the process chambers and associated flow-control hardware; a plasma generator; and a controller having at least one processor and a memory, whereby the at least one processor and the memory are communicatively connected with one another, the at least one processor is at least operatively connected with the flow-control hardware, and the memory stores computerexecutable instructions for controlling the at least one processor to at least control the flowcontrol hardware to: cause generation of a plasma; cause introduction of one or more gases to at least one of the one or more process chambers; and cause introduction of an etching gas to the at least one of the one or more process chambers.

[0020] These and other aspects are described further below with reference to the drawings.BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 is a process flow diagram depicting operations in a method that may beperformed in accordance with certain disclosed embodiments.

[0022] Figures 2A-2C are schematic illustrations of example substrates that may undergo operations that may be performed in accordance with certain disclosed embodiments.

[0023] Figure 3 depicts a schematic cross-sectional diagram illustrating a system for implementing techniques in accordance with disclosed embodiments.

[0024] Figure 4 depicts an embodiment of a multi-station cluster tool in accordance with disclosed embodiments.

[0025] Figure 5 is a graph depicting experimental results obtained from performing a method in accordance with certain disclosed embodiments.DETAILED DESCRIPTION

[0026] In the following description, numerous specific details are set forth to provide a thorough understanding of the presented embodiments. The disclosed embodiments may be practiced without some or all of these specific details. In other instances, well-known process operations have not been described in detail to not unnecessarily obscure the disclosed embodiments. While the disclosed embodiments will be described in conjunction with the specific embodiments, it will be understood that it is not intended to limit the disclosed embodiments. Reference is made herein in detail to specific embodiments of the disclosure. Examples of the specific embodiments are illustrated in the accompanying drawings. While the disclosure will be described in conjunction with these specific embodiments, it will be understood that it is not intended to limit the disclosure to such specific embodiments. On the contrary, it is intended to cover alternatives, modifications, and equivalents as may be included within the spirit and scope of the disclosure. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present disclosure. The present disclosure may be practiced without some or all of these specific details. In other instances, well known process operations have not been described in detail so as to not unnecessarily obscure the present disclosure. The implementations disclosed below describe deposition of a material on a substrate such as a wafer, substrate, or other work piece. The work piece may be of various shapes, sizes, and materials. In this application, the terms “semiconductor wafer,” “wafer,” “substrate,” “wafer substrate,” and “partially fabricated integrated circuit” are used interchangeably. One of ordinary skill in the art would understand that the term “partially fabricated integrated circuit” can refer to a silicon wafer during any of many stages of integrated circuit fabrication thereon. A wafer or substrate used in the semiconductor device industry typically has a diameter of 200 mm, or 300 mm, or 450 mm. Unless otherwise stated, the processing details recited herein (e.g., flow rates, power levels, etc.) are relevant for processing 300 mm diameter substrates, or for treating chambers that areconfigured to process 300 mm diameter substrates and can be scaled as appropriate for substrates or chambers of other sizes. In addition to semiconductor wafers, other work pieces that may be used implementations disclosed herein include various articles such as printed circuit boards and the like. The processes and apparatuses can be used in the fabrication of semiconductor devices, displays, LEDs, photovoltaic panels and the like.

[0027] Semiconductor fabrication processes often involve formation of a photoresist to pattern an underlying layer on a substrate or a wafer. Photoresists are often patterned to achieve a particular critical dimension (CD) between positive features on the substrate. However, as devices shrink, it becomes challenging to maintain the CD quality on whole wafer, especially given that the photoresist becomes a mask for etching underlayers and may need to maintain its CD throughout other etching operations.

[0028] For example, when the photoresist is patterned or etched, there may be roughness on the surface of the photoresist, thereby resulting in an uneven surface on the surface of the photoresist. This makes the pattern difficult to transfer smoothly to the underlayers and results in uneven CD of the pattern, which then affects the CD of the pattern transferred to underlayers which can result in low yield issues.

[0029] Provided herein are methods and apparatuses for maintaining CD of patterned photoresists. Certain disclosed embodiments involve depositing a material onto the patterned, potentially rough, patterned photoresist and trimming the material to expand the process window for forming such patterned photoresists.

[0030] Figure 1 shows an example process flow diagram depicting operations that may be performed in a method in accordance with certain disclosed embodiments. Operations in Figure 1 may be performed at a particular substrate temperature, which may be the temperature that the pedestal holding the substrate is set to. In various embodiments, the substrate or pedestal temperature is about 25°C to about 40°C. In an operation 102, a substrate having a patterned photoresist is provided to a process chamber. The substrate may be a silicon wafer, e.g., a 200- mm wafer, a 300-mm wafer, or a 450-mm wafer, including wafers having one or more layers of material, such as dielectric, conducting, or semi-conducting material deposited thereon. In various embodiments, the substrate is patterned.

[0031] A patterned substrate may have “features” such as pillars, poles, trenches, via or contact holes, which may be characterized by one or more of narrow and / or re-entrant openings, constrictions within the feature, and high aspect ratios. The feature(s) may be formed in one or more of the above-described layers. One example of a feature is a pillar or pole in a semiconductor substrate or a layer on the substrate which may be referred to as a positive feature. In some embodiments, the feature(s) such as a pillar may have an aspect ratio of at leastabout 1 : 1 , at least about 2: 1 , at least about 4: 1 , at least about 6: 1 , at least about 10: 1 , or higher.

[0032] Another example is a trench, via, or hole in a substrate or layer which may be referred to as a negative feature or gap. The feature(s) may also have a dimension near the opening, e.g., an opening diameter or line width of between about 10 nm to 500 nm, for example between about 25 nm and about 300 nm. Disclosed methods may be performed on substrates with feature(s) having an opening less than about 150 nm. A via, trench, or other recessed feature may be referred to as an unfilled feature or a feature. According to various embodiments, the feature profile may narrow gradually and / or include an overhang at the feature opening. A reentrant profile is one that narrows from the bottom, closed end, or interior of the feature to the feature opening. A re-entrant profile may be generated by asymmetric etching kinetics during patterning and / or the overhang due to non-conformal film step coverage in the previous film deposition, such as deposition of a diffusion barrier. In various examples, the feature may have a width smaller in the opening at the top of the feature than the width of the bottom of the feature.

[0033] In various embodiments, the photoresist may be another carbon-containing material. Examples include an ashable hard mask, amorphous carbon, diamond-like carbon, or other carbon-containing material.

[0034] The patterned photoresist may be formed by etching portions of a photoresist to result in patterned regions of a photoresist on a substrate (e.g., regions of photoresist with gaps or features between them, or positive photoresist features with negative features between them). The patterned photoresist may have dents, defects, uneven surfaces, rough surfaces, or other unintended topography on surfaces of the photoresist material.

[0035] In an operation 104, a material is deposited onto the patterned photoresist. In some embodiments, deposition may include passivation. Passivation may be performed by introducing a passivation gas which can help modulate the amount of deposition of the material that is being deposited on the patterned photoresist. For example, in some embodiments, it may be advantageous to include a passivation gas during operation 104 to improve uniformity of the material being deposited onto the patterned substrate. Example passivation gases include but are not limited to oxygen-containing gases, such as oxygen gas (O2), ozone (O ), carbon dioxide (CO2), or combinations thereof, diluted mixtures thereof, or variants thereof.

[0036] In some embodiments, the passivation gas composition is the same as the etching gas composition used in operation 106. In some embodiments, the passivation gas composition is different from the etching gas composition used in operation 106. In some embodiments, the passivation gas composition includes at least one gas that is used in the etching gas composition in operation 106. In some embodiments, the etching gas composition in operation 106 includes at least one gas that is used in the passivation gas composition in operation 104.

[0037] In some embodiments, the ratio of the flow rate of the deposition precursor to the flow rate of the passivation gas may be modulated. For example, in some embodiments, the ratio of the flow rate of the deposition precursor to the flow rate of the passivation gas may be about 3: 1 to 2: 1, or about 5:2.

[0038] In some embodiments, deposition involves covering cracks and other defects in the patterned photoresist with material to smoothen the surface. In various embodiments, the material may be a polymer material. In various embodiments, the material may be a carbon- containing material. In various embodiments, the polymer material is a methane polymer. In various embodiments, the polymer is deposited using methane as a deposition precursor gas. Other example deposition precursor gases include but are not limited to gases having the chemical formula CnH2n+2, where n is an integer greater than or equal to 1.

[0039] The deposition precursor may be introduced to the process chamber with an inert gas. Example inert gases include but are not limited to argon, helium, krypton, nitrogen gas, and combinations thereof. In some embodiments, the inert gas is flowed at a flow rate of about 30 seem to about 80 seem, or about 50 seem.

[0040] The deposition precursor may be introduced to the process chamber at a particular flow rate. The flow rate may depend on the flow rate that is used in operation 106. In various embodiments, the flow rate may be about 8 seem to about 20 seem, or about 10 seem to about 15 seem.

[0041] The deposition precursor may be ignited with a plasma such that plasma is used to deposit the material onto the patterned photoresist. In various embodiments, the plasma is generated using a single frequency plasma, or with a dual frequency plasma. In various embodiments, the plasma is generated using an inductively coupled plasma. In some embodiments, the plasma is generated using a transformer coupled plasma (TCP). In various embodiments, the plasma is generated using a plasma power of about 500 W to about 700W, or about 650 W. In various embodiments, the plasma is generated at a frequency of about 300 Hz to about 800 Hz, or about 500 Hz.

[0042] In various embodiments, the plasma may be pulsed. Pulsing may be performed using a particular duty cycle. It will be understood that plasma pulsing may involve repetitions of periods, each of which may last a duration T. The duration T includes the duration for pulse ON time (the duration for which the plasma is in an ON state) and the duration for plasma OFF time (the duration from which the plasma is in an OFF state) during a given period. The pulse frequency will be understood as 1 / T. For example, for a plasma pulsing period T = 100 ps, frequency is 1 / T = 1 / lOOps, or 10 kHz. The duty cycle or duty ratio is the fraction or percentage in a period T during which the plasma is in the ON state such that duty cycle or duty ratio ispulse ON time divided by T. For example, for a plasma pulsing period T = 100 ps, if a pulse ON time is 70 ps (such that the duration for which the plasma is in an ON state in a period is 70 ps) and a pulse OFF time is 30 ps (such that the duration for which the plasma is in an OFF state in a period is 30 ps), the duty cycle is 70%. In various embodiments, the plasma duty cycle used during deposition in operation 104 may be about 10% to about 20%, or about 15%.

[0043] Deposition during operation 104 may be performed at any suitable chamber pressure. In some embodiments, the chamber pressure is about 5 mTorr to about 30 mTorr, or about 10 mTorr to about 20 mTorr, or about 15 mTorr.

[0044] In various embodiments, the deposition is performed for a specific duration. The duration may include the entire duration at which the plasma is pulsed (e.g., it may include multiple cycles of plasma ON and plasma OFF pulses). In various embodiments, the deposition is performed for a duration of about 5 seconds to about 20 seconds, or about 5 seconds to about 10 seconds. The duration depends on the topography of the patterned substrate such as critical dimension between features, number of features, depth of features, etc., as well as the application for which this is being used.

[0045] In an operation 106, the substrate is trimmed using an etching gas. Trimming may be performed to etch back some of the deposited material on the patterned photoresist to smoothen the surface, improve roughness on the surfaces of the patterned photoresist, or correct defects on the substrate. The etching gas may be an oxygen-containing gas, such as oxygen gas. In various embodiments, etching may be performed thermally or by igniting a plasma. The etching gas is selected so as to prevent too much of the material from operation 104 from being deposited onto the photoresist, and to help control uniformity of the deposited material on the patterned photoresist.

[0046] The etching gas may be introduced to the process chamber with an inert gas. Example inert gases include but are not limited to argon, helium, krypton, nitrogen gas, and combinations thereof. In some embodiments, the inert gas is flowed at a flow rate of about 300 seem to about 600 seem or about 450 seem.

[0047] The etching gas may be introduced to the process chamber at a particular flow rate. The flow rate may depend on the flow rate that is used for the deposition precursor gas in operation 104. In various embodiments, the flow rate may be about 2 seem to about 10 seem, or about 5 seem. A In various embodiments, the ratio of deposition precursor gas flow rate to etching gas flow rate is about 2.5: 1 to about 1.5: 1 or about 2: 1. The flow rate ratio may be used as a knob for modulating local critical dimension uniformity (e.g., uniformity of critical dimensions across a wafer between various features), as well as for modulating the relative size of critical dimensions across a wafer.

[0048] The etching gas may be ignited with a plasma such that plasma is used to trim the material onto the patterned photoresist. In various embodiments, the plasma is generated using a single frequency plasma, or with a dual frequency plasma. In various embodiments, the plasma is generated using a transformer coupled plasma (TCP). In various embodiments, the plasma is generated using a plasma power of about 1 W to about 1000W, or 100 W to about 200 W, or about HO W. In various embodiments, the plasma is generated at a frequency of about 500 Hz to about 1500 Hz, or about 1000 Hz.

[0049] In various embodiments, the plasma may be pulsed. Pulsing may be performed using a particular duty cycle. The duty cycle may be about 70% to about 90% or about 80%.

[0050] In some embodiments, a bias may be optionally used in either operation 104 or operation 106 or both. Where a bias is used, the bias voltage may be set to about 0 Vb to about 1800 Vb or about OVb to about lOOVb. It will be understood that the unit “Vb” or “Vb” or “Vbias” is a unit of volts, and “b” or “bias” is used to characterize that the power is for the bias power. Bias may be used to control direction of plasma species used during either operation 104 or operation 106. In various embodiments, a bias is not applied during either of operation 104 or operation 106.

[0051] Trimming during operation 106 may be performed at any suitable chamber pressure. In some embodiments, the chamber pressure is about 1 mTorr to about 30 mTorr, or about 1 mTorr to about 10 mTorr, or about 5 mTorr.

[0052] In various embodiments, each of the following process conditions may be modulated to achieve different results (such as different critical dimensions, or different local critical dimension uniformity, or a combination of both): duration of operation 104, plasma power during operation 104, plasma power during operation 106, chamber pressure during operation 104, flow rate of passivation gas, flow rate of deposition gas, flow rate of etching gas, and ratio of deposition precursor gas flow rate to etching gas flow rate.

[0053] In one example, it may be desirable to maintain critical dimension (CD) between features but improve local critical dimension uniformity (LCDU) which may be a measure of the uniformity across a single wafer. One method may be to reduce plasma power during operation 104.

[0054] In another example, increasing duration of operation 104 may increase the LCDU or may increase the CD. Reducing duration of operation 104 may also reduce the CD or reduce or improve LCDU. Duration of operation 104 may affect the duration used to trim in operation 106; for example, increased duration of deposition may also involve increasing time for trimming in operation 106 to balance between deposition and trimming.

[0055] In another example, changing the ratio of deposition precursor gas flow rate to etchinggas flow rate from 6: 1 to 2: 1 may achieve similar LCDU while increasing CD.

[0056] In another example, increasing chamber pressure during deposition from 15 mT to 20 mT may increase LCDU and decrease CD.

[0057] In another example, decreasing the chamber pressure during deposition from 15 mT to 10 mT may increase LCDU slightly and decrease CD slightly.

[0058] In some embodiments, operations 104 and 106 are performed in temporally separated operations. In some embodiments, operations 104 and 106 are performed together (e.g., both the deposition precursor gas and the etching gas are introduced to the process chamber). In some embodiments, a remote plasma generator is used to generate plasma from the deposition precursor gas and generate plasma from the etching gas and plasma species from both are delivered to the process chamber.

[0059] Figures 2A-2C show schematic illustrations of an example of a substrate processed using certain disclosed embodiments. Figure 2A shows a substrate 200 having photoresist patterned features 201 A and 20 IB thereon. Feature 201 A has defect 203 which protrudes outward and feature 20 IB has defect 205 protruding inward. Additional defects may also be present including cracking and other defects. The defects 203 and 205 result in uneven, nonsmooth surfaces on the features 201 A and 20B. The critical dimension (CD) is the distance between features 201 A and 20 IB.

[0060] In Figure 2B, a material 210 is deposited thereon over the features using certain disclosed embodiments. For example, the material may be deposited or passivated onto surfaces of the patterned surface using methane gas and oxygen gas with a plasma. In one example, the pressure used during deposition may be about 15 mTorr, using a 15% duty cycle for plasma pulsing without biasing the substrate, using an oxygen flow rate to methane flow rate ratio of about 1 :6 with inert gases nitrogen and argon. Because deposition may exceed the thickness of the overall feature profile and shrink the CD, in Figure 2C, the material is trimmed to maintain the previous CD, while resulting in smooth surfaces on the features, as shown at surface 213 and surface 215 (as compared to defects 203 and 205 in Figure 2A).APPARATUS

[0061] Figure 3 schematically shows a cross-sectional view of an inductively coupled plasma etching apparatus 300 in accordance with certain embodiments herein. A Kiyo ™ reactor, produced by Lam Research Corp, of Fremont, CA, is an example of a suitable reactor that may be used to implement the techniques described herein. The inductively coupled plasma etching apparatus 300 includes an overall etching chamber structurally defined by chamber walls 301 and a window 311. The chamber walls 301 may be fabricated from stainless steel or aluminum.The window 311 may be fabricated from quartz or other dielectric material. An optional internal plasma grid 350 divides the overall etching chamber into an upper sub-chamber 302 and a lower sub-chamber 303. The plasma grid 350 may include a single grid or multiple individual grids. In many embodiments, plasma grid 350 may be removed, thereby utilizing a chamber space made of sub-chambers 302 and 303.

[0062] A chuck 317 is positioned within the lower sub-chamber 303 near the bottom inner surface. The chuck 317 is configured to receive and hold a semiconductor wafer 319 upon which the etching process is performed. The chuck 317 can be an electrostatic chuck for supporting the wafer 319 when present. In some embodiments, an edge ring (not shown) surrounds chuck 317, and has an upper surface that is approximately planar with a top surface of a wafer 319, when present over chuck 317. The chuck 317 also includes electrostatic electrodes for chucking and dechucking the wafer. A filter and DC clamp power supply (not shown) may be provided for this purpose. Other control systems for lifting the wafer 319 off the chuck 317 can also be provided. The chuck 317 can be electrically charged using an RF power supply 323. The RF power supply 323 is connected to matching circuitry 321 through a connection 327. The matching circuitry 321 is connected to the chuck 317 through a connection 325. In this manner, the RF power supply 323 is connected to the chuck 317.

[0063] A coil 333 is positioned above window 311. The coil 333 is fabricated from an electrically conductive material and includes at least one complete turn. The exemplary coil 333 shown in Figure 3 includes three turns. The cross -sections of coil 333 are shown with symbols, and coils having an “X” extend rotationally into the page, while coils having aextend rotationally out of the page. An RF power supply 341 is configured to supply RF power to the coil 333. In general, the RF power supply 341 is connected to matching circuitry 339 through a connection 345. The matching circuitry 339 is connected to the coil 333 through a connection 343. In this manner, the RF power supply 341 is connected to the coil 333. An optional Faraday shield 349 is positioned between the coil 333 and the window 311. The Faraday shield 349 is maintained in a spaced apart relationship relative to the coil 333. The Faraday shield 349 is disposed immediately above the window 311. The coil 333, the Faraday shield 349, and the window 31 1 are each configured to be substantially parallel to one another. The Faraday shield may prevent metal or other species from depositing on the dielectric window of the plasma chamber.

[0064] Process gases may be supplied through a main injection port 360 positioned in the upper chamber and / or through a side injection port 370, sometimes referred to as an STG. A vacuum pump, e.g., a one or two stage mechanical dry pump and / or turbomolecular pump 340, may be used to draw process gases (such as deposition precursor gases, passivation gases, andetching gases) out of the process chamber and to maintain a pressure within the process chamber 300 by using a closed-loop-controlled flow restriction device, such as a throttle valve (not shown) or a pendulum valve (not shown), during operational plasma processing.

[0065] During operation of the apparatus, one or more reactant gases may be supplied through injection ports 360 and / or 370. In certain embodiments, gas may be supplied only through the main injection port 360, or only through the side injection port 370. In some cases, the injection ports may be replaced by showerheads. The Faraday shield 349 and / or optional grid 350 may include internal channels and holes that allow delivery of process gases to the chamber. Either or both of Faraday shield 349 and optional grid 350 may serve as a showerhead for delivery of process gases.

[0066] Radio frequency power is supplied from the RF power supply 341 to the coil 333 to cause an RF current to flow through the coil 333. The RF current flowing through the coil 333 generates an electromagnetic field about the coil 333. The electromagnetic field generates an inductive current within the upper sub-chamber 302. The physical and chemical interactions of various generated ions and radicals with the wafer 319 selectively etch features of the wafer.

[0067] If the plasma grid 350 is used such that there is both an upper sub-chamber 302 and a lower sub-chamber 303, the inductive current acts on the gas present in the upper sub-chamber302 to generate an electron-ion plasma in the upper sub-chamber 302. The optional internal plasma grid 350, if present, may act to limit the number of hot electrons in the lower subchamber 303. In some embodiments, the apparatus is designed and operated such that the plasma present in the lower sub-chamber 303 is an ion-ion plasma. In other embodiments, the apparatus may be designed and operated such that the plasma present in the lower sub-chamber303 is an electron-ion plasma. Internal plasma grids and ion-ion plasma are further discussed in U.S. Patent Application No. 14 / 082,009, filed November 15, 2013, and titled “INTERNAL PLASMA GRID FOR SEMICONDUCTOR FABRICATION,” and in U.S. Patent No. 9,245,761, each of which is herein incorporated by reference in its entirety.

[0068] Volatile etching byproducts may be removed from the lower-sub chamber 303 through port 322. The chuck 317 disclosed herein may operate at elevated temperatures ranging between about 30°C and about 250°C. In some cases, the chuck 317 may also operate at lower temperatures, for example when the chuck 317 is actively chilled. In such cases the chuck 317 may operate at substantially lower temperatures, as desired. The temperature will depend on the etching process operation and specific recipe. In some embodiments, the chamber 301 may operate at pressures in the range of between about 1 mTorr and about 95 mTorr. In certain embodiments, the pressure may be higher.

[0069] Chamber 301 may be coupled to facilities (not shown) when installed in a clean roomor a fabrication facility. Facilities include plumbing that provide processing gases, vacuum, temperature control, and environmental particle control. These facilities are coupled to chamber 301, when installed in the target fabrication facility. Additionally, chamber 301 may be coupled to a transfer chamber that allows robotics to transfer semiconductor wafers into and out of chamber 301 using typical automation.

[0070] In some embodiments, a system controller 330 (which may include one or more physical or logical controllers) controls some or all of the operations of an etching chamber. The system controller 330 may include one or more memory devices and one or more processors. The processor may include a central processing unit (CPU) or computer, analog and / or digital input / output connections, stepper motor controller boards, and other like components. Instructions for implementing appropriate control operations are executed on the processor. These instructions may be stored on the memory devices associated with the system controller 330 or they may be provided over a network. In certain embodiments, the system controller 330 executes system control software.

[0071] In some cases, the system controller 330 controls gas concentration, wafer movement, and / or the power supplied to the coils 333 and / or electrostatic chuck 317. The system controller 330 may control the gas concentration by, for example, opening and closing relevant valves to produce one or more inlet gas stream that provide the necessary reactant(s) at the proper concentration(s). The wafer movement may be controlled by, for example, directing a wafer positioning system to move as desired. The power supplied to the coils 333 and / or chuck 317 may be controlled to provide particular RF power levels. Similarly, if the internal grid 350 is used, any RF power applied to the grid may be adjusted by the system controller 330.

[0072] The system controller 330 may control these and other aspects based on sensor output (e.g., when power, potential, pressure, etc. reach a certain threshold), the timing of an operation (e.g., opening valves at certain times in a process), or based on received instructions from the user. An example controller is further discussed below.

[0073] Figure 4 depicts a semiconductor process cluster architecture with various modules that interface with a vacuum transfer module 438 (VTM). The arrangement of transfer modules to “transfer” wafers among multiple storage facilities and processing modules may be referred to as a “cluster tool architecture” system. Airlock 430, also known as a loadlock or transfer module, is shown in VTM 438 with four processing modules 420a-420d, which may be individually optimized to perform various fabrication processes. By way of example, processing modules 420a-420d may be implemented to perform substrate etching, deposition, ion implantation, wafer cleaning, sputtering, and / or other semiconductor processes. One or more of the substrate etching processing modules (any of 420a-420d) may be implemented as disclosed herein. Airlock 430and process module 420 may be referred to as “stations.” Each station has a facet 436 that interfaces the station to VTM 438. Inside each facet, sensors 1 -18 are used to detect the passing of wafer 426 when moved between respective stations.

[0074] Robot 422 transfers wafer 426 between stations. In one embodiment, robot 422 has one arm, and in another embodiment, robot 422 has two arms, where each arm has an end effector 424 to pick wafers such as wafer 426 for transport. Front-end robot 432, in atmospheric transfer module (ATM) 440, is used to transfer wafers 426 from cassette or Front Opening Unified Pod (FOUP) 434 in Load Port Module (LPM) 442 to airlock 430. Module center 428 inside process module 420 is one location for placing wafer 426. Aligner 444 in ATM 440 is used to align wafers.

[0075] In an exemplary processing method, a wafer is placed in one of the FOUPs 434 in the LPM 442. Front-end robot 432 transfers the wafer from the FOUP 434 to an aligner 444, which allows the wafer 426 to be properly centered before it is etched or processed. After being aligned, the wafer 426 is moved by the front-end robot 432 into an airlock 430. Because airlock modules have the ability to match the environment between an ATM and a VTM, the wafer 426 is able to move between the two pressure environments without being damaged. From the airlock module 430, the wafer 426 is moved by robot 422 through VTM 438 and into one of the process modules 420a-420d. In order to achieve this wafer movement, the robot 422 uses end effectors 424 on each of its arms. Once the wafer 426 has been processed, it is moved by robot 422 from the process modules 420a-420d to an airlock module 430. From here, the wafer 426 may be moved by the front-end robot 432 to one of the FOUPs 434 or to the aligner 444.

[0076] It should be noted that the computer controlling the wafer movement can be local to the cluster architecture, or can be located external to the cluster architecture in the manufacturing floor, or in a remote location and connected to the cluster architecture via a network.

[0077] In some implementations, a controller is part of a system, which may be part of the above-described examples. Such systems can comprise semiconductor processing equipment, including a processing tool or tools, chamber or chambers, a platform or platforms for processing, and / or specific processing components (a wafer pedestal, a gas flow system, etc.). These systems may be integrated with electronics for controlling their operation before, during, and after processing of a semiconductor wafer or substrate. The electronics may be referred to as the “controller,” which may control various components or subparts of the system or systems. The controller, depending on the processing requirements and / or the type of system, may be programmed to control any of the processes disclosed herein, including the delivery of processing gases, temperature settings (e.g., heating and / or cooling), pressure settings, vacuum settings, power settings, radio frequency (RF) generator settings, RF matching circuit settings,frequency settings, flow rate settings, fluid delivery settings, positional and operation settings, wafer transfers into and out of a tool and other transfer tools and / or load locks connected to or interfaced with a specific system.

[0078] Broadly speaking, the controller may be defined as electronics having various integrated circuits, logic, memory, and / or software that receive instructions, issue instructions, control operation, enable cleaning operations, enable endpoint measurements, and the like. The integrated circuits may include chips in the form of firmware that store program instructions, digital signal processors (DSPs), chips defined as application specific integrated circuits (ASICs), and / or one or more microprocessors, or microcontrollers that execute program instructions (e.g., software). Program instructions may be instructions communicated to the controller in the form of various individual settings (or program files), defining operational parameters for carrying out a particular process on or for a semiconductor wafer or to a system. The operational parameters may, in some embodiments, be part of a recipe defined by process engineers to accomplish one or more processing steps during the fabrication of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and / or dies of a wafer.

[0079] The controller, in some implementations, may be a part of or coupled to a computer that is integrated with, coupled to the system, otherwise networked to the system, or a combination thereof. For example, the controller may be in the “cloud” or all or a part of a fab host computer system, which can allow for remote access of the wafer processing. The computer may enable remote access to the system to monitor current progress of fabrication operations, examine a history of past fabrication operations, examine trends or performance metrics from a plurality of fabrication operations, to change parameters of current processing, to set processing steps to follow a current processing, or to start a new process. In some examples, a remote computer (e.g. a server) can provide process recipes to a system over a network, which may include a local network or the Internet. The remote computer may include a user interface that enables entry or programming of parameters and / or settings, which are then communicated to the system from the remote computer. In some examples, the controller receives instructions in the form of data, which specify parameters for each of the processing steps to be performed during one or more operations. It should be understood that the parameters may be specific to the type of process to be performed and the type of tool that the controller is configured to interface with or control. Thus as described above, the controller may be distributed, such as by comprising one or more discrete controllers that are networked together and working towards a common purpose, such as the processes and controls described herein. An example of a distributed controller for such purposes would be one or more integrated circuits on a chamber incommunication with one or more integrated circuits located remotely (such as at the platform level or as part of a remote computer) that combine to control a process on the chamber.

[0080] Without limitation, example systems may include a plasma etch chamber or module, a deposition chamber or module, a spin-rinse chamber or module, a metal plating chamber or module, a clean chamber or module, a bevel edge etch chamber or module, a physical vapor deposition (PVD) chamber or module, a chemical vapor deposition (CVD) chamber or module, an atomic layer deposition (ALD) chamber or module, an atomic layer etch (ALE) chamber or module, an ion implantation chamber or module, a track chamber or module, and any other semiconductor processing systems that may be associated or used in the fabrication and / or manufacturing of semiconductor wafers.

[0081] As noted above, depending on the process step or steps to be performed by the tool, the controller might communicate with one or more of other tool circuits or modules, other tool components, cluster tools, other tool interfaces, adjacent tools, neighboring tools, tools located throughout a factory, a main computer, another controller, or tools used in material transport that bring containers of wafers to and from tool locations and / or load ports in a semiconductor manufacturing factory.EXPERIMENTALEXPERIMENT 1

[0082] A first substrate having a patterned photoresist material thereon was exposed to a mixture of 5 seem O2 and 30 seem CH4 in a plasma environment generated using TCP at 650W at a chamber pressure of 15 mTorr. A second substrate having a patterned photoresist material thereon was exposed to a mixture of 5 seem O2 and 30 seem CH4 in a plasma environment generated using TCP at 650W at a chamber pressure of 15 mTorr. Both substrates were subsequently trimmed using O2 plasma at 110 W TCP at a chamber pressure of 5 mTorr and an 80% duty cycle. The second substrate showed improved LCDU and similar CD.EXPERIMENT 2

[0083] A first substrate having a patterned photoresist material thereon was exposed to a ratio of CH4 flow rate to O2 flow rate of 14:20 (depicted as plot point 501). A second substrate having a patterned photoresist material thereon was exposed to a ratio of CH4 flow rate to O2 flow rate of 10:20 (depicted as plot point 503). A third substrate having a patterned photoresist material thereon was exposed to a ratio of CH4 flow rate to O2 flow rate of 5:20 (depicted as plot point 502).

[0084] The LCDU / CD ratio was calculated for each of the three substrates. The resultssuggested a reduction of CfLpO ratio from the 14:20 to the 10:20 ratio reduced the LCDU from 7.92% to 7.1 1 % (as shown by arrow 504). The results also suggested a reduction of CTL Ch ratio from the 5:20 ratio to 10:20 ratio reduced the LCDU from 7.26% to 7.11% (as shown by arrow 505). CONCLUSION

[0085] Although the foregoing embodiments have been described in some detail for purposes of clarity of understanding, it will be apparent that certain changes and modifications may be practiced within the scope of the appended claims. It should be noted that there are many alternative ways of implementing the processes, systems, and apparatus of the present embodiments. Accordingly, the present embodiments are to be considered as illustrative and not restrictive, and the embodiments are not to be limited to the details given herein.

Claims

CLAIMSWhat is claimed is:

1. A method for processing substrates, the method comprising: providing a patterned substrate to a process chamber, the patterned substrate having a carbon-containing feature thereon; flowing one or more gases to the process chamber to expose the patterned substrate to the one or more gases in a plasma environment to form a material over the carbon-containing feature; and after flowing the one or more gases, flowing an etching gas to the process chamber in the plasma environment to remove some of the material over the carbon-containing feature while some of the material remains on the carbon-containing feature.

2. The method of claim 1 , wherein the one or more gases comprises a deposition precursor gas and a passivation gas.

3. The method of claim 2, wherein the one or more gases further comprises one or more inert gases.

4. The method of claim 2, further comprising modulating a ratio of a flow rate of the deposition precursor gas to a flow rate of the passivation gas.

5. The method of claim 4, wherein the ratio is about 3 : 1 to about 2: 1.

6. The method of claim 2, further comprising modulating a flow rate of the passivation gas to control an amount of the material deposited over the carbon-containing feature.

7. The method of claim 2, wherein modulating reduces local critical dimension uniformity.

8. The method of claim 1, wherein the etching gas comprises an oxy gen-containing gas.

9. The method of claim 8, wherein the oxygen-containing gas comprises oxygen (O2).

10. The method of claim 1 , further comprising modulating plasma power used to generate the plasma environment during the flowing of the one or more gases to the process chamber.

11. The method of claim 1 , further comprising biasing the patterned substrate during at least one of flowing the one or more gases to the process chamber and flowing the etching gas.

12. The method of claim 2, wherein the passivation gas and the etching gas are the same.

13. The method of claim 1, wherein the one or more gases comprises a mixture of carbon- containing gas and oxygen-containing gas.

14. The method of claim 13, wherein the carbon-containing gas has a chemical formula of CnH2n+2, where n is an integer.

15. The method of claim 13, wherein the carbon-containing gas is methane.

16. The method of claim 13, wherein the oxygen-containing gas comprises oxygen.

17. The method of claim 1, wherein the patterned substrate comprises at least one gap having a critical dimension between two or more carbon-containing features, and wherein critical dimensions of gaps varies across a surface of the patterned substrate.

18. The method of claim 1, wherein, prior to exposing the patterned substrate to the one or more gases, a surface of the carbon-containing feature comprises at least one defect.

19. The method of claim 18, wherein the defect is a crack, minimum roughness, or sloped sidewall.

20. The method of claim 1 , wherein the plasma environment is generated by pulsing the plasma.

21. The method of claim 1, further comprising flowing an inert gas with the etching gas during flowing of the etching gas.

22. The method of claim 1 , wherein the carbon-containing feature comprises photoresist material.

23. An apparatus for processing substrates, the apparatus comprising:one or more process chambers, each process chamber comprising a chuck; one or more gas inlets into the process chambers and associated flow-control hardware; a plasma generator; and a controller having at least one processor and a memory, wherein the at least one processor and the memory are communicatively connected with one another, the at least one processor is at least operatively connected with the flow-control hardware, and the memory stores computer-executable instructions for controlling the at least one processor to at least control the flow-control hardware to: cause generation of a plasma; cause introduction of one or more gases to at least one of the one or more process chambers; and cause introduction of an etching gas to the at least one of the one or more process chambers.

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