Substrate for semiconductor device, method for manufacturing same, and semiconductor device

The substrate for semiconductor devices, with a laminated nickel and precious metal plating layer and laser-formed nickel alloy, addresses solder spreading and oxidation issues, ensuring reliable solder connections by controlling wettability and spread.

WO2026009977A1PCT designated stage Publication Date: 2026-01-08MITSUI HIGH TEC INC
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Patent Information

Application Number
PCT/JP2025/024229
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-07-04
Filing Date
2025-07-04
Publication Date
2026-01-08

AI Technical Summary

Technical Problem

Existing semiconductor device substrates face challenges in achieving reliable solder connections due to issues with solder spreading and oxidation, leading to potential leaks and unreliable connections.

Method used

A substrate design featuring a laminated structure with a nickel plating layer and a precious metal plating layer, combined with a nickel-containing alloy or nickel oxide layer, where the precious metal layer ensures high solder wettability and the alloy layer restricts solder spreading, achieved through laser-induced alloy formation.

Benefits of technology

The substrate provides highly reliable solder connections by allowing controlled solder application with high wettability where needed and preventing unwanted spreading, enhancing the overall connection reliability of semiconductor devices.

✦ Generated by Eureka AI based on patent content.

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Abstract

This substrate for a semiconductor device is provided with an inorganic base material and a plating film. The plating film sequentially includes, from the inorganic base material side, a nickel plating layer and a noble metal plating layer in this order. The plating film has: a layered part in which the surface is composed of the noble metal plating layer; and an alloy part in which the surface is composed of at least one selected from the group consisting of an alloy containing nickel and an oxide of nickel. This method for manufacturing a substrate for a semiconductor device includes: a step for forming a plating film in which at least a nickel plating layer and a noble metal plating layer are superposed on the surface of an inorganic base material, and the surface is composed of the noble metal plating layer; and a step for irradiating a part of the surface of the plating film with laser light so as to produce at least one selected from the group consisting of an alloy containing nickel and an oxide of nickel on the surface of the plating film.
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Description

Substrate for semiconductor device, manufacturing method thereof, and semiconductor device

[0001] The present disclosure relates to a substrate for a semiconductor device, a method for manufacturing the same, and a semiconductor device.

[0002] A technology for providing a metal thin film on the surface of a substrate made of a conductive metal material is known. Patent Document 1 discloses a surface processing method including a melting step in which a laser beam is irradiated onto the surface of a metal member on which a metal thin film is provided to melt or evaporate the surface of the metal thin film, and a solidification step in which the surface of the metal thin film is solidified to roughen the surface of the metal thin film. It is described that the fine irregularities formed by roughening the surface of the metal thin film improve the adhesion of the molding resin and suppress the spreading of the IC chip connecting member.

[0003] Japanese Patent Application Publication No. 2016-20001

[0004] In Patent Document 1, the surface of a metal thin film is roughened to make it difficult for solder to spread in an IC chip connecting member. However, if the surface roughness of a plating film increases, the solder may actually wet and spread more easily. Therefore, one aspect of the present disclosure provides a substrate for a semiconductor device having excellent solder connection reliability, and a semiconductor device including such a substrate for a semiconductor device. Another aspect of the present disclosure provides a manufacturing method that can easily obtain a substrate for a semiconductor device having excellent solder connection reliability.

[0005] One aspect of the present disclosure provides a substrate for a semiconductor device including an inorganic base material and a plating film, wherein the plating film includes, from the inorganic base material side, a nickel plating layer and a precious metal plating layer in this order, and has a laminate portion whose surface is constituted by the precious metal plating layer, and an alloy portion whose surface is constituted by at least one selected from the group consisting of a nickel-containing alloy and a nickel oxide.

[0006] Of the plating film of the substrate for semiconductor device, the surface of the laminated portion is composed of a precious metal plating layer. Because the precious metal plating layer is resistant to oxidation, it has high solder wettability and spreads easily. This allows for highly reliable solder connections. Of the plating film of the substrate for semiconductor device, the surface of the alloy portion is composed of at least one selected from the group consisting of nickel-containing alloys and nickel oxides. Nickel-containing alloys are more easily oxidized than precious metals. Because the surface of the alloy portion is composed of at least one selected from the group consisting of easily oxidized alloys and nickel oxides, the solder spreads less easily than the surface of the precious metal plating layer. This prevents solder from leaking to unwanted locations. Because the plating film of the substrate for semiconductor device thus combines a laminated portion that spreads easily with solder and an alloy portion that spreads less easily with solder, the substrate for semiconductor device has excellent reliability of solder connections.

[0007] One aspect of the present disclosure provides a semiconductor device including the above-described substrate for a semiconductor device and a semiconductor element electrically connected to the noble metal plating layer with solder.

[0008] The semiconductor device includes the substrate for semiconductor device described above, and the precious metal plating layer of the substrate for semiconductor device is soldered, which results in excellent connection reliability of the semiconductor device.

[0009] One aspect of the present disclosure provides a method for manufacturing a substrate for a semiconductor device, the method comprising: laminating at least a nickel plating layer and a precious metal plating layer on a surface of an inorganic base material to form a plating film whose surface is composed of the precious metal plating layer; and irradiating a part of the surface of the plating film with laser light to generate at least one selected from the group consisting of a nickel-containing alloy and a nickel oxide on the surface of the plating film.

[0010] The plating film of the semiconductor device substrate obtained by the above manufacturing method has a portion composed of a precious metal plating layer and a portion composed of at least one selected from the group consisting of a nickel-containing alloy and nickel oxide generated by laser light irradiation. Nickel-containing alloys are more easily oxidized than precious metals. Because the surface of the alloy portion is composed of at least one selected from the group consisting of easily oxidized alloys and nickel oxides, solder is less likely to wet and spread than the surface of the precious metal plating layer. This prevents solder from leaking to unwanted locations. The plating film of the semiconductor device substrate obtained by the above manufacturing method thus has both a portion where solder is easily wetted and spreads and a portion where solder is less likely to wet and spread than the above portion, resulting in excellent reliability of solder connection. Furthermore, the above manufacturing method generates a nickel-containing alloy using the simple method of laser light irradiation. Therefore, the above manufacturing method makes it possible to easily manufacture a semiconductor device substrate with excellent reliability of solder connection.

[0011] According to one aspect of the present disclosure, it is possible to provide a substrate for a semiconductor device having excellent reliability of solder connection, and a semiconductor device including such a substrate for a semiconductor device. According to one aspect of the present disclosure, it is possible to provide a manufacturing method that can easily obtain a substrate for a semiconductor device having excellent reliability of solder connection.

[0012] FIG. 1 is a plan view of a lead frame. FIG. 2A is a partial cross-sectional view of a lead frame. FIG. 2B is a diagram illustrating the formation of an alloy portion by irradiating a plating film with laser light. FIG. 3 is a cross-sectional view of a semiconductor device. FIG. 4A is an optical microscope photograph (magnification: 10x) of the surface of the plating film in the lead frame of Comparative Example 1. FIG. 4B is an FE-SEM photograph (magnification: 3,000x) of the plating film in the lead frame of Comparative Example 1. FIG. 4C is an FE-SEM photograph (magnification: 5,000x) of the plating film. FIG. 4D is an FE-SEM photograph (magnification: 10,000x) of the plating film. FIG. 5A is an optical microscope photograph (magnification: 10x) of the surface of an alloy portion in the lead frame of Example 1. FIG. 5B is an FE-SEM photograph (magnification: 3,000x) of the alloy portion in the lead frame of Example 1. FIG. 5C is an FE-SEM photograph (magnification: 5,000x) of the alloy portion. FIG. 5D is an FE-SEM photograph of the alloy part (magnification: 10,000 times). FIG. 6A is an optical microscope photograph of the surface of the alloy part in the lead frame of Example 2 (magnification: 10 times). FIG. 6B is an FE-SEM photograph of the alloy part in the lead frame of Example 2 (magnification: 3,000 times). FIG. 6C is an FE-SEM photograph of the alloy part (magnification: 5,000 times). FIG. 6D is an FE-SEM photograph of the alloy part (magnification: 10,000 times). FIG. 7A is a photograph showing an overall image of the solder after reflow in Example 1-1. FIG. 7B is a photograph showing an enlarged view of the solder and alloy part (400 times the photograph in FIG. 7A). FIG. 8A is a photograph showing an overall image of the solder after reflow in Example 1-2. FIG. 8B is a photograph showing an enlarged view of the solder and alloy part (400 times the photograph in FIG. 8A). FIG. 9A is a photograph showing an overall image of the solder after reflow in Example 1-3. FIG. 9B is a photograph showing an enlarged view of the solder and alloy portion (400 times larger than the photograph in FIG. 9A). FIG. 10A is a photograph showing an overall image of the solder after reflow in Example 1-4. FIG. 10B is a photograph showing an enlarged view of the solder and alloy portion (400 times larger than the photograph in FIG. 10A). FIG. 11 is a photograph showing an overall image of the solder after reflow in Comparative Example 1-1. FIG. 12A is a photograph of the lead frame (before solder reflow) after application of solder paste in Example 3-1.FIG. 12B is a photograph of the lead frame of Example 3-1 (after solder reflow). FIG. 12C is a photograph of the lead frame of Example 3-2 after solder paste application (before solder reflow). FIG. 12D is a photograph of the lead frame of Example 3-2 (after solder reflow). FIG. 13A is a photograph of the lead frame of Example 3-3 after solder paste application (before solder reflow). FIG. 13B is a photograph of the lead frame of Example 3-3 (after solder reflow). FIG. 13C is a photograph of the lead frame of Example 3-4 after solder paste application (before solder reflow). FIG. 13D is a photograph of the lead frame of Example 3-4 (after solder reflow). FIG. 14A is a photograph of the lead frame of Example 3-5 after solder paste application (before solder reflow). FIG. 14B is a photograph of the lead frame of Example 3-5 (after solder reflow). Fig. 15A is an FE-SEM photograph (10,000x magnification) showing a cross section of the plating film on the lead frame of Comparative Example 2. Fig. 15B is an FE-SEM photograph (10,000x magnification) showing a cross section of the plating film on the lead frame of Comparative Example 2. Fig. 15C is an FE-SEM photograph (10,000x magnification) showing the surface of the plating film on the lead frame of Example 4. Fig. 15D is an FE-SEM photograph (10,000x magnification) showing a cross section of the plating film on the lead frame of Example 4.

[0013] Hereinafter, embodiments of the present disclosure will be described, occasionally with reference to the drawings. However, the following embodiments are merely examples for explaining the present disclosure and are not intended to limit the present disclosure to the following content. In the description, the same reference numerals are used for identical elements or elements having the same functions, and redundant descriptions will be omitted where appropriate. Positional relationships, such as up, down, left, and right, are based on the positional relationships relative to the orientation of the reference numerals shown in the drawings, unless otherwise specified. The dimensional ratios of each element are not limited to the ratios shown. Each numerical range indicated with the symbol "to" includes both a lower limit and an upper limit. In other words, a numerical range indicated as "A to B" means a range equal to or greater than A and equal to or less than B. The present disclosure also includes a range in which the upper or lower limit of each numerical range is replaced with a numerical value from one of the examples. When multiple numerical ranges are exemplified in stages, the present disclosure also includes a range in which the upper or lower limit of a first numerical range is replaced with the upper or lower limit of a second numerical range that is narrower than the first numerical range. With respect to the multiple exemplified substances and materials, one type of substance and material may be used alone, or two or more types of substances and materials may be used in combination.

[0014] A substrate for a semiconductor device according to one embodiment comprises an inorganic base material and a plating film on its surface. The substrate for a semiconductor device is included in a semiconductor device. The semiconductor device comprises, for example, a substrate for a semiconductor device and a semiconductor element. Examples of the inorganic base material include a substrate made of metal, ceramic, or glass. The shape is not particularly limited, and may be, for example, a plate-like shape. The inorganic base material may have grooves formed on its surface, or may have through-holes formed therethrough in the thickness direction. The plating film may cover the entire inorganic base material, or at least a portion thereof.

[0015] The plating film includes a nickel plating layer and a precious metal plating layer, in this order from the inorganic substrate side, and has a laminate portion whose surface is made of the precious metal plating layer, and an alloy portion whose surface is made of an alloy containing nickel. The laminate portion and the alloy portion may be provided adjacent to each other along the surface of the inorganic substrate. The number of plating layers constituting the laminate portion is not limited. The nickel plating layer is a plating layer containing nickel as a main component. The nickel plating layer may be an electrolytic nickel plating layer formed by electrolytic nickel plating, an electroless nickel plating layer formed by electroless nickel plating, or a combination thereof. The electroless nickel plating layer may be an electroless nickel-phosphorus plating layer or an electroless nickel-boron plating layer. The nickel plating layer may be a roughened nickel plating layer. The thickness of the nickel plating layer may be, for example, 0.3 to 3 μm, from the viewpoint of maintaining corrosion resistance while preventing excessive thickness.

[0016] The noble metal plating layer is a plating layer whose main component is a noble metal. Examples of noble metals include gold (Au), silver (Ag), platinum (Pt), palladium (Pd), rhodium (Rh), iridium (Ir), ruthenium (Ru), and osmium (Os). The noble metal plating layer may be a plating layer containing at least one of these noble metals as a main component. The noble metal plating layer may be, for example, a palladium plating layer, a gold plating layer, a platinum plating layer, or a silver plating layer, or may be an alloy layer containing multiple noble metals. The thickness of the noble metal plating layer may be adjusted depending on the type of noble metal. For example, in the case of a gold plating layer, the thickness may be 1 to 40 nm. For example, in the case of a palladium plating layer, the thickness may be 3 to 250 nm. The plating film may have multiple noble metal plating layers with different components.

[0017] The surface of the laminated portion of the plating film is composed of a precious metal plating layer. Because the precious metal plating layer is resistant to oxidation, it has high solder wettability and spreads easily. This allows for highly reliable solder connections. The type of solder is not particularly limited, and may be eutectic solder or lead-free solder. Examples include solder containing tin and antimony, solder containing tin and silver, solder containing tin and bismuth, solder containing tin and indium, and solder containing tin and copper. Each solder is not limited to a binary system, and may be a ternary system or a quaternary or higher system. Examples of ternary solders include Sn-Ag-Cu solder and Sn-Bi-Ag solder. The solder may be in the form of a paste or a solder foil.

[0018] The surface roughness of the laminated portion may be 1.1 or more, 1.3 or more, or 1.4 or more. This increases the wettability of the solder, making it easier for the solder to wet and spread. The surface roughness of the laminated portion may be 1.1 to 3.0. The roughness in this disclosure is the ratio of the surface area S0 of the flat surface to the surface area S1 of the roughened surface (S-ratio = S1 / S0), measured using a commercially available atomic force microscope. The surface roughness of the laminated portion is adjusted by changing the conditions for forming each plating layer.

[0019] The alloy portion may contain nickel or an alloy containing nickel and a precious metal as a main component. The alloy portion may also contain nickel oxide as a component other than the alloy. The surface of the alloy portion is composed of at least one selected from the group consisting of a nickel-containing alloy and a nickel oxide. The nickel oxide may include nickel(II) oxide. The nickel-containing alloy may be an alloy of nickel and a precious metal. The precious metal in the alloy may be the precious metal contained in the precious metal plating layer of the laminate portion. The alloy portion can be easily formed by irradiating with a laser beam. The composition of the alloy can be adjusted by changing the irradiation conditions of the laser beam. Examples of nickel-containing alloys that constitute the surface of the alloy portion include alloys containing nickel and palladium, alloys containing nickel and gold, and alloys containing nickel, gold, and palladium. In the alloy, the atomic ratio of nickel to the total of nickel and precious metal may be 0.2 or more, 0.3 or more, 0.5 or more, 0.8 or more, or 0.9 or more, from the viewpoint of solder wettability and spreadability. The atomic ratio may be 0.2 to 0.95. These atomic ratios may be determined by analyzing the surface of the alloy part with an Auger electron spectrometer.

[0020] At least a portion of the surface of the alloy part may be composed of an oxide of nickel. From the viewpoint of preventing solder from wetting and spreading, the ratio of the atomic percentage of O (oxygen) to the atomic percentage of nickel on the surface of the alloy part may be 0.5 or more, 0.8 or more, 1.1 or more, 1.3 or more, or 1.4 or more. The ratio of the atomic percentage of O (oxygen) to the atomic percentage of nickel on the surface of the alloy part may be 0.5 to 2.

[0021] The ratio of the atomic % of O (oxygen) on the surface of the alloy part to the atomic % of O (oxygen) on the surface of the laminate part may be 3 or more, 5 or more, or 8 or more. This sufficiently improves the ease of wetting and spreading of the solder on the laminate part while making it difficult for the solder to wet and spread on the alloy part. The ratio may be, for example, 3 to 15.

[0022] The surface roughness of the alloy part may be 1.1 or less, 1.05 or less, or 1.02 or less. This reduces the wettability of the solder in the alloy part, making it difficult for the solder to wet and spread. The surface roughness of the alloy part may be 1.0 to 1.1. The surface roughness of the alloy part is adjusted by changing the irradiation conditions of the laser light.

[0023] FIG. 1 is a plan view of a portion of a lead frame 100, which is an example of a substrate for a semiconductor device according to this embodiment. A region 50 has nine unit frames 55 (3 x 3). Although only one region 50 is shown in FIG. 1, a plurality of regions 50 may be arranged in the left-right direction of FIG. 1. Each unit frame 55 included in the region 50 has a through-hole formed therein that penetrates the lead frame 100 in the thickness direction. The through-hole may be formed by etching. Adjacent unit frames 55 are connected to each other via tie bars 56.

[0024] The unit frame 55 includes a pad 51 disposed in the center, a plurality of terminals 52, also called inner leads, disposed around the pad 51, and support bars 54 supporting the pad 51. The tip of the support bar 54 is connected to the pad 51, and the rear end of the support bar 54 is connected to tie bars 56 disposed around the terminal 52. The support bars 54 extend radially from the four corners of the substantially rectangular pad 51 and are connected to the tie bars 56, thereby supporting the pad 51. Portions of the unit frame 55 other than the pad 51, terminals 52, support bars 54, and tie bars 56 are through-holes formed by etching.

[0025] The lead frame 100 has a plating film 10 on its surface. The plating film 10 may cover the main surface, side surfaces, and inner wall surfaces forming the through holes of the lead frame 100. The plating film 10 has an alloy portion 20 and a laminate portion 30. In the example of FIG. 1 , the alloy portion 20 and laminate portion 30 are shown in only one pad 51, but the other pads 51 may also have an alloy portion 20. When multiple alloy portions 20 are provided in the plating film 10, the shapes and sizes of the multiple alloy portions 20 may be the same as or different from each other. The multiple terminals 52 may also have an alloy portion 20.

[0026] 2A is a partial cross-sectional view showing a surface portion of a lead frame 100. The lead frame 100 includes a lead frame substrate 40 made of a metal (e.g., copper or a copper alloy) that is an inorganic substrate, and a plating film 10 on the surface thereof. Of the plating film 10, a laminate portion 30 includes a nickel plating layer 36, a first precious metal plating layer 34, and a second precious metal plating layer 32, in this order from the lead frame substrate 40 side. A surface 30A of the laminate portion 30 is formed by the second precious metal plating layer 32. The above description of the nickel plating layer also applies to the nickel plating layer 36. The above description of the precious metal plating layer also applies to the first precious metal plating layer 34 and the second precious metal plating layer 32 of this example.

[0027] The precious metals contained in the first precious metal plating layer 34 and the second precious metal plating layer 32 may be different from each other. The first precious metal plating layer may be a palladium plating layer, and the second precious metal plating layer may be a gold plating layer. The laminated portion 30 is not limited to a three-layer structure. In a modified example, the laminated portion 30 may have a two-layer structure or a four-layer structure, or may have a structure in which five or more plating layers are stacked.

[0028] At least the surface 20A of the alloy portion 20 of the plating film 10 is composed of at least one selected from the group consisting of nickel-containing alloys and nickel oxides. The above description of the alloy portion also applies to the alloy portion 20 of this example. Therefore, the nickel-containing alloy may be, for example, an alloy of nickel and at least one precious metal selected from the group consisting of the first precious metal contained in the first precious metal plating layer 34 and the second precious metal contained in the second precious metal plating layer 32. As shown in FIG. 2A , the alloy portion 20 may be formed so as to form a portion of the surface of the plating film 10. The plating film 10 may have a nickel plating layer 36 between the alloy portion 20 and the lead frame substrate 40. In a modified example, the alloy portion 20 may be formed from the surface 10A of the plating film 10 to the lead frame substrate 40. The surface 30A between the two alloy portions 20 may be a solder application region R. The width of the surface 20A of the alloy part 20 may be 50 μm or more, 100 μm or more, or 150 μm or more, from the viewpoint of preventing the solder from wetting and spreading.

[0029] The alloy part 20 and the laminate part 30 that make up the plating film 10 are arranged adjacent to each other along the surface of the lead frame base material 40. The surface 30A of the laminate part 30 has high solder wettability, allowing the solder to wet and spread easily. The surface 20A of the alloy part 20 has lower solder wettability than the surface 30A, allowing the solder to wet and spread less easily. Such a lead frame 100 allows solder to be applied to areas where it is necessary (solder application region R) with high positional accuracy, resulting in excellent reliability of the solder connection.

[0030] As shown in FIG. 2B , the alloy portion 20 is formed by irradiating the surface 10A (surface 30A) of the plating film 10 with laser light LA. The absorptivity of the laser light LA ​​varies depending on the type of metal element. For example, the absorptivity of light with a wavelength of 1 μm is nickel > palladium > gold. Therefore, if the first precious metal plating layer 34 is a palladium plating layer, the first precious metal plating layer 34 absorbs the laser light LA ​​and melts. Accordingly, as shown by the arrows in FIG. 2B , the components of the plating layers mix and form a solid solution, forming the alloy portion 20 containing nickel, the first precious metal, and the second precious metal. The composition and size of the alloy portion 20 can be adjusted by changing the irradiation conditions of the laser light LA.

[0031] According to this formation method, a lead frame (substrate for a semiconductor device) having an alloy portion can be manufactured with high productivity without requiring large-scale equipment. The method for forming the alloy portion is not limited to irradiation with laser light. For example, the alloy portion may be formed by pressing a high-temperature mold against a part of the surface of the plating film to generate an alloy.

[0032] A method for manufacturing a substrate for a semiconductor device according to one embodiment includes the following steps (1) and (2): (1) forming a plating film having a surface constituted by the precious metal plating layer by laminating at least a nickel plating layer and a precious metal plating layer on the surface of an inorganic base material; and (2) irradiating a part of the surface of the plating film with laser light to generate at least one selected from the group consisting of a nickel-containing alloy and a nickel oxide on the surface of the plating film.

[0033] In the above step (2), the surface of the plating film may be smoothed by irradiating it with laser light, so that the surface roughness of the alloy portion containing the alloy is smaller than the surface roughness of the precious metal plating layer. The above-mentioned alloy portion is formed by irradiating a portion of the surface of the plating film with laser light. The description of the embodiments of the substrate for a semiconductor device also applies to this manufacturing method. For example, the nickel plating layer and the precious metal plating layer may be formed by the method described in the embodiments of the substrate for a semiconductor device. The composition and type of each plating layer may also be as described in the embodiments of the substrate for a semiconductor device.

[0034] The laser beam irradiation can be performed using a commercially available laser irradiation device. The method for forming an alloy portion by laser beam irradiation may be as described with reference to FIG. 2B. The width of the alloy portion (surface 20A) can be adjusted by changing the irradiation width of the laser beam. The composition and surface roughness of the alloy portion can be adjusted by changing the irradiation conditions of the laser beam. For example, by irradiating the laser beam, an alloy portion containing a nickel-containing alloy is formed in the plating film, and the surface is smoothed, so that the surface roughness of the alloy portion becomes smaller than the surface roughness of the laminate portion. Nickel oxide on the surface of the alloy portion may be generated by oxidation of nickel after irradiation with laser beam.

[0035] The laser light irradiated onto the surface of the plating film may be pulsed laser light. The pulse frequency of the pulsed laser light may be 10 to 100 kHz. The laser power may be 15 to 25 W. This makes the surface 20A of the alloy part 20 sufficiently smooth, making it difficult for the solder to wet and spread.

[0036] A semiconductor device according to one embodiment includes the substrate for semiconductor device described above and a semiconductor element electrically connected by solder to the precious metal plating layer in the laminated portion of the plating film of the substrate for semiconductor device. The semiconductor device has excellent connection reliability due to the inclusion of the substrate for semiconductor device. The semiconductor device may be, for example, a component of an electronic device such as a computer, a smartphone, or a home appliance.

[0037] FIG. 3 is a cross-sectional view showing an example of a semiconductor device according to this embodiment. The semiconductor device 300 shown in FIG. 3 includes a semiconductor element 92 die-bonded to a pad 51 of a unit frame 55 (an example of a lead frame) shown in FIG. 1 and wire-bonded to a terminal 52. The semiconductor device 300 includes a bonding wire 94 connecting the semiconductor element 92 to the terminal 52 and a sealing resin 70 sealing them. The semiconductor device 300 is a QFN type, and electrode pads (not shown) provided on the bottom surface of the semiconductor element 92 are solder-connected to the pad 51. The pad 51 may include a plating film including a laminated portion, which is the portion solder-connected to the electrode pad provided on the bottom surface of the semiconductor element 92, and an alloy portion, which is the portion not solder-connected. This semiconductor element 92 and pad 51 have excellent connection reliability.

[0038] Electrode pads (not shown) provided on the upper surface of the semiconductor element 92 are connected to the terminals 52 by soldering via bonding wires 94. The terminals 52 may have a plating film in which the portions soldered to the bonding wires 94 are laminated portions and the portions not soldered are alloy portions. Such a semiconductor element 92 and terminals 52 also have excellent connection reliability.

[0039] The semiconductor device 300 can be manufactured by the following procedure. The semiconductor element 92 is die-bonded to the pads 51 of each unit frame 55 of the lead frame 100 using solder. The electrode pads (not shown) of the semiconductor element 92 are wire-bonded to the terminals 52 using bonding wires 94 and solder. The lead frame 100 including the unit frames 55 is then placed in a molding die. A resin composition (e.g., a thermosetting resin composition such as epoxy resin) is then injected into the molding die and heated to harden the resin composition. The resulting resin-sealed body is then singulated to obtain the semiconductor device 300. While a QFN type is illustrated as the semiconductor device 300, the semiconductor device is not limited to a QFN and may be another type of non-leaded package, such as a SON. It may also be a package with outer leads, such as a QFP.

[0040] Although several embodiments of the present disclosure have been described above, the present disclosure is not limited to these. The substrate for a semiconductor device included in the semiconductor device is not limited to a lead frame, and various substrates in which an inorganic base material made of metal, ceramic, glass, or the like is coated with a plating film can be used.

[0041] The present disclosure includes the following embodiments. [1] A substrate for a semiconductor device comprising an inorganic base material and a plating film, wherein the plating film includes, from the inorganic base material side, a nickel plating layer and a precious metal plating layer, in this order, and the substrate for a semiconductor device has: a laminate portion whose surface is made of the precious metal plating layer; and an alloy portion whose surface is made of at least one selected from the group consisting of a nickel-containing alloy and an oxide of nickel. [2] The substrate for a semiconductor device according to [1], wherein the alloy in the alloy portion includes nickel and a precious metal. [3] The substrate for a semiconductor device according to [1] or [2], wherein the surface of the alloy portion has a smaller roughness than the surface of the laminate portion. [4] The substrate for a semiconductor device according to any one of [1] to [3], wherein the surface of the alloy portion has a lower wettability with respect to solder than the surface of the laminate portion. [5] A semiconductor device comprising the substrate for a semiconductor device according to any one of [1] to [4] above, and a semiconductor element electrically connected to the precious metal plating layer by solder. [6] A method for manufacturing a substrate for a semiconductor device, comprising the steps of: laminating at least a nickel plating layer and a precious metal plating layer on a surface of an inorganic base material to form a plating film whose surface is composed of the precious metal plating layer; and irradiating a part of the surface of the plating film with laser light to generate at least one selected from the group consisting of a nickel-containing alloy and a nickel oxide on the surface of the plating film. [7] The method for manufacturing a substrate for a semiconductor device according to [6], wherein the surface of the plating film is smoothed by the irradiation with laser light, and the surface roughness of the alloy part containing the alloy is made smaller than the surface roughness of the precious metal plating layer.

[0042] The present disclosure will be described in more detail with reference to examples and comparative examples, but the present disclosure is not limited to the following examples.

[0043] [Formation of plating film and property evaluation 1] (Comparative example 1) A copper lead frame substrate (length × width × thickness = 70 mm × 180 mm × 0.15 mm) was prepared. The lead frame substrate was degreased, acid-washed, chemically polished, and acid-washed. After that, a roughened nickel plating layer serving as an undercoat plating layer was formed on the surface of the lead frame substrate by electroplating using a commercially available nickel sulfamate bath and a DC power source.

[0044] A lead frame substrate having a roughened nickel plating layer formed thereon was subjected to electrolytic palladium plating and electrolytic gold plating to sequentially form a palladium plating layer and a gold plating layer on the roughened nickel plating layer. In this way, a plating film having a nickel plating layer, a palladium plating layer, and a gold plating layer in this order from the lead frame substrate side was formed. In this way, a lead frame having a lead frame substrate and a plating film on its surface was manufactured.

[0045] The surface of the plating film 10 (laminate portion 30) was observed using a stereomicroscope with a digital camera (Nikon Corporation, model: SMZ745T) and a field emission scanning electron microscope (FE-SEM, Hitachi High-Tech Corporation, model: S4800). FIG. 4A is a photograph taken with an optical microscope (magnification: 10x). FIGS. 4B, 4C, and 4D are FE-SEM photographs (magnifications: 3,000x, 5,000x, and 10,000x, respectively).

[0046] The composition of the surface of the plating film was analyzed using a commercially available Auger electron spectrometer (AES, manufactured by JEOL Ltd., model: JAMP-8510F). The results are shown in Table 1.

[0047] The surface roughness of the plating film was measured using a commercially available atomic force microscope (manufactured by Hitachi High-Tech Science Corporation, device name: scanning probe microscope "Nanopics"). The measurement results are shown in Table 1.

[0048] Example 1 The surface of the plating film of the lead frame of Comparative Example 1 was irradiated with laser light using a hybrid laser marker (model: MD-X2500A) manufactured by Keyence Corporation to form a square frame-shaped alloy part 20. The irradiation conditions of the laser light are shown in Table 1.

[0049] The surface of the alloy part 20 was observed in the same manner as in Comparative Example 1. Figure 5A is a photograph taken with an optical microscope (magnification: 10x). Figures 5B, 5C, and 5D are FE-SEM photographs of the surface of the alloy part (magnifications: 3,000x, 5,000x, and 10,000x, respectively). In the same manner as in Comparative Example 1, composition analysis of the surface of the alloy part was performed using an Auger electron spectroscopy device, and roughness measurement was performed. The measurement results are shown in Table 1.

[0050] Example 2 A square frame-shaped alloy part 20 was formed on the plating film of a lead frame in the same manner as in Example 1, except that the laser light irradiation conditions were changed as shown in Table 1. The surface of the alloy part 20 was observed in the same manner as in Example 1. FIG. 6A is a photograph taken with an optical microscope (magnification: 10x). FIGS. 6B, 6C, and 6D are FE-SEM photographs of the surface of the alloy part 20 (magnifications: 3,000x, 5,000x, and 10,000x, respectively). The composition of the surface of the alloy part was analyzed and the roughness was measured using an Auger electron spectrometer in the same manner as in Example 1. The measurement results are shown in Table 1.

[0051]

[0052] In Table 1, "N.D." indicates that it was not detected. As shown in Table 1, a comparison of Comparative Example 1 with Examples 1 and 2 confirmed that the surface properties of the plating film before irradiation with laser light (Comparative Example 1) differed from the surface properties of the plating film after irradiation with laser light (Examples 1 and 2). A comparison of Example 1 with Example 2 also confirmed that the surface properties of the plating film differed when the irradiation conditions of the laser light were changed. The reason that nitrogen and carbon were detected on the surface of the plating film is thought to be that the plating film adsorbed components and organic substances from the atmosphere.

[0053] Although the surface of the plating film before laser light irradiation was composed of a gold plating layer, Pd (palladium) was detected by AES in Comparative Example 1. This is because the gold plating layer was thin, at 5 nm, and Pd contained in the palladium plating layer underlying the gold plating layer was detected. While Ni (nickel) was not detected in Comparative Example 1 (laminated portion), Ni was detected as the main component in Examples 1 and 2 (alloy portion). Furthermore, Pd was detected in Examples 1 and 2 at levels equal to or greater than that of Comparative Example 1. These results confirmed that an alloy containing Ni and Pd was formed on the surface irradiated with laser light. The oxygen content was higher in Examples 1 and 2 than in Comparative Example 1. This suggests that nickel oxide is present on the alloy surface.

[0054] [Evaluation of suppression of solder wetting and spreading] (Example 1-1) A solder foil (M725, Sn-0.7Cu-Ni-P) manufactured by Senju Metal Industry Co., Ltd. was placed inside the square-frame-shaped alloy part of the lead frame of Example 1. The presence or absence of solder wetting and spreading was examined using a tabletop reflow machine (manufactured by UNITEMP, model: VSS-450-300). The solder reflow conditions were as follows: Atmosphere: nitrogen gas Heating rate from room temperature to 260°C: 3°C / sec Holding time at 260°C: 90 seconds Cooling rate from 260°C to room temperature: 1.4°C / sec

[0055] Using a stereomicroscope equipped with a digital camera (Nikon Corporation, model: SMZ745T), the appearance of the lead frame after reflow was photographed at 1x and 400x magnifications. Figure 7A is a photograph showing an overall image of the solder S after reflow in Example 1-1, and Figure 7B is a photograph (400x magnification of the photograph in Figure 7A) showing an enlarged image of the solder S and alloy portion 20 in Figure 7A.

[0056] Examples 1-2 to 1-4 Lead frames having a laminated portion and an alloy portion were fabricated in the same manner as in Example 1, except that the laser width when forming an alloy portion in the plating film was changed as shown in Table 2. Using the fabricated lead frames, solder reflow was performed under the same conditions as in Example 1-1, and the presence or absence of solder wetting and spreading was examined.

[0057] Fig. 8A is a photograph showing an overall image of the solder S after reflow in Example 1-2, and Fig. 8B is a photograph (400 times larger than the photograph in Fig. 8A) showing an enlarged view of the solder S and alloy portion 20 in Fig. 8A. Fig. 9A is a photograph showing an overall image of the solder S after reflow in Example 1-3, and Fig. 9B is a photograph (400 times larger than the photograph in Fig. 9A) showing an enlarged view of the solder S and alloy portion 20 in Fig. 9A. Fig. 10A is a photograph showing an overall image of the solder S after reflow in Example 1-4, and Fig. 10B is a photograph (400 times larger than the photograph in Fig. 10A) showing an enlarged view of the solder S and alloy portion 20 in Fig. 10A.

[0058] (Comparative Example 1-1) Using the lead frame of Comparative Example 1 that was not irradiated with laser light, solder reflow was performed under the same conditions as in Example 1-1, and the presence or absence of solder wetting and spreading was examined. Figure 11 is a photograph showing the overall image of the solder S after reflow in Comparative Example 1-1.

[0059]

[0060] As shown in the photographs, it was confirmed that in Comparative Example 1-1, the solder spread after reflow and the outer edge swelled. In Examples 1-1, 1-2, 1-3, and 1-4, the solder did not spread after reflow, and the outer edge of the solder after reflow maintained the same shape as before reflow.

[0061] [Effect of Laser Light Irradiation Conditions] (Examples 3-1 to 3-5) Lead frames of Examples 3-1 to 3-5 having a square frame-shaped alloy portion in the plating film were produced in the same manner as Examples 1 and 2, except that the laser light irradiation conditions were changed as shown in Table 3. Solder paste (manufactured by The Indium Corporation of America, composition: Sn95 / Sb5) was applied to two of the four corners of the laser irradiated area. Thereafter, solder reflow was performed under the same conditions as in Example 1-1, and the presence or absence of solder wetting and spreading was examined.

[0062]

[0063] FIG. 12A is a photograph of the lead frame (before solder reflow) after application of solder paste SP in Example 3-1, and FIG. 12B is a photograph of the lead frame (after solder reflow) in Example 3-1. FIG. 12C is a photograph of the lead frame (before solder reflow) after application of solder paste SP in Example 3-2, and FIG. 12D is a photograph of the lead frame (after solder reflow) in Example 3-2. FIG. 13A is a photograph of the lead frame (before solder reflow) after application of solder paste SP in Example 3-3, and FIG. 13B is a photograph of the lead frame (after solder reflow) in Example 3-3. FIG. 13C is a photograph of the lead frame (before solder reflow) after application of solder paste SP in Example 3-4, and FIG. 13D is a photograph of the lead frame (after solder reflow) in Example 3-4. FIG. 14A is a photograph of the lead frame of Example 3-5 after the application of solder paste SP (before solder reflow), and FIG. 14B is a photograph of the lead frame of Example 3-5 (after solder reflow).

[0064] As shown in the photographs of FIGS. 12A to 14B, it was confirmed that alloy portion 20 formed by laser irradiation suppresses the wetting and spreading of solder.

[0065] [Formation of plating film and property evaluation 2] (Comparative example 2) A copper lead frame substrate (length × width × thickness = 70 mm × 180 mm × 0.15 mm) was prepared. The lead frame substrate was degreased, acid-washed, chemically polished, and acid-washed. After that, a roughened nickel plating layer serving as an undercoat plating layer was formed on the surface of the lead frame substrate by electroplating using a commercially available nickel sulfamate bath and a DC power source.

[0066] The lead frame substrate on which the roughened nickel plating layer was formed was subjected to electrolytic palladium plating and electrolytic gold plating to sequentially form a palladium plating layer and a gold plating layer on the roughened nickel plating layer. In this way, a plating film including a nickel plating layer, a palladium plating layer, and a gold plating layer in this order from the lead frame substrate side was formed. In this way, a lead frame including a lead frame substrate and a plating film on its surface was manufactured.

[0067] The surface of the plating film was observed using the FE-SEM used in Comparative Example 1. The lead frame was cut along the lamination direction of each plating layer, and the cross section of the plating film was observed with the FE-SEM. Figures 15A and 15B are FE-SEM photographs (magnification: 10,000 times) showing the surface and cross section, respectively, of the plating film (laminate portion) of the lead frame of Comparative Example 2. The composition and roughness of the surface of the plating film were determined using the AES and atomic force microscope used in Comparative Example 1. The measurement results are shown in Table 4.

[0068] Example 4 A square frame-shaped alloy part was formed by irradiating the surface of the plating film of the lead frame of Comparative Example 2 with laser light using a hybrid laser marker (model: MD-X2500A) manufactured by Keyence Corporation. The laser light irradiation conditions are shown in Table 4.

[0069] The surface and cross section of the alloy portion of the plating film were observed in the same manner as in Comparative Example 2. Figures 15C and 15D are FE-SEM photographs (magnification: 10,000x) showing the surface and cross section, respectively, of the alloy portion of the lead frame of Example 4. As shown in Figures 15A, 15B, 15C, and 15D, it was confirmed that the surface of the alloy portion (Figures 15C and 15D) was smoother than the surface of the laminate portion (Figures 15A and 15B) due to laser light irradiation. The composition and roughness of the surface of the alloy portion in the plating film were determined in the same manner as in Comparative Example 2. The results are shown in Table 4.

[0070]

[0071] In Table 4, "N.D." indicates that no oxygen was detected. As shown in Table 4, a comparison of Comparative Example 2 and Example 4 confirmed that the surface properties of the plating film before laser light irradiation (Comparative Example 2: laminate portion) and after laser light irradiation (Example 4: alloy portion) were different. In Comparative Example 2, Ni was not detected, but in Example 4, Ni, Pd, and Au (gold) were detected as major components. This result confirmed that an alloy containing Ni, Pd, and Au was formed on the surface of the alloy portion. Example 4 had a higher oxygen content than Comparative Example 2. This suggests that nickel oxide is present on the surface of the alloy.

[0072] According to one aspect of the present disclosure, there is provided a substrate for a semiconductor device having excellent solder joint reliability, and a semiconductor device including such a substrate for a semiconductor device. According to one aspect of the present disclosure, there is provided a manufacturing method that can easily obtain a substrate for a semiconductor device having excellent solder joint reliability.

[0073] This application claims priority based on Japanese Patent Application No. 2024-107964, filed on July 4, 2024, and incorporates all of the contents of said application by reference.

[0074] 10...plating film, 10A, 20A, 30A...surface, 20...alloy part, 30...laminated part, 32...second precious metal plating layer, 34...first precious metal plating layer, 36...nickel plating layer, 40...lead frame substrate, 50...area, 51...pad, 52...terminal, 54...support bar, 55...unit frame, 56...tie bar, 70...encapsulating resin, 92...semiconductor element, 94...bonding wire, 100...lead frame, 300...semiconductor device.

Claims

1. A substrate for a semiconductor device comprising an inorganic base material and a plating film, wherein the plating film includes, from the inorganic base material side, a nickel plating layer and a precious metal plating layer in this order, the plating film having a laminate portion whose surface is composed of the precious metal plating layer, and an alloy portion whose surface is composed of at least one material selected from the group consisting of nickel-containing alloys and nickel oxides.

2. The substrate for a semiconductor device according to claim 1, wherein said alloy in said alloy portion contains nickel and a noble metal.

3. The substrate for a semiconductor device according to claim 1 or 2, wherein the surface of said alloy portion has a roughness smaller than that of the surface of said laminate portion.

4. The substrate for a semiconductor device according to any one of claims 1 to 3, wherein the surface of the alloy portion has lower wettability to solder than the surface of the laminate portion.

5. A semiconductor device comprising the substrate for a semiconductor device according to any one of claims 1 to 4 and a semiconductor element electrically connected to the noble metal plating layer by solder.

6. A method for manufacturing a substrate for a semiconductor device, comprising: a step of laminating at least a nickel plating layer and a precious metal plating layer on the surface of an inorganic base material to form a plating film whose surface is composed of the precious metal plating layer; and a step of irradiating a part of the surface of the plating film with laser light to generate at least one selected from the group consisting of a nickel-containing alloy and a nickel oxide on the surface of the plating film.

7. A method for manufacturing a substrate for a semiconductor device as described in claim 6, wherein the surface of the plating film is smoothed by irradiating the laser light, and the surface roughness of the alloy portion containing the alloy is made smaller than the surface roughness of the precious metal plating layer.

Citation Information

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