Power conversion device

Abstract

This power conversion device (100) is provided with a power converter (6) that comprises a plurality of arms (13p, 13n), and a control device (5). Each of the plurality of arms (13p, 13n) has a plurality of converter cells (1) that are cascade-connected to each other. Each of the plurality of converter cells (1) has a plurality of switching elements (31p, 31n) and a capacitor (32). The control device (5) comprises: a power calculation unit (214) that calculates the capacitor inflow power flowing into the capacitor (32) on the basis of the voltage command value, the arm current, the capacitor voltage, and the power loss generated in the converter cells (1); and a capacitance estimation unit (216) that estimates the capacitance of the capacitor (32) on the basis of the capacitor inflow power and the capacitor voltage.

Description

Power Conversion Device

[0001] The present disclosure relates to a power conversion device.

[0002] In recent years, modular multilevel converters (MMCs) have become known as high-voltage, large-capacity power conversion devices applied to high-voltage systems such as power grids. MMCs are composed of arms in which multiple unit converters called cells are cascaded. Each cell includes multiple semiconductor switches and capacitors, and by turning the semiconductor switches on and off, the voltage across the capacitor or zero voltage is output.

[0003] The capacitance of the capacitor provided in the unit converter decreases due to aging, etc. Since a decrease in capacitance can lead to failure of the MMC power converter, techniques for checking the deterioration state of the capacitor are known.

[0004] For example, the power conversion device disclosed in JP 2010-511876 A (Patent Document 1) includes a phase module shunt including a series circuit consisting of a submodule having a capacitor and a power semiconductor, and a capacitor diagnostic means for determining the capacitance of the capacitor in a time-dependent manner.

[0005] Special Publication No. 2010-511876

[0006] In Patent Document 1, the phase module branch current is integrated between the conduction and interruption of the power semiconductors of the submodule to obtain the change in capacitor charge, and the change in capacitance of the phase module capacitor is determined based on the change in charge and the change in capacitor voltage. However, with this configuration, sampling at a high sampling frequency and high-speed calculations are required in the section where the integration of the phase module branch current is performed, which may increase the processing load.

[0007] An object of one aspect of the present disclosure is to provide a power conversion device that can reduce the processing load when estimating the capacitance of a capacitor of a converter cell.

[0008] According to one embodiment, there is provided a power conversion device that performs power conversion between an AC circuit and a DC circuit. The power conversion device includes a power converter including a plurality of arms for each phase of the AC circuit, and a control device that controls the power converter. Each of the plurality of arms has a plurality of converter cells cascaded to each other, and each of the plurality of converter cells has a plurality of switching elements and a capacitor connected to the plurality of switching elements. The control device includes a power calculation unit that calculates a capacitor flowing power flowing into a capacitor of the converter cell based on a voltage command value for the power converter, an arm current flowing in the arm including the converter cell, a capacitor voltage indicating the voltage of the capacitor of the converter cell, and a power loss occurring in the converter cell, and a capacitance estimator that estimates the capacitance of the capacitor based on the capacitor flowing power and the capacitor voltage.

[0009] According to the power conversion device according to the present disclosure, it is possible to reduce the processing load when estimating the capacitance of the capacitor of the converter cell.

[0010] FIG. 1 is a diagram illustrating an example of the configuration of a power conversion device. FIG. 2 is a circuit diagram illustrating an example of a converter cell. FIG. 3 is a block diagram illustrating an example of the hardware configuration of a control device. FIG. 4 is a diagram representing the internal configuration of a control device according to a first embodiment. FIG. 5 is a diagram illustrating an example of the configuration of a basic control unit according to the first embodiment. FIG. 6 is a block diagram illustrating an example of the configuration of an arm control unit according to the first embodiment. FIG. 7 is a block diagram illustrating an example of the configuration of an individual cell control unit according to the first embodiment. FIG. 8 is a block diagram illustrating an example of the configuration of an incoming power calculation unit according to the first embodiment. FIG. 9 is a block diagram illustrating an example of the configuration of a frequency component extraction unit according to the first embodiment. FIG. 10 is a block diagram illustrating an example of the configuration of a capacitance calculation unit according to the first embodiment. FIG. 11 is a block diagram illustrating an example of the configuration of a basic control unit according to a second embodiment. FIG. 12 is a block diagram illustrating an example of the configuration of an individual cell control unit according to the second embodiment.

[0011] Hereinafter, the present embodiment will be described with reference to the drawings. In the following description, the same components are denoted by the same reference numerals. The names and functions of these components are also the same. Therefore, detailed description thereof will not be repeated.

[0012] [Configuration underlying each embodiment] <Overall configuration> Fig. 1 is a diagram showing an example configuration of a power conversion device. Referring to Fig. 1, a power conversion device 100 is connected between an AC circuit 2 and a DC circuit 4. The DC circuit 4 is, for example, a DC power system including a DC transmission network or a DC terminal of another power conversion device. In the latter case, two power converters are connected to form a back-to-back (BTB) system for connecting AC power systems with different rated frequencies, etc. The DC circuit 4 may be configured to include a power storage device connected to the DC terminal of the power converter 6. The power storage device may include, for example, an electric double layer capacitor or a storage battery such as a lithium-ion battery.

[0013] The power conversion device 100 includes a self-excited power converter 6 that performs power conversion between a DC circuit 4 and an AC circuit 2, and a control device 5 for controlling the power converter 6. Typically, the power converter 6 is configured by a modular multilevel converter that includes a plurality of converter cells (corresponding to the "cells" in FIG. 1) 1 connected in series with each other. A "converter cell" is also called a "sub-module" or "unit converter."

[0014] 1 , the power converter 6 includes a plurality of arms for each phase of the AC circuit 2. Specifically, the power converter 6 includes a plurality of leg circuits 8u, 8v, and 8w (hereinafter, collectively referred to as "leg circuits 8") connected in parallel between a positive DC terminal (i.e., a high-potential side DC terminal) Np and a negative DC terminal (i.e., a low-potential side DC terminal) Nn. The leg circuits 8 are connected between the AC circuit 2 and the DC circuit 4 and perform power conversion between the two circuits.

[0015] AC terminals Nu, Nv, and Nw provided in leg circuits 8u, 8v, and 8w, respectively corresponding to the U phase, V phase, and W phase of the AC circuit 2, are connected to the AC circuit 2 via a transformer 3. The AC circuit 2 is, for example, a three-phase AC power system including an AC power source. For ease of illustration, FIG. 1 does not show the connection between the AC terminals Nv and Nw and the transformer 3. DC terminals (i.e., a positive DC terminal Np and a negative DC terminal Nn) provided in common to each leg circuit 8 are connected to the DC circuit 4.

[0016] Instead of using the transformer 3 in Fig. 1 , the leg circuits 8u, 8v, 8w may be configured to be connected to the AC circuit 2 via an interconnection reactor. Furthermore, instead of the AC terminals Nu, Nv, Nw, primary windings may be provided in the leg circuits 8u, 8v, 8w, respectively, and the leg circuits 8u, 8v, 8w may be AC-connected to the transformer 3 or the interconnection reactor via secondary windings magnetically coupled to the primary windings. In this case, the primary windings may be reactors 7a, 7b described below. That is, the leg circuit 8 is electrically (i.e., DC- or AC-connected) to the AC circuit 2 via connection parts provided in each of the leg circuits 8u, 8v, 8w, such as the AC terminals Nu, Nv, Nw or the above-described primary windings.

[0017] The leg circuit 8u includes a positive arm 13pu extending from the positive DC terminal Np to the AC terminal Nu, and a negative arm 13nu extending from the negative DC terminal Nn to the AC terminal Nu. A connection point between the positive arm 13pu and the negative arm 13nu is connected to the transformer 3 as the AC terminal Nu. The positive DC terminal Np and the negative DC terminal Nn are connected to the DC circuit 4. The leg circuit 8v includes a positive arm 13pv and a negative arm 13nv, and the leg circuit 8w includes a positive arm 13pw and a negative arm 13nw.

[0018] Hereinafter, when referring to the positive arms 13pu, 13pv, and 13pw collectively or when referring to any one of them, they will be referred to as "positive arm 13p." When referring to the negative arms 13nu, 13nv, and 13nw collectively or when referring to any one of them, they will be referred to as "negative arm 13n." When referring to the positive arms 13pu, 13pv, and 13pw and the negative arms 13nu, 13nv, and 13nw collectively or when referring to any one of them, they will be referred to as "arms 13."

[0019] Since leg circuits 8v and 8w have the same configuration as leg circuit 8u, the following description will be centered on leg circuit 8u. In leg circuit 8u, positive arm 13pu includes a plurality of converter cells 1_1 to 1_M cascaded together and a reactor 7a. The plurality of converter cells 1 and reactor 7a are connected in series. Negative arm 13nu includes a plurality of converter cells 1_1 to 1_M cascaded together and a reactor 7b. The plurality of converter cells 1 and reactor 7b are connected in series.

[0020] In this embodiment, for example, the number of converter cells included in each arm 13 is set to M, where M≧2. Converter cells 1_1 to 1_M may also be collectively referred to as converter cell 1. Values ​​and variables after the underscore in converter cells 1_1 to 1_M indicate the index of converter cell 1. An arbitrary converter cell 1 may also be referred to as "converter cell 1_i" using index i. However, index i is not related to the physical arrangement of converter cell 1.

[0021] The reactor 7a may be inserted at any position in the positive arm 13pu, and the reactor 7b may be inserted at any position in the negative arm 13nu. There may be a plurality of reactors 7a and a plurality of reactors 7b. The inductance values ​​of the reactors may be different from each other. Furthermore, only the reactor 7a in the positive arm 13pu or only the reactor 7b in the negative arm 13nu may be provided.

[0022] The power conversion apparatus 100 further includes an AC voltage detector 10, an AC current detector 15, DC voltage detectors 11a and 11b, and arm current detectors 9a and 9b provided in each leg circuit 8. These detectors measure electrical quantities (i.e., current and voltage) used to control the power conversion apparatus 100. Signals detected by these detectors are input to the control device 5.

[0023] The AC voltage detector 10 detects the U-phase AC voltage Vacu, the V-phase AC voltage Vacv, and the W-phase AC voltage Vacw (hereinafter collectively referred to as "AC voltage Vac") of the AC circuit 2. The AC current detector 15 detects the U-phase AC current measured value Isysu, the V-phase AC current measured value Isysv, and the W-phase AC current measured value Isysw of the AC circuit 2. The DC voltage detector 11a detects the DC voltage Vdcp at the positive DC terminal Np connected to the DC circuit 4. The DC voltage detector 11b detects the DC voltage Vdcn at the negative DC terminal Nn connected to the DC circuit 4.

[0024] The arm current detectors 9a and 9b provided in the U-phase leg circuit 8u detect a positive arm current Ipu flowing in the positive arm 13pu and a negative arm current Inu flowing in the negative arm 13nu, respectively. The arm current detectors 9a and 9b provided in the V-phase leg circuit 8v detect a positive arm current Ipv and a negative arm current Inv, respectively. The arm current detectors 9a and 9b provided in the W-phase leg circuit 8w detect a positive arm current Ipw and a negative arm current Inw, respectively.

[0025] In the following description, the positive arm currents Ipu, Ipv, and Ipw are collectively referred to as positive arm current Iarmp. The negative arm currents Inu, Inv, and Inw are collectively referred to as negative arm current Iarmn. The positive arm current Iarmp and the negative arm current Iarmn are collectively referred to as arm current Iarm.

[0026] As shown in FIG. 1 , AC terminal Nu, which is the connection point between positive arm 13pu and negative arm 13nu of leg circuit 8u, is connected to transformer 3. Therefore, AC current Iacu flowing from AC terminal Nu to transformer 3 has a current value obtained by subtracting negative arm current Inu from positive arm current Ipu. The same is true for AC currents Iacv and Iacw. Therefore, "Iacu = Ipu - Inu", "Iacv = Ipv - Inv", and "Iacw = Ipw - Inw" are established. Hereinafter, AC currents Iacu, Iacv, and Iacw output from power converter 6 will also be collectively referred to as "AC current Iac."

[0027] The positive DC terminals of the leg circuits 8u, 8v, 8w of each phase are commonly connected as a positive DC terminal Np, and the negative DC terminals are commonly connected as a negative DC terminal Nn. From this configuration, the DC current Idc flowing from the positive terminal of the DC circuit 4 and returning to the DC circuit 4 via the negative terminal is defined as "Idc = (Ipu + Ipv + Ipw + Inu + Inv + Inw) / 2".

[0028] If the DC current component included in the leg current is equally shared by each phase, the current capacity of the cells can be equalized. Considering this, the difference between the leg current and 1 / 3 of the DC current value can be calculated as the current value of the circulating current that does not flow in the DC circuit 4 but flows between the legs of each phase. Therefore, if the circulating currents of the U phase, V phase, and W phase are Izu, Izv, and Izw, respectively, then "Izu = (Ipu + Inu) / 2 - Idc / 3", "Izv = (Ipv + Inv) / 2 - Idc / 3", and "Izw = (Ipw + Inw) / 2 - Idc / 3" hold. Hereinafter, the circulating currents Izu, Izv, and Izw will also be collectively referred to as "circulating current Iz."

[0029] <Configuration Example of Converter Cell> Fig. 2 is a circuit diagram showing an example of a converter cell. The converter cell 1 shown in Fig. 2 has a circuit configuration called a half-bridge configuration. The converter cell 1 includes a series body formed by connecting two switching elements 31p and 31n in series, a capacitor 32 as a power storage element, a voltage detector 33, a bypass switch 34, and a cooling fin 35 for cooling the switching elements 31p and 31n. The series body and the capacitor 32 are connected in parallel. The voltage detector 33 detects a capacitor voltage Vc, which is the voltage across the capacitor 32.

[0030] The two switching elements 31p and 31n are configured by connecting a free wheel diode in anti-parallel to a self-extinguishing semiconductor switching element such as an IGBT (Insulated Gate Bipolar Transistor), a MOSFET (Metal Oxide Semiconductor Field-Effect Transistor), or a GCT (Gate Commutated Turn-off) thyristor. The capacitor 32 is typically a film capacitor.

[0031] In the following description, the switching elements 31p and 31n are also collectively referred to as the switching elements 31. Furthermore, the on / off of the semiconductor switching elements in the switching elements 31 is simply referred to as the "on / off of the switching elements 31." The switching elements 31p and 31n are switched on and off in accordance with gate signals Gp and Gn received from the control device 5, respectively.

[0032] 2, both terminals of switching element 31n are defined as input / output terminals G1 and G2. The switching operations of switching elements 31p and 31n output the voltage across capacitor 32 and zero voltage. For example, when switching element 31p is on and switching element 31n is off, the voltage across capacitor 32 is output. When switching element 31p is off and switching element 31n is on, zero voltage is output.

[0033] The bypass switch 34 is connected between the input / output terminals G1 and G2. The bypass switch 34 is connected in parallel with the switching element 31n. The bypass switch 34 is turned on in response to a drive signal BP received from the control device 5, and the input / output terminals G1 and G2 are bypassed (i.e., the converter cell 1 is short-circuited). For example, when an element of a converter cell 1 fails, the bypass switch 34 is used to short-circuit the converter cell 1. As a result, even if an arbitrary converter cell 1 fails, the power converter 6 can continue to operate by using the other converter cells 1.

[0034] The cooling fins 35 are thermally connected to cooling media WI and WO for cooling the switching elements 31p and 31n. The cooling media WI and WO are, for example, pure water, also referred to as cooling water. The cooling media WI and WO are circulated by a pump (not shown). The cooling media WI is cooling water that flows into the cooling fins 35, and the cooling media WO is cooling water that flows out of the cooling fins 35.

[0035] Furthermore, temperature detectors DWI and DWO are provided inside or outside the converter cell 1. The temperature detector DWI detects the temperature Twi of the cooling medium WI flowing into the cooling fins 35 and outputs the temperature Twi to the control device 5. The temperature detector DWO detects the temperature Two of the cooling medium WO flowing out from the cooling fins 35 and outputs the temperature Two to the control device 5.

[0036] 2, temperature detectors DWI and DWO are provided for each converter cell 1. However, there may be a configuration in which the cooling medium WI input to each cooling fin 35 branches off from a piping connection point F1 and is supplied, and the cooling medium WO output from each cooling fin 35 joins at a piping connection point F2. In this case, the temperature detector DWI may be provided at the connection point F1, and the temperature detector DWO may be provided at the connection point F2. Note that the temperatures of the cooling medium WI branching off from the connection point F1 and input to each cooling fin 35 are all the same, and the temperatures of the cooling medium WO output from each cooling fin 35 joining at the connection point F2 are also all the same.

[0037] In this embodiment, a case will be described in which the converter cell 1 has a half-bridge cell configuration as shown in Fig. 2. However, the converter cell 1 may also be a converter cell that employs, for example, a full-bridge configuration circuit or a circuit called a clamped double cell.

[0038] <Example of Hardware Configuration of Control Device> Fig. 3 is a block diagram showing an example of the hardware configuration of a control device. The control device 5 in Fig. 3 is configured based on a computer. Referring to Fig. 3, the control device 5 includes one or more input converters 70, one or more S / H (sample and hold) circuits 71, a multiplexer (MUX) 72, an A / D converter 73, one or more CPUs (Central Processing Units) 74, a RAM (Random Access Memory) 75, a ROM (Read Only Memory) 76, one or more input / output interfaces 77, an auxiliary storage device 78, and a bus 79 that interconnects the above components.

[0039] The input converter 70 includes an auxiliary transformer for each input channel, which converts the detection signal from each electrical quantity detector in FIG. 1 into a signal with a voltage level suitable for subsequent signal processing.

[0040] A sample-and-hold circuit 71 is provided for each input converter 70. The sample-and-hold circuit 71 samples and holds a signal representing an electrical quantity received from the corresponding input converter 70 at a specified sampling frequency.

[0041] The multiplexer 72 sequentially selects the signals held in the plurality of sample-and-hold circuits 71. The A / D converter 73 converts the signal selected by the multiplexer 72 into a digital value. Note that by providing a plurality of A / D converters 73, A / D conversion may be performed in parallel on detection signals of a plurality of input channels.

[0042] The CPU 74 controls the entire control device 5 and executes arithmetic processing in accordance with a program. The RAM 75 as a volatile memory and the ROM 76 as a nonvolatile memory are used as the main memory of the CPU 74. The ROM 76 stores programs, setting values ​​for signal processing, etc. The auxiliary storage device 78 is a nonvolatile memory with a larger capacity than the ROM 76, and stores programs, data on detected values ​​of electricity, etc.

[0043] The input / output interface 77 is an interface circuit for communication between the CPU 74 and an external device.

[0044] At least a part of the control device 5 may be configured using circuits such as a field programmable gate array (FPGA) and an application specific integrated circuit (ASIC), or at least a part of the control device 5 may be configured using analog circuits.

[0045] Each embodiment will be described in detail below. Embodiment 1. <Functional Configuration of Control Device> (Overview of Internal Configuration) FIG. 4 is a diagram showing the internal configuration of a control device according to embodiment 1. Referring to FIG. 4, control device 5 includes an HMI (Human Machine Interface) 501, a U-phase basic control unit 502U, a V-phase basic control unit 502V, a W-phase basic control unit 502W, a U-phase positive arm control unit 503UP, a U-phase negative arm control unit 503UN, a V-phase positive arm control unit 503VP, a V-phase negative arm control unit 503VN, a W-phase positive arm control unit 503WP, and a W-phase negative arm control unit 503WN. Note that in this specification, various electrical quantities used for calculations in these control units constituting control device 5 are converted into units of the per unit (PU) method.

[0046] In the following description, U-phase basic control unit 502U, V-phase basic control unit 502V, and W-phase basic control unit 502W are also collectively referred to as "basic control units 502." U-phase positive side arm control unit 503UP, V-phase positive side arm control unit 503VP, and W-phase positive side arm control unit 503WP are also collectively referred to as "positive side arm control unit 503P." U-phase negative side arm control unit 503UN, V-phase negative side arm control unit 503VN, and W-phase negative side arm control unit 503WN are also collectively referred to as "negative side arm control unit 503N." Positive side arm control unit 503P and negative side arm control unit 503N are also collectively referred to as "arm control units 503."

[0047] The configuration of the basic control unit 502 and the arm control unit 503 is realized by, for example, a processing circuit. The processing circuit may be dedicated hardware, or may be the CPU 74 that executes a program stored in the internal memory of the control device 5. When the processing circuit is dedicated hardware, the processing circuit is configured by, for example, an FPGA, an ASIC, or a combination of these.

[0048] The basic control unit 502 for each phase uses the electrical quantities measured by the above-mentioned detectors to generate an arm voltage command value Varmpr for the positive arm 13p, an arm Varmnr for the negative arm 13n, a capacitor voltage command value Vcpr for the positive arm 13p, and a capacitor voltage command value Vcnr for the negative arm 13n. In the following description, when it is not specified which arm among the arms is being referred to, they will simply be referred to as arm voltage command value Varmr and capacitor voltage command value Vcr. The basic control unit 502 also generates a reference phase θp detected from the AC current Iac. The arm voltage command value Varmr is a command value for the arm voltage output from the arm including the converter cell 1.

[0049] The arm control unit 503 generates gate signals Gp, Gn for controlling the on and off of the switching elements 31p, 31n provided in each converter cell 1 constituting the arm based on each arm voltage command value Varmr, capacitor voltage command value Vcr and reference phase θp, and outputs the gate signals Gp, Gn to each converter cell 1.

[0050] (Configuration Example of Basic Control Unit) Fig. 5 is a diagram showing a configuration example of a basic control unit according to embodiment 1. Referring to Fig. 5 , basic control unit 502 includes an arm voltage command generating unit 601, a capacitor voltage command generating unit 610, and a reference phase detecting unit 620.

[0051] The arm voltage command generation unit 601 generates an arm voltage command value Varmpr for the M converter cells 1 included in the positive arm 13p and an arm voltage command value Varmnr for the M converter cells 1 included in the negative arm 13n. The arm voltage command generation unit 601 outputs the arm voltage command value Varmpr to the positive arm control unit 503P and outputs the arm voltage command value Varmnr to the negative arm control unit 503N. Hereinafter, the arm voltage command values ​​Varmpr and Varmnr will also be collectively referred to as the "arm voltage command value Varmr."

[0052] The capacitor voltage command generating unit 610 generates a capacitor voltage command value Vcrp for the capacitors 32 of the M converter cells 1 included in the positive arm 13p, and generates a capacitor voltage command value Vcrn for the capacitors 32 of the M converter cells 1 included in the negative arm 13n. The capacitor voltage command generating unit 610 outputs the capacitor voltage command value Vcrp to the positive arm control unit 503P, and outputs the capacitor voltage command value Vcrn to the negative arm control unit 503N.

[0053] The capacitor voltage command value Vcrp is set to, for example, the average voltage of the capacitors 32 of each converter cell 1 included in the positive arm 13p, and the capacitor voltage command value Vcrn is set to, for example, the average voltage of the capacitors 32 of each converter cell 1 included in the negative arm 13n. Hereinafter, the capacitor voltage command values ​​Vcrp and Vcrn are also collectively referred to as the "capacitor voltage command value Vcr."

[0054] The reference phase detector 620 detects a reference phase θp, which is the phase of a frequency synchronized with the AC voltage Vac output from the power converter 6, from the AC current Vac of each phase.

[0055] The following describes a specific configuration of the valve branch voltage command generating unit 601. The valve branch voltage command generating unit 601 includes an AC current control unit 603, a DC current control unit 604, a circulating current control unit 605, a command distributor 606, an AC current limiter 608, and a DC current limiter 609.

[0056] The AC current limiter 608 generates an AC current command value Iacref* by limiting the AC current command value Iacref to within a range R1 indicated by the AC current limit, based on the M abnormality signals Emp and the M abnormality signals Emn. The M abnormality signals Emp each indicate an abnormality in the capacitors 32 of the M converter cells 1 included in the positive arm 13p. The M abnormality signals Emn each indicate an abnormality in the capacitors 32 of the M converter cells 1 included in the negative arm 13n. Hereinafter, the abnormality signals Emp and Emn will also be collectively referred to as "abnormality signals Em."

[0057] Specifically, when the capacitance of the capacitor 32 in at least one converter cell 1 of the M converter cells 1 included in each arm 13 is less than the threshold value Th (for example, when at least one of the M abnormality signals Em indicates an abnormality), the AC current limiter 608 outputs, as the AC current command value Iacref*, a value obtained by limiting the AC current command value Iacref to a value equal to or greater than a lower limit value Imin1 and equal to or less than an upper limit value Imax1 (i.e., within a range R1). On the other hand, when the capacitance of the capacitor 32 in at least one converter cell 1 of the M converter cells 1 included in each arm 13 is equal to or greater than the threshold value Th, the AC current limiter 608 does not perform the above-mentioned limitation and outputs the AC current command value Iacref as is. In this case, "Iacref* = Iacref".

[0058] The AC current control unit 603 executes control to make the AC current Iac output from the power converter 6 follow the AC current command value Iacref (or the AC current command value Iacref*). Specifically, the AC current control unit 603 generates an AC control command value Vacr by feedback control for zeroing the deviation between the AC current Iac and the AC current command value Iacref and by feedforward control of the AC voltage Vac of the AC circuit 2. That is, the AC current control unit 603 generates the AC control command value Vacr for making the AC current Iac follow the AC current command value Iacref. The AC current command value Iacref is set in advance by, for example, a system operator or the like. The feedforward control is performed to improve the disturbance responsiveness of the AC circuit 2 to voltage fluctuations. A configuration may be adopted in which the feedforward control of the AC voltage Vac is not executed.

[0059] The DC current limiter 609 generates a DC current command value Idcref* by limiting the DC current command value Idcref to within a range R2 indicated by the DC current limit, based on the M abnormality signals Emp and the M abnormality signals Emn.

[0060] Specifically, when the capacitance of the capacitor 32 in at least one converter cell 1 of the M converter cells 1 included in each arm 13 is less than the threshold value Th (for example, when at least one of the M abnormality signals Em indicates an abnormality), the DC current limiter 609 outputs, as the DC current command value Idcref*, a value obtained by limiting the DC current command value Idcref to a value equal to or greater than the lower limit value Imin2 and equal to or less than the upper limit value Imax2 (i.e., within the range R2). On the other hand, when the capacitance of the capacitor 32 in at least one converter cell 1 of the M converter cells 1 included in each arm 13 is equal to or greater than the threshold value Th, the DC current limiter 609 does not perform the above-mentioned limitation and outputs the DC current command value Idcref as is. In this case, "Idcref* = Idcref".

[0061] The DC current control unit 604 executes control to make the DC current Idc output from the power converter 6 follow the DC current command value Idcref (or the DC current command value Idcref*). Specifically, the DC current control unit 604 generates a DC control command value Vdcr based on the DC voltage command value Vdcref and the DC current command value Idcref to make the deviation between the DC current Idc and the DC current command value Idcref zero. That is, the DC current control unit 604 generates the DC control command value Vdcr to make the DC current Idc follow the DC current command value Idcref. In this case, the DC voltage command value Vdcref may be calculated based on the detected DC voltage Vdc. The DC current command value Idcref is set in advance by, for example, a system operator or the like.

[0062] The circulating current control unit 605 executes control to make the circulating current Iz follow the circulating current command value Izref. Specifically, the circulating current control unit 605 generates a circulating control command value Vzr to set the deviation between the circulating current Iz and the circulating current command value Izref to zero. In one aspect, the circulating current command value Izref is set to zero, for example. In another aspect, the circulating current command value Izref is set so as to reduce the difference in the average values ​​of the capacitor voltages of the leg circuits 8u, 8v, and 8w and further reduce the difference in the average values ​​of the capacitor voltages of the positive arm 13p and the negative arm 13n for each phase.

[0063] The AC current control unit 603, DC current control unit 604, and circulating current control unit 605 described above may be configured as a proportional controller, a PI controller, a PID controller, or other controllers used for feedback control.

[0064] The command distributor 606 receives as inputs an AC control command value Vacr, a circulating control command value Vzr, a DC control command value Vdcr, and a neutral point voltage Vsn. Since the AC side of the power converter 6 is connected to the AC circuit 2 via the transformer 3, the neutral point voltage Vsn can be determined from the voltage of the DC power supply of the DC circuit 4. The DC control command value Vdcr may be determined by the above-mentioned DC output control, or may be a constant value.

[0065] Based on these inputs, the command distributor 606 calculates the voltages to be output by the positive arm 13 p and the negative arm 13 n. The command distributor 606 generates an arm voltage command value Varmpr for the positive arm 13 p and an arm voltage command value Varmnr for the negative arm 13 n by subtracting the voltage drops due to the inductance components in the positive arm 13 p and the negative arm 13 n from the calculated voltages.

[0066] The generated arm voltage command values ​​Varmpr and Varmnr are output voltage command values ​​that make the AC current Iac follow the AC current command value Iacref, make the circulating current Iz follow the circulating current command value Izref, and make the DC voltage Vdc follow the DC voltage command value Vdcref, and also perform feedforward control of the AC voltage Vac.

[0067] (Configuration example of arm control unit) Fig. 6 is a block diagram showing a configuration example of the arm control unit according to the first embodiment. Referring to Fig. 6, the arm control unit 503 includes M individual cell control units 202_1, ..., 202_M (hereinafter also collectively referred to as "individual cell control units 202"). In addition, any individual cell control unit 202 is also referred to as an "individual cell control unit 202_i" using index i.

[0068] The individual cell control unit 202_i individually controls the corresponding converter cell 1_i. The individual cell control unit 202_i receives, from the basic control unit 502, an arm voltage command value Varmr, an arm current Iarm, a capacitor voltage command value Vcr, a reference phase θp, a carrier frequency fc, and a carrier phase θc.

[0069] The individual cell control unit 202_i generates gate signals Gp(i), Gn(i) for the converter cell 1_i and a drive signal BP(i) for the bypass switch 34 and outputs them to the converter cell 1_i. Meanwhile, the individual cell control unit 202_i receives the detected value of the capacitor voltage Vc(i) from the voltage detector 33 of the converter cell 1_i and receives temperatures Twi(i), Two(i) from the temperature detectors DWI, DWO. The individual cell control unit 202_i outputs the capacitor voltage Vc(i) and an abnormality signal Em(i) generated based on the capacitor voltage Vc(i) and temperatures Twi(i), Two(i) to the basic control unit 502.

[0070] <Configuration Example of Individual Cell Control Unit> Fig. 7 is a block diagram showing a configuration example of an individual cell control unit according to embodiment 1. Referring to Fig. 7 , individual cell control unit 202 includes a carrier wave generation unit 203, an individual voltage control unit 205, a gate signal generation unit 207, a coefficient calculation unit 210, a power loss calculation unit 212, an incoming power calculation unit 214, a capacitance estimation unit 216, an abnormality determination unit 218, and a BPS drive unit 220.

[0071] (Gate Signal Generation Method) First, the method for generating the gate signals Gp and Gn will be described.

[0072] The carrier wave generating unit 203 generates a carrier signal CS having a certain frequency (i.e., carrier frequency) used in phase-shift PWM (Pulse Width Modulation) control. Phase-shift PWM control shifts the timing of PWM signals output to each of a plurality of (e.g., M) converter cells 1 constituting the same arm (e.g., positive arm 13p or negative arm 13n). It is known that this reduces harmonic components contained in the composite voltage of the output voltages of the converter cells 1.

[0073] The carrier wave generating unit 203 generates carrier signals CS that are out of phase with each other among the M converter cells 1, based on the common carrier phase θc and carrier frequency fc received from the basic control unit 502. The carrier signal CS is, for example, a periodic signal such as a triangular wave signal.

[0074] The individual voltage control unit 205 receives as input the arm voltage command value Varmr of the arm to which the corresponding converter cell 1 belongs, the detected value of the arm current Iarm of that arm, the capacitor voltage command value Vcr, and the capacitor voltage Vc of the corresponding converter cell 1. The capacitor voltage command value Vcr may be set to the average value of the capacitor voltages Vc of the entire power converter 6, or may be set to the average value of the capacitor voltages of M converter cells 1 included in the same arm.

[0075] The individual voltage control unit 205 performs a calculation on the deviation of the capacitor voltage Vc from the capacitor voltage command value Vcr to calculate a control output value for individual voltage control. The functional unit for calculating the control output value is configured, for example, by a controller that executes PI control, PID control, or the like. The control output value for charging and discharging the capacitor 32 in a direction to eliminate the deviation is calculated by multiplying the calculated value by the controller by "+1" or "-1" depending on the polarity of the valve branch current Iarm. Alternatively, the control output value for charging and discharging the capacitor 32 in a direction to eliminate the deviation may be calculated by multiplying the calculated value by the controller by the valve branch current Iarm.

[0076] The individual voltage control unit 205 outputs a cell voltage command value Vcellr by adding the arm voltage command value Varmr and the control output value. The cell voltage command value Vcellr is a command value for the cell voltage output from the converter cell 1.

[0077] The gate signal generator 207 generates gate signals Gp and Gn by PWM-modulating the cell voltage command value Vcellr using the carrier signal CS from the carrier wave generator 203 .

[0078] (Method for Estimating Electrostatic Capacitance) Next, a method for estimating the electrostatic capacitance of the capacitor 32 of the converter cell 1 will be described.

[0079] The power loss calculation unit 212 calculates the power loss occurring in the converter cell 1. Specifically, the power loss calculation unit 212 calculates the power loss PRest, which is an estimated value of the instantaneous power loss occurring in the resistance element included in the converter cell 1, and the power loss PSCest, which is an estimated value of the instantaneous power loss occurring in the multiple switching elements 31p, 31n included in the converter cell 1. The resistance element is a resistance element connected in parallel with the capacitor 32.

[0080] The power loss PRest is expressed by the following equation (1) using the capacitor voltage Vc and the resistance value R of the resistance element connected in parallel with the capacitor 32. The resistance value R is a value obtained, for example, by measurements in a characteristic test of the converter cell 1 conducted in advance. Note that in the following equation (1), V is used as the resistance value R for the sake of simplicity. ｃ For example, "V in a formula" ｃ " is the same as "Vc in the text." This also applies to the formulas described later.

[0081]

[0082] The power loss calculation unit 212 calculates the power loss PSCest using an arithmetic expression based on the arm current Iarm of the arm to which the corresponding converter cell 1 belongs. Specifically, the power loss PSCest is expressed by the following equation (2). b0, b1, and b2 are coefficients. In equation (2), the multiplication sign is omitted. This also applies to the following equations.

[0083]

[0084] Here, the coefficients b0, b1, and b2 are calculated by the coefficient calculation unit 210. Specifically, this calculation utilizes the fact that the coefficients b0, b1, and b2 change with the junction temperature. The coefficient calculation unit 210 calculates the coefficients b0, b1, and b2 of equation (2) based on the valve branch current Iarm and the differential temperature between the temperature Twi of the cooling medium WI flowing into the cooling fin 35 and the temperature Two of the cooling medium WO flowing out of the cooling fin 35. Specifically, the coefficient calculation unit 210 calculates the time-averaged loss Pscav of power generated in the multiple switching elements 31p and 31n of the converter cell 1 based on the differential temperature, and calculates the coefficients b0, b1, and b2 of equation (2) using the time-averaged loss Pscav. Meanwhile, the time-averaged loss Pscav is expressed by the following equation (3) using the time average value |Iarm|av of the absolute value of the valve branch current Iarm and the effective value IarmR of the valve branch current Iarm:

[0085]

[0086] The coefficient calculation unit 210 uses the time-average loss Pscav, the time-average value |Iarm|av, and the effective value IarmR, as well as a lookup table prepared in advance, to select appropriate coefficients b0, b1, and b2 that satisfy the relational expression (3).

[0087] A method for calculating the time-averaged loss Pscav from the difference between the temperatures Twi and Two will be described. Specifically, the specific heat capacities of the cooling media WI and WO are Cp [J / (K g)] and densities ρ [g / cm ３ ], and the flow rate of the cooling media WI and WO flowing through one cooling fin 35 is Qw [L / s], the time-averaged loss Pscav generated in the multiple switching elements 31p, 31n of the converter cell 1 is expressed by the following equation (4).

[0088]

[0089] The coefficient calculation unit 210 may calculate the time-average loss Pscav based on the differential power between the AC active power output from the power converter 6 to the AC circuit 2 and the active power output from the power converter 6 to the DC circuit 4. A method for calculating the time-average loss Pscav will be described. Here, the AC active power in the AC circuit 2 is denoted by Pac, the DC active power in the DC circuit 4 is denoted by Pdc, and the number of all converter cells 1 included in the power converter 6 is denoted by Nall. In addition, the loss occurring in the power converter 6 other than the converter cell 1 is denoted by Pother. In the converter cell 1, the loss occurring in the converter cell 1 other than the multiple switching elements 31p, 31n is denoted by Psmother. In this case, assuming that the loss occurring in the converter cell 1 is uniform, the time-average loss Pscav occurring in the multiple switching elements 31p, 31n of the converter cell 1 is expressed by the following equation (5).

[0090]

[0091] Here, the loss Pother and the loss Psmother may be either actual measured values ​​or estimated values. For example, one type of loss Pother is the loss Ptr generated in the transformer 3, but it is difficult to actually measure the loss Ptr. Therefore, the loss Ptr may be calculated (estimated) using the no-load loss Ptri, the load loss Ptrcn when the current flowing into the transformer 3 is at its maximum, the ratio a between the effective value of the AC current obtained by the AC current detector 15 and the effective value of the maximum current flowing into the transformer 3, and the following equation (6):

[0092]

[0093] An example of the loss Psmother is the power loss PRest that occurs at the resistance value R of the resistance element connected in parallel to the capacitor 32, and can be calculated using equation (1).

[0094] Furthermore, the coefficients b0, b1, and b2 may be approximated from data on losses relative to current obtained by measurements in a previous characteristic test of the converter cell 1, and may be predetermined to values ​​under specified temperature conditions. In this case, the coefficient calculation unit 210 is not required.

[0095] 8 is a block diagram showing an example of the configuration of the incoming power calculation unit according to the first embodiment. Referring to Fig. 8, incoming power calculation unit 214 calculates capacitor incoming power flowing into capacitor 32 of converter cell 1 based on a cell voltage command value Vcellr for converter cell 1 of power converter 6, an arm current Iarm flowing in an arm including converter cell 1, and a power loss occurring in converter cell 1. Specifically, incoming power calculation unit 214 includes multipliers 251 and 252, an adder 254, a subtractor 256, calculators 258 and 259, and a frequency component extraction unit 261.

[0096] The multiplier 251 outputs the product of the cell voltage command value Vcellr and the capacitor voltage Vc of the converter cell 1. The multiplier 252 calculates the product of the multiplied value output from the multiplier 251 and the arm current Iarm as the cell incoming power Psmest, which is the instantaneous power flowing into the converter cell 1. That is, the incoming power calculation unit 214 calculates the cell incoming power Psmest by multiplying the cell voltage command value Vcellr, the capacitor voltage Vc, and the arm current Iarm together, as shown in the following equation (7).

[0097]

[0098] The adder 254 outputs the sum of the power loss PSCest and the power loss PRest occurring in the converter cell 1. The subtractor 256 outputs the subtraction value obtained by subtracting the sum from the cell flowing power Psmest as the capacitor flowing power Pcest, which is an estimate of the instantaneous power flowing into the capacitor 32 of the converter cell 1. That is, the flowing power calculation unit 214 calculates the capacitor flowing power Pcest by subtracting the power loss PSCest and the power loss PRest from the cell flowing power Psmest, as shown in the following equation (8).

[0099]

[0100] The calculator 258 outputs the sine of the reference phase θp (i.e., sin θp). The calculator 259 outputs the cosine of the reference phase θp (i.e., cos θp). The frequency component extractor 261 extracts a specified frequency component from the power Pcest flowing into the capacitor based on the power Pcest flowing into the capacitor and the sine and cosine of the reference phase θp, and calculates the power Pc1fest flowing into the capacitor.

[0101] FIG. 9 is a block diagram showing an example configuration of a frequency component extraction unit according to the first embodiment. Referring to FIG. 9 , frequency component extraction unit 261 multiplies input value Xin by a sine wave sin θ and a cosine wave cos θ oscillating at a specified frequency to be extracted, and then filters the doubled product to extract a DC component. Frequency component extraction unit 261 calculates the square root of the sum of the squares of the DC components and outputs the square root as output value Xout. Specifically, frequency component extraction unit 261 includes multipliers 271, 274, 281, and 284, proportional units 272 and 282, filters 273 and 283, an adder 291, and a calculator 292.

[0102] For example, if the reference angular frequency is "ω", the time is "t", and the order of the specified frequency is "k", the phase θ is expressed as "k*ω*t". Furthermore, the input value Xin is defined as in the following equation (9).

[0103]

[0104] "n" is the order relative to the reference angular frequency ω, An (where n≧0) is the magnitude of the frequency component of each order, and φn is the phase of the frequency component of each order. As shown in the following equation (10), the multiplier 271 calculates a value obtained by multiplying the input value Xin by a sine wave sin θ (= sin(kωt)). As shown in the following equation (11), the multiplier 281 calculates a value obtained by multiplying the input value Xin by a cosine wave cos θ (= cos(kωt)).

[0105]

[0106] Proportionalizer 272 multiplies the value obtained by multiplier 271 by "2." Proportionalizer 282 multiplies the value obtained by multiplier 271 by "2." Filter 273 outputs value XoutS obtained by extracting the DC component from the value calculated by proportionalizer 272. Filter 283 outputs value XoutC obtained by extracting the DC component from the value calculated by proportionalizer 282. Filters 273 and 283 may be any filter capable of extracting DC components, such as a low-pass filter. As a result, only the frequency component where "n=k" is extracted, and therefore values ​​XoutS and XoutC are expressed by equations (12) and (13), respectively.

[0107]

[0108] Multiplier 274 squares value XoutS. Multiplier 284 squares value XoutC. Adder 291 outputs the sum of the square of value XoutS and the square of value XoutC. Operator 292 outputs output value Xout, which is the square root of the sum. Therefore, the following equation (14) is obtained for output value Xout.

[0109]

[0110] It is possible to extract the magnitude Ak (ie, output value Xout) of the kth order frequency component based on the reference angular frequency ω contained in the input value Xin.

[0111] In this embodiment, the specified frequency is the same as the frequency of the AC voltage Vac in the AC circuit 2. Therefore, the phase angle rotated at the specified frequency is equal to "θp." Therefore, the frequency component extractor 261 uses the phase θp to extract the capacitor flowing power Pc1fest (i.e., corresponding to the output value Xout), which is the specified frequency component of the capacitor flowing power Pcest (i.e., corresponding to the input value Xin).

[0112] The reason for extracting the power Pc1fest flowing into the capacitor 32 is that the instantaneous power flowing into the capacitor 32 contains many frequency components that are the same as the frequency of the AC voltage Vac. This is shown below.

[0113] If the voltage output by the converter cell 1 is "Vsm", the voltage Vsm is ideally composed of a DC component and a fundamental frequency component, with the DC component being Vdcsm and the fundamental frequency component being Vacsm. In this case, the voltage Vsm is expressed by the following equation (15).

[0114]

[0115] The arm current Iarm is also ideally composed of a DC component and a fundamental frequency component, and the DC component is Idcarm and the fundamental frequency component is Iacarm. In this case, the arm current Iarm is expressed by the following equation (16).

[0116]

[0117] Here, "α" is the phase difference with respect to the AC component of the voltage Vsm output by the converter cell 1. Therefore, ideally, the cell flow-in power Psmest derived by equation (7) is equal to the value obtained by multiplying equations (15) and (16), and is therefore expressed by the following equation (17).

[0118]

[0119] However, the DC component Psmdc of the cell incoming power Psmest is expressed by the following equation (18), the fundamental frequency component Psm1f of the cell incoming power Psmest is expressed by the following equation (19), the phase φ1f is expressed by the following equation (20), the double fundamental frequency component Psm2f of the cell incoming power Psmest is expressed by the following equation (21), and the phase φ2f is expressed by the following equation (22).

[0120]

[0121] This shows that the cell flow-in power Psmest contains many components with the same frequency as the fundamental frequency of the AC voltage Vac. Therefore, the capacitor flow-in power Pcest, which is obtained by subtracting the power losses PRest and PSCest from the cell flow-in power Psmest, also contains many components with the same frequency as the fundamental frequency of the AC voltage Vac.

[0122] The specified frequency component may be any other frequency component that is contained in large amounts in the capacitor flow-in power Pcest. For example, according to equations (17), (20), and (22), the cell flow-in power Psmest also contains a component that is twice the fundamental frequency of the AC voltage Vac. Therefore, the specified frequency component may be a component that is twice the fundamental frequency of the AC voltage Vac.

[0123] As described above, the incoming power calculation unit 214 calculates the cell incoming power Psmest flowing into the converter cell 1 based on the cell voltage command value Vcellr, the capacitor voltage Vc, and the arm current Iarm. The incoming power calculation unit 214 calculates the capacitor incoming power Pc1fest based on a subtraction value (i.e., the capacitor incoming power Pcest) obtained by subtracting the power losses PRest and PSCest generated in the converter cell 1 from the cell incoming power Psmest. Specifically, the incoming power calculation unit 214 extracts a specified frequency component (e.g., a fundamental frequency component) from the subtraction value and calculates it as the capacitor incoming power Pc1fest.

[0124] Referring again to FIG. 7, the capacitance estimating unit 216 calculates the capacitance Cest, which is an estimate of the capacitance of the capacitor 32, based on the power Pc1fest flowing into the capacitor and the capacitor voltage Vc.

[0125] 10 is a block diagram showing an example of the configuration of a capacitance calculation unit according to the first embodiment. Referring to Fig. 10, capacitance estimation unit 216 calculates capacitor current Ic flowing into capacitor 32. When the capacitance of capacitor 32 is C, the following equation (23) holds.

[0126]

[0127] Furthermore, the capacitance estimation unit 216 calculates the instantaneous power Pc flowing into the capacitor 32 based on the capacitor voltage Vc and the capacitor current Ic. The instantaneous power Pc is expressed by the following equation (24). As a result, the following equation (25) is obtained.

[0128]

[0129] Specifically, the capacitance estimation unit 216 includes a multiplier 301 , a differentiator 302 , calculators 304 and 305 , a frequency component extraction unit 306 , a proportional unit 311 , and a divider 312 .

[0130] Multiplier 301 calculates the square of capacitor voltage Vc. Differentiator 302 calculates the differential value shown in equation (25) by differentiating the square of capacitor voltage Vc with respect to time. Calculator 304 outputs the sine of reference phase θp (i.e., sin θp). Calculator 305 outputs the cosine of reference phase θp (i.e., cos θp).

[0131] The frequency component extractor 306 extracts the fundamental frequency component Vcsq1f of the time differential value of the square of the capacitor voltage Vc based on the value calculated by the differentiator 302 and the sine and cosine of the reference phase θp.

[0132] Here, the instantaneous power Pc shown in equation (24) and the capacitor flow-in power Pcest shown in equation (8) ideally coincide with each other. Therefore, the values ​​extracted from the instantaneous power Pc and the capacitor flow-in power Pcest at the same frequency components also ideally coincide with each other. Therefore, the following equation (26) holds for the capacitance Cest, which is an estimated value of the capacitance C.

[0133]

[0134] This allows the capacitance estimating unit 216 to calculate the capacitance Cest of the capacitor 32.

[0135] 7 , the abnormality determination unit 218 outputs an abnormality signal Em indicating an abnormality in the converter cell 1 based on the capacitance Cest of the capacitor 32 of the converter cell 1 and a threshold value Th. Specifically, the abnormality determination unit 218 outputs the abnormality signal Em when the capacitance Cest is less than the threshold value Th, and does not output the abnormality signal Em when the capacitance Cest is equal to or greater than the threshold value Th. The threshold value Th is set to a capacitance value such that, when the power supplied to the power converter 6 is large, ripples in the capacitor voltage Vc cause the capacitor voltage to exceed a hardware upper limit (e.g., insulation specifications, etc.).

[0136] When the abnormality signal Em is output, the BPS drive unit 220 receives the abnormality signal Em. Here, it is assumed that the number M of converter cells 1 included in each arm is greater than the number required for operation. In this case, the BPS drive unit 220 outputs a drive signal BP for closing the bypass switch 34 in response to receiving the abnormality signal Em. That is, the BPS drive unit 220 closes the bypass switch 34 when the capacitance Cest of the capacitor 32 of the converter cell 1 is less than the threshold value Th. This allows maintenance of the power converter 6 to continue without limiting power, or allows the power converter 6 to continue operating until operation is stopped for part replacement.

[0137] The abnormality signal Em is also transmitted to the HMI 501 shown in FIG. 4 . By receiving each abnormality signal Em, the HMI 501 can monitor which capacitor 32 in the power converter 6 has deteriorated. In one aspect, when the capacitance Cest of the capacitor 32 in at least one converter cell 1 among the multiple converter cells 1 is less than a threshold Th, the HMI 501 receives the abnormality signal Em corresponding to the at least one converter cell 1. In this case, the HMI 501 notifies information for identifying the at least one converter cell 1. For example, the HMI 501 displays the information on a display or the like.

[0138] This allows the system operator to quickly identify converter cells 1 that require part replacement when operation is stopped for maintenance or part replacement of the power converter 6, thereby shortening the period of operation outage. In addition, since the system operator can also identify the number of converter cells 1 that require part replacement in advance, there is no need to prepare more spare converter cells 1 than necessary, and management costs, etc. can be reduced.

[0139] <Advantages> According to the first embodiment, a calculation for estimating capacitance is performed based on detected current and voltage values, voltage command values, etc., which are obtained at any time, without using complex integral calculations, etc. Therefore, the processing load of the calculation can be reduced.

[0140] Second Embodiment In the first embodiment described above, the coefficient calculation unit 210, the power loss calculation unit 212, and the incoming power calculation unit 214, which are functional components for calculating the capacitor flowing power Pc1fest, are provided in the individual cell control unit 202. In the second embodiment, a configuration will be described in which these functional components are provided in the basic control unit 502 of each phase.

[0141] Fig. 11 is a block diagram showing an example of the configuration of a basic control unit according to the second embodiment. Referring to Fig. 11, basic control unit 502A has a configuration in which coefficient calculation units 210P and 210N, power loss calculation units 212P and 212N, incoming power calculation units 214P and 214N, and capacitor voltage average value calculation unit 230 are added to basic control unit 502 shown in Fig. 5. Detailed description of components similar to those of basic control unit 502 will not be provided.

[0142] The capacitor voltage average value calculation unit 230 receives input of M capacitor voltages Vc of the positive arm 13p and calculates an average voltage value VcavP, which is the average value of the M capacitor voltages Vc. The capacitor voltage average value calculation unit 230 receives input of M capacitor voltages Vc of the negative arm 13n and calculates an average voltage value VcavN, which is the average value of the M capacitor voltages Vc. The average voltage value VcavP is input to the power loss calculation unit 212P, and the average voltage value VcavN is input to the power loss calculation unit 212N.

[0143] The coefficient calculation method used by coefficient calculation units 210P and 210N is generally similar to the method used by coefficient calculation unit 210. Specifically, coefficient calculation unit 210P calculates coefficients b0P, b1P, and b2P in equation (2) based on positive-side arm current Iarmp in positive-side arm 13p and the temperature difference between temperatures Twi and Two. Similarly, coefficient calculation unit 210N calculates coefficients b0N, b1N, and b2N in equation (2) based on negative-side arm current Iarmn in negative arm 13n and the temperature difference between temperatures Twi and Two.

[0144] In this case, the temperature Twi is the average temperature of the cooling medium WI flowing into each converter cell 1 included in the positive arm 13p and the negative arm 13n, and the temperature Two is the average temperature of the cooling medium WO flowing into each converter cell 1 included in the positive arm 13p and the negative arm 13n.

[0145] In the following, for ease of explanation, the converter cell 1 included in the positive arm 13p will also be referred to as the "converter cell 1p", and the converter cell 1 included in the negative arm 13n will also be referred to as the "converter cell 1n".

[0146] The power loss calculation unit 212P calculates the average power loss PRP generated in the resistance elements included in the converter cell 1p. In this case, "VcavP" and "PRP" are used instead of "Vc" and "PRest" in equation (1), respectively. The power loss calculation unit 212P also calculates the average power loss PSCP generated in the multiple switching elements 31p, 31n in the converter cell 1p. In this case, coefficients b0P, b1P, and b2P are used instead of the coefficients b0, b1, and b2 in equations (2) and (3), and the positive arm current Iarmp is used instead of the arm current Iarm. In addition, "PSCP" is used instead of "PSCest" in equation (2).

[0147] The power loss calculation unit 212N calculates the average power loss PRN generated in the resistance elements in the converter cell 1n. In this case, "VcavN" and "PRest" in equation (1) are replaced with "VcavN" and "PRest," respectively. The power loss calculation unit 212N also calculates the power loss PSN generated in the multiple switching elements 31p, 31n in the converter cell 1n. In this case, coefficients b0N, b1N, and b2N are used instead of the coefficients b0, b1, and b2 in equations (2) and (3), and the negative arm current Iarmn is used instead of the arm current Iarm. In addition, "PSCN" is used instead of "PSCest" in equation (2).

[0148] The inflow power calculation unit 214P calculates the average capacitor inflow power Pc1favP flowing into the capacitor 32 of the converter cell 1p based on the arm voltage command value Varmpr for the power converter 6, the positive arm current Iarmp flowing in the positive arm 13p, and the average power loss PRP and power loss PSCP generated in each converter cell 1p.

[0149] Specifically, the incoming power calculation unit 214P calculates the cell incoming power PsmP flowing into the converter cell 1p by multiplying the arm voltage command value Varmpr by the voltage average value VcavP by the positive side arm current Iarmp and dividing the product by the number M. That is, "PsmP = (Varmpr * VcavP * Iarmp) / M". This utilizes the fact that the cell incoming power flowing into the converter cell 1p is approximately equal to the value obtained by dividing the arm incoming power flowing into the positive side arm 13p by "M".

[0150] Next, the flowing power calculation unit 214P calculates the capacitor flowing power PcavP flowing into the capacitor 32 of the converter cell 1p by subtracting the power loss PRP and the power loss PSCP from the cell flowing power PsmP. Then, the flowing power calculation unit 214P calculates the capacitor flowing power Pc1favP by extracting the fundamental frequency component from the capacitor flowing power PcavP.

[0151] Similarly, the inflow power calculation unit 214N calculates the average capacitor inflow power Pc1favN flowing into the capacitor 32 of the converter cell 1n based on the arm voltage command value Varmnr for the power converter 6, the negative arm current Iarmn flowing through the negative arm 13p, and the average power loss PRN and power loss PSCN generated in each converter cell 1n.

[0152] Specifically, the incoming power calculation unit 214N calculates the cell incoming power PsmN flowing into the converter cell 1n by multiplying the arm voltage command value Varmnr by the voltage average value VcavN and the negative arm current Iarmn, and dividing the product by the number M. That is, "PsmN = (Varmnr * VcavN * Iarmn) / M".

[0153] Next, the incoming power calculation unit 214N calculates the capacitor incoming power PcavN flowing into the capacitor 32 of the converter cell 1n by subtracting the power losses PRN and PSCN from the cell incoming power PsmN. Then, the incoming power calculation unit 214N calculates the capacitor incoming power Pc1favN by extracting the fundamental frequency component from the capacitor incoming power PcavN. Hereinafter, the capacitor incoming powers Pc1favP and Pc1favN will also be collectively referred to as "capacitor incoming power Pc1fav."

[0154] Fig. 12 is a block diagram showing an example of the configuration of an individual cell control unit according to embodiment 2. Referring to Fig. 12, individual cell control unit 202A is obtained by deleting coefficient calculation unit 210, power loss calculation unit 212, and incoming power calculation unit 214 from individual cell control unit 202 shown in Fig. 7, and by replacing capacitance estimator 216 with capacitance estimator 216A.

[0155] The capacitance estimator 216A differs from the capacitance estimator 216 in that it receives an input of the power flowing into the capacitor Pc1fav instead of the power flowing into the capacitor Pc1fest. The capacitance estimator 216A calculates the capacitance Cest of the capacitor 32 by using "Pc1fav" instead of "Pc1fest" in equation (26).

[0156] <Advantages> According to the second embodiment, the capacitance of the capacitor can be estimated by utilizing the fact that the cell flowing into the converter cell is approximately equal to the value obtained by dividing the arm flowing into the arm by the number of converter cells. Therefore, the amount of calculation required to estimate the capacitance can be further reduced.

[0157] Other Embodiments. The configurations exemplified as the above-described embodiments are examples of the configurations of the present disclosure, and may be combined with other known technologies, or may be modified, such as by omitting some parts, within the scope of the gist of the present disclosure. Furthermore, the above-described embodiments may be implemented by appropriately adopting the processes and configurations described in other embodiments.

[0158] The embodiments disclosed herein should be considered to be illustrative in all respects and not restrictive. The scope of the present disclosure is defined by the claims, not by the above description, and is intended to include all modifications within the meaning and scope of the claims.

[0159] 1 Converter cell, 2 AC circuit, 3 Transformer, 4 DC circuit, 5 Control device, 6 Power converter, 7a, 7b Reactor, 8u, 8v, 8w Leg circuit, 9a, 9b Arm current detector, 10 AC voltage detector, 11a, 11b DC voltage detector, 13nu, 13nv, 13nw, 13p Negative arm, 13pu, 13pv, 13pw Positive arm, 15 AC current detector, 31n, 31p Switching element, 32 Capacitor, 33 Voltage detector, 34 Bypass switch, 35 Cooling fin, 70 Input converter, 71 Sample and hold circuit, 72 Multiplexer, 73 A / D converter, 75 RAM, 76 ROM, 77 Input / output interface, 78 Auxiliary storage device, 79 Bus, 100 Power conversion device, 202, 202A Individual cell control unit, 203 Carrier wave generation unit, 205 Individual voltage control unit, 207 Gate signal generation unit, 210, 210N, 210P Coefficient calculation unit, 212, 212N, 212P Power loss calculation unit, 214, 214N, 214P Inflow power calculation unit, 216, 216A Capacitance estimation unit, 218 Abnormality determination unit, 220 BPS drive unit, 230 Capacitor voltage average value calculation unit, 502 Basic control unit, 503P, 503N Arm control unit, 601 Arm voltage command generation unit, 603 AC current control unit, 604 DC current control unit, 605 Circulating current control unit, 606 Command distribution unit, 608 AC current limiter, 609 DC current limiter, 610 Capacitor voltage command generation unit, 620 Reference phase detection unit.

Claims

1. A power conversion device that performs power conversion between an AC circuit and a DC circuit, comprising: a power converter including a plurality of arms for each phase of the AC circuit; and a control device that controls the power converter, wherein each of the plurality of arms has a plurality of converter cells cascaded to one another, and each of the plurality of converter cells has a plurality of switching elements and a capacitor connected to the plurality of switching elements, and the control device includes: a power calculation unit that calculates a capacitor flowing power flowing into the capacitor of the converter cell based on a voltage command value for the power converter, an arm current flowing in the arm including the converter cell, a capacitor voltage indicating the voltage of the capacitor of the converter cell, and a power loss occurring in the converter cell; and a capacitance estimation unit that estimates the capacitance of the capacitor based on the capacitor flowing power and the capacitor voltage.

2. The power conversion device according to claim 1, wherein the power calculation unit calculates cell flow-in power flowing into the converter cell based on the voltage command value, the capacitor voltage, and the arm current, and calculates the capacitor flow-in power based on a subtraction value obtained by subtracting the power loss occurring in the converter cell from the cell flow-in power.

3. The power conversion device according to claim 2, wherein the power calculation unit calculates a value obtained by extracting a specified frequency component from the subtraction value as the capacitor flow-in power.

4. The power conversion device according to claim 3, wherein the specified frequency component is a fundamental frequency component of the AC voltage of the AC circuit or a frequency component that is twice the fundamental frequency component.

5. A power conversion device according to any one of claims 1 to 4, wherein the control device further includes a power loss calculation unit that calculates a first power loss that occurs in the plurality of switching elements included in the converter cell as the power loss that occurs in the converter cell.

6. The power conversion device according to claim 5, wherein the power loss calculation unit further calculates a second power loss occurring in a resistance element included in the converter cell as the power loss occurring in the converter cell.

7. The power conversion device according to claim 5 or 6, wherein the power loss calculation unit calculates the first power loss using an arithmetic expression based on the arm current.

8. The power conversion device according to claim 7, wherein the converter cells have cooling fins for cooling the switching elements, and the control device further includes a coefficient calculation unit that calculates a coefficient of the arithmetic expression based on a differential temperature between a first temperature of the cooling medium flowing into the cooling fins and a second temperature of the cooling medium flowing out of the cooling fins, and the branch current.

9. The power conversion device according to claim 7, wherein the converter cells have cooling fins for cooling the switching elements, and the control device further includes a coefficient calculation unit that calculates coefficients of the arithmetic equation based on the arm current and a differential power between the active power output from the power converter to the DC circuit and the active power output from the power converter to the AC circuit.

10. A power conversion device according to any one of claims 1 to 9, wherein the voltage command value is a cell voltage command value for a cell voltage output from the converter cell.

11. A power conversion device according to any one of claims 1 to 10, wherein the voltage command value is an arm voltage command value for an arm voltage output from the arm including the converter cell.

12. A power conversion device according to any one of claims 1 to 11, wherein the control device further includes a notification unit that, when the capacitance of the capacitor in at least one converter cell among the plurality of converter cells is less than a threshold value, notifies information for identifying the at least one converter cell.

13. A power conversion device according to any one of claims 1 to 12, wherein the control device further includes: a DC current control unit that executes control to make the DC current output from the power converter follow a DC current command value; and a DC current limiting unit that, when the capacitance of the capacitor in at least one converter cell among the plurality of converter cells is less than a threshold value, limits the DC current command value to within a range indicated by a DC current limit value.

14. A power conversion device according to any one of claims 1 to 13, wherein the control device further includes: an AC current control unit that executes control to make the AC current output from the power converter follow an AC current command value; and an AC current limiting unit that, when the capacitance of the capacitor in at least one converter cell of the plurality of converter cells is less than a threshold value, limits the AC current command value to within a range indicated by an AC current limit value.

15. A power conversion device according to any one of claims 1 to 14, wherein the converter cell further has a bypass switch for bypassing between input and output terminals of the converter cell, and the control device further includes a bypass switch control unit that closes the bypass switch when the capacitance of the capacitor in the converter cell is less than a threshold value.

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