Display device, production method for display device, and electronic apparatus

Abstract

Provided is a display device that comprises a first transistor that has a channel formation region within a semiconductor substrate, an oxygen supply layer that is layered above the semiconductor substrate, a second transistor that has a channel formation region within a first oxide semiconductor layer that is provided to an upper surface of the oxygen supply layer, a second oxide semiconductor layer that is provided to a lower surface of the oxygen supply layer, and a light-emitting element that is layered above the oxygen supply layer and connected to the first transistor and the second transistor. The first oxide semiconductor layer and the second oxide semiconductor layer do not overlap as seen from above the semiconductor substrate.

Description

Display device, display device manufacturing method, and electronic device

[0001] The present disclosure relates to a display device, a method for manufacturing a display device, and an electronic device.

[0002] In recent years, as an example of a semiconductor device, development has progressed on display devices that use electroluminescence (EL) elements as light-emitting elements. The display devices have, for example, a plurality of light-emitting elements each composed of a lower electrode, a light-emitting layer stacked on the lower electrode, and an upper electrode stacked on the light-emitting layer. Furthermore, in addition to the light-emitting elements, the display devices also have a drive circuit including a plurality of transistors for driving the light-emitting elements.

[0003] In recent years, it has been proposed to form some of the transistors included in a drive circuit as thin film transistors (TFTs). By using thin film transistors as some of the transistors included in a drive circuit, it becomes possible to provide these transistors in a wiring layer located above a semiconductor substrate. As a result, the layout size of the drive circuit becomes smaller, and a display device, which is an example of a semiconductor device, can be made smaller.

[0004] Patent Publication No. 2013-520844 International Publication No. 2011 / 058611

[0005] However, the characteristics of the oxide semiconductor layer, which serves as the channel of the thin film transistor, may be deteriorated due to damage or the like during the manufacturing process of the display device. Furthermore, although it is required to precisely control the characteristics of the oxide semiconductor layer, this may result in deterioration of the characteristics of other elements included in the display device.

[0006] Therefore, the present disclosure proposes a technique that can avoid the deterioration of characteristics in a display device that includes a thin-film transistor.

[0007] According to the present disclosure, there is provided a display device including: a first transistor having a channel formation region in a semiconductor substrate; an oxygen supply layer stacked above the semiconductor substrate; a second transistor having a channel formation region in a first oxide semiconductor layer provided on an upper surface of the oxygen supply layer; a second oxide semiconductor layer provided on a lower surface of the oxygen supply layer; and a light-emitting element stacked above the oxygen supply layer and connected to the first transistor and the second transistor, wherein the first oxide semiconductor layer and the second oxide semiconductor layer do not overlap when viewed from above the semiconductor substrate.

[0008] Furthermore, according to the present disclosure, there is provided a method for manufacturing a display device, including forming an oxygen supply layer above a semiconductor substrate, forming a trench in the oxygen supply layer, and depositing an oxide semiconductor material on the oxygen supply layer, such that the deposited oxide semiconductor material is divided by a step of the trench to form a first oxide semiconductor layer on an upper surface of the oxygen supply layer, and forming a second oxide semiconductor layer on a lower surface side of the oxygen supply layer.

[0009] Furthermore, according to the present disclosure, there is provided an electronic device equipped with a display device, the display device including: a first transistor having a channel formation region in a semiconductor substrate; an oxygen supply layer stacked above the semiconductor substrate; a second transistor having a channel formation region in a first oxide semiconductor layer provided on an upper surface of the oxygen supply layer; a second oxide semiconductor layer provided on a lower surface of the oxygen supply layer; and a light-emitting element stacked above the oxygen supply layer and connected to the first transistor and the second transistor, wherein the first oxide semiconductor layer and the second oxide semiconductor layer do not overlap when viewed from above the semiconductor substrate.

[0010] FIG. 1 is a schematic diagram showing an example of an overall configuration of a display device according to an embodiment of the present disclosure. FIG. 2 is a circuit diagram showing an example of a pixel of a display device according to an embodiment of the present disclosure. FIG. 3 is a schematic diagram showing an example of a cross-sectional configuration of a display device according to a comparative example. FIG. 4 is a schematic diagram (part 1) showing an example of a cross-sectional configuration of a display device according to a first embodiment of the present disclosure. FIG. 5 is a schematic diagram (part 2) showing an example of a cross-sectional configuration of a display device according to a first embodiment of the present disclosure. FIG. 6 is a schematic diagram showing an example of a planar configuration of a display device according to the first embodiment of the present disclosure. FIG. 7 is a schematic diagram for explaining the first embodiment of the present disclosure. FIG. 8 is a cross-sectional view (part 1) for explaining a manufacturing method of a display device according to the first embodiment of the present disclosure. FIG. 9 is a cross-sectional view (part 2) for explaining a manufacturing method of a display device according to the first embodiment of the present disclosure. FIG. 10 is a schematic diagram showing an example of a cross-sectional configuration of a display device according to a second embodiment of the present disclosure. FIG. 11 is a cross-sectional view for explaining a manufacturing method of a display device according to a second embodiment of the present disclosure. FIG. 12 is a schematic diagram (part 1) showing an example of a cross-sectional configuration of a display device according to a third embodiment of the present disclosure. FIG. 13 is a schematic diagram (part 2) showing an example of a cross-sectional configuration of a display device according to a third embodiment of the present disclosure. FIG. 10 is a schematic diagram (part 3) showing an example of a cross-sectional configuration of a display device according to a third embodiment of the present disclosure; a cross-sectional view for explaining a method for manufacturing a display device according to a third embodiment of the present disclosure; a schematic diagram showing an example of a cross-sectional configuration of a display device according to a fourth embodiment of the present disclosure; a cross-sectional view for explaining a method for manufacturing a display device according to a fourth embodiment of the present disclosure; a cross-sectional view (part 1) for explaining a method for manufacturing a display device according to a fifth embodiment of the present disclosure; a cross-sectional view (part 2) for explaining a method for manufacturing a display device according to a fifth embodiment of the present disclosure; a cross-sectional view for explaining a method for manufacturing a display device according to a sixth embodiment of the present disclosure; a cross-sectional view for explaining a method for manufacturing a display device according to a seventh embodiment of the present disclosure; a cross-sectional view for explaining a method for manufacturing a display device according to an eighth embodiment of the present disclosure; a schematic diagram showing an example of a cross-sectional configuration of a main part of a display device according to a ninth embodiment of the present disclosure; a cross-sectional view (part 1) for explaining a method for manufacturing a display device according to a tenth embodiment of the present disclosure.13 is a cross-sectional view (part 2) for explaining a method for manufacturing a display device according to a tenth embodiment of the present disclosure. FIG. 14 is a schematic diagram showing an example of a planar configuration of a main part of a display device according to an eleventh embodiment of the present disclosure. FIG. 15 is a conceptual diagram (part 1) for explaining the relationship between a normal LN passing through the center of the light-emitting section, a normal LN' passing through the center of the lens member, and a normal LN" passing through the center of the wavelength selection section. FIG. 16 is a conceptual diagram (part 2) for explaining the relationship between a normal LN passing through the center of the light-emitting section, a normal LN' passing through the center of the lens member, and a normal LN" passing through the center of the wavelength selection section. FIG. 17 is a conceptual diagram (part 4) for explaining the relationship between a normal LN passing through the center of the light-emitting section, a normal LN' passing through the center of the lens member, and a normal LN" passing through the center of the wavelength selection section. 10 is a conceptual diagram (part 5) for explaining the relationship between a normal LN passing through the center of the light-emitting section, a normal LN' passing through the center of the lens member, and a normal LN" passing through the center of the wavelength selection section. FIG. 11 is a conceptual diagram (part 6) for explaining the relationship between a normal LN passing through the center of the light-emitting section, a normal LN' passing through the center of the lens member, and a normal LN" passing through the center of the wavelength selection section. 10 is a conceptual diagram (part 7) for explaining the relationship between a normal LN passing through the center of the light-emitting portion, a normal LN′ passing through the center of the lens member, and a normal LN″ passing through the center of the wavelength selecting portion. FIG. 11 is a schematic cross-sectional view for explaining a first example of a resonator structure. FIG. 12 is a schematic cross-sectional view for explaining a second example of a resonator structure. FIG. 13 is a schematic cross-sectional view for explaining a third example of a resonator structure. FIG. 14 is a schematic cross-sectional view for explaining a fourth example of a resonator structure. FIG. 15 is a schematic cross-sectional view for explaining a fifth example of a resonator structure. FIG. 16 is a schematic cross-sectional view for explaining a sixth example of a resonator structure. FIG. 17 is a schematic cross-sectional view for explaining a seventh example of a resonator structure.

[0011] Preferred embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings. In this specification and the drawings, components having substantially the same functional configurations are designated by the same reference numerals, and redundant description will be omitted. Furthermore, in this specification and the drawings, multiple components having substantially the same or similar functional configurations may be distinguished by adding different letters after the same reference numeral. However, when there is no particular need to distinguish between multiple components having substantially the same or similar functional configurations, only the same reference numerals will be used.

[0012] The drawings referred to in the following description are for explaining and facilitating understanding of one embodiment of the present disclosure, and for the sake of clarity, the shapes, dimensions, ratios, etc. shown in the drawings may differ from the actual ones. Furthermore, the design of the devices shown in the drawings can be modified as appropriate, taking into consideration the following description and known technologies.

[0013] The description of specific shapes in the following description does not mean only geometrically defined shapes. In particular, the description of specific lengths and shapes in the following description also includes shapes that have allowable differences (errors and distortions) in light-emitting elements, display devices (semiconductor devices), their manufacturing processes, and their use and operation, as well as shapes similar to those shapes.

[0014] In the following description of circuits (electrical connections), unless otherwise specified, "electrically connected" means connecting multiple elements so that electricity (signals) is conducted between them. In addition, in the following description, "electrically connected" includes not only cases where multiple elements are directly and electrically connected, but also cases where elements are indirectly and electrically connected via other elements.

[0015] In the following description, "sharing" means that different elements (such as transistors) share one other element (such as a diffusion region).

[0016] The description will be given in the following order: 1. Display device according to an embodiment of the present disclosure 1.1 Display device 1.2 Pixel 2. Background leading to the creation of the embodiment of the present disclosure 3. First embodiment 3.1 Detailed configuration 3.2 Manufacturing method 4. Second embodiment 4.1 Detailed configuration 4.2 Manufacturing method 5. Third embodiment 5.1 Detailed configuration 5.2 Manufacturing method 6. Fourth embodiment 6.1 Detailed configuration 6.2 Manufacturing method 7. Fifth embodiment 8. Sixth embodiment 9. Seventh embodiment 10. Eighth embodiment 11. Ninth embodiment 12. Tenth embodiment 13. Eleventh embodiment 14. Summary 15. Modifications 15.1 Modification 1 15.2 Modification 2 16. Application example 17. Supplementary information

[0017] <<1. Display Device According to an Embodiment of the Present Disclosure>> <1.1 Display Device> First, an example of the overall configuration of a display device 10 according to an embodiment of the present disclosure that is used as a display device or a lighting device, which is an example of a semiconductor device, will be described with reference to Fig. 1. Fig. 1 is a schematic diagram showing an example of the overall configuration of the display device 10 according to an embodiment of the present disclosure.

[0018] The display device 10 is a device in which light-emitting elements such as OLEDs (organic light-emitting diodes) or micro-OLEDs are formed in an array. Such a display device 10 can be applied to, for example, display devices for VR (virtual reality), MR (mixed reality), or AR (augmented reality), electronic viewfinders (EVF), small projectors, etc.

[0019] Furthermore, in the embodiments of the present disclosure, the light-emitting elements may be self-luminous elements and current-driven electro-optical elements. For example, examples of current-driven electro-optical elements include inorganic EL elements, LED elements, and semiconductor laser elements, in addition to OLEDs. Furthermore, organic EL display devices using OLEDs as the light-emitting elements have the following advantages. Specifically, because OLEDs are self-luminous elements, organic EL display devices have higher image visibility than liquid crystal display devices, which are also flat display devices. Furthermore, because they do not require lighting components such as backlights, they can be easily made lighter and thinner. Furthermore, because the response speed of OLEDs is extremely fast, on the order of several microseconds, organic EL display devices do not produce afterimages when displaying moving images.

[0020] Here, as an example, an active matrix organic EL display device will be described, which uses, as a light emitting element, an OLED, which is a current-driven light emitting element whose light emission brightness changes according to the value of the current flowing through the device. Note that hereinafter, an "active matrix organic EL display device" will be simply referred to as a "display device."

[0021] 1 , the display device 10 has a pixel array section 30 in which a plurality of pixels 20, each including a light-emitting element, are two-dimensionally arranged in a matrix on a semiconductor substrate (not shown), and a drive circuit section disposed around the pixel array section 30. The drive circuit section includes, for example, a write scan section 40, a first drive scan section 50, a second drive scan section 60, and a signal output section 70 mounted on the same display panel 80 as the pixel array section 30, and drives each pixel 20 of the pixel array section 30.

[0022] Here, when the display device 10 is capable of color display, one pixel (unit pixel / pixel), which is a unit for forming a color image, is composed of multiple sub-pixels (sub-pixels / sub-pixels). In this case, each sub-pixel corresponds to the pixel 20 in FIG. 1 . More specifically, in the color display device 10, one pixel 20 may be composed of three sub-pixels, for example, a sub-pixel emitting red light, a sub-pixel emitting green light, and a sub-pixel emitting blue light. For example, one pixel 20 may be composed of one, two, or more sub-pixels, and is not particularly limited. Furthermore, one pixel 20 is not limited to a combination of sub-pixels of the three primary colors, red, green, and blue, but may also be composed of sub-pixels of one or more colors in addition to the three primary color sub-pixels. More specifically, the display device 10 may be configured such that one pixel 20 includes a sub-pixel emitting white light to improve brightness, or at least one sub-pixel emitting complementary color light to expand the color reproduction range.

[0023] In the pixel array section 30, scanning lines 31 (31) are arranged along the row direction (arrangement direction of the pixels 20 in the pixel row / horizontal direction) for the arrangement of the pixels 20 in m rows and n columns. １ ~31 ｍ ), and the drive line 32 (32 １ ~32 ｍ ) are wired for each pixel row. Furthermore, for the arrangement of the pixels 20 in m rows and n columns, signal lines 34 (34) are wired along the column direction (arrangement direction / vertical direction of the pixels 20 in the pixel column). １ ~34 ｎ ) is wired for each pixel column.

[0024] Scan line 31 １ ~31 ｍ are electrically connected to the output terminals of the corresponding rows of the write scanning section 40. １ ~32 ｍ are electrically connected to the output terminals of the corresponding rows of the drive scanning unit 50. １ ~34 ｎ are electrically connected to the output terminals of the corresponding columns of the signal output section 70 .

[0025] The write scanning section 40 is configured by a shift register circuit and the like. When writing a signal voltage of a video signal to each pixel 20 of the pixel array section 30, the write scanning section 40 scans the scan lines 31 (31 １ ~31 ｍ ) to the write scanning signal WS (WS １ ~WS ｍ ) are sequentially supplied, the pixels 20 of the pixel array section 30 can be scanned in order row by row.

[0026] The first drive scanning section 50 is configured by a shift register circuit and the like, similar to the write scanning section 40. The drive scanning section 50 synchronizes with the line-sequential scanning by the write scanning section 40 and scans the drive lines 32 (32 １ ~32 ｍ ) to the light emission control signal DS (DS １ ~DS ｍ ) can control the light emission / non-light emission (extinction) of the pixel 20.

[0027] The signal output unit 70 outputs a signal voltage (hereinafter simply referred to as "signal voltage") V of a video signal corresponding to luminance information supplied from a signal supply source (not shown). ｓｉｇ and the reference voltage V ｏｆｓ Here, the reference voltage V ｏｆｓ is the signal voltage V of the video signal ｓｉｇ The voltage is equivalent to the reference voltage or a voltage close to it.

[0028] The signal voltage V alternatively output from the signal output unit 70 ｓｉｇ / Reference voltage V ｏｆｓ is the signal line 34 (34 １ ~34 ｎ ) to each pixel 20 of the pixel array unit 30 in units of pixel rows selected by line-sequential scanning by the write scanning unit 40. That is, the signal output unit 70 outputs a signal voltage V ｓｉｇ can be written in units of pixel rows (lines).

[0029] In the display device 10, by switching off the drive transistor Tr1 (see FIG. 2 ) included in the pixel 20 described later, the supply of current to the light-emitting element EL (see FIG. 2 ) included in the pixel 20 is cut off, and as a result, the light emission of the light-emitting element EL is suppressed, making it possible to display a black gradation. However, when the drive transistor Tr1 is switched to the off state, current may leak between the source and drain of the drive transistor Tr1, which may reduce the contrast when displaying a black gradation. Therefore, in order to avoid a reduction in contrast when displaying a black gradation, the drive unit of the display device 10 has a second drive scanning unit 60, and further has a second drive line 33 (33 １ ~33 ｍ ) is wired for each pixel row. １ ~33 ｍ are connected to the output terminals of the corresponding rows of the second driving scanning section 60, respectively.

[0030] In detail, the second drive scanning section 60 is configured by a shift register circuit and the like, similar to the write scanning section 40. The second drive scanning section 60 synchronizes with the line-sequential scanning by the write scanning section 40, and scans the second drive lines 33 (33 １ ~33 ｍ ) with respect to the drive signal AZ (AZ １ ~AZ ｍ ) can be supplied to control the pixel 20 not to emit light during the non-light-emitting period.

[0031] Note that the overall configuration example shown in FIG. 1 is an example of the configuration of the display device 10 according to an embodiment of the present disclosure, and the path configuration of the display device 10 according to an embodiment of the present disclosure is not limited to the configuration shown in FIG. 1.

[0032] <1.2 Pixel> Next, a description will be given of the circuit configuration of the pixel (pixel circuit) 20 of the display device 10 according to the embodiment of the present disclosure shown in Fig. 1. Fig. 2 is a circuit diagram showing an example of the pixel 20 of the display device 10 according to the embodiment of the present disclosure.

[0033] In the embodiment of the present disclosure, as shown in Fig. 2, the pixel 20 is composed of a light-emitting element EL and a drive circuit for driving the light-emitting element EL. The light-emitting element EL is an example of a current-driven electro-optical element whose light emission luminance changes according to the value of the current flowing through the device, and is made of, for example, an OLED. The cathode of the light-emitting element EL is connected to, for example, a node V ｓｓ is electrically connected to

[0034] The drive circuit is composed of a plurality of transistors (drive transistor Tr1, write transistor Tr2, light-emission control transistor Tr3, and switching transistor Tr4) electrically connected to the light-emitting element EL, and capacitance units C1 and C2. The anode of the light-emitting element EL is electrically connected to the drive transistor Tr1, and when a current flows through the drive transistor Tr1, the light-emitting element EL can emit light.

[0035] The drive transistor (also referred to as a light-emitting transistor) Tr1 and the write transistor (also referred to as a data-writing control transistor) Tr2 are, for example, field-effect transistors (FETs). More specifically, the drive transistor Tr1 is a P-channel transistor, and the write transistor Tr2 is an N-channel transistor. The light-emitting control transistor (also referred to as a power supply control transistor) Tr3 and the switching transistor (also referred to as a light-extinction control transistor) Tr4 are, for example, field-effect transistors. More specifically, the light-emitting control transistor Tr3 is a P-channel transistor, and the switching transistor Tr4 is an N-channel transistor.

[0036] More specifically, as shown in FIG. 2, the source and drain of the driving transistor Tr1 are connected to a power supply voltage V ＤＤ The source and drain of the write transistor Tr2 are electrically connected to a power supply node (current source) of the signal line (V ｓｉｇ) and the gate of the driving transistor Tr1, and the gate of the writing transistor Tr2 is electrically connected to the scanning line (WS). The light emission control transistor Tr3 is electrically connected between the power supply node of the power supply voltage VDD and the source of the driving transistor Tr1. The switching transistor Tr4 is electrically connected between the drain of the driving transistor Tr1 and the current discharge node V ｓｓ The device is electrically connected between the

[0037] The driving transistor Tr1 can drive the light-emitting element EL by supplying a driving current to the light-emitting element EL according to a voltage (signal voltage) held by a capacitance section C1 (to be described later).

[0038] The write transistor Tr2 receives the signal voltage V ｓｉｇ The signal can be written to the gate of the driving transistor Tr1 by sampling the signal. Note that the expression "writing" here means that a signal voltage is applied to the gate node, and the potential of the gate node is maintained at a potential based on the signal voltage.

[0039] Further, the light emission control transistor Tr3 controls whether the light emitting element EL emits light or not under the driving of the light emission control signal DS.

[0040] The switching transistor Tr4, under the drive signal AZ, controls the light-emitting element EL so that it does not emit light during its non-light-emitting period. That is, when the switching transistor Tr4 is turned on, it serves to form a path around the light-emitting element EL (i.e., bypass) so that current is not supplied to the light-emitting element EL. By doing so, even if current leaks between the source and drain of the driving transistor Tr1 when the driving transistor Tr1 is switched off, the switching transistor Tr4 is turned on, so that current is not supplied to the light-emitting element EL. As a result, this configuration can suppress a decrease in contrast when displaying black gradations.

[0041] The capacitance section C1 is connected between the gate and source of the driving transistor Tr1, and receives the signal voltage V ｓｉｇ The driving transistor Tr1 drives the light-emitting element EL by supplying a driving current corresponding to the voltage held by the capacitance section C1 to the light-emitting element EL.

[0042] The capacitance section C2 is connected between the source of the driving transistor Tr1 and a node of a fixed potential (for example, a power supply node of a power supply voltage VDD). ｓｉｇ This has the effect of suppressing fluctuations in the source voltage of the driving transistor Tr1 when writing, and also of setting the gate-source voltage Vgs of the driving transistor Tr1 to the threshold voltage Vth of the driving transistor Tr1.

[0043] The circuit configuration example shown in FIG. 2 is an example of the circuit configuration of the pixel 20 according to this embodiment, and the circuit configuration of the pixel 20 according to this embodiment is not limited to the circuit configuration shown in FIG. 2.

[0044] <<2. Background to the Creation of the Embodiments of the Present Disclosure>> Next, before describing the details of the embodiments of the present disclosure, the background to the creation of the embodiments of the present disclosure will be described with reference to Fig. 3. Fig. 3 is a schematic diagram showing an example of a cross-sectional configuration of a display device 10a according to a comparative example. Note that the comparative example here refers to the display device 10a that the present inventors had studied extensively before creating the embodiments of the present disclosure.

[0045] The inventors have been studying a display device 10a according to a comparative example as shown in Fig. 3. In the comparative example shown in Fig. 3, some of the transistors included in the drive circuit of the pixel 20, such as the drive transistor Tr1, are configured as thin-film transistors provided in the wiring layer 200.

[0046] Specifically, as shown in FIG. 3 , among the plurality of transistors, for example, the drive transistor Tr1 (labeled "Drv" in FIG. 3 ) and the light-emitting control transistor Tr3 (labeled "DS" in FIG. 3 ) have a gate electrode 102 provided via an insulating film 202 on a region having n-type conductivity that functions as a channel provided in the semiconductor substrate 100. Furthermore, these transistors have source / drain regions formed of diffusion regions 104 containing impurities having p-type conductivity that are provided in the semiconductor substrate 100 so as to sandwich the channel region. Furthermore, these transistors are isolated from other elements by an element isolation portion (Shallow Trench Isolation: STI) 106 provided in the semiconductor substrate 100.

[0047] As shown in FIG. 3, a wiring layer 200 is provided on the semiconductor substrate 100, and the wiring layer 200 includes an insulating film 202, wiring 204, vias 206, and the like.

[0048] 3, among the plurality of transistors, the write transistor Tr2 (denoted by "WS" in FIG. 3) and the switching transistor Tr4 (denoted by "AZ" in FIG. 3) are provided, for example, in a wiring layer 200 stacked on the semiconductor substrate 100. More specifically, the write transistor Tr2 and the switching transistor Tr4 have an oxide semiconductor layer 222 provided in the wiring layer 200 stacked on the semiconductor substrate 100, and a gate electrode 212 in contact with the oxide semiconductor layer 222 via an insulating film 202.

[0049] 3, a light-emitting unit 300, which is a light-emitting element EL, is provided on the wiring layer 200. The light-emitting element EL mainly includes an anode electrode 310 provided on the wiring layer 200, a light-emitting layer 314 that is stacked on the anode electrode 310 and emits light, and a cathode electrode 312 that is stacked on the light-emitting layer 314 and transmits light from the light-emitting layer 314. For example, the light-emitting element EL can be an OLED (organic light-emitting diode) that has a light-emitting layer 314 made of an organic material.

[0050] In the comparative example, the drive transistor Tr1 and the light-emission control transistor Tr3 included in the drive circuit are provided on the semiconductor substrate 100, and the write transistor Tr2 and the switching transistor Tr4 are provided as thin-film transistors (TFTs) in a wiring layer 200 stacked on the semiconductor substrate 100. In this way, according to this embodiment, it is possible to reduce the layout size of the drive circuit while ensuring a high breakdown voltage for certain transistors. And, according to the comparative example, it is possible to reduce the size of the display device 10a.

[0051] The write transistor Tr2 and the switching transistor Tr4, which are provided as thin-film transistors, use an oxide semiconductor layer 222 as a channel. The oxide semiconductor layer 222 is made of indium-gallium-zinc oxide (IGZO) or the like, and has the property of being easily oxidized and reduced by the influence of surrounding layers. More specifically, when the oxide semiconductor layer 222 receives electrons from the surrounding layers and is reduced, it becomes a conductor with low resistance. On the other hand, when the oxide semiconductor layer 222 receives electrons from the surrounding layers and is oxidized, it becomes a semiconductor with high resistance, and when further oxidized, it changes into an insulator.

[0052] Furthermore, in the comparative example, the oxide semiconductor layer 222 is required to have semiconducting properties in order to use the oxide semiconductor layer 222 as a channel of a transistor. Therefore, in the comparative example, in order to make the oxide semiconductor layer 222 have semiconducting properties, an oxygen supply layer 230, which is an oxidation film that acts to oxidize by depriving electrons from surrounding films, is provided adjacent to the oxide semiconductor layer 222. Specifically, in the comparative example, a layer made of, for example, silicon oxide (SiOx (x>2)) is formed as the oxygen supply layer 230, and oxygen is suitably diffused from the oxygen supply layer 230 to the oxide semiconductor layer 222, making the oxide semiconductor layer 222 a semiconductor.

[0053] Furthermore, although the oxygen supply layer 230 diffuses oxygen to the surroundings, in the comparative example, the oxide semiconductor layer 222 is provided on the upper surface of the oxygen supply layer 230, and the easily oxidized oxide semiconductor layer 222 blocks the diffusion of oxygen. Therefore, in the comparative example, oxygen diffused from the oxygen supply layer 230 is less likely to reach layers above the oxide semiconductor layer 222. Therefore, in the comparative example, the characteristics (e.g., reliability, etc.) of elements (e.g., wiring 204, etc.) located above the oxide semiconductor layer 222 are less likely to be deteriorated by the diffused oxygen.

[0054] However, in the comparative example, oxygen diffuses from the oxygen supply layer 230 to below the oxygen supply layer 230, which may degrade the characteristics of elements located below the oxygen supply layer 230. In the comparative example, for example, oxygen diffused from the oxygen supply layer 230 may degrade the device characteristics of transistors located below the oxygen supply layer 230, such as the drive transistor Tr1 and the light-emitting control transistor Tr3. Therefore, forming a gas barrier film to cover the lower surface of the oxygen supply layer 230 is conceivable, but this would increase the number of processes and the manufacturing cost of the display device 10a. Furthermore, if the gas barrier film is made of aluminum oxide (AlOx), it would be more difficult to process vias 206 and the like that penetrate the gas barrier film, which would also increase the manufacturing cost of the display device 10a. Therefore, the method of forming a gas barrier film to cover the lower surface of the oxygen supply layer 230 is not preferable.

[0055] Furthermore, when forming the channel regions of the write transistor Tr2 and the switching transistor Tr4, a layer that becomes the oxide semiconductor layer 222 is deposited on the oxygen supply layer 230, and the layer that becomes the oxide semiconductor layer 222 is divided into island shapes by dry etching. During this process, there is a problem that the end of the oxide semiconductor layer 222 is damaged, causing the end to have excessively low resistance. Furthermore, there is a problem that residues are deposited on the end of the oxide semiconductor layer 222 by dry etching, making it difficult to shape the end of the oxide semiconductor layer 222 into the desired shape. In such cases, it becomes difficult to shape the gate electrode 212 formed above the oxide semiconductor layer 222 into the desired shape. Furthermore, if the gate electrode 212 cannot be shaped into the desired shape, electric field concentration or the like occurs in part of the gate electrode 212, resulting in degradation of the device characteristics of the write transistor Tr2 and the switching transistor Tr4.

[0056] In view of the above, the present inventor has devised an embodiment of the present disclosure that can prevent the deterioration of characteristics in a display device (semiconductor device) including a thin film transistor. The details of the embodiment of the present disclosure devised by the present inventor will be described below.

[0057] <<3. First Embodiment>> <3.1 Detailed Configuration> First, a detailed structure of a display device (semiconductor device) 10 according to a first embodiment of the present disclosure will be described with reference to FIGS. 4A to 4D . FIGS. 4A to 4C are schematic diagrams illustrating an example of a cross-sectional configuration of the display device 10 according to this embodiment, corresponding to a cross section of the display device 10 cut along the film thickness direction of the semiconductor substrate 100. In detail, FIG. 4A illustrates the cross-sectional configuration of a pixel 20, FIG. 4B illustrates the cross-sectional configuration of the periphery of the pixel array section 30, and FIG. 4C illustrates the cross-sectional configuration of the outer periphery of the display device 10. Furthermore, FIG. 4D is a schematic diagram illustrating an example of a planar configuration of the display device 10 according to this embodiment, specifically illustrating the planar configuration of the write transistor Tr2 (labeled "WS" in FIG. 4A ) and the switching transistor Tr4 (labeled "AZ" in FIG. 4A ).

[0058] 4A , the display device 10 according to this embodiment has a layered structure including a semiconductor substrate 100 made of, for example, n-type silicon (Si), a wiring layer 200 stacked on the semiconductor substrate 100, and a light-emitting element EL (light-emitting unit 300) provided on the wiring layer 200. As described above, the light-emitting element EL is a current-driven light-emitting element whose emission luminance changes depending on the value of a current flowing through the device. In this embodiment, the semiconductor substrate 100 and the wiring layer 200 include a drive circuit for driving the light-emitting element EL.

[0059] 2, the drive circuit includes a drive transistor Tr1 (labeled "Drv" in FIG. 4A), a write transistor Tr2, a light-emission control transistor Tr3 (labeled "DS" in FIG. 4A), a switching transistor Tr4, and capacitance units C1 and C2. The layered structure of the display device 10 will be described below, starting with the semiconductor substrate 100 located at the bottom in FIG. 4A. Note that the capacitance units C1 and C2 are not shown in FIG. 4A.

[0060] The driving transistor (first transistor) Tr1 is a field-effect transistor, e.g., a P-channel transistor, provided on the semiconductor substrate 100. Specifically, as shown in FIG. 4A , the driving transistor Tr1 has a gate electrode 102 provided via an insulating film 202 on a region of n-type conductivity that functions as the channel (channel formation region) of the driving transistor Tr1 provided in the semiconductor substrate 100. Furthermore, the driving transistor Tr1 has source and drain regions formed of diffusion regions 104 containing p-type impurities provided in the semiconductor substrate 100 on either side of the channel formation region. Thus, in this embodiment, providing the driving transistor Tr1 on the semiconductor substrate 100 stabilizes the characteristics of the driving transistor Tr1 and enables it to be a high-voltage transistor. Note that in this embodiment, the driving transistor Tr1 may be an N-channel transistor.

[0061] The source and drain of the driving transistor Tr1 are connected to a power supply (V ＤＤ ) and an anode electrode 310 of the light-emitting element EL (light-emitting unit 300). Furthermore, the gate electrode 102 of the drive transistor Tr1 is electrically connected by a via 206 to an electrode (not shown) of a capacitance unit C1 (described later) and the source or drain of the write transistor Tr2.

[0062] The capacitance portion C1 may also be provided in the wiring layer 200 stacked above the drive transistor Tr1. Specifically, one electrode (not shown) of the capacitance portion C1 may be electrically connected to the source or drain of the drive transistor Tr1 described above via a via 206. The other electrode (not shown) of the capacitance portion C1 may also be electrically connected to the source or drain of the drive transistor Tr1 described above and the source or drain of the write transistor Tr2 described below via the via 206.

[0063] Furthermore, the driving transistor Tr1 is isolated from other elements by an element isolation portion 106 provided in the semiconductor substrate 100.

[0064] Furthermore, the source or drain of the driving transistor Tr1 shares a diffusion region 104 provided in the semiconductor substrate 100 with the source or drain of the light-emitting control transistor Tr3 provided on the semiconductor substrate 100. That is, the driving transistor Tr1 and the light-emitting control transistor Tr3 have a series gate structure in which the source or drain of one transistor shares a single diffusion region 104 with the source or drain of the other transistor. Note that, in this embodiment, it is preferable to select a series gate structure in order to suppress an increase in the layout area of ​​the driving transistor Tr1 and the light-emitting control transistor Tr3, but this embodiment is not limited to this.

[0065] As shown in FIG. 4A , the light-emission control transistor (fourth transistor) Tr3, like the drive transistor Tr1, has a gate electrode 102 provided via an insulating film 202 on a region having n-type conductivity that functions as a channel of the light-emission control transistor Tr3 provided in the semiconductor substrate 100. Furthermore, the light-emission control transistor Tr3 has source / drain regions formed of diffusion regions 104 containing p-type impurities, sandwiching the channel formation region. Thus, in this embodiment, by providing the light-emission control transistor Tr3 on the semiconductor substrate 100, it is possible to stabilize the characteristics and provide a high driving force and high breakdown voltage transistor. Furthermore, the light-emission control transistor Tr3 is isolated from the drive transistor Tr1 by an element isolation portion 106 provided in the semiconductor substrate 100.

[0066] The source or drain of the light-emitting control transistor Tr3 is connected by a via 206 to an electrode (not shown) of a capacitance section C2 provided in the wiring layer 200 and a power supply (V ＤＤ ) and a wiring 204 that connects them. Furthermore, the gate electrode 102 of the light emission control transistor Tr3 is electrically connected by a via 206 to the signal source of the light emission control signal DS.

[0067] The capacitance section C2 may be provided in the wiring layer 200 stacked above the driving transistor Tr1 and the light emission control transistor Tr3. In detail, one side of the capacitance section C2 may be electrically connected to the source / drain shared by the driving transistor Tr1 and the light emission control transistor Tr3 through a via 206, and the other side of the capacitance section C2 may be electrically connected to the power supply (V ＤＤ ) may be electrically connected to the wiring 204 that connects to the

[0068] Furthermore, as shown in FIG. 4A, the wiring layer 200 includes an insulating film 202, wiring 204 (formed, for example, from a metal film such as tungsten (W)), and vias 206 (formed, for example, from a metal film such as tungsten).

[0069] Furthermore, as shown in FIG. 4A, the wiring layer 200 includes an oxygen supply layer 230. The oxygen supply layer 230 is formed, for example, from an oxidation film that acts to oxidize by depriving electrons from surrounding films. In this embodiment, the oxygen supply layer 230 has an M / z of 32 (O ２ ) is released at a rate of 1e14 molecules / cm ２ In detail, the oxygen supply layer 230 can be formed from, for example, an oxide film containing silicon or aluminum, and more specifically, can be formed from silicon oxide (SiOx (x>2)) formed at 300° C. or less.

[0070] 4A , the write transistor Tr2 and the switching transistor Tr4 are provided in a wiring layer 200 stacked on the semiconductor substrate 100 on which the drive transistor Tr1 and the light-emission control transistor Tr3 are provided. Specifically, the write transistor Tr2 and the switching transistor Tr4 are provided on an oxygen supply layer 230 in the wiring layer 200. That is, in this embodiment, the drive transistor Tr1 and the light-emission control transistor Tr3 included in the drive circuit and requiring a high breakdown voltage are provided on the semiconductor substrate 100, and the write transistor Tr2 and the switching transistor Tr4 are provided in the wiring layer 200. In this manner, according to this embodiment, the layout size of the drive circuit can be reduced while ensuring a high breakdown voltage for certain transistors, and ultimately the display device 10 can be made smaller.

[0071] Note that this embodiment is not limited to such a structure. For example, in this embodiment, either the writing transistor Tr2 or the switching transistor Tr4 may be provided on the semiconductor substrate 100, similar to the driving transistor Tr1 and the light-emission control transistor Tr3. Also, for example, in this embodiment, either the driving transistor Tr1 or the light-emission control transistor Tr3 may be provided in the wiring layer 200. Furthermore, in this embodiment, the positional relationship between these transistors is not limited to the relationship shown in FIG. 4A . Also, in this embodiment, the functions of the transistors provided on the semiconductor substrate 100 and the functions of the transistors provided in the wiring layer 200 are not limited to the combination described above. For example, transistors having other functions may be provided on the semiconductor substrate 100 or in the wiring layer 200.

[0072] In detail, in this embodiment, as shown in FIG. 4A , the write transistor (second transistor) Tr2 is configured as a thin film transistor provided in the wiring layer 200, and can be an N-channel transistor. Note that in this embodiment, the write transistor Tr2 may be a P-channel transistor. More specifically, the write transistor Tr2 has an oxide semiconductor layer (first oxide semiconductor layer) 222 on the oxygen supply layer 230 and a gate electrode 212 in contact with the oxide semiconductor layer 222 via an insulating film 202. That is, in this embodiment, the write transistor Tr2 has a planar gate electrode structure in which the planar gate electrode 212 is provided on the oxide semiconductor layer 222. Furthermore, in this embodiment, the channel of the write transistor Tr2 is formed in the oxide semiconductor layer 222.

[0073] The oxide semiconductor layer 222 can be formed of, for example, an oxide film containing at least one element selected from the group consisting of aluminum (Al), indium (In), gallium (Ga), tin (Sn), and zinc (Zn). More specifically, the oxide semiconductor layer 222 can be formed of an oxide film containing indium oxide (In ２ O３ ), tin-indium oxide (In ２ O ３ Sn is added as a dopant to ITO, indium-gallium-zinc oxide (ZnO ４ The oxide semiconductor may be formed from, for example, IGZO), aluminum-zinc oxide (ZnO with Al added as a dopant, for example AZO), indium-zinc oxide (ZnO with In added as a dopant, for example IZO), indium-tin-zinc oxide (ZnO with In and Sn added as dopants, for example ITZO), or indium-aluminum-zinc oxide (ZnO with In and Al added as dopants, for example IAZO). In this embodiment, these oxide semiconductors have extremely small leakage currents, and therefore leakage in the write transistor Tr2 can be suppressed. In this way, according to this embodiment, low leakage enables long-term signal retention, which reduces the frame rate during standby and suppresses the increase in power consumption of the display device 10 that accompanies an increase in the number of pixels.

[0074] The gate electrode 212 of the write transistor Tr2 can be made of, for example, a metal or alloy containing at least one element selected from the group consisting of silicon, aluminum, titanium (Ti), tungsten, and molybdenum (Mo). More specifically, the gate electrode 212 can be made of, for example, tungsten, titanium nitride (TiNx), polysilicon (poly-Si), or the like.

[0075] The insulating film 202, which serves as the gate insulating film below the gate electrode 212 of the write transistor Tr2, can be made of, for example, an oxide film or a nitride film containing silicon or aluminum. More specifically, the insulating film 202 can be made of, for example, silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiON), silicon carbonitride (SiCN), aluminum oxide, or the like.

[0076] The source or drain of the write transistor Tr2 is connected to a wiring 204 (which carries a signal voltage V ｓｉｇ The via 206 is in contact with the upper surface of the oxide semiconductor layer 222. Furthermore, the gate electrode 212 of the writing transistor Tr2 is electrically connected by the via 206 to a wiring 204 that is connected to a scanning line (WS).

[0077] 4A , in this embodiment, the switching transistor (fifth transistor) Tr4 is configured as a thin-film transistor provided in the wiring layer 200, similar to the write transistor Tr2, and can be, for example, an N-channel transistor. Note that, in this embodiment, the switching transistor Tr4 may be a P-channel transistor. More specifically, the switching transistor Tr4 has an oxide semiconductor layer 222 on the oxygen supply layer 230 and a gate electrode 212 in contact with the oxide semiconductor layer 222 via the insulating film 202. That is, in this embodiment, the switching transistor Tr4 has a planar gate electrode structure in which the planar gate electrode 212 is provided on the oxide semiconductor layer 222. In this embodiment, the channel of the switching transistor Tr4 is formed in the oxide semiconductor layer 222.

[0078] As described above, the oxide semiconductor layer 222 can be formed from, for example, an oxide film containing at least one element selected from the group consisting of aluminum, indium, gallium, tin, and zinc. More specifically, the oxide semiconductor layer 222 can be formed from indium oxide, tin-indium oxide, indium-gallium-zinc oxide, aluminum-zinc oxide, indium-zinc oxide, indium-tin-zinc oxide, indium-aluminum-zinc oxide, or the like. In this embodiment, these oxide semiconductors have extremely small leakage currents, thereby suppressing leakage in the switching transistor Tr4. This suppresses leakage current during transient response, thereby reducing black floating and improving contrast. Furthermore, the switching transistor Tr4 can easily be formed as an N-channel transistor. Therefore, the switching transistor Tr4, which is an N-channel transistor, can stably control the voltage between the cathode and anode of the light-emitting element EL to 0 V, preventing current from being supplied to the light-emitting element EL. As a result, this embodiment can suppress a decrease in contrast during black gradation display.

[0079] The gate electrode 212 of the switching transistor Tr4 can be formed from, for example, a metal or alloy containing at least one element selected from the group consisting of silicon, aluminum, titanium, tungsten, and molybdenum. More specifically, the gate electrode 212 can be formed from, for example, tungsten, titanium nitride, polysilicon, etc. The insulating film 202, which serves as the gate insulating film below the gate electrode 212 of the switching transistor Tr4, can be formed from, for example, an oxide film or nitride film containing silicon or aluminum. More specifically, the insulating film 202 can be formed from, for example, silicon oxide, silicon nitride, silicon oxynitride, silicon carbonitride, aluminum oxide, etc.

[0080] The source or drain of the switching transistor Tr4 is electrically connected, via a via 206, to an anode electrode 310 of the light-emitting element EL (light-emitting portion 300) provided on the wiring layer 200. The via 206 is in contact with the upper surface of the oxide semiconductor layer 222. Furthermore, the gate electrode 212 of the switching transistor Tr4 is electrically connected, via the via 206, to a wiring 204 that is connected to a drive signal source (AZ).

[0081] In this embodiment, the oxide semiconductor layer 222, which serves as the channel of the writing transistor Tr2 and the switching transistor Tr4 provided as thin-film transistors, is provided on the oxygen supply layer 230, which is an oxidation film that acts to oxidize by removing electrons from surrounding films. In this manner, in this embodiment, oxygen is suitably diffused from the oxygen supply layer 230 to the oxide semiconductor layer 222, making the oxide semiconductor layer 222 a semiconductor that functions as a channel. Furthermore, in this embodiment, the oxide semiconductor layer 222 is provided on the upper surface of the oxygen supply layer 230, and the easily oxidized oxide semiconductor layer 222 blocks oxygen diffusion. Therefore, in this embodiment, oxygen diffused from the oxygen supply layer 230 is less likely to reach layers above the oxide semiconductor layer 222. Therefore, in this embodiment, the characteristics (e.g., reliability, etc.) of elements (e.g., wiring 204, etc.) located above the oxide semiconductor layer 222 are less likely to be degraded by diffused oxygen.

[0082] 4A, the switching transistor Tr4 and the writing transistor Tr2 are provided at the same height, i.e., in the same layer, in the stacked structure of the display device 10. However, this embodiment is not limited to this, and for example, the switching transistor Tr4 and the writing transistor Tr2 may be provided at different heights, i.e., in different layers, in the stacked structure and stacked on top of each other.

[0083] 4A , an oxide semiconductor layer (second oxide semiconductor layer) 224 is provided on a part of the lower surface of the oxygen supply layer 230. In this embodiment, the oxide semiconductor layer 224 can be used as wiring in the wiring layer 200 by making the conductivity per unit volume higher than that of the oxide semiconductor layer 222, for example. In this embodiment, the oxide semiconductor layer 222 and the oxide semiconductor layer 224 are provided so as not to overlap each other when viewed from above the semiconductor substrate 100.

[0084] The oxide semiconductor layer 224 can be formed from an oxide film containing at least one element selected from the group consisting of aluminum, indium, gallium, tin, and zinc, similarly to the oxide semiconductor layer 222. More specifically, the oxide semiconductor layer 224 can be formed from indium oxide, tin-indium oxide, indium-gallium-zinc oxide, aluminum-zinc oxide, indium-zinc oxide, indium-tin-zinc oxide, indium-aluminum-zinc oxide, or the like.

[0085] In this embodiment, since the oxide semiconductor layer 224 is provided on the lower surface of the oxygen supply layer 230, the diffusion of oxygen is blocked by the easily oxidized oxide semiconductor layer 224. Therefore, in this embodiment, oxygen diffused from the oxygen supply layer 230 is less likely to reach layers below the oxide semiconductor layer 224. Therefore, in this embodiment, it is possible to make it difficult for the characteristics of elements such as the driving transistor Tr1 and the light-emitting control transistor Tr3 located below the oxide semiconductor layer 224 to deteriorate.

[0086] 4A , a light-emitting unit 300, which is a light-emitting element EL, is provided on the wiring layer 200. The light-emitting element EL mainly includes an anode electrode 310 provided on the wiring layer 200, a light-emitting layer 314 that is laminated on the anode electrode 310 and emits light, and a cathode electrode 312 that is laminated on the light-emitting layer 314 and transmits light from the light-emitting layer 314. In this embodiment, for example, the light-emitting element EL can be an OLED having a light-emitting layer 314 made of an organic material.

[0087] The anode electrode 310 may also function as a reflective layer, and is preferably made of a metal film having as high a reflectivity and as large a work function as possible in order to enhance light extraction efficiency. Examples of such a metal film include metal films containing at least one of simple substances and alloys of metal elements such as chromium (Cr), gold (Au), platinum (Pt), nickel (Ni), copper (Cu), molybdenum, titanium, tantalum (Ta), aluminum, magnesium (Mg), iron (Fe), tungsten, and silver (Ag).

[0088] The light-emitting layer 314 provided on the anode electrode 310 is made of an organic or inorganic material and is capable of emitting, for example, white light. The light-emitting layer 314 may include a hole injection layer (not shown) and a hole transport layer (not shown) provided adjacent to the anode electrode 310, and an electron transport layer (not shown) provided adjacent to the cathode electrode 312. In other words, the light-emitting layer 314 may have a structure in which, from the anode electrode 310 side, a hole injection layer, a hole transport layer, the light-emitting layer 314, and an electron transport layer (not shown) are stacked. The hole injection layer functions as a layer that increases the efficiency of hole injection into the light-emitting layer 314 and also functions as a buffer layer to suppress leakage. The hole transport layer functions as a layer that increases the efficiency of hole transport into the light-emitting layer 314. The light-emitting layer 314 can emit light by recombining electrons and holes when an electric field is generated. The electron transport layer functions as a layer that increases the efficiency of transporting electrons to the light-emitting layer 314. Furthermore, the light-emitting layer 314 may have an electron injection layer (not shown) between the electron transport layer and the cathode electrode 312. The electron injection layer functions as a layer that increases the efficiency of electron injection. Note that in this embodiment, the configuration of the light-emitting layer 314 is not limited to the configuration described above, and layers other than the hole injection layer and the light-emitting layer 314 can be provided as necessary.

[0089] Furthermore, in this embodiment, the light-emitting layer 314 is not limited to a layer that emits white light, but may be a layer that emits red light (for example, visible light having a wavelength of about 640 nm to 770 nm), blue light (for example, visible light having a wavelength of about 430 nm to 490 nm), or green light (for example, visible light having a wavelength of about 490 nm to 550 nm).

[0090] The cathode electrode 312 provided on the light-emitting layer 314 is a transparent electrode that is transparent to the light generated in the light-emitting layer 314, and in the following description, the term "transparent electrode" also includes semi-transparent electrodes. The cathode electrode 312 can be formed from a metal film or an oxide film containing at least one of a simple substance or an alloy of a metal element such as aluminum, magnesium, calcium (Ca), sodium (Na), silver, indium, or zinc.

[0091] 4B , similar to the structure shown in FIG. 4A , a semiconductor substrate 100 and a wiring layer 200 stacked on the semiconductor substrate 100 are provided around the pixel array unit 30. The transistor Tr5 is a field-effect transistor provided on the semiconductor substrate 100, e.g., a P-channel transistor. Specifically, the transistor Tr5 has a gate electrode 108 provided via an insulating film 202 on a region of n-type conductivity that functions as the channel (channel formation region) of the transistor Tr5 provided in the semiconductor substrate 100. The sidewalls of the gate electrode 108 may be covered with a sidewall film 110. The transistor Tr5 has source and drain regions formed of diffusion regions 104 containing p-type impurities and provided in the semiconductor substrate 100 so as to sandwich the channel formation region. The transistor Tr5 is isolated from other transistors by an element isolation portion 106 provided in the semiconductor substrate 100.

[0092] 4B , the wiring layer 200 includes an insulating film 202, wiring 204, and vias 206. In this embodiment, the wiring layer 200 also includes an oxygen supply layer 230. Furthermore, in this embodiment, an oxide semiconductor layer 224 is provided on the lower surface of the oxygen supply layer 230, even around the pixel array section 30. Therefore, in this embodiment, the oxide semiconductor layer 224 is provided on the lower surface of the oxygen supply layer 230, and the oxide semiconductor layer 224, which is easily oxidized, blocks the diffusion of oxygen. Therefore, in this embodiment, it is possible to suppress deterioration of the characteristics of elements such as the transistor Tr5 located below the oxide semiconductor layer 224, which is caused by diffused oxygen.

[0093] 4C , similar to the structure shown in FIG. 4A , for example, a semiconductor substrate 100 and a wiring layer 200 stacked on the semiconductor substrate 100 are provided on the periphery of the display device 10. The wiring layer 200 includes an insulating film 202, wiring 204, vias 206, and an oxygen supply layer 230. Furthermore, in this embodiment, an oxide semiconductor layer 224 is provided on the lower surface of the oxygen supply layer 230 on the periphery of the display device 10. Therefore, in this embodiment, it is possible to suppress deterioration of the characteristics (e.g., reliability) of elements such as the wiring 204 located below the oxide semiconductor layer 224 due to diffused oxygen.

[0094] Furthermore, as shown in FIG. 4C, on the outer periphery of the display device 10, pads 320 for connecting the display device 10 to an external device are provided on the upper surface of the wiring layer 200.

[0095] 4D , the writing transistor Tr2 and the switching transistor Tr4 provided in the wiring layer 200 have a gate electrode 212 provided on a strip-shaped oxide semiconductor layer 222, and a pair of vias 214 electrically connected to the source and drain of the transistor are provided on either side of the gate electrode 212. Furthermore, in this plan view, the center of the gate electrode 212 and the centers of the pair of vias 214 are aligned on a single line.

[0096] 4A to 4D. Furthermore, as described above, the transistors provided on the semiconductor substrate 100 and the transistors provided in the oxide semiconductor layer 222 in the wiring layer 200 are not limited to the transistors having the above-described functions. In this embodiment, as long as at least one transistor is provided on the semiconductor substrate 100 and at least one other transistor is provided in the oxide semiconductor layer 222, they can be freely combined and modified. Furthermore, in this embodiment, the number of transistors included in the drive circuit of the pixel 20 is not limited to four, and is not particularly limited as long as it is two or more.

[0097] As described above, the oxide semiconductor layer 222 made of IGZO or the like has a tendency to be easily oxidized and reduced by the influence of surrounding films, and has a tendency to become low-resistance when electrons are added and reduced, and high-resistance when electrons are removed and oxidized. Therefore, in this embodiment, it is preferable to control the resistance of the oxide semiconductor layer 222 by adjusting the area ratio between the oxide semiconductor layer 222 and the oxygen supply layer 230 in contact with the oxide semiconductor layer 222, so that the oxide semiconductor layer 222 becomes, for example, a semiconductor. Hereinafter, the control of the resistance of the oxide semiconductor layer 222 by adjusting the area ratio between the oxide semiconductor layer 222 and the oxygen supply layer 230 in this embodiment will be described with reference to FIG. 5 . FIG. 5 is a schematic diagram for explaining this embodiment.

[0098] As shown on the left side of Figure 5, for example, when the area of ​​the oxide semiconductor layer 222 and the area of ​​the oxygen supply layer 230 in contact with the oxide semiconductor layer 222 are approximately the same, oxygen is suitably supplied from the oxygen supply layer 230 to the oxide semiconductor layer 222, and the oxide semiconductor layer 222 exhibits semiconductor properties. On the other hand, as shown on the right side of Figure 5, when the area of ​​the oxide semiconductor layer 222 is made much smaller than that of the oxygen supply layer 230, excessive oxygen is supplied from the oxygen supply layer 230 to the oxide semiconductor layer 222, and the oxide semiconductor layer 222 exhibits high resistance and exhibits insulating properties. Therefore, in this embodiment, it is preferable to adjust the area ratio between the oxide semiconductor layer 222 and the oxygen supply layer 230 to control the amount of oxygen supplied from the oxygen supply layer 230 to the oxide semiconductor layer 222 and thereby control the resistance value of the oxide semiconductor layer 222. That is, in this embodiment, the function of the oxide semiconductor layer 222 can be tailored by adjusting the area ratio between the oxide semiconductor layer 222 and the oxygen supply layer 230. Furthermore, in this embodiment, the thicknesses of the oxygen supply layer 230 and the oxide semiconductor layer 222 may be adjusted to adjust the redox state of the oxide semiconductor layer 222, thereby enabling different functions to be created for the oxide semiconductor layer 222. In addition, the shape of the oxide semiconductor layer 222 may be devised to adjust the contact area with the oxygen supply layer 230, thereby enabling different functions to be created for the oxide semiconductor layer 222.

[0099] Furthermore, in this embodiment, the effect of preventing oxygen from diffusing upward in the oxide semiconductor layer 222 can be controlled by adjusting the area ratio between the oxide semiconductor layer 222 and the oxygen supply layer 230 to suitably adjust the redox state of the oxide semiconductor layer 222.

[0100] In this embodiment, the resistance value of the oxide semiconductor layer 224 may be controlled by adjusting the area ratio between the oxide semiconductor layer 224 and the oxygen supply layer 230 in contact with the oxide semiconductor layer 224, thereby enabling the function of the oxide semiconductor layer 224 to be differentiated. In addition, in this embodiment, the effect of preventing oxygen diffusion downward from the oxide semiconductor layer 224 can be controlled by suitably adjusting the redox state of the oxide semiconductor layer 224 by adjusting the area ratio between the oxide semiconductor layer 224 and the oxygen supply layer 230. In this embodiment, the redox state of the oxide semiconductor layer 224 may be adjusted by adjusting the film thicknesses of the oxygen supply layer 230 and the oxide semiconductor layer 224, thereby enabling the function of the oxide semiconductor layer 224 to be differentiated. In addition, the shape of the oxide semiconductor layer 224 may be adjusted to adjust the contact area with the oxygen supply layer 230, thereby enabling the redox state of the oxide semiconductor layer 224 to be differentiated.

[0101] 6 and 7, an example of a method for manufacturing the display device 10 according to the present embodiment will be described. Figures 6 and 7 are cross-sectional views for explaining the method for manufacturing the display device 10 according to the present embodiment, and more specifically, are cross-sectional views for explaining the process of forming the writing transistor Tr2 and the switching transistor Tr4.

[0102] First, an example of a manufacturing method shown in FIG. 6 will be described. As shown in the top part of FIG. 6, an oxygen supply layer 230a is formed above a semiconductor substrate 100 (not shown in FIG. 6), and a patterned photoresist 400 is formed thereon. The oxygen supply layer 230a constitutes part of the oxygen supply layer 230 described above, and can be formed, for example, from an oxide film containing silicon or aluminum. Next, as shown in the second part from the top of FIG. 6, the oxygen supply layer 230a is etched along the pattern of the photoresist 400 to form a trench 450.

[0103] 6 , a material (oxide semiconductor material) that will become the oxide semiconductor layers 222, 224 is deposited on the oxygen supply layer 230a in which the trench 450 is provided. At this time, the material deposited on at least a portion of the upper surface of the oxygen supply layer 230a becomes the oxide semiconductor layer 222 that covers at least a portion of the upper surface of the oxygen supply layer 230a, and the material deposited at least on the bottom of the trench 450 becomes the oxide semiconductor layer 224 that covers the bottom of the trench 450. That is, in this embodiment, the oxide semiconductor layer 222 and the oxide semiconductor layer 224 are provided so as not to overlap each other when viewed from above the semiconductor substrate 100.

[0104] 6, an oxygen supply layer 230b is formed on the oxygen supply layer 230 and the oxide semiconductor layers 222 and 224. The oxygen supply layer 230b constitutes part of the oxygen supply layer 230 described above, and can be formed from, for example, an oxide film containing silicon or aluminum. Furthermore, as shown at the bottom of FIG. 6, the upper surface of the oxygen supply layer 230b is planarized by CMP (Chemical Mechanical Polishing) or the like.

[0105] As described above, in this embodiment, the oxide semiconductor layer 222 is divided by the step formed by the trench 450 in the oxygen supply layer 230, rather than by dry etching of the oxide semiconductor layer 222, so that the oxide semiconductor layer 222 is formed as a layer having an island shape. Therefore, in this embodiment, dry etching does not damage the end of the oxide semiconductor layer 222, and the end of the oxide semiconductor layer 222 does not become excessively low in resistance due to the damage. In addition, since dry etching is not used in this embodiment, no residue is deposited on the end of the oxide semiconductor layer 222, making it easy to shape the end of the oxide semiconductor layer 222 into a desired shape. As a result, this embodiment makes it easy to shape the gate electrode 212 formed above the oxide semiconductor layer 222 into a desired shape, and it is possible to avoid electric field concentration or the like occurring in a part of the gate electrode 212, which would degrade the device characteristics of the writing transistor Tr2 and the switching transistor Tr4.

[0106] Furthermore, in this embodiment, the oxide semiconductor layers 222 and 224 can be simultaneously formed by depositing a material that will become the oxide semiconductor layers 222 and 224 on the oxygen supply layer 230a provided with the trench 450. Therefore, according to this embodiment, providing the oxide semiconductor layer 224 does not increase the number of steps or increase the manufacturing cost of the display device 10.

[0107] Next, an example of another manufacturing method shown in FIG. 7 will be described. As shown in the upper part of FIG. 7, an oxygen supply layer 230c made of a material that will become the oxide semiconductor layers 222 and 224, such as an oxide film, and a nitride film 412 are sequentially stacked on the oxygen supply layer 230a in which the trench 450 has been formed. The nitride film 412 is made of, for example, silicon nitride. The oxygen supply layer 230c constitutes part of the oxygen supply layer 230 described above, and can be made of, for example, an oxide film containing silicon or aluminum.

[0108] 7, the oxygen supply layer 230b is laminated on the nitride film 412. Furthermore, as shown in the lower part of FIG 7, the upper surface of the oxygen supply layer 230b is planarized by CMP or the like.

[0109] In this embodiment, the method for manufacturing the display device 10 is not limited to the method shown in FIGS.

[0110] As described above, in this embodiment, the oxide semiconductor layer 224 is provided on the lower surface of the oxygen supply layer 230, and therefore the easily oxidized oxide semiconductor layer 224 blocks oxygen diffusion. Therefore, in this embodiment, oxygen diffused from the oxygen supply layer 230 is less likely to reach layers below the oxide semiconductor layer 224. Therefore, according to this embodiment, it is possible to prevent deterioration of the characteristics of elements located below the oxide semiconductor layer 224, such as transistors such as the driving transistor Tr1, the light-emitting control transistor Tr3, and the transistor Tr, and the wiring 204. Furthermore, in this embodiment, by increasing the conductivity per unit volume of the oxide semiconductor layer 224, the oxide semiconductor layer 224 can be used as the wiring 204 in the wiring layer 200.

[0111] Furthermore, in this embodiment, the oxide semiconductor layer 222 is not dry-etched, but is divided by the step formed by the trench 450 in the oxygen supply layer 230, thereby forming the oxide semiconductor layer 222 as an island-shaped layer. Therefore, in this embodiment, dry etching does not damage the end of the oxide semiconductor layer 222, and the end of the oxide semiconductor layer 222 does not become excessively low in resistance due to the damage. In addition, since dry etching is not used in this embodiment, no residue is deposited on the end of the oxide semiconductor layer 222, making it easy to shape the end of the oxide semiconductor layer 222 into a desired shape. As a result, this embodiment makes it easy to shape the gate electrode 212 formed above the oxide semiconductor layer 222 into a desired shape, thereby preventing electric field concentration or the like in a part of the gate electrode 212 from deteriorating the device characteristics of the writing transistor Tr2 and the switching transistor Tr4.

[0112] Additionally, in this embodiment, the oxide semiconductor layers 222 and 224 can be simultaneously formed by depositing a material that will become the oxide semiconductor layers 222 and 224 on the oxygen supply layer 230a provided with the trench 450. Therefore, according to this embodiment, providing the oxide semiconductor layer 224 does not increase the number of steps and does not increase the manufacturing cost of the display device 10.

[0113] <<4. Second Embodiment>> <4.1 Detailed Configuration> Next, a detailed structure of a display device 10 according to a second embodiment of the present disclosure will be described with reference to Fig. 8. Fig. 8 is a schematic diagram showing an example of a cross-sectional configuration of the display device 10 according to this embodiment, and corresponds to a cross-section of a pixel 20 among cross-sections obtained when the display device 10 is cut along the film thickness direction of the semiconductor substrate 100.

[0114] In this embodiment, the oxygen supply layer 230 may be formed by laminating two layers with different properties. Specifically, the oxygen supply layer 230 is formed by laminating an oxygen supply layer (first film) 231 and an oxygen supply layer (second film) 232. In this embodiment, the oxygen supply layers 231 and 232 may be formed by, for example, films with different oxidizing properties that remove electrons from the surroundings. More specifically, in this embodiment, the oxygen supply layers 231 and 232 may be formed by, for example, films with different levels of oxygen supply to the surroundings.

[0115] The oxygen supply layers 231 and 232 can be formed of, for example, an oxide film containing silicon or aluminum. In this embodiment, the oxygen supply layers 231 and 232 may be formed of different materials, or may be formed of the same material under different film formation conditions.

[0116] In this embodiment, the oxide semiconductor layers 222 and 224 can be made into semiconductors or conductors (wiring) by adjusting the oxidizing action of the oxygen supply layers 231 and 232 and adjusting the area ratio of the oxide semiconductor layers 222 and 224 in contact with the oxygen supply layers 231 and 232. Furthermore, in this embodiment, by suitably adjusting the oxidation-reduction state of the oxide semiconductor layers 222 and 224 using the oxygen supply layers 231 and 232, it is possible to control the effect of preventing oxygen from diffusing above the oxide semiconductor layer 222 and below the oxide semiconductor layer 224.

[0117] In this embodiment, for example, the oxygen supply layer 232 is a film having a stronger oxidizing effect than the oxygen supply layer 231. This allows the oxide semiconductor layer 222 to have lower conductivity per unit volume than the oxide semiconductor layer 224. As a result, the oxide semiconductor layer 222 becomes a semiconductor, and the oxide semiconductor layer 224 becomes a conductor (wiring).

[0118] In this embodiment, the display device 10 is not limited to the configuration shown in FIG. 8, and for example, the oxygen supply layer 230 may be configured as a stack of three or more layers with different properties.

[0119] 4.2 Manufacturing Method Next, an example of a manufacturing method for the display device 10 according to this embodiment will be described with reference to Fig. 9. Fig. 9 is a cross-sectional view for explaining the manufacturing method for the display device 10 according to this embodiment, and more specifically, a cross-sectional view for explaining the manufacturing process of the writing transistor Tr2 and the switching transistor Tr4.

[0120] 9, the oxygen supply layer 232 is formed on the oxygen supply layer 231, and a trench 450 is formed. Next, as shown in the lower part of FIG. 9, a material to become the oxide semiconductor layers 222 and 224 is deposited on the oxygen supply layer 232.

[0121] In this embodiment, the method for manufacturing the display device 10 is not limited to the method shown in FIG.

[0122] <<5. Third Embodiment>> <5.1 Detailed Configuration> Next, a detailed structure of a display device 10 according to a third embodiment of the present disclosure will be described with reference to Figures 10A to 10C. Figures 10A to 10C are schematic diagrams showing an example of the cross-sectional configuration of the display device 10 according to this embodiment, and correspond to a cross section obtained when the display device 10 is cut along the film thickness direction of the semiconductor substrate 100. In detail, Figure 10A shows the cross-sectional configuration of a pixel 20, Figure 10B shows the cross-sectional configuration of the periphery of a pixel array section 30, and Figure 10C shows the cross-sectional configuration of the outer periphery of the display device 10.

[0123] 10A, a reduction action layer 240 may be provided so as to cover the lower surface of the oxygen supply layer 230. In detail, the reduction action layer 240 is, for example, a layer having a reduction action of donating electrons to the surroundings, and is made of, for example, a hydrogen supply layer such as silicon nitride that supplies hydrogen.

[0124] In this embodiment, by providing the reduction action layer 240 so as to be in contact with the oxide semiconductor layer 224, the oxide semiconductor layer 224 is given electrons and reduced, thereby lowering the resistance. Therefore, in this embodiment, the oxide semiconductor layer 224 can have higher conductivity per unit volume than the oxide semiconductor layer 222, and can serve as a good conductor (wiring).

[0125] 10B , around the pixel array section 30, similar to the structure shown in Fig. 10A , the wiring layer 200 includes an insulating film 202, wiring 204, vias 206, and an oxygen supply layer 230. Furthermore, in this embodiment, a reduction action layer 240 is provided on the lower surface of the oxygen supply layer 230. Also, as shown in Fig. 10C , around the periphery of the display device 10, the wiring layer 200 includes an insulating film 202, wiring 204, vias 206, and an oxygen supply layer 230, and a reduction action layer 240 is provided on the lower surface of the oxygen supply layer 230.

[0126] In this embodiment, the display device 10 is not limited to the configuration shown in FIGS. 10A to 10C.

[0127] 5.2 Manufacturing Method Next, an example of a manufacturing method for the display device 10 according to this embodiment will be described with reference to Fig. 11. Fig. 11 is a cross-sectional view for explaining the manufacturing method for the display device 10 according to this embodiment, and more specifically, a cross-sectional view for explaining the manufacturing process of the writing transistor Tr2 and the switching transistor Tr4.

[0128] 11, an oxygen supply layer 230a is formed on the reduction action layer 240, and a trench 450 is then formed. Next, as shown in the lower part of FIG. 11, a material to become the oxide semiconductor layers 222 and 224 is deposited on the oxygen supply layer 230a in which the trench 450 has been formed.

[0129] In this embodiment, the manufacturing method of the display device 10 is not limited to the method shown in FIG.

[0130] <<6. Fourth Embodiment>> <6.1 Detailed Configuration> Next, a detailed structure of a display device 10 according to a fourth embodiment of the present disclosure will be described with reference to Fig. 12. Fig. 12 is a schematic diagram showing an example of a cross-sectional configuration of the display device 10 according to this embodiment, and corresponds to a cross-section of a pixel 20 among cross-sections obtained when the display device 10 is cut along the film thickness direction of the semiconductor substrate 100.

[0131] In this embodiment, similarly to the third embodiment described above, a reduction action layer 240 is provided on the lower surface of the oxygen supply layer 230. However, unlike the third embodiment, this embodiment is provided with a thin film transistor (third transistor) Tr6 having an oxide semiconductor layer 224 provided on the lower surface of the oxygen supply layer 230 as a channel, as shown in FIG.

[0132] 12 , in this embodiment, the transistor Tr6 can be an N-channel transistor. Note that, in this embodiment, the transistor Tr6 may be a P-channel transistor. More specifically, the transistor Tr6 includes an oxide semiconductor layer 224 below the oxygen supply layer 230 and a gate electrode 250 in contact with the oxide semiconductor layer 224 via the insulating film 202. That is, in this embodiment, the transistor Tr6 has a planar gate electrode structure in which the planar gate electrode 250 is provided on the oxide semiconductor layer 224. Furthermore, in this embodiment, the oxide semiconductor layer 222 and the oxide semiconductor layer 224 are semiconductors, and, for example, the oxide semiconductor layer 222 and the oxide semiconductor layer 224 have the same conductivity per unit volume.

[0133] The gate electrode 250 of Tr5 can be made of, for example, a metal or alloy containing at least one element selected from the group consisting of silicon, aluminum, titanium, tungsten, and molybdenum.

[0134] In this way, according to this embodiment, by forming the transistor Tr6 as a thin film transistor in the wiring layer 200, the layout size of the driving circuit etc. can be reduced, and ultimately the display device 10 can be made smaller.

[0135] In this embodiment, the display device 10 is not limited to the configuration shown in FIG.

[0136] 6.2 Manufacturing Method Next, an example of a manufacturing method for the display device 10 according to this embodiment will be described with reference to Fig. 13. Fig. 13 is a cross-sectional view for explaining the manufacturing method for the display device 10 according to this embodiment, and more specifically, a cross-sectional view for explaining the manufacturing process of the writing transistor Tr2 and the switching transistor Tr4.

[0137] First, as shown in the upper part of Fig. 13 , a gate electrode 250 is formed, and then a reduction action layer 240 is formed on the gate electrode 250. Furthermore, an oxygen supply layer 230a is formed on the reduction action layer 240, and a trench 450 is formed. Next, as shown in the middle part of Fig. 13 , materials to become the oxide semiconductor layers 222 and 224 are deposited on the oxygen supply layer 230a.

[0138] 13 , an oxygen supply layer 230b is formed on the oxide semiconductor layer 224. Furthermore, an insulating film 202 and a gate electrode 212 are formed on the oxide semiconductor layer 224, the insulating film 202 is formed on the gate electrode 212, and a via 214 is formed in the insulating film 202.

[0139] In this embodiment, the method for manufacturing the display device 10 is not limited to the method shown in FIG.

[0140] 7. Fifth Embodiment Next, a detailed structure of a display device 10 according to a fifth embodiment of the present disclosure will be described with reference to Fig. 14 and Fig. 15. Fig. 14 and Fig. 15 are cross-sectional views for explaining a manufacturing method of the display device 10 according to this embodiment, and more specifically, cross-sectional views for explaining a manufacturing process of the writing transistor Tr2 and the switching transistor Tr4.

[0141] In this embodiment, the oxygen supply layer 230 may be formed from a stack of two layers having different etching rates. Specifically, in this embodiment, as shown in FIG. 14 , the oxygen supply layer 230 is formed from a stack of an oxygen supply layer 230d and an oxygen supply layer 230e. In this embodiment, for example, the oxygen supply layer 230d located below the oxygen supply layer 230 may be made of silicon oxide, and the oxygen supply layer 230e located above the oxygen supply layer 230 may be made of silicon nitride (in this case, the oxygen supply layer 230e constitutes part of the oxygen supply layer 230, but is a layer that supplies nitrogen instead of oxygen). Because silicon nitride has a slower etching rate than silicon oxide, the sidewalls of the trench 450 in the oxygen supply layer 230 can be made overhanging (eave-shaped), as shown in the middle part of FIG. 14 . By doing so, in this embodiment, the oxide semiconductor layer 222 can be more easily divided by the trench 450 having overhanging sidewalls, and the oxide semiconductor layer 222 can be formed into a desired island shape.

[0142] Furthermore, in this embodiment, the oxygen supply layers 230d and 230e are not limited to being formed from different materials having different etching rates, but may be formed from the same material having different densities.

[0143] In addition, in this embodiment, the trench 450 of the oxygen supply layer 230a may be formed to have a tapered cross section that narrows toward the top, as shown in Fig. 15. In this manner, in this embodiment, the oxide semiconductor layer 222 can be more easily divided by the trench 450 having a tapered cross section, and the oxide semiconductor layer 222 can be formed into a desired island shape.

[0144] It should be noted that this embodiment is not limited to the methods and configurations shown in FIGS.

[0145] 8. Sixth Embodiment Next, a detailed structure of a display device 10 according to a sixth embodiment of the present disclosure will be described with reference to Fig. 16. Fig. 16 is a cross-sectional view for explaining a manufacturing method of the display device 10 according to this embodiment, and more specifically, a cross-sectional view for explaining a manufacturing process of the writing transistor Tr2 and the switching transistor Tr4.

[0146] In this embodiment, the oxygen supply layer 230a may have a trench 450 with a stepped cross section. In this embodiment, for example, as shown in Fig. 16 , the trench 450 has a stepped shape that extends from a first step 451, which is the bottom surface of the trench 450, through a second step 452, to a third step 453, which is the top surface of the oxygen supply layer 230a. In this embodiment, for example, an oxide semiconductor layer (third oxide semiconductor layer) 226 is provided on the step 452.

[0147] The oxide semiconductor layer 226 can be formed of, for example, an oxide film containing at least one element selected from the group consisting of aluminum, indium, gallium, tin, and zinc.

[0148] In this embodiment, the oxide semiconductor layer 226 may be used as, for example, a conductor or wiring. In this manner, according to this embodiment, the oxide semiconductor layers 222, 224, and 226 can be simultaneously formed by depositing materials that will become the oxide semiconductor layers 222, 224, and 226 on the oxygen supply layer 230a in which the stepped trench 450 is provided. Therefore, according to this embodiment, providing the oxide semiconductor layers 224 and 226 does not increase the number of steps or increase the manufacturing cost of the display device 10.

[0149] In this embodiment, the oxide semiconductor layer 226 may be used as a semiconductor, for example, as a channel of a thin film transistor. In this way, according to this embodiment, by forming the additional transistor as a thin film transistor in the wiring layer 200, the layout size of the drive circuit etc. can be reduced, and ultimately the display device 10 can be made smaller.

[0150] In this embodiment, the trench 450 is not limited to having three steps, but may have more steps. That is, this embodiment is not limited to the method and configuration shown in FIG.

[0151] 9. Seventh Embodiment Next, a detailed structure of a display device 10 according to a seventh embodiment of the present disclosure will be described with reference to Fig. 17. Fig. 17 is a cross-sectional view for explaining a manufacturing method of the display device 10 according to this embodiment, and more specifically, a cross-sectional view for explaining a manufacturing process of the writing transistor Tr2 and the switching transistor Tr4.

[0152] The manufacturing method according to this embodiment is carried out in the same manner as the manufacturing method according to the second embodiment shown in FIG. 9 , but as shown in the lower part of FIG. 17 , a gas barrier film 402 is provided to cover the oxide semiconductor layers 222 and 224. The gas barrier film 402 can be formed of, for example, aluminum oxide or silicon nitride. In this embodiment, the gas barrier film 402 can prevent gases such as oxygen from diffusing from the surrounding insulating film 202 to the oxide semiconductor layers 222 and 224. Therefore, according to this embodiment, the controllability of the resistance values ​​of the oxide semiconductor layers 222 and 224 by the oxygen supply layers 231 and 232 can be further improved.

[0153] It should be noted that this embodiment is not limited to the method and configuration shown in FIG. 17, and for example, the gas barrier film 402 may be configured by laminating two layers.

[0154] <<10. Eighth Embodiment>> Next, a detailed structure of a display device 10 according to an eighth embodiment of the present disclosure will be described with reference to Fig. 18. Fig. 18 is a cross-sectional view for explaining a manufacturing method of the display device 10 according to this embodiment, and more specifically, a cross-sectional view for explaining a manufacturing process of the writing transistor Tr2 and the switching transistor Tr4.

[0155] In the first embodiment described above, the oxide semiconductor layers 222 and 224 are formed on the oxygen supply layer 230a, and the oxygen supply layer 230b is further laminated on the oxide semiconductor layers 222 and 224. However, in this embodiment, the oxygen supply layer 230b laminated on the oxide semiconductor layers 222 and 224 is not limited to being a single layer consisting of one layer, and may have a laminated structure. In this embodiment, for example, as shown in the third and fourth rows from the top of Figure 18, the oxygen supply layer 230f is formed on the oxide semiconductor layers 222 and 224, and the oxygen supply layer 230g is formed on the oxygen supply layer 230f. The oxygen supply layers 230f and 230g can be formed, for example, from an oxide film or a nitride film containing silicon or aluminum (note that if the oxygen supply layers 230f and 230g are formed from a nitride film, the oxygen supply layers 230f and 230g will structurally form part of the oxygen supply layer 230b, but will be layers that supply nitrogen instead of oxygen).

[0156] In this embodiment, the oxygen supply layer 230b stacked on the oxide semiconductor layers 222 and 224 is a stack of multiple layers made of different materials, which makes it possible to precisely control the redox states of the oxide semiconductor layers 222 and 224 and the surrounding layers to desired states. Therefore, according to this embodiment, the characteristics of each element in the display device 10 can be improved.

[0157] Furthermore, in this embodiment, the oxygen supply layer 230f in contact with the oxide semiconductor layers 222 and 224 may be the gas barrier film 402 as in the seventh embodiment (note that in this case, the oxygen supply layer 230f constitutes a part of the oxygen supply layer 230b in terms of configuration, but serves as a layer that prevents the diffusion of oxygen and the like). By doing so, in this embodiment as well, as in the seventh embodiment, the gas barrier film 402 can suppress the diffusion of gases such as oxygen from the surrounding insulating film 202 to the oxide semiconductor layers 222 and 224. Therefore, according to this embodiment, the controllability of the resistance values ​​of the oxide semiconductor layers 222 and 224 by the oxygen supply layers 231 and 232 can be further improved.

[0158] Note that this embodiment is not limited to the method and configuration shown in FIG. 18 , and for example, the oxygen supply layer 230 b stacked on the oxide semiconductor layers 222 and 224 may have a stacked structure consisting of three or more layers.

[0159] <<11. Ninth Embodiment>> Next, a detailed structure of a display device 10 according to a ninth embodiment of the present disclosure will be described with reference to Fig. 19. Fig. 19 is a schematic diagram showing an example of a cross-sectional configuration of a main part of the display device 10 according to this embodiment, and more specifically, a cross-sectional view of a main part of the writing transistor Tr2 and the switching transistor Tr4.

[0160] In the first embodiment described above, the material that will become the oxide semiconductor layers 222 and 224 is divided by the step caused by the trench 450 in the oxygen supply layer 230a, and the oxide semiconductor layers 222 and 224 can be formed in an island shape. However, in the embodiment of the present disclosure, the oxide semiconductor layers 222 and 224 do not need to be completely divided by the trench 450. In this embodiment, for example, as shown in FIG. 19 , the material that will become the oxide semiconductor layers 222 and 224 may remain on the sidewall of the trench 450.

[0161] 19 , the material remaining on the sidewall of the trench 450 may connect the oxide semiconductor layer 222 and the oxide semiconductor layer 224. The material remaining on the sidewall of the trench 450 has a thin film thickness and is therefore easily oxidized by the influence of the surrounding layers. Therefore, the material remaining on the sidewall of the trench 450 is oxidized to become an insulator, and therefore although it physically connects the oxide semiconductor layer 222 and the oxide semiconductor layer 224, it does not electrically connect them, and therefore does not affect the characteristics of the write transistor Tr2 and the switching transistor Tr4.

[0162] 19, the material remaining on the sidewall of the trench 450 may be connected to the oxide semiconductor layer 222. Furthermore, in this embodiment, the material remaining on the sidewall of the trench 450 may be connected to the oxide semiconductor layer 224, as shown in the middle of FIG.

[0163] In this embodiment, the main parts of the write transistor Tr2 and the switching transistor Tr4 are not limited to the configuration shown in FIG.

[0164] 12. Tenth Embodiment Next, a detailed structure of a display device 10 according to a tenth embodiment of the present disclosure will be described with reference to Fig. 20 and Fig. 21. Fig. 20 and Fig. 21 are cross-sectional views for explaining a manufacturing method of the display device 10 according to this embodiment, and more specifically, are cross-sectional views for explaining a manufacturing process of the writing transistor Tr2 and the switching transistor Tr4.

[0165] First, an example of a manufacturing method shown in FIG. 20 will be described. As shown in the upper part of FIG. 20 , an oxide semiconductor layer 224 is formed on the lower surface of an oxygen supply layer 230, and an oxide semiconductor layer 222 is formed on the upper surface of the oxygen supply layer 230. Next, as shown in the middle part of FIG. 20 , a photoresist 400 having a predetermined pattern is formed on the oxygen supply layer 230. Furthermore, oxygen ions are selectively implanted using an oxygen ion beam or the like through openings in the photoresist 400, thereby locally oxidizing the oxide semiconductor layer 224 and converting it into an insulator (oxide semiconductor layer 224b). In this embodiment, by doing so, the size of the oxide semiconductor layer 224 used as wiring can be adjusted with high precision.

[0166] Next, another example of the manufacturing method shown in FIG. 21 will be described. As shown in the upper part of FIG. 21 , a stacked structure is prepared, which includes an oxygen supply layer 231 having an oxidized oxide semiconductor layer 224b and an oxygen supply layer 232 having an oxide semiconductor layer 222 on its upper surface. Next, as shown in the middle part of FIG. 21 , a photoresist 400 having a predetermined pattern is formed on the oxygen supply layer 232. Furthermore, by locally performing plasma treatment with boron (B), argon (Ar), neon (Ne), or the like through openings in the photoresist 400, a portion of the oxide semiconductor layer 224b is selectively reduced to form the oxide semiconductor layer 224. In this manner, the size of the oxide semiconductor layer 224 used as wiring can be accurately adjusted.

[0167] In this embodiment, the method for manufacturing the display device 10 is not limited to the method shown in FIGS.

[0168] <<13. Eleventh Embodiment>> Next, an eleventh embodiment of the present disclosure will be described with reference to Fig. 22. Fig. 22 is a schematic diagram showing an example of a planar configuration of a main part of a display device 10 according to this embodiment, and in detail shows the planar configuration of the writing transistor Tr2 and the switching transistor Tr4.

[0169] In the first embodiment, the writing transistor Tr2 and the switching transistor Tr4 have a gate electrode 212 provided on a strip-shaped oxide semiconductor layer 222, and a pair of vias 214 electrically connected to the source and drain of the transistor are provided to sandwich the gate electrode 212. Furthermore, in the first embodiment, the center of the gate electrode 212 and the centers of the pair of vias 214 are aligned on a single line in a plan view. However, the embodiments of the present disclosure are not limited to such a planar structure.

[0170] 22 , for example, the writing transistor Tr2 and the switching transistor Tr4 have a gate electrode 212 provided at the center of an L-shaped oxide semiconductor layer 222. Furthermore, a pair of vias (contact holes) 214 electrically connected to the source and drain of the transistor are provided on the ends of the L-shaped oxide semiconductor layer 222. In other words, the center of the gate electrode 212 and the centers of the pair of vias 214 are arranged in an L shape in a plan view.

[0171] 22 , for example, the writing transistor Tr2 and the switching transistor Tr4 have a gate electrode 212 provided at the center of a U-shaped oxide semiconductor layer 222. Furthermore, a pair of vias 214 electrically connected to the source and drain of the transistor are provided on the ends of the U-shaped oxide semiconductor layer 222. In other words, the center of the gate electrode 212 and the centers of the pair of vias 214 are arranged in a U-shape in a plan view.

[0172] Furthermore, a structure may be adopted in which a portion of the writing transistor Tr2 and the switching transistor Tr4 share a portion of the region with these transistors of an adjacent pixel 20. For example, as shown on the right side of FIG. 22 , a gate electrode 212 of a transistor of one pixel 20 is provided on the center of a Y-shaped oxide semiconductor layer 222 (the letter "Y"). Furthermore, a pair of vias 214 electrically connected to the source and drain of the transistor of one pixel 20 and a via 214 electrically connected to the source or drain of the transistor of the other pixel 20 are provided on three ends of the Y-shaped oxide semiconductor layer 222. In other words, in a plan view, the center of the gate electrode 212 of the transistor of one pixel 20, the center of the pair of vias 214 of the transistor of one pixel 20, and the center of one of the pair of vias 214 of the transistor of the other pixel 20 are arranged in a Y shape.

[0173] As described above, in this embodiment, the planar structures of the writing transistor Tr2 and the switching transistor Tr4 can be modified in various ways, which allows the layout size of the drive circuit to be made smaller, and ultimately allows the display device 10 to be made smaller.

[0174] In this embodiment, the write transistor Tr2 and the switching transistor Tr4 are not limited to the planar configuration shown in FIG.

[0175] Furthermore, in the embodiments of the present disclosure, the gate electrodes 212 of the writing transistor Tr2 and the switching transistor Tr4 may have vertical gate portions (not shown) extending along the film thickness direction of the semiconductor substrate 100. In this case, the oxide semiconductor layer 222 is formed in a recess surrounding the vertical gate portion so as to be in contact with the vertical gate portion via the insulating film 202. Note that the recess in the oxide semiconductor layer 222 can be created by providing unevenness in the oxygen supply layer 230 and then depositing a film that will be the material of the oxide semiconductor layer 222. Furthermore, in each embodiment of the present disclosure, the gate electrodes 212 of the writing transistor Tr2 and the switching transistor Tr4 may have multiple vertical gate portions.

[0176] In each embodiment of the present disclosure, the write transistor Tr2 and the switching transistor Tr4 may have a dual gate structure in which the oxide semiconductor layer 222 is sandwiched between a pair of gate electrodes 212 .

[0177] Furthermore, in each embodiment of the present disclosure, the writing transistor Tr2 and the switching transistor Tr4 are configured as a top-gate structure in which the gate electrode 212 is located above the oxide semiconductor layer 222. However, the embodiments of the present disclosure are not limited to this, and the writing transistor Tr2 and the switching transistor Tr4 may be configured as a bottom-gate structure in which the gate electrode 212 is located below the oxide semiconductor layer 222.

[0178] <<14. Summary>> As described above, according to each embodiment of the present disclosure, it is possible to avoid characteristic degradation in a display device (semiconductor device) including a thin film transistor.

[0179] In detail, in this embodiment, since the oxide semiconductor layer 224 is provided on the lower surface of the oxygen supply layer 230, the diffusion of oxygen is blocked by the oxide semiconductor layer 224, which is easily oxidized. Therefore, in this embodiment, oxygen diffused from the oxygen supply layer 230 is less likely to reach layers below the oxide semiconductor layer 224. Therefore, according to this embodiment, it is possible to make it difficult for the characteristics of elements located below the oxide semiconductor layer 224, such as the driving transistor Tr1, the light-emitting control transistor Tr3, the transistor Tr, and the wiring 204, to deteriorate.

[0180] Furthermore, in this embodiment, the oxide semiconductor layer 222 is not dry-etched, but is divided by the step formed by the trench 450 in the oxygen supply layer 230, thereby forming the oxide semiconductor layer 222 as an island-shaped layer. Therefore, in this embodiment, dry etching does not damage the end of the oxide semiconductor layer 222, and the end of the oxide semiconductor layer 222 does not become excessively low in resistance due to the damage. In addition, since dry etching is not used in this embodiment, no residue is deposited on the end of the oxide semiconductor layer 222, making it easy to shape the end of the oxide semiconductor layer 222 into a desired shape. As a result, this embodiment makes it easy to shape the gate electrode 212 formed above the oxide semiconductor layer 222 into a desired shape, thereby preventing electric field concentration or the like in a part of the gate electrode 212 from deteriorating the device characteristics of the writing transistor Tr2 and the switching transistor Tr4.

[0181] Additionally, in this embodiment, the oxide semiconductor layers 222 and 224 can be simultaneously formed by depositing a material that will become the oxide semiconductor layers 222 and 224 on the oxygen supply layer 230a provided with the trench 450. Therefore, according to this embodiment, providing the oxide semiconductor layer 224 does not increase the number of steps and does not increase the manufacturing cost of the display device 10.

[0182] The technology of the present disclosure may be applied not only to the display device 10 but also to various semiconductor devices such as lighting devices.

[0183] Furthermore, in the above-described embodiments of the present disclosure, the semiconductor substrate 100 does not necessarily have to be a silicon substrate, but may be another substrate (for example, an SOI (Silicon On Insulator) substrate, a SiGe substrate, or the like).

[0184] It should be noted that the embodiments of the present disclosure are not limited to the forms shown in the drawings, and can be modified in various ways and can also be combined with each other.

[0185] Furthermore, the display device 10 according to the embodiment of the present disclosure can be applied to, for example, a display device for VR (Virtual Reality), MR (Mixed Reality), or AR (Augmented Reality), a display device such as a smartphone or a television device, an electronic viewfinder (EVF), a small projector, etc. Furthermore, the display device 10 can also be applied to various lighting devices.

[0186] Furthermore, the display device 10 according to the embodiment of the present disclosure can be manufactured using methods, devices, and conditions that are used in the manufacture of general semiconductor devices. That is, the display device 10 according to the present embodiment can be manufactured using existing semiconductor device manufacturing methods.

[0187] Examples of the above-mentioned method include a PVD (Physical Vapor Deposition) method, a CVD (Chemical Vapor Deposition) method, and an ALD (Atomic Layer Deposition) method. Examples of PVD methods include vacuum deposition, EB (electron beam) deposition, various sputtering methods (magnetron sputtering, RF (radio frequency)-DC (direct current) combined bias sputtering, ECR (electron cyclotron resonance) sputtering, facing target sputtering, high frequency sputtering, etc.), ion plating, laser ablation, molecular beam epitaxy (MBE), and laser transfer. Examples of CVD methods include plasma CVD, thermal CVD, metal organic (MO) CVD, and photo CVD. Other methods include electroplating, electroless plating, spin coating, dipping, casting, microcontact printing, drop casting, various printing methods such as screen printing, inkjet printing, offset printing, gravure printing, and flexographic printing, stamping, spraying, and various coating methods such as air doctor coater, blade coater, rod coater, knife coater, squeeze coater, reverse roll coater, transfer roll coater, gravure coater, kiss coater, cast coater, spray coater, slit orifice coater, and calendar coater. Furthermore, patterning methods include chemical etching such as shadow masking, laser transfer, and photolithography, and physical etching using ultraviolet light or lasers. Additionally, planarization techniques include CMP, laser planarization, and reflow.

[0188] <<15. Modifications>> <15.1 Modification 1> Next, as a modification of the embodiment of the present disclosure, with reference to FIGS. 23A to 23G , a modification of the relationship between the normal LN passing through the center of the pixel 20 (more specifically, the center of a plurality of light-emitting elements EL included in one pixel (sub-pixel) 20), the normal LN′ passing through the center of the lens member (more specifically, the on-chip lens provided on the light-emitting element EL), and the normal LN″ passing through the center of the wavelength selection unit (more specifically, the color filter provided on the light-emitting element EL) will be described. FIGS. 23A to 23G are conceptual diagrams for explaining the relationship between the normal LN passing through the center of the light-emitting unit, the normal LN′ passing through the center of the lens member, and the normal LN″ passing through the center of the wavelength selection unit. In the following description, the center of the light-emitting element EL will be referred to as the center of the light-emitting unit.

[0189] In the embodiment of the present disclosure, the size of the wavelength selection section may be changed as appropriate in accordance with the light emitted from the light-emitting element EL. Furthermore, when a light absorption layer (black matrix layer) is provided between the wavelength selection sections of adjacent pixels 20, the size of the light absorption layer (black matrix layer) may be changed as appropriate in accordance with the light emitted from the pixel 20. Furthermore, the size of the wavelength selection section may be determined by the distance (offset amount) d between the normal line passing through the center of the light-emitting element EL and the normal line passing through the center of the wavelength selection section. ０ The planar shape of the wavelength selection section may be the same as, similar to, or different from the planar shape of the lens member.

[0190] For example, as shown in FIG. 23A, the normal line LN passing through the center of the light-emitting unit, the normal line LN″ passing through the center of the wavelength selecting unit, and the normal line LN′ passing through the center of the lens member may be made to coincide with each other. In other words, the distance (offset amount) D between the normal line passing through the center of the light-emitting unit and the normal line passing through the center of the lens member may be set to be equal to or larger than the normal line LN″. ０ and the distance (offset amount) d between the normal line passing through the center of the light emitting section and the normal line passing through the center of the wavelength selecting section. ０ and can be equal to 0 (zero).

[0191] Also, for example, as shown in FIG. 23B, the normal line LN passing through the center of the light emitting section and the normal line LN" passing through the center of the wavelength selecting section are coincident, but the normal line LN passing through the center of the light emitting section and the normal line LN" passing through the center of the wavelength selecting section may not be coincident with the normal line LN' passing through the center of the lens member. In other words, D ０ ≠d ０ = 0.

[0192] Also, for example, as shown in FIG. 23C, the normal line LN passing through the center of the light emitting section, the normal line LN" passing through the center of the wavelength selecting section, and the normal line LN' passing through the center of the lens member may not coincide, and the normal line LN" passing through the center of the wavelength selecting section and the normal line LN' passing through the center of the lens member may coincide. In other words, D ０ = d ０ >0.

[0193] Also, for example, as shown in FIG. 23D, a normal line LN passing through the center of the light-emitting section, a normal line LN" passing through the center of the wavelength selection section, and a normal line LN' passing through the center of the lens member do not coincide with each other, and a normal line LN' passing through the center of the lens member does not coincide with the normal line LN passing through the center of the surface of the light-emitting section and the normal line LN" passing through the center of the wavelength selection section. Here, it is preferable that the center of the wavelength selection section (shown by a black circle in FIG. 23D) is located on a straight line LL connecting the center of the surface of the light-emitting section and the center of the lens member (shown by a black circle in FIG. 23D). Specifically, the distance from the center of the surface of the light-emitting section to the center of the wavelength selection section in the thickness direction is defined as LL. １ , the distance from the center of the wavelength selection portion to the center of the lens member in the thickness direction is LL ２ When this is done, D ０ >d ０ > 0, and taking into account manufacturing variations, d ０ :D ０ =LL １ : (LL １ +LL ２ ) is preferably satisfied.

[0194] In addition, the stacking relationship between the wavelength tip portion and the lens member may be reversed. In such a case, for example, as shown in FIG. 23E, the normal line LN passing through the center of the light emitting portion, the normal line LN″ passing through the center of the wavelength selecting portion, and the normal line LN′ passing through the center of the lens member may be made to coincide. In other words, D ０ = d ０ = 0.

[0195] Also, for example, as shown in FIG. 23F, the normal line LN passing through the center of the light emitting section, the normal line LN" passing through the center of the wavelength selecting section, and the normal line LN' passing through the center of the lens member may not coincide, and the normal line LN" passing through the center of the wavelength selecting section and the normal line LN' passing through the center of the lens member may coincide. In other words, D ０ = d ０ >0.

[0196] Furthermore, as shown in the conceptual diagram of FIG. 23G, a normal line LN passing through the center of the surface of the light emitting section does not coincide with a normal line LN" passing through the center of the wavelength selecting section and a normal line LN' passing through the center of the lens member, and a normal line LN' passing through the center of the lens member does not coincide with the normal line LN passing through the center of the surface of the light emitting section and the normal line LN" passing through the center of the wavelength selecting section. Here, it is preferable that the center of the wavelength selecting section is located on a straight line LL connecting the center of the surface of the light emitting section and the center of the lens member. Specifically, the distance from the center of the surface of the light emitting section in the thickness direction to the center of the wavelength selecting section (shown by a black circle in FIG. 23G) is defined as LL. １ , the distance from the center of the wavelength selective portion in the thickness direction to the center of the lens member (shown by a black circle in FIG. 23G) is LL ２ When this is the case, d ０ >D ０ >0, and taking into account manufacturing variations, D ０ :d ０ =LL ２ : (LL １ +LL ２ ) is preferably satisfied.

[0197] 15.2 Modification 2 The subpixel 1100 (specifically, the light-emitting element EL) used in the display device according to the embodiment of the present disclosure described above may be configured to include a resonator structure that resonates light generated in the light-emitting layer 314. Hereinafter, the resonator structure will be described with reference to FIGS. 24 to 30 . FIG. 24 is a schematic cross-sectional view illustrating a first example of the resonator structure, FIG. 25 is a schematic cross-sectional view illustrating a second example of the resonator structure, and FIG. 26 is a schematic cross-sectional view illustrating a third example of the resonator structure. Furthermore, FIG. 27 is a schematic cross-sectional view illustrating a fourth example of the resonator structure, and FIG. 28 is a schematic cross-sectional view illustrating a fifth example of the resonator structure. Furthermore, FIG. 29 is a schematic cross-sectional view illustrating a sixth example of the resonator structure, and FIG. 30 is a schematic cross-sectional view illustrating a seventh example of the resonator structure.

[0198] (Resonator Structure: First Example) Fig. 24 is a schematic cross-sectional view for explaining a first example of a resonator structure. In the first example, the first electrode (e.g., anode electrode) 1202 is formed to have a common film thickness in each sub-pixel 1100. The same is true for the second electrode (e.g., cathode electrode) 1206.

[0199] 24 , a reflector 1401 is disposed below the first electrode 1202 of the subpixel 1100, with an optical adjustment layer 1402 sandwiched therebetween. A resonator structure is formed between the reflector 1401 and the second electrode 1206, which resonates light generated by the organic layer (more specifically, the light-emitting portion) 1204.

[0200] The reflector 1401 is formed to have a common film thickness in each sub-pixel 1100. The film thickness of the optical adjustment layer 1402 varies depending on the color to be displayed by the sub-pixel 1100. By having the optical adjustment layers 1402R, 1402G, and 1402B have different film thicknesses, it is possible to set an optical distance that generates optimal resonance for the wavelength of light corresponding to the color to be displayed.

[0201] 24 , the reflectors 1401 in the sub-pixels 1100R, 1100G, and 1100B are arranged so that their upper surfaces are aligned. As described above, the film thickness of the optical adjustment layer 1402 differs depending on the color to be displayed by the sub-pixel 1100, and therefore the position of the upper surface of the second electrode 1206 differs depending on the type of the sub-pixel 1100R, 1100G, and 1100B.

[0202] The reflector 1401 can be formed using, for example, a metal such as aluminum (Al), silver (Ag), or copper (Cu), or an alloy containing these as the main component.

[0203] The optical adjustment layer 1402 can be made of an inorganic insulating material such as silicon nitride (SiNx), silicon oxide (SiOx), or silicon oxynitride (SiOxNy), or an organic resin material such as an acrylic resin or a polyimide resin. The optical adjustment layer 1402 may be a single layer or a laminated film made of a plurality of these materials. Furthermore, the number of layers may vary depending on the type of sub-pixel 1100.

[0204] The first electrode 1202 can be formed using a transparent conductive material such as indium tin oxide (ITO), indium zinc oxide (IZO), or zinc oxide (ZnO).

[0205] The second electrode 1206 preferably functions as a semi-transmissive reflective film. The second electrode 1206 can be formed using magnesium (Mg) or silver (Ag), a magnesium-silver alloy (MgAg) containing these as main components, or an alloy containing an alkali metal or an alkaline earth metal.

[0206] 25 is a schematic cross-sectional view illustrating a second example of the resonator structure. In the second example, the first electrode 1202 and the second electrode 1206 are formed to have the same film thickness in each sub-pixel 1100.

[0207] Also in the second example, a reflector 1401 is disposed below the first electrode 1202 of the subpixel 1100, with an optical adjustment layer 1402 sandwiched therebetween. A resonator structure that resonates light generated by the organic layer 1204 is formed between the reflector 1401 and the second electrode 1206. As in the first example, the reflector 1401 is formed to a common thickness in each subpixel 1100, and the thickness of the optical adjustment layer 1402 differs depending on the color that the subpixel 1100 is to display.

[0208] In the first example shown in Figure 24, the upper surfaces of the reflectors 1401 in the sub-pixels 1100R, 1100G, and 1100B are arranged to be aligned, and the position of the upper surface of the second electrode 1206 differs depending on the type of sub-pixel 1100R, 1100G, and 1100B.

[0209] 25 , the upper surfaces of the second electrodes 1206 are aligned in the sub-pixels 1100R, 1100G, and 1100B. To align the upper surfaces of the second electrodes 1206, the upper surfaces of the reflectors 1401 in the sub-pixels 1100R, 1100G, and 1100B are aligned differently depending on the type of the sub-pixels 1100R, 1100G, and 1100B. Therefore, the lower surface of the reflector 1401 has a stepped shape that corresponds to the type of the sub-pixels 1100R, 1100G, and 1100B.

[0210] The materials constituting the reflector 1401, the optical adjustment layer 1402, the first electrode 1202 and the second electrode 1206 are the same as those described in the first example, and therefore will not be described again.

[0211] 26 is a schematic cross-sectional view illustrating a third example of the resonator structure. In the third example, the first electrode 1202 and the second electrode 1206 are formed to have the same film thickness in each sub-pixel 1100.

[0212] Also in the third example, a reflector 1401 is disposed below the first electrode 1202 of the subpixel 1100, with an optical adjustment layer 1402 sandwiched therebetween. A resonator structure that resonates light generated by the organic layer 1204 is formed between the reflector 1401 and the second electrode 1206. As in the first and second examples, the film thickness of the optical adjustment layer 1402 varies depending on the color to be displayed by the subpixel 1100. As in the second example, the upper surface of the second electrode 1206 is disposed so as to be aligned with the subpixels 1100R, 1100G, and 1100B.

[0213] In the second example shown in FIG. 25, in order to align the upper surfaces of the second electrodes 1206, the lower surface of the reflector 1401 has a stepped shape corresponding to the type of the sub-pixels 1100R, 1100G, and 1100B.

[0214] 26, the film thickness of the reflector 1401 is set to be different depending on the type of the sub-pixels 1100R, 1100G, and 1100B. More specifically, the film thickness is set so that the bottom surfaces of the reflectors 1401R, 1401G, and 1401B are aligned.

[0215] The materials constituting the reflector 1401, the optical adjustment layer 1402, the first electrode 1202 and the second electrode 1206 are the same as those described in the first example, and therefore will not be described again.

[0216] (Fourth Example of Resonator Structure) FIG. 27 is a schematic cross-sectional view for explaining a fourth example of the resonator structure.

[0217] 24 , the first electrode 1202 and the second electrode 1206 of the subpixel 1100 are formed to have the same film thickness. A reflector 1401 is disposed below the first electrode 1202 of the subpixel 1100 with an optical adjustment layer 1402 sandwiched therebetween.

[0218] In contrast to this, in the fourth example shown in FIG. 27, the optical adjustment layer 1402 is omitted, and the film thickness of the first electrode 1202 is set to differ depending on the type of the sub-pixels 1100R, 1100G, and 1100B.

[0219] The reflector 1401 is formed to have a common film thickness in each sub-pixel 1100. The film thickness of the first electrode 1202 varies depending on the color to be displayed by the sub-pixel 1100. By having the first electrodes 1202R, 1202G, and 1202B have different film thicknesses, it is possible to set an optical distance that generates optimal resonance for the wavelength of light corresponding to the color to be displayed.

[0220] The materials constituting the reflector 1401, the first electrode 1202 and the second electrode 1206 are the same as those described in the first example, and therefore a description thereof will be omitted.

[0221] (Resonator Structure: Fifth Example) FIG. 28 is a schematic cross-sectional view for explaining a fifth example of the resonator structure.

[0222] 24 , the first electrode 1202 and the second electrode 1206 are formed to have the same film thickness in each subpixel 1100. A reflector 1401 is disposed below the first electrode 1202 of the subpixel 1100 with an optical adjustment layer 1402 sandwiched therebetween.

[0223] 28, the optical adjustment layer 1402 is omitted, and instead, an oxide film 1404 is formed on the surface of the reflector 1401. The thickness of the oxide film 1404 is set to differ depending on the type of the sub-pixels 1100R, 1100G, and 1100B.

[0224] The thickness of the oxide film 1404 varies depending on the color to be displayed by the sub-pixel 1100. By having the oxide films 1404R, 1404G, and 1404B have different thicknesses, it is possible to set an optical distance that produces optimal resonance for the wavelength of light corresponding to the color to be displayed.

[0225] The oxide film 1404 is a film obtained by oxidizing the surface of the reflector 1401, and is made of, for example, aluminum oxide, tantalum oxide, titanium oxide, magnesium oxide, zirconium oxide, etc. The oxide film 1404 functions as an insulating film for adjusting the optical path length (optical distance) between the reflector 1401 and the second electrode 1206.

[0226] The oxide film 1404, which has a different thickness depending on the type of the sub-pixels 1100R, 1100G, and 1100B, can be formed, for example, as follows.

[0227] First, a container is filled with an electrolyte, and the substrate on which the reflector 1401 is formed is immersed in the electrolyte. An electrode is also disposed so as to face the reflector 1401.

[0228] Then, a positive voltage is applied to the reflector 1401 with the electrode as a reference, and the reflector 1401 is anodized. The thickness of the oxide film formed by anodization is proportional to the voltage value applied to the electrode. Therefore, anodization is performed while applying voltages to the reflectors 1401R, 1401G, and 1401B according to the types of sub-pixels 1100R, 1100G, and 1100B, respectively. This allows oxide films 1404 with different thicknesses to be formed simultaneously.

[0229] The materials constituting the reflector 1401, the first electrode 1202 and the second electrode 1206 are the same as those described in the first example, and therefore a description thereof will be omitted.

[0230] (Cavity Structure: Sixth Example) FIG. 29 is a schematic cross-sectional view illustrating a sixth example of the cavity structure. In the sixth example, the subpixel 1100 is configured by stacking a first electrode 1202, an organic layer 1204, and a second electrode 1206. However, in the sixth example, the first electrode 1202 is formed to function as both an electrode and a reflector. The first electrode (also known as reflector) 1202 is formed of a material having optical constants selected according to the type of subpixel 1100R, 1100G, or 1100B. By varying the phase shift caused by the first electrode (also known as reflector) 1202, it is possible to set an optical distance that generates optimal resonance for the wavelength of light corresponding to the color to be displayed.

[0231] The first electrode (also serving as a reflector) 1202 can be made of a metal such as aluminum (Al), silver (Ag), gold (Au), or copper (Cu), or an alloy containing any of these as its main components. For example, the first electrode (also serving as a reflector) 1202R of the subpixel 1100R can be made of copper (Cu), and the first electrode (also serving as a reflector) 1202G of the subpixel 1100G and the first electrode (also serving as a reflector) 1202B of the subpixel 1100B can be made of aluminum.

[0232] The material constituting the second electrode 1206 is the same as that described in the first example, and therefore a description thereof will be omitted.

[0233] (Resonator Structure: Seventh Example) Figure 30 is a schematic cross-sectional view illustrating a seventh example of the resonator structure. The seventh example is basically a configuration in which the sixth example is applied to the sub-pixels 1100R and 1100G, and the first example is applied to the sub-pixel 1100B. Even with this configuration, it is possible to set an optical distance that generates optimal resonance for the wavelength of light corresponding to the color to be displayed.

[0234] The first electrodes (which also serve as reflectors) 1202R and 1202G used in the sub-pixels 1100R and 1100G can be made of a single metal such as aluminum (Al), silver (Ag), gold (Au), or copper (Cu), or an alloy containing these as the main component.

[0235] The materials constituting the reflector 1401B, the optical adjustment layer 1402B, and the first electrode 1202B used in the sub-pixel 1100B are the same as those described in the first example, and therefore description thereof will be omitted.

[0236] <<16. Application Examples>> For example, the technology according to the present disclosure may be applied to the display units of various electronic devices, etc. Therefore, examples of electronic devices to which the technology can be applied will be described below.

[0237] 31A is a front view showing an example of the appearance of a digital still camera 500, and Fig. 31B is a rear view showing an example of the appearance of the digital still camera 500. This digital still camera 500 is an interchangeable lens single-lens reflex type, and has an interchangeable taking lens unit (interchangeable lens) 512 located approximately in the center of the front of a camera main body 511, and a grip part 513 for the photographer to hold on the left side of the front.

[0238] A monitor 514 is provided at a position shifted to the left from the center on the back of the camera body 511. An electronic viewfinder (eyepiece window) 515 is provided above the monitor 514. By looking through the electronic viewfinder 515, the photographer can visually confirm the optical image of the subject guided by the photographing lens unit 512 and determine the composition. The display device 10 according to an embodiment of the present disclosure can be used as the monitor 514 or the electronic viewfinder 515.

[0239] 32 is an external view of a head-mounted display 600. The head-mounted display 600 has, for example, ear hooks 612 on both sides of a glasses-shaped display unit 611 for wearing on the user's head. In this head-mounted display 600, the display device 10 according to an embodiment of the present disclosure can be used as the display unit 611.

[0240] 33 is an external view of a see-through head mounted display 634. The see-through head mounted display 634 is composed of a main body 632, an arm 633, and an eyepiece tube 631.

[0241] The main body 632 is connected to the arm 633 and the glasses 630. Specifically, an end of the long side of the main body 632 is coupled to the arm 633, and one side of the main body 632 is connected to the glasses 630 via a connecting member. The main body 632 may also be worn directly on the head of the human body.

[0242] The main body 632 incorporates a control board for controlling the operation of the see-through head-mounted display 634 and a display unit. The arm 633 connects the main body 632 to the lens barrel 631 and supports the lens barrel 631. Specifically, the arm 633 is coupled to an end of the main body 632 and an end of the lens barrel 631, respectively, and fixes the lens barrel 631. The arm 633 also incorporates a signal line for communicating data related to images provided from the main body 632 to the lens barrel 631.

[0243] The lens barrel 631 projects image light provided from the main body 632 via the arm 633 through an eyepiece lens toward the eyes of a user wearing the see-through head mounted display 634. In this see-through head mounted display 634, the display unit of the main body 632 can use the display device 10 according to an embodiment of the present disclosure.

[0244] 34 shows an example of the appearance of a television device 710. This television device 710 has, for example, an image display screen unit 711 including a front panel 712 and a filter glass 713, and this image display screen unit 711 is configured by the display device 10 according to an embodiment of the present disclosure.

[0245] 35 shows an example of the appearance of a smartphone 800. The smartphone 800 has a display unit 802 that displays various information, an operation unit that includes buttons and the like that accept operation inputs from the user, and the like. The display unit 802 can be the display device 10 according to this embodiment.

[0246] 36A and 36B are diagrams showing the internal configuration of a vehicle having the display device 10 according to an embodiment of the present disclosure as a display device. In detail, Fig. 36A is a diagram showing the state of the interior of the vehicle from the rear to the front, and Fig. 36B is a diagram showing the state of the interior of the vehicle from diagonally rear to diagonally front.

[0247] 36A and 36B has a center display 911, a console display 912, a head-up display 913, a digital rearview mirror 914, a steering wheel display 915, and a rear entertainment display 916. The display device 10 according to an embodiment of the present disclosure can be applied to some or all of these displays.

[0248] The center display 911 is disposed on the center console 907 in a position facing the driver's seat 901 and the passenger seat 902. While FIGS. 36A and 36B show an example of a horizontally elongated center display 911 extending from the driver's seat 901 side to the passenger seat 902 side, the screen size and location of the center display 911 are arbitrary. The center display 911 can display information detected by various sensors (not shown). As a specific example, the center display 911 can display an image captured by an image sensor, a distance image to obstacles in front of or to the side of the vehicle measured by a ToF (Time of Flight) sensor, the body temperature of a passenger detected by an infrared sensor, etc. The center display 911 can be used to display, for example, at least one of safety-related information, operation-related information, a life log, health-related information, authentication / identification-related information, and entertainment-related information.

[0249] The safety-related information includes information such as detection of drowsiness, distraction, child mischief, whether a seatbelt is fastened, and whether a passenger has been abandoned. This information is detected, for example, by a sensor (not shown) placed on the back side of the center display 1911. The operation-related information is obtained by detecting gestures related to passenger operations using a sensor. The detected gestures may include operations of various in-vehicle equipment. For example, the sensor may detect operations of the air conditioning system, navigation system, AV (Audio / Visual) system, lighting system, etc. The life log includes life logs of all passengers. For example, the life log includes a record of each passenger's behavior while in the vehicle. By acquiring and saving the life log, the condition of the passenger at the time of the accident can be confirmed. The health-related information is obtained by detecting the passenger's body temperature using a temperature sensor and inferring the passenger's health condition based on the detected body temperature. Alternatively, the passenger's face may be captured using an image sensor, and the passenger's health condition may be inferred from the facial expression in the captured image. Furthermore, the system may have an automated voice conversation with the occupant and estimate the occupant's health condition based on the occupant's responses. The authentication / identification-related information includes a keyless entry function that uses a sensor to perform facial recognition, a function that automatically adjusts seat height and position using facial recognition, etc. The entertainment-related information includes a function that uses a sensor to detect operation information of an AV device by the occupant, and a function that recognizes the occupant's face using a sensor and provides content suitable for the occupant via the AV device.

[0250] The console display 912 can be used to display, for example, life log information. The console display 912 is disposed near the shift lever 908 on the center console 907 between the driver's seat 901 and the passenger seat 902. The console display 912 can also display information detected by various sensors (not shown). The console display 912 may also display an image of the vehicle's surroundings captured by an image sensor, or an image showing the distance to obstacles around the vehicle.

[0251] The head-up display 913 is virtually displayed behind the windshield 904 in front of the driver's seat 901. The head-up display 913 can be used to display, for example, at least one of safety-related information, operation-related information, a life log, health-related information, authentication / identification-related information, and entertainment-related information. Since the head-up display 913 is often virtually disposed in front of the driver's seat 901, it is suitable for displaying information directly related to the operation of the vehicle, such as the vehicle's speed and remaining fuel (battery) level.

[0252] The digital rearview mirror 914 can not only display the view behind the vehicle but also the status of passengers in the rear seats. Therefore, by placing a sensor (not shown) on the back side of the digital rearview mirror 914, it can be used to display life log information, for example.

[0253] The steering wheel display 915 is disposed near the center of the steering wheel 906 of the vehicle. The steering wheel display 915 can be used to display at least one of, for example, safety-related information, operation-related information, a life log, health-related information, authentication / identification-related information, and entertainment-related information. In particular, because the steering wheel display 915 is located near the driver's hands, it is suitable for displaying life log information such as the driver's body temperature, and for displaying information regarding the operation of AV equipment, air conditioning equipment, etc.

[0254] The rear entertainment display 916 is attached to the back side of the driver's seat 901 and the passenger seat 902 and is intended for viewing by rear seat passengers. The rear entertainment display 916 can be used to display, for example, at least one of safety-related information, operation-related information, a life log, health-related information, authentication / identification-related information, and entertainment-related information. In particular, since the rear entertainment display 916 is located directly in front of the rear seat passengers, information related to the rear seat passengers is displayed on the rear entertainment display 916. For example, the rear entertainment display 916 may display information related to the operation of an AV device or an air conditioning system, or may display the results of measurements such as the body temperature of the rear seat passengers taken with a temperature sensor (not shown).

[0255] <<17. Supplementary Information>> Although preferred embodiments of the present disclosure have been described above in detail with reference to the accompanying drawings, the technical scope of the present disclosure is not limited to such examples. It is clear that a person skilled in the art of the present disclosure can conceive of various modified or altered examples within the scope of the technical idea described in the claims, and it is understood that these also naturally fall within the technical scope of the present disclosure.

[0256] Furthermore, the effects described herein are merely descriptive or exemplary and are not limiting. In other words, the technology according to the present disclosure may achieve other effects that will be apparent to those skilled in the art from the description of this specification, in addition to or in place of the above-described effects.

[0257] The present technology may also be configured as follows. (1) A display device comprising: a first transistor having a channel formation region in a semiconductor substrate; an oxygen supply layer stacked above the semiconductor substrate; a second transistor having a channel formation region in a first oxide semiconductor layer provided on an upper surface of the oxygen supply layer; a second oxide semiconductor layer provided on a lower surface of the oxygen supply layer; and a light-emitting element stacked above the oxygen supply layer and connected to the first transistor and the second transistor, wherein the first oxide semiconductor layer and the second oxide semiconductor layer do not overlap when viewed from above the semiconductor substrate. (2) The display device according to (1), wherein the second transistor is provided above the first transistor in a cross section of the display device cut along a film thickness direction of the semiconductor substrate. (3) The display device according to (1) or (2), wherein the first and second oxide semiconductor layers contain at least one element selected from the group consisting of aluminum, indium, gallium, tin, and zinc. (4) The display device according to any one of (1) to (3) above, wherein the oxygen supply layer has an oxide film containing silicon or aluminum. (5) The display device according to any one of (1) to (4) above, wherein the second oxide semiconductor layer has a higher conductivity per unit volume than the first oxide semiconductor layer. (6) The display device according to any one of (1) to (5) above, wherein the oxygen supply layer has a first film and a second film stacked on the first film, and the second film has a stronger oxidizing action of removing electrons from the surroundings than the first film. (7) The display device according to (6) above, wherein the first film and the second film are made of oxide films containing silicon or aluminum. (8) The display device according to (4) above, further comprising a reduction action layer provided on a lower surface of the oxygen supply layer. (9) The display device according to (8) above, wherein the reduction action layer is made of a hydrogen supply layer that supplies hydrogen. (10) The display device according to (9), wherein the hydrogen supply layer is made of a nitride film containing silicon.(11) The display device according to any one of (1) to (4) above, wherein the first and second oxide semiconductor layers have the same conductivity per unit volume. (12) The display device according to (11) above, further comprising a third transistor having a channel formation region in the second oxide semiconductor layer. (13) The display device according to any one of (1) to (12) above, wherein the oxygen supply layer has a trench, the second oxide semiconductor layer covers at least a bottom of the trench, and the first oxide semiconductor layer covers at least a part of an upper surface of the oxygen supply layer. (14) The display device according to (13) above, wherein the trench has a stepped cross section, and a third oxide semiconductor layer is provided on an upper surface of the steps. (15) The display device according to (13) or (14) above, further comprising a gas barrier film covering an upper surface of the oxygen supply layer and embedded in the trench. (16) The display device according to any one of (1) to (15), further comprising: a fourth transistor having a channel formation region in the semiconductor substrate; and a fifth transistor having a channel formation region in the first oxide semiconductor layer. (17) The display device according to (16), wherein the first transistor is a drive transistor electrically connected to a current source and the light-emitting element and supplies a current corresponding to a signal voltage to the light-emitting element, the second transistor is a write transistor electrically connected to the drive transistor and supplies the signal voltage to the drive transistor via a capacitance section, the fourth transistor is a light-emitting control transistor electrically connected to the drive transistor and controls light emission of the light-emitting element, and the fifth transistor is a switching transistor electrically connected to the light-emitting element and controls the light-emitting element not to emit light during a non-light-emitting period. (18) The display device according to any one of (1) to (17), wherein the light-emitting element is an OLED.(19) A method for manufacturing a display device, comprising: forming an oxygen supplying layer above a semiconductor substrate, forming a trench in the oxygen supplying layer, and depositing an oxide semiconductor material on the oxygen supplying layer so that the deposited oxide semiconductor material is divided by a step of the trench to form a first oxide semiconductor layer on an upper surface of the oxygen supplying layer and a second oxide semiconductor layer on a lower surface of the oxygen supplying layer. (20) An electronic device equipped with a display device, wherein the display device comprises: a first transistor having a channel formation region in a semiconductor substrate, an oxygen supplying layer stacked above the semiconductor substrate, a second transistor having a channel formation region in the first oxide semiconductor layer provided on the upper surface of the oxygen supplying layer, a second oxide semiconductor layer provided on the lower surface of the oxygen supplying layer, and a light-emitting element stacked above the oxygen supplying layer and connected to the first transistor and the second transistor, wherein the first oxide semiconductor layer and the second oxide semiconductor layer do not overlap when viewed from above the semiconductor substrate. (21) A semiconductor device comprising: a first transistor having a channel formation region in a semiconductor substrate; an oxygen supply layer stacked above the semiconductor substrate; a second transistor having a channel formation region in the first oxide semiconductor layer provided on an upper surface of the oxygen supply layer; and a second oxide semiconductor layer provided on a lower surface of the oxygen supply layer, wherein the first oxide semiconductor layer and the second oxide semiconductor layer do not overlap each other when viewed from above the semiconductor substrate.

[0258] 10, 10a Display device 20 Pixel 30 Pixel array section 31 Scanning line 32, 33 Drive line 34 Signal line 40 Write scanning section 50, 60 Drive scanning section 70 Signal output section 80 Display panel 100 Semiconductor substrate 102, 108, 212, 250 Gate electrode 104 Diffusion region 106 Element isolation section 110 Sidewall film 200 Wiring layer 202 Insulating film 204 Wiring 206, 214 Via 222, 224, 224b, 226 Oxide semiconductor layer 230, 230a, 230b, 230c, 230d, 230e, 230f, 230g, 231, 232 Oxygen supply layer 240 Reduction action layer 300 Light emitting section 310, 312 Electrode 314 Light-emitting layer 320 Pad 400 Photoresist 402 Gas barrier film 412 Nitride film 450 Trench 451, 452, 453 Step 500 Digital still camera 511 Camera body 512 Taking lens unit 513 Grip part 514 Monitor 515 Electronic viewfinder 600 Head-mounted display 611, 802 Display part 612 Ear hook part 630 Glasses 631 Lens barrel 632 Main body part 633 Arm 634 See-through head-mounted display 710 Television device 711 Image display screen part 712 Front panel 713 Filter glass 800 Smartphone 901 Driver's seat 902 Passenger seat 904 Windshield 906 Steering wheel 907 Center console 908 Shift lever 911 Center display 912 Console display 913 Head-up display 914 Digital rear mirror 915 Steering wheel display 916 Rear entertainment display EL Light-emitting element Tr1, Tr2, Tr3, Tr4, Tr5, Tr6 Transistors C1, C2 Capacitor section.

Claims

1. A display device comprising: a first transistor having a channel formation region in a semiconductor substrate; an oxygen supply layer stacked above the semiconductor substrate; a second transistor having a channel formation region in a first oxide semiconductor layer provided on an upper surface of the oxygen supply layer; a second oxide semiconductor layer provided on a lower surface of the oxygen supply layer; and a light-emitting element stacked above the oxygen supply layer and connected to the first transistor and the second transistor, wherein the first oxide semiconductor layer and the second oxide semiconductor layer do not overlap when viewed from above the semiconductor substrate.

2. The display device according to claim 1, wherein, in a cross section of the display device cut along a film thickness direction of the semiconductor substrate, the second transistor is provided above the first transistor.

3. The display device according to claim 1, wherein the first and second oxide semiconductor layers contain at least one element selected from the group consisting of aluminum, indium, gallium, tin, and zinc.

4. The display device according to claim 1, wherein the oxygen supply layer has an oxide film containing silicon or aluminum.

5. The display device according to claim 1, wherein the second oxide semiconductor layer has a higher conductivity per unit volume than the first oxide semiconductor layer.

6. The display device according to claim 1, wherein the oxygen supply layer has a first film and a second film stacked on the first film, and the second film has a stronger oxidizing effect of removing electrons from the surroundings than the first film.

7. The display device according to claim 6, wherein the first film and the second film are made of an oxide film containing silicon or aluminum.

8. The display device according to claim 4, further comprising a reduction layer provided on a lower surface of the oxygen supply layer.

9. The display device according to claim 8, wherein the reduction layer is a hydrogen supply layer that supplies hydrogen.

10. The display device according to claim 9, wherein the hydrogen supply layer is made of a nitride film containing silicon.

11. The display device according to claim 1, wherein the first and second oxide semiconductor layers have the same conductivity per unit volume.

12. The display device according to claim 11, further comprising a third transistor having a channel formation region in the second oxide semiconductor layer.

13. The display device according to claim 1, wherein the oxygen supply layer has a trench, the second oxide semiconductor layer covers at least a bottom of the trench, and the first oxide semiconductor layer covers at least a portion of an upper surface of the oxygen supply layer.

14. The display device according to claim 13, wherein the trench has a stepped cross section, and a third oxide semiconductor layer is provided on an upper surface of the stepped cross section.

15. The display device according to claim 13, further comprising a gas barrier film covering an upper surface of the oxygen supply layer and embedded in the trench.

16. The display device according to claim 1, further comprising: a fourth transistor having a channel formation region in the semiconductor substrate; and a fifth transistor having a channel formation region in the first oxide semiconductor layer.

17. The display device described in claim 16, wherein the first transistor is a drive transistor electrically connected to a current source and the light-emitting element, and supplies a current corresponding to a signal voltage to the light-emitting element; the second transistor is a write transistor electrically connected to the drive transistor, and supplies the signal voltage to the drive transistor via a capacitance section; the fourth transistor is a light-emitting control transistor electrically connected to the drive transistor, and controls the light emission of the light-emitting element; and the fifth transistor is a switching transistor electrically connected to the light-emitting element, and controls the light-emitting element so that it does not emit light during a non-light-emitting period.

18. The display device according to claim 1, wherein the light-emitting element is an OLED.

19. A method for manufacturing a display device, comprising: forming an oxygen supply layer above a semiconductor substrate; forming a trench in the oxygen supply layer; and depositing an oxide semiconductor material on the oxygen supply layer, such that the deposited oxide semiconductor material is divided by a step of the trench, thereby forming a first oxide semiconductor layer on an upper surface of the oxygen supply layer and a second oxide semiconductor layer on a lower surface side of the oxygen supply layer.

20. An electronic device equipped with a display device, the display device comprising: a first transistor having a channel formation region in a semiconductor substrate; an oxygen supply layer stacked above the semiconductor substrate; a second transistor having a channel formation region in a first oxide semiconductor layer provided on an upper surface of the oxygen supply layer; a second oxide semiconductor layer provided on a lower surface of the oxygen supply layer; and a light-emitting element stacked above the oxygen supply layer and connected to the first transistor and the second transistor, wherein the first oxide semiconductor layer and the second oxide semiconductor layer do not overlap when viewed from above the semiconductor substrate.

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