Light detection device

Abstract

The present disclosure relates to a light detection device capable of miniaturizing a pixel while increasing a saturation signal amount of the pixel. The light detection device comprises: a photoelectric conversion unit provided for each pixel; and an intra-pixel trench unit provided in the photoelectric conversion unit. A transparent electrode material is provided in the intra-pixel trench unit. The feature according to the present disclosure can be applied to, for example, a distance measuring system and the like for detecting the depth-direction distance to a subject.

Description

Photodetector

[0001] The present disclosure relates to a photodetector, and more particularly to a photodetector that allows pixels to be miniaturized while increasing the amount of saturation signals of the pixels.

[0002] In photodetection devices such as CMOS image sensors, pixel size is becoming smaller. As pixel size decreases, the photoelectric conversion area of ​​the photodiode, etc. also shrinks, resulting in a decrease in the saturation signal amount per pixel.

[0003] Patent Documents 1 and 2 disclose a pixel structure in which a PN junction area is increased by forming a P-type impurity region and an N-type impurity region in a photoelectric conversion area, thereby increasing the saturated signal amount per pixel.

[0004] JP 2019-165136 A JP 2017-92149 A

[0005] In pixel structures where impurity regions are formed to increase the PN junction area, the impurity regions are formed by ion implantation. However, when impurity regions are formed by ion implantation, the impurities diffuse, making it difficult to miniaturize pixels.

[0006] The present disclosure has been made in view of such circumstances, and aims to make it possible to miniaturize pixels while increasing the saturation signal amount of the pixels.

[0007] A photodetector according to a first aspect of the present disclosure includes a photoelectric conversion unit provided for each pixel, and an intra-pixel trench portion provided in the photoelectric conversion unit, and a transparent electrode material is provided in the intra-pixel trench portion.

[0008] In a first aspect of the present disclosure, a photoelectric conversion section is provided for each pixel, and an intra-pixel trench section is provided in the photoelectric conversion section, and a transparent electrode material is provided in the intra-pixel trench section.

[0009] A photodetector according to a second aspect of the present disclosure includes a photoelectric conversion unit provided for each pixel, an inter-pixel separation unit that separates the photoelectric conversion units of each pixel, and a protrusion formed by extending in a direction perpendicular to a sidewall of the inter-pixel separation unit, wherein the protrusion includes a transparent electrode material.

[0010] In a second aspect of the present disclosure, a photoelectric conversion unit is provided for each pixel, an inter-pixel separation unit isolating the photoelectric conversion units of each pixel, and a protrusion formed by extending in a direction perpendicular to a side wall of the inter-pixel separation unit, and the protrusion includes a transparent electrode material.

[0011] The photodetector device may be a stand-alone device or a module that is incorporated into another device.

[0012] 1 is a diagram illustrating an example of a configuration of a first embodiment of a pixel. FIG. 2 is a cross-sectional view showing a detailed configuration of an intra-pixel trench portion. FIG. 3 is a cross-sectional view showing an example of a configuration for applying a negative bias. FIG. 4 is a plan view illustrating a modified example of an intra-pixel trench portion. FIG. 5 is a plan view illustrating a modified example of an intra-pixel trench portion. FIG. 6 is a cross-sectional view illustrating modified shapes of an inter-pixel isolation portion and an intra-pixel trench portion in the depth direction. FIG. 7 is a cross-sectional view illustrating modified shapes of an inter-pixel isolation portion and an intra-pixel trench portion in the depth direction. FIG. 8 is a cross-sectional view showing a first modified example of an intra-pixel trench portion. FIG. 9 is a cross-sectional view showing a second modified example of an intra-pixel trench portion. FIG. 10 is a cross-sectional view showing a third modified example of an intra-pixel trench portion. FIG. 11 is a plan view illustrating an example of a pixel having a rectangular planar shape. FIG. 12 is a cross-sectional view of a pixel according to a second embodiment. FIG. 13 is a plan view of a pixel according to the second embodiment. FIG. 14 is a diagram illustrating a method of forming a sidewall transparent electrode and a protrusion portion. FIG. 15 is a diagram illustrating a method of forming a sidewall transparent electrode and a protrusion portion. FIG. 16 is a cross-sectional view of a pixel according to a first modified example of the second embodiment. FIG. 17 is a cross-sectional view of a pixel according to a second modified example of the second embodiment. FIG. 18 is a cross-sectional view of a pixel according to a second modified example of the second embodiment. FIG. 1 is a plan view of a pixel according to a third modified example of the second embodiment. FIG. 2 is a cross-sectional view of a pixel according to a fourth modified example of the second embodiment. FIG. 3 is a cross-sectional view of a pixel according to a fourth modified example of the second embodiment. FIG. 4 is a cross-sectional view of a pixel according to a fifth modified example of the second embodiment. FIG. 5 is a plan view of a pixel according to a fifth modified example of the second embodiment. FIG. 6 is a diagram showing a schematic configuration of a photodetector to which the technology of the present disclosure is applied. FIG. 7 is a diagram showing an example of the circuit configuration of a pixel of a photodetector. FIG. 8 is a block diagram showing an example of the configuration of an electronic device to which the technology of the present disclosure is applied. FIG. 9 is a diagram explaining an example of use of an image sensor. FIG. 10 is a diagram showing an example of the schematic configuration of an endoscopic surgery system. FIG. 11 is a block diagram showing an example of the functional configuration of a camera head and a CCU. FIG. 12 is a block diagram showing an example of the schematic configuration of a vehicle control system. FIG. 13 is an explanatory diagram showing an example of the installation positions of an outside vehicle information detection unit and an imaging unit.

[0013] Modes for carrying out the technology of the present disclosure (hereinafter referred to as embodiments) will be described below with reference to the accompanying drawings. The description will be given in the following order: 1. First embodiment of pixel 2. Modified example of intra-pixel trench portion 3. Modified example of depth direction shape of inter-pixel isolation portion and intra-pixel trench portion 4. Modified example of pixel shape 5. Summary of first embodiment 6. Second embodiment of pixel 7. Method of forming sidewall transparent electrode and protrusion portion 8. First modified example of second embodiment 9. Second modified example of second embodiment 10. Third modified example of second embodiment 11. Fourth modified example of second embodiment 12. Fifth modified example of second embodiment 13. Summary of second embodiment 14. Example of overall configuration of photodetector 15. Example of application to electronic device 16. Example of use of image sensor 17. Example of application to endoscopic surgery system 18. Example of application to moving body

[0014] In this specification and drawings, identical or similar parts are denoted by identical or similar reference numerals, and redundant explanations are omitted as appropriate. The drawings are schematic, and the relationship between thickness and planar dimensions, the thickness ratio of each layer, etc. may differ from the actual ones. Furthermore, there may be parts in which the dimensional relationships and ratios differ between the drawings.

[0015] Furthermore, the definitions of directions such as up and down in the following description are merely for the convenience of explanation and do not limit the technical idea of ​​the present disclosure. For example, if an object is rotated 90 degrees and observed, up and down are converted to left and right and read, and if it is rotated 180 degrees and observed, up and down are read inverted.

[0016] The technology disclosed herein can be applied to photodetection devices in general, which have a pixel array in which pixels are arranged two-dimensionally in a matrix, and which photoelectrically convert incident light to output a pixel signal corresponding to the amount of light. The light to be detected may be light in the visible light range, including wavelengths such as R (Red), G (Green), and B (Blue), or light in the invisible light range, such as infrared light. Alternatively, light in both the visible and invisible light ranges may be used. The photodetection device can be used as a solid-state imaging device that generates and outputs an image signal corresponding to the amount of incident light, or as a light receiving device (ranging sensor) in a ranging system that receives infrared light irradiated as active light and reflected by an object (reflected light) to measure the distance to the subject using a direct or indirect ToF method. The following describes an example in which the technology disclosed herein is applied to a photodetection device that generates and outputs an image signal corresponding to the amount of incident light. While the following describes an example of a back-illuminated pixel structure in which incident light is incident from the back side of a semiconductor substrate, the technology disclosed herein can also be applied to a front-illuminated pixel structure.

[0017] 1. First Embodiment of Pixel> Fig. 1 is a diagram showing a configuration example of a first embodiment of a pixel of a photodetector. Fig. 1A is a cross-sectional view of a pixel according to the first embodiment, and Fig. 1B is a plan view of the pixel according to the first embodiment. Fig. 1A shows a cross-sectional view taken along line XX' of Fig. 1B.

[0018] The pixel 10 shown in Fig. 1 is formed on a semiconductor substrate 21 using, for example, silicon (Si) as a semiconductor material. A transfer transistor TG (its gate electrode), which is one of the pixel transistors, is shown on the front surface of the semiconductor substrate 21, which is the upper surface in Fig. 1A. Although not shown, a wiring layer is also formed on the front surface of the semiconductor substrate 21. This wiring layer is a layer that includes one or more wiring layers made of a metal material such as copper (Cu), tungsten (W), or aluminum (Al), and an interlayer insulating film made of a silicon oxide film or the like.

[0019] 1A, the back surface of the semiconductor substrate 21 is the light incident surface onto which light from a subject is incident, and a color filter 22 and an on-chip lens (OCL) 23 are formed on the back surface side of the semiconductor substrate 21. The color filter 22 selects light of a predetermined wavelength, such as R (red), G (green), or B (blue), from the incident light and makes it incident on the photodiode PD in the semiconductor substrate 21. The on-chip lens 23 focuses the incident light onto the photodiode PD in the semiconductor substrate 21. Although not shown, a planarizing film, an inter-pixel light-shielding film, etc. may be formed between the color filter 22 and the semiconductor substrate 21.

[0020] The pixel 10 has an N-type semiconductor region 31 and a P-type semiconductor region 32 that constitute a photodiode PD in the semiconductor substrate 21. The N-type semiconductor region 31 is a photoelectric conversion unit of the pixel 10 that converts incident light into signal charges and accumulates the photoelectrically converted signal charges. The N-type semiconductor region 31 is formed by ion-implanting N-type impurities, such as phosphorus (P) or arsenic (As), into the substrate region of the semiconductor substrate 21. The P-type semiconductor region 32 is a hole charge accumulation region formed by applying a predetermined voltage, such as a negative bias (negative voltage), to adjacent inter-pixel isolation regions 33. Note that the P-type semiconductor region 32 may be formed by ion-implanting P-type impurities, such as boron (B) or gallium (Ga), to strengthen the P-type semiconductor region formed by applying a negative bias.

[0021] An inter-pixel isolation portion 33 is formed on the periphery of the pixel 10, which forms the boundary between adjacent pixels on the semiconductor substrate 21, to separate the photoelectric conversion portions of adjacent pixels. The inter-pixel isolation portion 33 is formed by filling a trench penetrating the semiconductor substrate 21 with at least an electrode material, and a predetermined voltage is applied to the inter-pixel isolation portion 33. The predetermined voltage is, for example, a negative bias. Furthermore, an intra-pixel trench portion 34 is formed in the center of the pixel 10, to which the same predetermined voltage (for example, a negative bias) as that applied to the inter-pixel isolation portion 33 is applied. The intra-pixel trench portion 34 is formed by filling a trench penetrating the semiconductor substrate 21 with at least an electrode material.

[0022] FIG. 2 is a cross-sectional view showing the detailed configuration of the intra-pixel trench portion 34. As shown in FIG.

[0023] The intra-pixel trench portion 34 is composed of an electrode material 41 embedded in the center of the trench and an insulating film 42 embedded around the outer edge of the electrode material 41. The outer edge of the electrode material 41 is the region corresponding to the outer periphery of the electrode material 41 when viewed from above. The outer edge of the electrode material 41 includes the outer edge of the electrode material 41 in a direction parallel to the plane of the semiconductor substrate 21, but does not include the outer edge of the electrode material 41 in a direction perpendicular to the plane of the semiconductor substrate 21. In other words, the insulating film 42 is disposed between the electrode material 41 and the N-type semiconductor region 31 and P-type semiconductor region 32 of the semiconductor substrate 21 in a cross-sectional view. Examples of the electrode material 41 include transparent electrode materials such as InO, ITO, and ZnO, and metal materials such as polysilicon, Ti, and TiN. However, from an optical standpoint, transparent electrode materials are preferable. Examples of the insulating film 42 include SiO2, Al2O3, HfO2, SiN, and ZrO. Either or both of the electrode material 41 and the insulating film 42 may be formed as a laminated film of multiple materials.

[0024] 3 , like the intra-pixel trench portion 34, the inter-pixel isolation portion 33 is also composed of an electrode material 45 buried in the center of the trench and an insulating film 46 buried between the electrode material 45 and the semiconductor substrate 21. The electrode material buried in the inter-pixel isolation portion 33 and the intra-pixel trench portion 34 may be the same material or different materials. The insulating film buried in the inter-pixel isolation portion 33 and the intra-pixel trench portion 34 may also be the same material or different materials.

[0025] In the first embodiment having the above configuration, a predetermined voltage, such as a negative bias, is applied to the inter-pixel isolation portion 33 formed at the boundary of the pixel 10 and the intra-pixel trench portion 34 formed in the center thereof, thereby forming a P-type semiconductor region 32 in the sidewall region of each of the inter-pixel isolation portion 33 and the intra-pixel trench portion 34. This P-type semiconductor region 32 may be formed by applying only a predetermined voltage, or may be strengthened by ion implantation. Applying a negative bias to the electrode material 41 of the intra-pixel trench portion 34 in the photodiode PD of the pixel 10 to form the P-type semiconductor region 32 increases the PN junction capacitance and the saturation signal level. Since the PN junction capacitance can be increased by applying a negative bias without forming the P-type semiconductor region 32 by ion implantation, this is suitable for miniaturizing pixels. Therefore, the pixel structure according to the first embodiment can prevent impurity diffusion due to ion implantation, thereby enabling pixel miniaturization while increasing the saturation signal level of the pixel.

[0026] FIG. 3 is a cross-sectional view showing an example of a configuration for applying a negative bias to the inter-pixel isolation portion 33 and the intra-pixel trench portion 34. As shown in FIG.

[0027] The electrode material 41 of the intra-pixel trench portion 34 and the electrode material 45 of the inter-pixel separation portion 33 are connected to a transparent electrode film 51 formed on the back surface of the semiconductor substrate 21. The transparent electrode film 51 is formed between an insulating film 52 formed on the upper surface of the back surface of the semiconductor substrate 21 and a planarization film 53 below the color filter 22. The transparent electrode film 51 is made of a transparent electrode material such as InO or ITO, and can be made of the same material as the electrode material 41 of the intra-pixel trench portion 34 and the electrode material 45 of the inter-pixel separation portion 33.

[0028] The transparent electrode film 51 is formed on the entire back surface of the semiconductor substrate 21, including an effective pixel region 61 in which a plurality of pixels 10 are arranged in a matrix, and a peripheral region 62 outside the effective pixel region 61. The transparent electrode film 51 in the peripheral region 62 is covered with a light-shielding film 54. In the peripheral region 62, the transparent electrode film 51 is connected to an electrode portion 57 formed on the front surface of the semiconductor substrate 21 via a through electrode 55 that penetrates the semiconductor substrate 21. An insulating film 56 is formed on the outer edge of the through electrode 55, electrically isolating it from the semiconductor substrate 21. An insulating film 58 is formed on the front surface of the semiconductor substrate 21.

[0029] A negative bias is supplied to the electrode portion 57 via the contact wiring 59. The negative bias supplied to the electrode portion 57 is supplied to the electrode material 41 in the intra-pixel trench portion 34 and the electrode material 45 in the inter-pixel separation portion 33 via the through electrode 55 and the transparent electrode film 51 on the back surface side of the semiconductor substrate 21.

[0030] As described above, a negative bias is applied to the electrode material 41 in the intra-pixel trench portion 34 and the electrode material 45 in the inter-pixel separation portion 33 via the transparent electrode film 51 and the through electrode 55, which are common electrode films.

[0031] 4 and 5, a modification of the intra-pixel trench portion 34 will be described. For simplicity, Fig. 4 and Fig. 5 show plan views of the pixel 10 in which the P-type semiconductor region 32 is omitted.

[0032] The planar shape of the intra-pixel trench portion 34 may be any shape, such as a square, rectangle, linear, circular, elliptical, curved, or arcuate shape. The planar shape of the intra-pixel trench portion 34 may also be an appropriate combination of square, rectangle, linear, circular, elliptical, curved, or arcuate shapes. The number of intra-pixel trench portions 34 arranged within a pixel may be one or more. When multiple intra-pixel trench portions 34 are arranged, the arrangement of the intra-pixel trench portions 34 may be regular or random.

[0033] FIG. 4A shows the basic structure of the first embodiment shown in FIG. 1, in which one intra-pixel trench portion 34 having a square planar shape is arranged in the center of the pixel.

[0034] FIG. 4B shows an example in which one intra-pixel trench portion 34 having a linear planar shape is arranged in the center of the pixel.

[0035] FIG. 4C shows an example in which two intra-pixel trench portions 34 each having a linear planar shape are arranged symmetrically with respect to the center of the pixel.

[0036] FIG. 4D shows an example in which four intra-pixel trench portions 34 each having a linear planar shape are arranged in a rectangular shape.

[0037] FIG. 4E shows an example in which five intra-pixel trench portions 34 each having a square or rectangular planar shape are arranged symmetrically with respect to the center of the pixel.

[0038] FIG. 4F shows an example in which one intra-pixel trench portion 34 having a cross shape in plan view is arranged in the center of the pixel.

[0039] FIG. 4G shows an example in which one intra-pixel trench portion 34 having a linear planar shape is arranged in the center of the pixel so as to extend in the diagonal direction of the pixel 10 .

[0040] FIG. 4H shows an example in which two intra-pixel trench portions 34 each having an arc-shaped planar shape are arranged symmetrically in the vertical or horizontal direction.

[0041] None of the intra-pixel trench portions 34 shown in Figure 4 are connected to the inter-pixel isolation portion 33 formed on the outer periphery of the pixel 10, and are arranged isolated from the inter-pixel isolation portion 33 within the N-type semiconductor region 31.

[0042] However, the intra-pixel trench portion 34 may be configured to be connected to the inter-pixel isolation portion 33 formed on the outer periphery of the pixel 10. In the example of A in Fig. 5A, a plurality of linear intra-pixel trench portions 34 (three in Fig. 5A) are arranged so as to be connected to each side of the rectangular inter-pixel isolation portion 33. One intra-pixel trench portion 34 connected to a predetermined side of the inter-pixel isolation portion 33 is formed linearly and arranged so as to extend from the inter-pixel isolation portion 33 toward the inside of the pixel.

[0043] The intra-pixel trench portion 34 may be a combination of both a configuration in which it is connected to the inter-pixel isolation portion 33 and a configuration in which it is isolated from the inter-pixel isolation portion 33. In the example of Fig. 5B, similar to Fig. 5A, there are provided intra-pixel trench portions 34 that are connected to each side of the inter-pixel isolation portion 33 and intra-pixel trench portions 34 that are isolated and located in the center of the pixel.

[0044] 3. Modified Shapes of Inter-Pixel Isolation Portion and Intra-Pixel Trench Portion in Depth Direction Next, modified shapes of the inter-pixel isolation portion 33 and the intra-pixel trench portion 34 in the depth direction will be described with reference to FIGS. 6 and 7. FIG.

[0045] 6A shows the basic structure of the first embodiment shown in Fig. 1, in which both the inter-pixel isolation portion 33 and the intra-pixel trench portion 34 penetrate the semiconductor substrate 21 and are formed over the entire depth direction of the semiconductor substrate 21. The trench penetrating the semiconductor substrate 21 may be formed by digging from the front surface side of the semiconductor substrate 21 or from the back surface side.

[0046] 6B shows an example in which both the inter-pixel isolation portion 33 and the intra-pixel trench portion 34 have a structure that does not penetrate the semiconductor substrate 21 in a cross-sectional view. The inter-pixel isolation portion 33 and the intra-pixel trench portion 34 have a trench shape dug into the semiconductor substrate 21 from the back surface side, and are configured by filling with at least an electrode material. An N-type semiconductor region 31 is formed between the front surface of the semiconductor substrate 21 and the inter-pixel isolation portion 33 or the intra-pixel trench portion 34.

[0047] Similar to B in Fig. 6, A in Fig. 7 shows an example in which both the inter-pixel isolation portion 33 and the intra-pixel trench portion 34 have a structure that does not penetrate the semiconductor substrate 21 in a cross-sectional view. However, it differs in that the inter-pixel isolation portion 33 and the intra-pixel trench portion 34 shown in B in Fig. 6 are regions on the front surface side of the semiconductor substrate 21, whereas the inter-pixel isolation portion 33 and the intra-pixel trench portion 34 in A in Fig. 7 are regions on the back surface side. The inter-pixel isolation portion 33 and the intra-pixel trench portion 34 in A in Fig. 7 have a trench shape dug into the semiconductor substrate 21 from the front surface side, and are configured by filling in at least an electrode material.

[0048] In the examples of the inter-pixel isolation portion 33 and the intra-pixel trench portion 34 shown in FIGS. 6A and 6B and FIG. 7A, the inter-pixel isolation portion 33 and the intra-pixel trench portion 34 have the same configuration, either penetrating the semiconductor substrate 21 or penetrating only a portion of the semiconductor substrate 21 in the depth direction. However, the inter-pixel isolation portion 33 and the intra-pixel trench portion 34 may have different configurations with respect to whether or not they penetrate the semiconductor substrate 21. That is, one of the inter-pixel isolation portion 33 and the intra-pixel trench portion 34 may penetrate the semiconductor substrate 21, while the other may not. Furthermore, when the inter-pixel isolation portion 33 does not penetrate the semiconductor substrate 21, the inter-pixel isolation portion 33 and the intra-pixel trench portion 34 may be configured to leave either the front side or the back side of the semiconductor substrate 21. FIG. 7B shows an example in which the inter-pixel isolation portion 33 is configured to penetrate the semiconductor substrate 21, and the intra-pixel trench portion 34 is configured not to penetrate the semiconductor substrate 21. Conversely, the inter-pixel isolation portion 33 may be configured so as not to penetrate the semiconductor substrate 21, and the intra-pixel trench portion 34 may be configured so as to penetrate the semiconductor substrate 21. Alternatively, neither the inter-pixel isolation portion 33 nor the intra-pixel trench portion 34 may be configured so as to penetrate the semiconductor substrate 21, with one leaving a portion of the front surface side of the semiconductor substrate 21 and the other leaving a portion of the back surface side of the semiconductor substrate 21.

[0049] In the examples of Figures 6 and 7, the P-type semiconductor region 32 illustrated on the outer periphery of the inter-pixel isolation portion 33 and the intra-pixel trench portion 34 may be a region formed only by applying a negative bias, as described above, or may be a region formed by applying a negative bias and ion implantation.

[0050] In the above-described example, the intra-pixel trench portion 34 has a shape in which the width in a cross-sectional view, in other words the area when viewed in a plan view, does not change at any depth position in the semiconductor substrate 21 and is continuous in the depth direction of the semiconductor substrate 21. However, the intra-pixel trench portion 34 may have a configuration in which the width in a cross-sectional view varies depending on the depth position in the semiconductor substrate 21. In the following description, the width in a cross-sectional view will be referred to as the cross-sectional width.

[0051] FIG. 8 is a cross-sectional view showing a first modified example in which the cross-sectional width of the intra-pixel trench portion 34 varies depending on the depth position in the semiconductor substrate 21.

[0052] 8 shows an example of a configuration in which the intra-pixel trench portion 34 has a trapezoidal cross-sectional shape such that the cross-sectional width AR1 gradually increases from the back surface toward the front surface of the semiconductor substrate 21. Conversely, the intra-pixel trench portion 34 may have a trapezoidal cross-sectional shape such that the cross-sectional width AR1 gradually decreases from the light incident surface toward the surface opposite to the light incident surface of the semiconductor substrate 21.

[0053] FIG. 9 is a cross-sectional view showing a second modified example in which the cross-sectional width of the intra-pixel trench portion 34 varies depending on the depth position in the semiconductor substrate 21.

[0054] FIG. 9 illustrates an example in which the intra-pixel trench portion 34 has a first cross-sectional width AR11 from the back surface of the semiconductor substrate 21 to a predetermined depth position, and then has a second cross-sectional width AR12 (AR11 > AR12) smaller than the first cross-sectional width AR11 at subsequent depth positions. The larger cross-sectional width of the intra-pixel trench portion 34 having the first cross-sectional width AR11 constitutes a protrusion of the intra-pixel trench portion 34 toward the photodiode PD. This structure can improve the isolation ratio, particularly for pixels 10 located away from the center of a pixel array in which multiple pixels 10 are arranged. The isolation ratio is the output ratio of two photoelectric conversion units separated by the intra-pixel trench portion 34 when the angle of incidence varies. A higher isolation ratio indicates better phase difference detection performance.

[0055] FIG. 10 is a cross-sectional view showing a third modified example in which the cross-sectional width of the intra-pixel trench portion 34 varies depending on the depth position in the semiconductor substrate 21.

[0056] 10 shows an example in which the intra-pixel trench portion 34 has a cross-sectional width having a first cross-sectional width AR21 from the back surface of the semiconductor substrate 21 to a predetermined depth position, and at subsequent depth positions has a second cross-sectional width AR22 (AR21<AR22) that is larger than the first cross-sectional width AR21. The relationship between the first cross-sectional width AR21 and the second cross-sectional width AR22 is the opposite of the relationship between the first cross-sectional width AR11 and the second cross-sectional width AR12 in the second modified example of FIG. 9. In other words, the second modified example is an example in which the protruding portion of the intra-pixel trench portion 34 is formed in a region near the back surface side of the semiconductor substrate 21, whereas the third modified example is an example in which the protruding portion of the intra-pixel trench portion 34 is formed in a region near the front surface side of the semiconductor substrate 21.

[0057] In the first modified example of FIG. 8 to the third modified example of FIG. 10, the planar shape of the intra-pixel trench portion 34 may be any shape, such as a square, a rectangle, a straight line, a circle, or an ellipse.

[0058] 4. Modified Pixel Shapes Next, modified pixel shapes will be described. In the above example, the planar shape of the pixel 10 is a square. However, the planar shape of the pixel 10 is not limited to a square. For example, as shown in FIG. 11 , the pixel 10 may have a rectangular planar shape, and two adjacent pixels may form a square shape. In FIG. 11 , the pixel region of each pixel 10 is indicated by a dashed line. As for the on-chip lenses 23, one on-chip lens 23 is arranged for two pixels, as shown in FIG. 11 .

[0059] 11 , a pixel boundary where two pixels 10 sharing one on-chip lens 23 are adjacent to each other is separated by a P-type semiconductor region 32. The pixel boundary where two pixels 10 are adjacent to each other may be separated by an insulating film such as SiO2 instead of the P-type semiconductor region 32. Alternatively, the pixel boundary where two pixels 10 are adjacent to each other may be separated by an inter-pixel separation portion 33 in which an electrode material is embedded, similar to other pixel boundaries. Furthermore, a structure may be adopted in which a portion of the pixel boundary (for example, the center portion) is separated by the P-type semiconductor region 32 and the rest is separated by the inter-pixel separation portion 33.

[0060] An overflow path may be provided at the pixel boundary where two pixels 10 sharing one on-chip lens 23 contact each other. The overflow path is a region that separates the left pixel 10 from the right pixel 10 by a predetermined potential barrier (separation potential). Until the amount of signal charge reaches the height of the potential barrier of the overflow path, the signal charge of the left pixel 10 and the right pixel 10 is accumulated independently in the respective photodiodes PD. When the amount of signal charge exceeds the height of the potential barrier of the overflow path, the signal charge flows from one of the photodiodes PD of the two pixels to the other via the overflow path.

[0061] In such an example pixel configuration, when signals from two pixels sharing one on-chip lens 23 are output pixel by pixel, there is a phase difference between the R pixel signal received by the pixel 10 (R pixel) on the right side of one on-chip lens 23 and the L pixel signal received by the pixel 10 (L pixel) on the left side, and therefore the signals can be used as a phase difference signal. On the other hand, when the signals are used as signals for capturing an image without detecting the phase difference, the signals from the two pixels sharing one on-chip lens 23 are output simultaneously.

[0062] 5. Summary of the First Embodiment The pixel 10 according to the first embodiment described above includes an N-type semiconductor region 31, which is a photoelectric conversion unit provided for each pixel, and an intra-pixel trench portion 34 provided in the N-type semiconductor region 31. The intra-pixel trench portion 34 is provided with an electrode material 41 and an insulating film 42. The electrode material 41 can be made of a transparent electrode material such as InO or ITO. Applying a negative bias (negative voltage) to the intra-pixel trench portion 34 provided in the N-type semiconductor region 31 of the pixel 10 increases the PN junction capacitance and the saturation signal level. Even without forming the P-type semiconductor region 32 by ion implantation, the PN junction capacitance can be increased by applying a negative bias, which is suitable for miniaturizing pixels. Therefore, the pixel structure according to the first embodiment can prevent impurity diffusion due to ion implantation, thereby enabling pixel miniaturization while increasing the saturation signal level of the pixel.

[0063] 6. Second Embodiment of Pixel Next, a second embodiment of the pixel will be described.

[0064] Fig. 12 is a cross-sectional view of a pixel according to the second embodiment, taken along line Y-Y' in Fig. 13. Fig. 13 is a plan view of a pixel according to the second embodiment. The cross-sectional view in Fig. 12 is a cross-sectional view of two pixels.

[0065] The pixel 10 shown in Fig. 12 has a semiconductor substrate (silicon substrate) 21 using, for example, silicon (Si) as a semiconductor, and a wiring layer 101. The wiring layer 101 is formed on a first surface FA, which is the lower side of the semiconductor substrate 21 in Fig. 12. The first surface FA of the semiconductor substrate 21 is the front surface of the semiconductor substrate 21. On the other hand, the second surface SA of the semiconductor substrate 21, which is the upper side in Fig. 12, is the back surface of the semiconductor substrate 21 and is a light incident surface onto which light is incident.

[0066] A color filter 111, an inter-pixel light-shielding film 112, and an on-chip lens 113 are formed on the second surface SA side, which is the light incident surface side, of the semiconductor substrate 21. The color filter 111 has a predetermined color such as R (red), G (green), or B (blue), and for example, the predetermined colors of R (red), G (green), or B (blue) are arranged in a predetermined array such as a Bayer array, with 2x2 four pixels as a unit of the same color shown in the plan view of Fig. 13.

[0067] 12 , for example, a P-type semiconductor region 121 and an N-type semiconductor region 122 are formed in each pixel 10 in the semiconductor substrate 21, thereby forming a photodiode PD for each pixel. The N-type semiconductor region 122 is a photoelectric conversion unit of the pixel 10 that converts incident light into signal charges and accumulates the signal charges generated by the photoelectric conversion. The P-type semiconductor region 121 provided on the second surface SA side of the semiconductor substrate 21 also serves as a hole charge accumulation region for suppressing dark current.

[0068] Inter-pixel isolation portions 131 that isolate the N-type semiconductor regions 122 of the pixels 10 are formed at the boundaries of the pixels 10 on the semiconductor substrate 21. The inter-pixel isolation portions 131 are made of an insulating film such as SiO2. As shown in FIG. 12 , for example, the inter-pixel isolation portions 131 are formed with different widths between an inter-pixel isolation portion 131A on the first surface FA side of the semiconductor substrate 21 and an inter-pixel isolation portion 131B on the second surface SA side.

[0069] A transparent electrode film 132 (hereinafter referred to as the sidewall transparent electrode film 132) is formed on the sidewall of the inter-pixel separation portion 131 and is in contact with the P-type semiconductor region 121 and the N-type semiconductor region 122 that constitute the photodiode PD. Furthermore, a protrusion 133 connected to the sidewall transparent electrode film 132 is formed at a predetermined depth position from the first face FA within the semiconductor substrate 21 of each pixel 10. The protrusion 133 has a plate shape with a surface parallel to the first face FA and the second face SA of the semiconductor substrate 21, and the depth position at which the protrusion 133 is formed is a position closest to the first face FA of the first face FA or the second face SA of the semiconductor substrate 21. The protrusion 133 is made of the same transparent electrode material as the sidewall transparent electrode film 132 formed on the sidewall of the inter-pixel separation portion 131 and extends into the N-type semiconductor region 122 in a direction perpendicular to the sidewall transparent electrode film 132. The transparent electrode material of the sidewall transparent electrode film 132 and the protrusions 133 may be, for example, InO, ITO, ZnO, or the like.

[0070] A transfer transistor TG (a gate electrode thereof) that reads out signal charges generated in the N-type semiconductor region 122 is formed on the first surface FA of the semiconductor substrate 21. The transfer transistor TG of the second embodiment has a vertical gate electrode structure that is composed of a planar gate electrode portion PG formed on the first surface FA and a vertical gate electrode portion VG dug in the depth direction of the semiconductor substrate 21.

[0071] The wiring layer 101 formed on the first surface FA of the semiconductor substrate 21 includes multiple layers of metal wiring 151 and insulating films (interlayer insulating films) 152 formed therebetween. The metal wiring 151 is formed of, for example, a metal film made of a metal material such as Al, Ag, Au, Cu, Pt, Mo, Cr, Ti, Ni, W, or Fe, or an alloy material containing these metals. The metal wiring 151 of each layer is connected to other metal wiring 151 in the upper and lower layers at predetermined locations by via plugs made of, for example, W or Cu. The insulating films 152 are formed of, for example, a SiO2 film, a low-k film (low dielectric constant insulating film), or a SiOC film.

[0072] Fig. 13 is a plan view seen from the first surface FA side, which is the front surface of the semiconductor substrate 21. The planar gate electrode portion PG in the plan view of Fig. 13 is shown with a different pattern from the cross-sectional view of Fig. 12 to make it easier to understand the difference between it and the vertical gate electrode portion VG.

[0073] Each pixel 10 has two photodiodes PD (N-type semiconductor regions 122). The two photodiodes PD in the pixel region are separated by an STI (Shallow Trench Isolation) 172 formed in the center of the pixel and an inter-pixel separation portion 131A.

[0074] Each pixel 10 has a transfer transistor TG that reads out signal charges for each of the two photodiodes PD. In Fig. 13, an FD 171, which is a charge storage unit that temporarily stores the signal charges read out by the transfer transistor TG, is formed in the center of two pixels 10 aligned vertically. The FD 171 is shared by the two pixels 10 aligned vertically.

[0075] The sidewall transparent electrode film 132 is formed inside the inter-pixel isolation portion 131 surrounding the photodiode PD. In a plan view, the protrusion portion 133 is widely formed in an area other than the N-type semiconductor region 122 near the transfer transistor TG. The protrusion portion 133 is formed in a plate shape having a plane parallel to the first surface FA and the second surface SA of the semiconductor substrate 21. The sidewall transparent electrode film 132 is connected to a predetermined metal wiring 151 of the wiring layer 101 on the first surface FA side of the semiconductor substrate 21, and a negative bias is applied to the sidewall transparent electrode film 132 and the protrusion portion 133 from the connected metal wiring 151. Note that, like the transparent electrode film 51 in the first embodiment, a negative bias may be applied to the sidewall transparent electrode film 132 and the protrusion portion 133 via a transparent electrode film formed on the second surface SA of the semiconductor substrate 21.

[0076] The pixel 10 according to the second embodiment, having the above-described configuration, includes an inter-pixel isolation portion 131 separating the N-type semiconductor regions 122, which are the photoelectric conversion portions of each pixel 10, a sidewall transparent electrode film 132 formed on the sidewall of the inter-pixel isolation portion 131, and a protrusion 133 extending perpendicularly to the sidewall of the inter-pixel isolation portion 131 toward the photodiode PD. The sidewall transparent electrode film 132 and the protrusion 133 include a transparent electrode material, such as InO, ITO, or ZnO, and a negative bias is applied to the sidewall transparent electrode film 132 and the protrusion 133. Applying a negative bias to the sidewall transparent electrode film 132 and the protrusion 133 increases the PN junction capacitance within the photodiode PD, thereby increasing the saturation signal level. The provision of the sidewall transparent electrode film 132 and the protrusion 133 increases the PN junction capacitance without the need to additionally form N-type or P-type semiconductor regions, making this suitable for miniaturizing pixels. Therefore, with the pixel structure according to the second embodiment, it is possible to increase the saturation signal amount of the pixel and to miniaturize the pixel.

[0077] 7. Method of Forming Sidewall Transparent Electrode and Protrusion Next, a method of forming the sidewall transparent electrode film 132 and the protrusion 133 of the pixel 10 according to the second embodiment will be described with reference to FIGS.

[0078] First, as shown in FIG. 14A, an N-type semiconductor region 122 is formed by ion-implanting an N-type impurity such as phosphorus (P) or arsenic (As) into the substrate region of the semiconductor substrate 21 .

[0079] 14B, through-trenches 201 that penetrate the semiconductor substrate 21 are formed at the boundary of the pixel 10 by dry etching or the like. The through-trench 201 is also formed in the center of the pixel between two photodiodes PD formed in the pixel, which is an area not shown.

[0080] Next, as shown in FIG. 14C, an insulating film 202 such as SiO2 or SiN is formed on the sidewall of the through-trench 201, and then a transparent electrode material 203 is buried inside the through-trench 201 on the inner side of the insulating film 202.

[0081] Next, as shown in FIG. 14D , the transparent electrode material 203 in the through-trench 201 is removed to a predetermined depth in the semiconductor substrate 21 by wet etching using a predetermined chemical solution, forming a vertical trench 204. The insulating film 202 on the side surface of the vertical trench 204 is then removed to a predetermined height from the bottom of the vertical trench 204, and the N-type semiconductor region 122 is etched in a direction parallel to the planar direction of the semiconductor substrate 21, i.e., in the lateral direction, thereby forming a lateral trench 205. This lateral etching can be performed, for example, by injecting an alkaline aqueous solution into the vertical trench 204 and performing crystal anisotropic etching (wet etching) that utilizes the property that the etching rate varies depending on the crystal plane orientation of the semiconductor substrate 21. For example, the lateral trench 205 can be formed by using a silicon (111) substrate as the semiconductor substrate 21 and performing crystal anisotropic etching in which the etching rate for the (110) plane orientation is sufficiently higher than that for the (111) plane orientation. As the alkaline aqueous solution, inorganic solutions such as KOH, NaOH, or CsOH can be used, and organic solutions such as EDP (ethylenediaminepyrocatechol aqueous solution), N2H4 (hydrazine), NH4OH (ammonium hydroxide), or TMAH (tetramethylammonium hydroxide) can be used.

[0082] 14E, an insulating film 202 is formed on the inner peripheral surface of the lateral trench 205, and then a transparent electrode material 203 is again buried inside the vertical trench 204. Thereafter, the surface of the semiconductor substrate 21 is planarized by CMP (Chemical Mechanical Polishing).

[0083] Next, as shown in A of Figure 15, a vertical trench 211 is formed at the position where the transfer transistor TG is to be formed, polysilicon or the like is buried in the formed vertical trench 211, and polysilicon or the like is also formed on the substrate, thereby forming the transfer transistor TG as shown in B of Figure 15.

[0084] Next, as shown in FIG. 15C, sidewalls 212 are formed on the side walls of the planar gate electrode portion PG of the transfer transistor TG.

[0085] Finally, as shown in FIG. 15D, a part of the transparent electrode material 203 embedded in the through-trench 201 is removed and an insulating film is embedded therein, thereby forming the inter-pixel isolation portion 131.

[0086] 15D, the transparent electrode material 203 embedded in the through-trench 201 corresponds to the sidewall transparent electrode film 132 in Fig. 12, and the transparent electrode material 203 embedded in the lateral trench 205 corresponds to the protrusion 133 in Fig. 12. Although not shown in Figs. 12 and 13, the insulating film 202 formed on the inner peripheral surfaces of the through-trench 201 and the lateral trench 205 is an insulating film that electrically isolates the P-type semiconductor region 121 and the N-type semiconductor region 122 that constitute the photodiode PD.

[0087] The inter-pixel isolation portion 131 has a structure that penetrates the semiconductor substrate 21, but it may have a structure that does not penetrate the semiconductor substrate 21, with one side remaining a portion near the front surface side or the back surface side of the semiconductor substrate 21, as in the inter-pixel isolation portion 33 of the first embodiment described with reference to Figures 6 and 7.

[0088] 8. First Modification of Second Embodiment Next, a modification of the pixel 10 according to the second embodiment will be described with reference to Figures 16 to 25. In Figures 16 to 25, parts corresponding to the basic structure of the second embodiment described in Figures 12 and 13 are denoted by the same reference numerals, and descriptions of those parts will be omitted as appropriate. Also, while Figures 12 and 13 show cross-sectional views and plan views of four 2x2 pixels, Figures 16 to 25 show cross-sectional views and plan views of one pixel.

[0089] Fig. 16 is a cross-sectional view of a pixel according to a first modified example of the second embodiment, and Fig. 17 is a plan view of the pixel according to the first modified example of the second embodiment. The cross-sectional view of Fig. 16 is a cross-sectional view taken along line XX' in Fig. 17.

[0090] Comparing the first modified example shown in FIGS. 16 and 17 with the basic structure of the second embodiment described with reference to FIGS. 12 and 13 , the protrusion 133 has been changed to a protrusion 133A. The specific change to the protrusion 133A is that, as shown in the plan view of FIG. 17 , the planar shape of the protrusion 133A, which is formed in a plate shape at a predetermined depth in the semiconductor substrate 21, is not a single rectangle but a configuration of two trapezoids arranged side by side. The N-type semiconductor region 122 sandwiched between the two trapezoidal shapes of the protrusion 133A is formed so that it becomes wider as it approaches the transfer transistor TG. This creates a potential that facilitates the transfer of electrons, which are photoelectrically converted signal charges, to the transfer transistor TG and FD 171, as indicated by the arrows in FIG. 17 . That is, electrons are attracted to the N-type semiconductor region 122 between the two trapezoidal shapes of the protrusion 133A in the horizontal direction of FIG. 17 , and are attracted toward the transfer transistor TG, where the N-type semiconductor region 122 is wider, in the vertical direction of FIG. 17 .

[0091] According to the first modification of the second embodiment described above, it is possible to increase the saturation signal amount of the pixel while forming a potential that makes it easy for electrons, which are signal charges, to be transferred to the transfer transistor TG and the FD 171. Since it is possible to increase the PN junction capacitance without additionally forming an N-type semiconductor region or a P-type semiconductor region, this is suitable for miniaturizing pixels.

[0092] 9. Second Modification of Second Embodiment Fig. 18 is a cross-sectional view of a pixel according to a second modification of the second embodiment, and Fig. 19 is a plan view of the pixel according to the second modification of the second embodiment. The cross-sectional view of Fig. 18 is a cross-sectional view taken along line XX' in Fig. 19.

[0093] Comparing the second modified example shown in Figures 18 and 19 with the basic structure of the second embodiment described with reference to Figures 12 and 13, the protrusion 133 is changed to a protrusion 133B. A specific change to the protrusion 133B is that, as shown in the cross-sectional view of Figure 18, multiple protrusions 133B are stacked in the depth direction of the semiconductor substrate 21. N-type semiconductor regions 122 are inserted between the multiple protrusions 133B. As shown in the plan view of Figure 19, the planar shape of the protrusion 133A is rectangular, the same as the basic structure of the second embodiment.

[0094] According to the second modification of the second embodiment described above, the pixel 10 has a plurality of protrusions 133B formed by stacking in the depth direction of the semiconductor substrate 21, which further increases the PN junction capacitance and therefore increases the saturation signal amount of the pixel. Since the PN junction capacitance can be increased without additionally forming an N-type semiconductor region or a P-type semiconductor region, this is suitable for miniaturizing pixels.

[0095] In the second modification, the planar shape of the plurality of protrusions 133B stacked in the depth direction may be two trapezoids as in the first modification shown in FIG.

[0096] 10. Third Modification of Second Embodiment Fig. 20 is a cross-sectional view of a pixel according to a third modification of the second embodiment, and Fig. 21 is a plan view of the pixel according to the third modification of the second embodiment. The cross-sectional view of Fig. 20 is a cross-sectional view taken along line YY' in Fig. 21.

[0097] 20 and 21, similar to the second modification shown in FIGS. 18 and 19, a plurality of protruding portions 133B are formed by stacking them in the depth direction of the semiconductor substrate 21. However, while the second modification has five stacked layers of protruding portions 133B, the third modification has three stacked layers. In this way, the number of stacked layers when stacking a plurality of protruding portions 133B can be set arbitrarily.

[0098] Furthermore, in the third modified example, the transfer transistor TG that reads out the signal charges is changed to a transfer transistor TG'. The transfer transistor TG' has a vertical gate electrode structure composed of a planar gate electrode portion PG and a vertical gate electrode portion VG'. The vertical gate electrode portion VG' differs from the vertical gate electrode portion VG in the basic structure of the second embodiment in that the vertical gate electrode portion VG' is formed from the planar gate electrode portion PG on the first surface FA side of the semiconductor substrate 21 to the deepest protrusion 133B, in other words, from the first surface FA side to the depth of the third-layer protrusion 133B.

[0099] According to the third modification of the second embodiment, stacking multiple protrusions 133B in the depth direction of the semiconductor substrate 21 can further increase the PN junction capacitance, thereby increasing the saturation signal amount of the pixel. Since the PN junction capacitance can be increased without additionally forming N-type or P-type semiconductor regions, this is suitable for miniaturizing pixels. Furthermore, by extending the depth of the vertical gate electrode portion VG' of the transfer transistor TG', which has a vertical gate electrode structure, to the depth of the deepest protrusion 133B, it is possible to more easily transfer signal charges (electrons) near the second surface SA of the semiconductor substrate 21, which is the light incident surface.

[0100] The depth of the vertical gate electrode portion VG′ does not necessarily have to match the depth of the deepest protrusion 133B, but can be set arbitrarily according to the potential design. For example, it may be set to the depth of the second-layer protrusion 133B or to an intermediate position between the second-layer and third-layer protrusions 133B.

[0101] 22 is a cross-sectional view of a pixel according to a fourth modification of the second embodiment, and Fig. 23 is a plan view of the pixel according to the fourth modification of the second embodiment. The cross-sectional view of Fig. 22 is a cross-sectional view taken along line YY' in Fig. 23.

[0102] Comparing the fourth modified example shown in FIGS. 22 and 23 with the basic structure of the second embodiment described with reference to FIGS. 12 and 13, the protrusion 133 is replaced with a protrusion 133C. The pixel 10 of the fourth modified example is similar to the third modified example shown in FIGS. 20 and 21 in that three layers of protrusions 133C are stacked in the depth direction of the semiconductor substrate 21. However, the fourth modified example differs from the third modified example shown in FIGS. 20 and 21 in that the planar shape of the protrusions 133C in each layer is not rectangular or trapezoidal, but rather a stripe shape in which multiple protrusions 133C are arranged in lines at predetermined intervals. The spacing between the multiple linear protrusions 133C arranged in the same plane may be equal or random. Furthermore, the lengths of the multiple linear protrusions 133C arranged at predetermined intervals are arranged to become shorter as they approach the transfer transistor TG. In other words, the overall shape of the multiple linear protrusions 133C is similar to the trapezoidal shape of the first modified example shown in FIGS. 16 and 17. As a result, as shown by the arrows in FIG. 23, a potential is formed that makes it easy for electrons, which are signal charges, to be transferred to the transfer transistors TG′ and FD 171 .

[0103] Furthermore, in the fourth variant, the vertical gate electrode portion VG' of the transfer transistor TG' is formed from the planar gate electrode portion PG on the first surface FA side of the semiconductor substrate 21 to the depth of the deepest protrusion portion 133C, as in the third variant.

[0104] According to the fourth modification of the second embodiment, stacking multiple protrusions 133C in the depth direction of the semiconductor substrate 21 can further increase the PN junction capacitance, thereby increasing the saturation signal amount of the pixel. Since the PN junction capacitance can be increased without additionally forming N-type or P-type semiconductor regions, this is suitable for miniaturizing pixels. Furthermore, by extending the depth of the vertical gate electrode portion VG' of the transfer transistor TG', which has a vertical gate electrode structure, to the depth of the deepest protrusion 133B, it is possible to more easily transfer signal charges (electrons) near the second surface SA of the semiconductor substrate 21, which is the light incident surface.

[0105] As in the third modification, the depth of the vertical gate electrode portion VG' can be set arbitrarily.

[0106] 12. Fifth Modification of Second Embodiment Fig. 24 is a cross-sectional view of a pixel according to a fifth modification of the second embodiment, and Fig. 25 is a plan view of the pixel according to the fifth modification of the second embodiment. The cross-sectional view of Fig. 24 is a cross-sectional view taken along line X-X' in Fig. 25. Note that the planar gate electrode portion PG in the plan view of Fig. 25 is shown with a different pattern from that in the cross-sectional view of Fig. 24 to make it easier to understand the difference between it and the vertical gate electrode portion VG.

[0107] The basic structure of the second embodiment and the first to fourth modified examples described above are structures in which two photodiodes PD are arranged in one pixel, whereas the fifth modified example shows an example of a structure in which one photodiode PD and one transfer transistor TG are arranged in one pixel.

[0108] Even in the fifth modification in which one photodiode PD is disposed per pixel, the sidewall transparent electrode film 132 is formed inside the inter-pixel isolation portion 131 surrounding the photodiode PD. In plan view, the protrusion 133 is widely formed in a region other than the N-type semiconductor region 122 near the transfer transistor TG. The protrusion 133 is formed in a plate shape having a plane parallel to the first surface FA and the second surface SA of the semiconductor substrate 21. In the plan view of FIG. 25 , the planar shape of the protrusion 133 is triangular, but it may be trapezoidal, striped, or other shapes. The sidewall transparent electrode film 132 is connected to a predetermined metal wiring 151 of the wiring layer 101 on the first surface FA side of the semiconductor substrate 21, and a negative bias (negative voltage) is applied to the sidewall transparent electrode film 132 and the protrusion 133 from the connected metal wiring 151. The FD 171 is shared with other adjacent pixels 10.

[0109] The pixel 10 according to the fifth modification of the second embodiment includes an inter-pixel isolation portion 131 separating the photodiodes PD of each pixel 10, a sidewall transparent electrode film 132 formed on the sidewall of the inter-pixel isolation portion 131, and a protrusion 133 extending perpendicularly to the sidewall of the inter-pixel isolation portion 131 toward the photodiode PD. The sidewall transparent electrode film 132 and the protrusion 133 are formed of a transparent electrode material, such as InO, ITO, or ZnO, and a negative bias is applied to the sidewall transparent electrode film 132 and the protrusion 133. Applying a negative bias to the sidewall transparent electrode film 132 and the protrusion 133 increases the PN junction capacitance within the photodiode PD, thereby increasing the saturation signal level. Since the PN junction capacitance can be increased without additionally forming an N-type or P-type semiconductor region, this structure is suitable for miniaturizing pixels. Therefore, the pixel structure according to the fifth modification allows for pixel miniaturization while increasing the saturation signal level of the pixel.

[0110] 13. Summary of the Second Embodiment The pixel 10 according to the second embodiment described above includes an inter-pixel isolation portion 131 separating the N-type semiconductor regions 122, which are the photoelectric conversion portions of each pixel 10, a sidewall transparent electrode film 132 formed on the sidewall of the inter-pixel isolation portion 131, and a protrusion 133 extending perpendicularly to the sidewall of the inter-pixel isolation portion 131 toward the photodiode PD. The sidewall transparent electrode film 132 and the protrusion 133 include a transparent electrode material, such as InO, ITO, or ZnO, and a predetermined negative bias voltage is applied to the sidewall transparent electrode film 132 and the protrusion 133. Applying a negative bias to the sidewall transparent electrode film 132 and the protrusion 133 increases the PN junction capacitance within the photodiode PD, thereby increasing the saturation signal level. Since the PN junction capacitance can be increased without additionally forming an N-type or P-type semiconductor region, this is suitable for miniaturizing pixels. Therefore, with the pixel structure according to the second embodiment, it is possible to increase the saturation signal amount of the pixel and to miniaturize the pixel.

[0111] 14. Overall Configuration Example of Photodetector> FIG. 26 is a block diagram showing a configuration example of a photodetector to which the technology of the present disclosure is applied, the photodetector having the pixel structure of the pixel 10 described above.

[0112] 26 includes a pixel array 311 and a peripheral circuit section. The peripheral circuit section includes, for example, a vertical drive section 312, a column processing section 313, a horizontal drive section 314, and a system control section 315.

[0113] The photodetector 301 further includes a signal processing unit 316 and a data storage unit 317. The signal processing unit 316 and the data storage unit 317 may be mounted on the same substrate as the pixel array 311, the vertical drive unit 312, etc., or may be arranged on a separate laminated substrate.

[0114] The pixel array 311 has a configuration in which a plurality of pixels 10 are two-dimensionally arranged in a matrix in row and column directions. Here, the row direction refers to the pixel rows of the pixel array 311, in other words, the horizontal arrangement direction, and the column direction refers to the pixel columns of the pixel array 311, in other words, the vertical arrangement direction.

[0115] The pixel 10 includes a photoelectric conversion unit that generates and accumulates an electric charge according to the amount of received light, and a plurality of pixel transistors (so-called MOS transistors). The pixel 10 has a specific pixel structure according to the first or second embodiment described above. An example of the circuit configuration of the pixel 10 will be described later with reference to FIG. 27 .

[0116] In the pixel array 311, pixel drive wiring 321 serving as row signal lines is wired along the row direction for each pixel row, and vertical signal lines 322 serving as column signal lines are wired along the column direction for each pixel column. The pixel drive wiring 321 transmits drive signals for driving the pixels 10 when reading out signals. Although FIG. 26 shows the pixel drive wiring 321 as a single wiring, the number of pixel drive wirings 321 is not limited to one. One end of the pixel drive wiring 321 is connected to an output terminal of the vertical drive unit 312 corresponding to each row.

[0117] The vertical drive unit 312 is configured with a shift register, an address decoder, etc., and drives each pixel 10 of the pixel array 311 simultaneously for all pixels or in row units, etc. The vertical drive unit 312, together with the system control unit 315, configures a drive unit that controls the operation of each pixel 10 of the pixel array 311. Although the specific configuration of the vertical drive unit 312 is not shown in the figure, it generally has two scan systems: a readout scan system and a sweep scan system.

[0118] The readout scanning system sequentially selects and scans the pixels 10 of the pixel array 311 row by row to read out signals from the pixels 10. The signals read out from the pixels 10 are analog signals. The sweep scanning system performs sweep scanning on the readout rows to be read out by the readout scanning system, prior to the readout scanning by an exposure time.

[0119] The sweep scanning by this sweep scanning system sweeps out unnecessary charges from the photoelectric conversion units of the pixels 10 in the readout row, thereby resetting the photoelectric conversion units of each pixel 10. Then, by sweeping out (resetting) the unnecessary charges by this sweep scanning system, a so-called electronic shutter operation is performed. Here, the electronic shutter operation refers to the operation of discarding the charges in the photoelectric conversion units and starting a new exposure (starting the accumulation of charges).

[0120] The signal read by the readout scanning system corresponds to the amount of light received since the immediately preceding readout operation or electronic shutter operation. The period from the readout timing of the immediately preceding readout operation or the sweep timing of the electronic shutter operation to the readout timing of the current readout operation is the exposure period of the pixel 10.

[0121] The signals output from each pixel 10 in a pixel row selected and scanned by the vertical drive unit 312 are input to the column processing unit 313 for each pixel column through each vertical signal line 322. The column processing unit 313 performs predetermined signal processing on the signals output from each pixel 10 in the selected row through the vertical signal line 322 for each pixel column in the pixel array 311, and temporarily holds the pixel signals after signal processing.

[0122] Specifically, the column processing unit 313 performs at least noise removal processing, such as CDS (Correlated Double Sampling) processing and DDS (Double Data Sampling) processing, as signal processing. For example, CDS processing removes pixel-specific fixed pattern noise such as reset noise and threshold variations of the amplification transistor in the pixel. In addition to noise removal processing, the column processing unit 313 can also have, for example, an AD (analog-to-digital) conversion function, converting analog pixel signals into digital signals and outputting them.

[0123] The horizontal driving unit 314 is configured with a shift register, an address decoder, etc., and sequentially selects unit circuits corresponding to pixel columns in the column processing unit 313. By selective scanning by this horizontal driving unit 314, pixel signals that have been signal-processed for each unit circuit in the column processing unit 313 are sequentially output.

[0124] The system control unit 315 is composed of a timing generator that generates various timing signals, and controls the driving of the vertical driving unit 312, column processing unit 313, and horizontal driving unit 314 based on the various timings generated by the timing generator.

[0125] The signal processing unit 316 has at least an arithmetic processing function and performs various signal processing such as arithmetic processing on the pixel signals output from the column processing unit 313. The data storage unit 317 temporarily stores data necessary for the signal processing in the signal processing unit 316. The pixel signals that have been signal processed in the signal processing unit 316 are converted into a predetermined format and output from an output unit 318 to outside the device.

[0126] FIG. 27 shows an example of a circuit configuration of each pixel 10 arranged two-dimensionally in a matrix in the pixel array 311, in which two photodiodes PD are arranged in one pixel, as in the second embodiment shown in FIGS. 12 and 13 .

[0127] 12 and 13, the FD 171 is shared by two pixels 10 aligned vertically, and so FIG. 27 also shows an example of a configuration in which the FD 171 is shared by two pixels 10. In FIG. 27, the two pixels 10 sharing the FD 171 are distinguished by the pixels 10A and 10B. Furthermore, the two photodiodes PD included in the pixel 10A or pixel 10B are distinguished by the photodiodes PDa and PDb. The transfer transistors TG that read out the signal charges of the photodiodes PDa and PDb are distinguished by the transfer transistors TGa and TGb.

[0128] When the transfer transistor TG (TGa, TGb) is turned on by a transfer drive signal supplied to the gate electrode, it reads out the charge generated in the corresponding photodiode PD (PDa, PDb) and transfers it to the FD 171 .

[0129] The pixels 10A and 10B also share the reset transistor RST, the amplification transistor AMP, and the selection transistor SEL in addition to the FD 171. Each of the pixel transistors, the transfer transistor TG, the reset transistor RST, the amplification transistor AMP, and the selection transistor SEL, is configured as an N-type MOS transistor (MOS FET), and constitutes a readout circuit.

[0130] The photodiodes PD (PDa, PDb) generate and accumulate electric charges (signal charges) corresponding to the amount of light received. The anode terminals of the photodiodes PD (PDa, PDb) are grounded, and the cathode terminals are connected to the FD 171 via the corresponding transfer transistors TG (TGa, TGb). The FD 171 holds electric charges read out from at least one of the photodiodes PD (PDa, PDb).

[0131] When the reset transistor RST is turned on by a reset drive signal supplied to the gate electrode, the charge stored in the floating diffusion region FD is discharged to the drain (power supply voltage VDD), resetting the potential of the floating diffusion region FD.

[0132] The amplification transistor AMP outputs a signal according to the potential of the FD 171. That is, the amplification transistor AMP forms a source follower circuit together with a load MOS transistor (not shown) serving as a constant current source connected via a vertical signal line 322, and a signal VSL indicating a level according to the charge accumulated in the FD 171 is output from the amplification transistor AMP to the column processing unit 313 ( FIG. 26 ) via the selection transistor SEL.

[0133] The selection transistor SEL is turned on when the pixel 10A or 10B is selected by a selection drive signal supplied to its gate electrode, and outputs a signal VSL generated in the pixel 10A or 10B to the column processing unit 313 via a vertical signal line 322. The transfer drive signal, selection drive signal, and reset drive signal are supplied from the vertical drive unit 312 via pixel drive wiring 321 in FIG.

[0134] The photodetector 301 can be driven in the following manner as appropriate, depending on the operation mode.

[0135] For example, in a first operation mode, the photodetector 301 can sequentially turn on the transfer transistors TGa and TGb of the pixel 10A and the transfer transistors TGa and TGb of the pixel 10B, transfer the signal charges generated in the four photodiodes PD of the pixels 10A and 10B to the FD 171 individually, and output the signal charges as a signal VSL to the column processing unit 313 via the vertical signal line 322.

[0136] For example, in a second operating mode, the photodetector 301 can simultaneously turn on two transfer transistors TGa and TGb in the same pixel, simultaneously transfer signal charges generated in two photodiodes PDa and PDb in the same pixel to the FD 171, and output the signal as a signal VSL to the column processing unit 313 via the vertical signal line 322.

[0137] For example, as a third operating mode, the photodetector 301 can simultaneously turn on a total of four transfer transistors TG of two pixels 10A and 10B, which are shared units, and simultaneously transfer the signal charges generated in the four photodiodes PD of the two pixels 10 to the FD 171, and output the signal charges as a signal VSL to the column processing unit 313 via the vertical signal line 322.

[0138] 15. Application Example to Electronic Devices FIG. 28 is a block diagram showing a configuration example of an electronic device to which the technology of the present disclosure is applied.

[0139] The electronic device 500 in FIG. 28 is configured as an imaging device such as a video camera or a digital still camera.

[0140] 28 includes an optical unit 501 including a lens group and the like, a photodetector 502 that employs the configuration of the photodetector 301 in FIG. 26 , and a DSP (Digital Signal Processor) circuit 503 that is a camera signal processing circuit. The electronic device 500 also includes a frame memory 504, a display unit 505, a recording unit 506, an operation unit 507, and a power supply unit 508. The DSP circuit 503, frame memory 504, display unit 505, recording unit 506, operation unit 507, and power supply unit 508 are connected to one another via a bus line 509.

[0141] The optical unit 501 takes in incident light (image light) from a subject and forms an image on the imaging surface of the photodetector 502. The photodetector 502 converts the amount of incident light imaged on the imaging surface by the optical unit 501 into an electrical signal for each pixel and outputs the signal as a pixel signal. The photodetector 301 shown in FIG. 26 is used as this photodetector 502. Therefore, the pixels of the photodetector 502 have a pixel structure in which an intra-pixel trench portion 34 is provided in the photodiode PD and a negative bias is applied, or a pixel structure in which a negative bias is applied to a protrusion 133 formed of a transparent electrode material and extending in a direction perpendicular to the sidewall of the inter-pixel separator 131 toward the photodiode PD.

[0142] The display unit 505 is configured with a thin display such as an LCD (Liquid Crystal Display) or an organic EL (Electro Luminescence) display, and displays moving images or still images captured by the photodetector 602. The recording unit 506 records the moving images or still images captured by the photodetector 602 on a recording medium such as a hard disk or semiconductor memory.

[0143] The operation unit 507, under the operation of the user, issues operation commands for various functions of the electronic device 500. The power supply unit 508 appropriately supplies various types of power to the DSP circuit 503, frame memory 504, display unit 505, recording unit 506, and operation unit 507 as operating power sources.

[0144] The electronic device 500 can increase the saturation signal amount of the pixel while miniaturizing the pixel by employing the configuration of the above-described photodetector 301 as the photodetector 502. Therefore, even in the electronic device 500 such as a video camera, a digital still camera, or even a camera module for a mobile device such as a mobile phone, it is possible to achieve miniaturization of the pixel while improving the quality of the captured image.

[0145] 16. Example of Use of Image Sensor FIG. 29 is a diagram showing an example of use when the above-described photodetector 301 is an image sensor.

[0146] The above-described photodetector device 301 can be used as an image sensor in various cases for sensing light such as visible light, infrared light, ultraviolet light, and X-rays, for example, as described below.

[0147] ・Devices for taking images for viewing purposes, such as digital cameras and mobile devices with camera functions. ・Devices for traffic purposes, such as in-vehicle sensors that take images of the front, rear, surroundings, and interior of a car for safe driving such as automatic stopping, and for recognizing the driver's state, surveillance cameras that monitor moving vehicles and roads, and distance measuring sensors that measure distances between vehicles. ・Devices for home appliances such as TVs, refrigerators, and air conditioners that take images of user gestures and operate the device according to those gestures. ・Devices for medical and healthcare purposes, such as endoscopes and devices that take images of blood vessels by receiving infrared light. ・Devices for security purposes, such as surveillance cameras for crime prevention and cameras for person authentication. ・Devices for beauty purposes, such as skin measuring devices that take images of the skin and microscopes that take images of the scalp. ・Devices for sports purposes, such as action cameras and wearable cameras for sports, etc. ・Devices for agricultural purposes, such as cameras to monitor the condition of fields and crops.

[0148] 17. Application Example to Endoscopic Surgery System The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure may be applied to an endoscopic surgery system.

[0149] FIG. 30 is a diagram showing an example of a schematic configuration of an endoscopic surgery system to which the technology according to the present disclosure (the present technology) can be applied.

[0150] 30 shows an operator (doctor) 11131 performing surgery on a patient 11132 on a patient bed 11133 using an endoscopic surgery system 11000. As shown in the figure, the endoscopic surgery system 11000 is composed of an endoscope 11100, other surgical tools 11110 such as an insufflation tube 11111 and an energy treatment tool 11112, a support arm device 11120 that supports the endoscope 11100, and a cart 11200 on which various devices for endoscopic surgery are mounted.

[0151] The endoscope 11100 is composed of a lens barrel 11101, a region of a predetermined length from the tip of which is inserted into a body cavity of a patient 11132, and a camera head 11102 connected to the base end of the lens barrel 11101. In the example shown, the endoscope 11100 is configured as a so-called rigid scope having a rigid lens barrel 11101, but the endoscope 11100 may also be configured as a so-called flexible scope having a flexible lens barrel.

[0152] An opening into which an objective lens is fitted is provided at the tip of the lens barrel 11101. A light source device 11203 is connected to the endoscope 11100, and light generated by the light source device 11203 is guided to the tip of the lens barrel by a light guide extending inside the lens barrel 11101, and is irradiated via the objective lens toward an object to be observed inside the body cavity of the patient 11132. The endoscope 11100 may be a direct-viewing endoscope, an oblique-viewing endoscope, or a side-viewing endoscope.

[0153] An optical system and an image sensor are provided inside the camera head 11102, and light reflected from the object of observation (observation light) is collected onto the image sensor by the optical system. The observation light is photoelectrically converted by the image sensor to generate an electrical signal corresponding to the observation light, i.e., an image signal corresponding to the observed image. The image signal is sent to a camera control unit (CCU) 11201 as RAW data.

[0154] The CCU 11201 is configured with a CPU (Central Processing Unit), a GPU (Graphics Processing Unit), etc., and comprehensively controls the operations of the endoscope 11100 and the display device 11202. Furthermore, the CCU 11201 receives an image signal from the camera head 11102 and performs various image processing on the image signal, such as development processing (demosaic processing), to display an image based on the image signal.

[0155] Under the control of the CCU 11201, the display device 11202 displays an image based on an image signal that has been subjected to image processing by the CCU 11201.

[0156] The light source device 11203 is composed of a light source such as an LED (Light Emitting Diode), and supplies irradiation light to the endoscope 11100 when photographing the surgical area, etc.

[0157] The input device 11204 is an input interface for the endoscopic surgery system 11000. A user can input various information and instructions to the endoscopic surgery system 11000 via the input device 11204. For example, the user inputs an instruction to change the imaging conditions (type of irradiation light, magnification, focal length, etc.) of the endoscope 11100.

[0158] The treatment tool control device 11205 controls the driving of the energy treatment tool 11112 for cauterizing tissue, incising, sealing blood vessels, etc. The insufflation device 11206 inflates the body cavity of the patient 11132 through the insufflation tube 11111 in order to ensure a clear field of view for the endoscope 11100 and a working space for the surgeon. The recorder 11207 is a device capable of recording various types of information related to the surgery. The printer 11208 is a device capable of printing various types of information related to the surgery in various formats such as text, images, or graphs.

[0159] The light source device 11203, which supplies illumination light to the endoscope 11100 when photographing the surgical site, can be configured from a white light source, such as an LED, a laser light source, or a combination of these. When the white light source is configured from a combination of RGB laser light sources, the output intensity and output timing of each color (each wavelength) can be controlled with high precision, allowing the light source device 11203 to adjust the white balance of the captured image. In this case, it is also possible to time-share images corresponding to each RGB by irradiating the object of observation with laser light from each RGB laser light source and controlling the drive of the image sensor of the camera head 11102 in synchronization with the irradiation timing. According to this method, color images can be obtained without providing a color filter to the image sensor.

[0160] Furthermore, the light source device 11203 may be controlled to change the intensity of light it outputs at predetermined time intervals. By controlling the driving of the image sensor of the camera head 11102 in synchronization with the timing of the change in light intensity to acquire images in a time-division manner and combining the images, it is possible to generate an image with a high dynamic range that is free from so-called blocked-up shadows and blown-out highlights.

[0161] The light source device 11203 may also be configured to supply light in a predetermined wavelength band corresponding to special light observation. Special light observation, for example, utilizes the wavelength dependence of light absorption in body tissues to irradiate light with a narrower band than the light irradiated during normal observation (i.e., white light), thereby capturing high-contrast images of specific tissues, such as blood vessels on the surface of mucous membranes, known as narrow-band imaging. Alternatively, special light observation may be performed using fluorescence observation, in which images are obtained using fluorescence generated by irradiating excitation light. Fluorescence observation can involve irradiating excitation light onto body tissues and observing the fluorescence from the tissue (autofluorescence observation), or by locally injecting a reagent such as indocyanine green (ICG) into the body tissue and irradiating the tissue with excitation light corresponding to the fluorescent wavelength of the reagent to obtain a fluorescent image. The light source device 11203 may be configured to supply narrow-band light and / or excitation light corresponding to such special light observation.

[0162] FIG. 31 is a block diagram showing an example of the functional configuration of the camera head 11102 and the CCU 11201 shown in FIG.

[0163] The camera head 11102 has a lens unit 11401, an imaging unit 11402, a drive unit 11403, a communication unit 11404, and a camera head control unit 11405. The CCU 11201 has a communication unit 11411, an image processing unit 11412, and a control unit 11413. The camera head 11102 and the CCU 11201 are connected to each other by a transmission cable 11400 so that they can communicate with each other.

[0164] The lens unit 11401 is an optical system provided at the connection portion with the lens barrel 11101. Observation light taken in from the tip of the lens barrel 11101 is guided to the camera head 11102 and enters the lens unit 11401. The lens unit 11401 is composed of a combination of multiple lenses including a zoom lens and a focus lens.

[0165] The imaging unit 11402 is composed of an imaging element. The imaging element constituting the imaging unit 11402 may be a single (so-called single-chip type) or multiple (so-called multi-chip type). When the imaging unit 11402 is composed of a multi-chip type, for example, each imaging element may generate an image signal corresponding to each of RGB, and a color image may be obtained by combining these signals. Alternatively, the imaging unit 11402 may be configured to have a pair of imaging elements for acquiring image signals for the right eye and the left eye corresponding to 3D (dimensional) display. The 3D display allows the surgeon 11131 to more accurately grasp the depth of the biological tissue at the surgical site. Note that when the imaging unit 11402 is composed of a multi-chip type, multiple lens units 11401 may be provided corresponding to each imaging element.

[0166] Furthermore, the imaging unit 11402 does not necessarily have to be provided in the camera head 11102. For example, the imaging unit 11402 may be provided inside the lens barrel 11101, immediately after the objective lens.

[0167] The driving unit 11403 is configured by an actuator, and moves the zoom lens and focus lens of the lens unit 11401 by a predetermined distance along the optical axis under the control of the camera head control unit 11405. This allows the magnification and focus of the image captured by the imaging unit 11402 to be adjusted appropriately.

[0168] The communication unit 11404 is configured by a communication device for transmitting and receiving various information to and from the CCU 11201. The communication unit 11404 transmits the image signal obtained from the imaging unit 11402 to the CCU 11201 via the transmission cable 11400 as RAW data.

[0169] Furthermore, the communication unit 11404 receives a control signal for controlling the driving of the camera head 11102 from the CCU 11201 and supplies the control signal to the camera head control unit 11405. The control signal includes information on the imaging conditions, such as information specifying the frame rate of the captured image, information specifying the exposure value at the time of imaging, and / or information specifying the magnification and focus of the captured image.

[0170] The image capturing conditions such as the frame rate, exposure value, magnification, and focus may be appropriately specified by the user, or may be automatically set by the control unit 11413 of the CCU 11201 based on the acquired image signal. In the latter case, the endoscope 11100 is equipped with so-called AE (Auto Exposure) function, AF (Auto Focus) function, and AWB (Auto White Balance) function.

[0171] The camera head control unit 11405 controls the driving of the camera head 11102 based on a control signal received from the CCU 11201 via the communication unit 11404.

[0172] The communication unit 11411 is configured by a communication device for transmitting and receiving various information to and from the camera head 11102. The communication unit 11411 receives an image signal transmitted from the camera head 11102 via the transmission cable 11400.

[0173] Furthermore, the communication unit 11411 transmits to the camera head 11102 a control signal for controlling the driving of the camera head 11102. The image signal and the control signal can be transmitted by electrical communication, optical communication, or the like.

[0174] The image processing unit 11412 performs various image processing operations on the image signal, which is RAW data sent from the camera head 11102 .

[0175] The control unit 11413 performs various controls related to the imaging of the surgical site, etc. by the endoscope 11100 and the display of the captured image obtained by imaging the surgical site, etc. For example, the control unit 11413 generates a control signal for controlling the driving of the camera head 11102.

[0176] Furthermore, the control unit 11413 displays the captured image showing the surgical site, etc., on the display device 11202 based on the image signal subjected to image processing by the image processing unit 11412. At this time, the control unit 11413 may recognize various objects in the captured image using various image recognition technologies. For example, the control unit 11413 can recognize surgical tools such as forceps, specific biological parts, bleeding, mist generated when using the energy treatment tool 11112, etc., by detecting the shape and color of the edges of objects included in the captured image. When displaying the captured image on the display device 11202, the control unit 11413 may use the recognition results to superimpose various surgical support information on the image of the surgical site. By superimposing the surgical support information and presenting it to the surgeon 11131, the burden on the surgeon 11131 can be reduced and the surgeon 11131 can proceed with the surgery reliably.

[0177] The transmission cable 11400 connecting the camera head 11102 and the CCU 11201 is an electrical signal cable for communication of electrical signals, an optical fiber for optical communication, or a composite cable of these.

[0178] In the illustrated example, communication is performed wired using a transmission cable 11400, but communication between the camera head 11102 and the CCU 11201 may also be performed wirelessly.

[0179] The above describes an example of an endoscopic surgery system to which the technology according to the present disclosure can be applied. The technology according to the present disclosure can be applied to the lens unit 11401 and the image capturing unit 11402 of the camera head 11102, among the configurations described above. Specifically, the optical detection device 301 shown in FIG. 26 can be used as the lens unit 11401 and the image capturing unit 11402. By applying the technology according to the present disclosure to the lens unit 11401 and the image capturing unit 11402, it is possible to obtain clearer images of the surgical site while miniaturizing the camera head 11102.

[0180] Although an endoscopic surgery system has been described as an example here, the technology disclosed herein may also be applied to other systems, such as a microsurgery system.

[0181] 18. Application Examples to Mobile Bodies The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure may be realized as a device mounted on any type of mobile body, such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, personal mobility, an airplane, a drone, a ship, or a robot.

[0182] FIG. 32 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a mobile object control system to which the technology according to the present disclosure can be applied.

[0183] The vehicle control system 12000 includes a plurality of electronic control units connected via a communication network 12001. In the example shown in Fig. 32, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an outside-vehicle information detection unit 12030, an inside-vehicle information detection unit 12040, and an integrated control unit 12050. Also shown as functional components of the integrated control unit 12050 are a microcomputer 12051, an audio / video output unit 12052, and an in-vehicle network I / F (Interface) 12053.

[0184] The drivetrain control unit 12010 controls the operation of devices related to the drivetrain of the vehicle in accordance with various programs. For example, the drivetrain control unit 12010 functions as a control device for a drive force generating device for generating a drive force of the vehicle, such as an internal combustion engine or a drive motor, a drive force transmission mechanism for transmitting the drive force to the wheels, a steering mechanism for adjusting the steering angle of the vehicle, and a braking device for generating a braking force of the vehicle.

[0185] The body system control unit 12020 controls the operation of various devices equipped in the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window device, or various lamps such as headlamps, backup lamps, brake lamps, turn signals, and fog lamps. In this case, radio waves transmitted from a portable device that serves as a key or signals from various switches can be input to the body system control unit 12020. The body system control unit 12020 receives these radio waves or signals and controls the vehicle's door lock device, power window device, lamps, etc.

[0186] The outside-vehicle information detection unit 12030 detects information outside the vehicle equipped with the vehicle control system 12000. For example, an imaging unit 12031 is connected to the outside-vehicle information detection unit 12030. The outside-vehicle information detection unit 12030 causes the imaging unit 12031 to capture images outside the vehicle and receives the captured images. The outside-vehicle information detection unit 12030 may perform object detection processing or distance detection processing for people, cars, obstacles, signs, characters on the road surface, etc. based on the received images.

[0187] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal corresponding to the amount of light received. The imaging unit 12031 can output the electrical signal as an image or as distance measurement information. The light received by the imaging unit 12031 may be visible light or invisible light such as infrared light.

[0188] The in-vehicle information detection unit 12040 detects information inside the vehicle. For example, a driver state detection unit 12041 that detects the state of the driver is connected to the in-vehicle information detection unit 12040. The driver state detection unit 12041 includes, for example, a camera that captures an image of the driver, and the in-vehicle information detection unit 12040 may calculate the degree of fatigue or concentration of the driver based on the detection information input from the driver state detection unit 12041, or may determine whether the driver is dozing off.

[0189] The microcomputer 12051 can calculate control target values ​​for the driving force generating device, steering mechanism, or braking device based on the information inside and outside the vehicle acquired by the outside-vehicle information detection unit 12030 or the inside-vehicle information detection unit 12040, and output control commands to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control aimed at realizing the functions of an ADAS (Advanced Driver Assistance System), including vehicle collision avoidance or impact mitigation, following driving based on the distance between vehicles, maintaining vehicle speed, vehicle collision warning, vehicle lane departure warning, etc.

[0190] In addition, the microcomputer 12051 can perform cooperative control for the purpose of autonomous driving, which allows the vehicle to travel autonomously without relying on driver operation, by controlling the driving force generating device, steering mechanism, braking device, etc. based on information about the surroundings of the vehicle obtained by the outside vehicle information detection unit 12030 or the inside vehicle information detection unit 12040.

[0191] Furthermore, the microcomputer 12051 can output a control command to the body system control unit 12020 based on the information outside the vehicle acquired by the outside information detection unit 12030. For example, the microcomputer 12051 can control the headlamps according to the position of a preceding vehicle or an oncoming vehicle detected by the outside information detection unit 12030, and perform cooperative control aimed at preventing glare, such as switching from high beams to low beams.

[0192] The audio / video output unit 12052 transmits at least one of audio and video output signals to an output device capable of visually or audibly notifying the passengers of the vehicle or the outside of the vehicle of information. In the example of Fig. 32, the output devices are exemplified by an audio speaker 12061, a display unit 12062, and an instrument panel 12063. The display unit 12062 may include, for example, at least one of an on-board display and a head-up display.

[0193] FIG. 33 is a diagram showing an example of the installation position of the imaging unit 12031.

[0194] In FIG. 33, the imaging unit 12031 includes imaging units 12101, 12102, 12103, 12104, and 12105.

[0195] The imaging units 12101, 12102, 12103, 12104, and 12105 are provided, for example, at positions such as the front nose, side mirrors, rear bumper, back door, and the top of the windshield inside the vehicle cabin of the vehicle 12100. The imaging unit 12101 provided on the front nose and the imaging unit 12105 provided on the top of the windshield inside the vehicle cabin mainly acquire images of the front of the vehicle 12100. The imaging units 12102 and 12103 provided on the side mirrors mainly acquire images of the sides of the vehicle 12100. The imaging unit 12104 provided on the rear bumper or back door mainly acquires images of the rear of the vehicle 12100. The imaging unit 12105 provided on the top of the windshield inside the vehicle cabin is mainly used to detect preceding vehicles, pedestrians, obstacles, traffic lights, traffic signs, lanes, etc.

[0196] 33 shows an example of the imaging ranges of the imaging units 12101 to 12104. Imaging range 12111 indicates the imaging range of the imaging unit 12101 provided on the front nose, imaging ranges 12112 and 12113 indicate the imaging ranges of the imaging units 12102 and 12103 provided on the side mirrors, respectively, and imaging range 12114 indicates the imaging range of the imaging unit 12104 provided on the rear bumper or back door. For example, by overlaying the image data captured by the imaging units 12101 to 12104, an overhead image of the vehicle 12100 viewed from above can be obtained.

[0197] At least one of the image capturing units 12101 to 12104 may have a function of acquiring distance information. For example, at least one of the image capturing units 12101 to 12104 may be a stereo camera made up of multiple image capturing elements, or may be an image capturing element having pixels for detecting a phase difference.

[0198] For example, based on distance information obtained from the imaging units 12101 to 12104, the microcomputer 12051 can calculate the distance to each three-dimensional object within the imaging ranges 12111 to 12114 and the change in this distance over time (relative speed with respect to the vehicle 12100), thereby extracting as a preceding vehicle, in particular, the closest three-dimensional object on the path of the vehicle 12100 that is traveling in approximately the same direction as the vehicle 12100 at a predetermined speed (e.g., 0 km / h or higher). Furthermore, the microcomputer 12051 can set a vehicle-to-vehicle distance to be maintained in advance in front of the preceding vehicle, and perform automatic braking control (including follow-up stop control), automatic acceleration control (including follow-up start control), etc. In this way, cooperative control can be performed for the purpose of autonomous driving, which travels autonomously without relying on driver operation.

[0199] For example, the microcomputer 12051 classifies and extracts three-dimensional object data regarding three-dimensional objects into categories such as two-wheeled vehicles, standard vehicles, large vehicles, pedestrians, utility poles, and other three-dimensional objects based on distance information obtained from the imaging units 12101 to 12104, and can use the data for automatic obstacle avoidance. For example, the microcomputer 12051 distinguishes obstacles around the vehicle 12100 into those that are visible to the driver of the vehicle 12100 and those that are difficult to see. The microcomputer 12051 then determines the collision risk, which indicates the risk of collision with each obstacle, and when the collision risk is equal to or greater than a set value and a collision is possible, the microcomputer 12051 can provide driving assistance for collision avoidance by outputting an alarm to the driver via the audio speaker 12061 or the display unit 12062, or by performing forced deceleration or avoidance steering via the drivetrain control unit 12010.

[0200] At least one of the image capturing units 12101 to 12104 may be an infrared camera that detects infrared rays. For example, the microcomputer 12051 can recognize pedestrians by determining whether or not a pedestrian is present in the images captured by the image capturing units 12101 to 12104. Such pedestrian recognition is performed, for example, by extracting feature points from the images captured by the image capturing units 12101 to 12104 as infrared cameras and performing pattern matching processing on a series of feature points that indicate the outline of an object to determine whether or not the object is a pedestrian. When the microcomputer 12051 determines that a pedestrian is present in the images captured by the image capturing units 12101 to 12104 and recognizes the pedestrian, the audio / image output unit 12052 controls the display unit 12062 to superimpose a rectangular outline on the recognized pedestrian for emphasis. The audio / image output unit 12052 may also control the display unit 12062 to display an icon or the like indicating the pedestrian at a desired position.

[0201] An example of a vehicle control system to which the technology according to the present disclosure can be applied has been described above. The technology according to the present disclosure can be applied to the image capture unit 12031 of the above-described configuration. Specifically, the light detection device 301 shown in FIG. 26 can be applied as the image capture unit 12031. By applying the technology according to the present disclosure to the image capture unit 12031, it is possible to obtain a more easily visible captured image and acquire distance information while still reducing the size of the system. Furthermore, using the obtained captured image and distance information, it is possible to reduce driver fatigue and increase the safety of the driver and the vehicle.

[0202] In the above example, a solid-state imaging device in which the first conductivity type is P-type and the second conductivity type is N-type and electrons are used as signal charges has been described, but the present disclosure can also be applied to a solid-state imaging device in which holes are used as signal charges. That is, the first conductivity type can be N-type and the second conductivity type can be P-type, and the aforementioned semiconductor regions can be configured with semiconductor regions of opposite conductivity types.

[0203] Furthermore, the present disclosure is not limited to application to solid-state imaging devices that detect the distribution of incident light amount of visible light and capture it as an image, but can also be applied to solid-state imaging devices that capture the distribution of incident amounts of infrared rays, X-rays, particles, etc. as an image, and in a broad sense, to solid-state imaging devices in general (physical quantity distribution detection devices) such as fingerprint detection sensors that detect the distribution of other physical quantities such as pressure and capacitance and capture it as an image.

[0204] Furthermore, the technology of the present disclosure is not limited to solid-state imaging devices, but can be applied to semiconductor devices in general that include other semiconductor integrated circuits.

[0205] In this specification, a system refers to a collection of multiple components (devices, modules (components), etc.), regardless of whether all of the components are contained in the same housing. Therefore, multiple devices housed in separate housings and connected via a network, and a single device housed in a single housing with multiple modules, are both systems.

[0206] Furthermore, the embodiments of the technology of the present disclosure are not limited to the above-described embodiments, and various modifications are possible within the scope of the gist of the technology of the present disclosure.

[0207] The effects described in this specification are merely examples and are not limiting, and there may be effects other than those described in this specification.

[0208] The technology disclosed herein may employ the following configurations. (1) A photodetector comprising: a photoelectric conversion unit provided for each pixel; and an intra-pixel trench portion provided in the photoelectric conversion unit, wherein a transparent electrode material is provided in the intra-pixel trench portion. (2) The photodetector according to (1), wherein a predetermined voltage is applied to the transparent electrode material provided in the intra-pixel trench portion. (3) The photodetector according to (1) or (2), wherein an insulating film is provided between the semiconductor substrate and the transparent electrode material in a cross-sectional view. (4) The photodetector according to any one of (1) to (3), further comprising an inter-pixel separation portion separating the photoelectric conversion units of adjacent pixels, wherein a transparent electrode material is provided in the inter-pixel separation portion. (5) The photodetector according to (4), wherein a predetermined voltage is applied to the transparent electrode material of the intra-pixel trench portion and the transparent electrode material of the inter-pixel separation portion via the same transparent electrode film formed on the light incident surface side of the semiconductor substrate. (6) The photodetector according to (4) or (5), wherein an insulating film is provided between the transparent electrode material of the inter-pixel separation portion and the semiconductor substrate in a cross-sectional view. (7) The photodetector according to any of (1) to (6), wherein the width of the intra-pixel trench portion in a cross-sectional view is configured to vary depending on the depth position in the semiconductor substrate. (8) The photodetector according to (7), wherein the width of the intra-pixel trench portion in a cross-sectional view is configured to gradually increase from the light incident surface of the semiconductor substrate toward the surface opposite the light incident surface. (9) The photodetector according to (7) or (8), wherein the width of the intra-pixel trench portion in a cross-sectional view has a first width from the light incident surface side of the semiconductor substrate to a predetermined depth position, and a second width different from the first width at depth positions thereafter. (10) The photodetector according to any of (1) to (9), wherein the planar shape of the intra-pixel trench portion is one of square, rectangular, linear, circular, elliptical, curved, and arcuate, or a combination thereof. (11) The photodetector according to any one of (1) to (10), further comprising an inter-pixel isolation section on the outer periphery of the pixel that forms a boundary with an adjacent pixel, and the intra-pixel trench section is disposed in isolation away from the inter-pixel isolation section.(12) The photodetector according to any one of (1) to (11), wherein a second semiconductor region of an opposite conductivity type to a first semiconductor region constituting the photoelectric conversion unit is provided on a sidewall of the intra-pixel trench portion. (13) The photodetector according to any one of (1) to (12), wherein the planar shape of the pixel is a rectangle such that two adjacent pixels form a square. (14) A photodetector comprising: a photoelectric conversion unit provided for each pixel; an inter-pixel separation unit separating the photoelectric conversion units of each pixel; and a protrusion formed by extending in a direction perpendicular to a sidewall of the inter-pixel separation unit, wherein the protrusion includes a transparent electrode material. (15) The photodetector according to (14), wherein a transparent electrode film is provided on a sidewall of the inter-pixel separation unit, and the protrusion is formed by being connected to the transparent electrode film. (16) The photodetector according to (14) or (15), wherein the protrusion is formed in a plate shape having a plane parallel to the light incident surface of the semiconductor substrate and the surface opposite to the light incident surface, and the depth position of the protrusion is formed at a depth position closer to the opposite surface of the light incident surface or the opposite surface of the semiconductor substrate. (17) The photodetector according to any of (14) to (16), wherein a predetermined voltage is applied to the transparent electrode material of the protrusion via a transparent electrode film formed on the light incident surface side of the semiconductor substrate. (18) The photodetector according to any of (14) to (17), wherein the protrusion has a rectangular planar shape. (19) The photodetector according to any of (14) to (17), wherein the protrusion has a planar shape formed by arranging two trapezoidal shapes side by side. (20) The photodetector according to (19), wherein the semiconductor region of the photoelectric conversion unit sandwiched between the two trapezoidal shapes of the protrusion is formed so as to become wider as it approaches the transfer transistor. (21) The photodetector according to any one of (14) to (20), wherein the pixel has a plurality of the protrusions stacked in a depth direction of a semiconductor substrate. (22) The photodetector according to any one of (14) to (21), wherein the pixel includes a transfer transistor with a vertical gate electrode structure. (23) The photodetector according to any one of (14) to (22), wherein the protrusions are formed in a stripe shape with a plurality of protrusions arranged in a line in a plan view.(24) The photodetector according to (23), wherein the pixel includes a transfer transistor having a vertical gate electrode structure, and the length of the linear protrusion is shorter as it is closer to the transfer transistor.

[0209] 10 Pixel, 21 Semiconductor substrate, 22 Color filter, 23 On-chip lens, 31 N-type semiconductor region, 32 P-type semiconductor region, 33 Inter-pixel isolation portion, 34 Intra-pixel trench portion, 41 Electrode material, 42 Insulating film, 45 Electrode material, 46 Insulating film, 51 Transparent electrode film, 52 Insulating film, 53 Planarization film, 54 Light-shielding film, 55 Through electrode, 56 Insulating film, 57 Electrode portion, 58 Insulating film, 59 Contact wiring, 61 Effective pixel area, 62 Peripheral area, 101 Wiring layer, 111 Color filter, 112 Inter-pixel light-shielding film, 113 On-chip lens, 121 P-type semiconductor region, 122 N-type semiconductor region, 131, 131A, 131B Inter-pixel isolation portion, 132 Transparent electrode film (sidewall transparent electrode film), 133, 133A, 133B, 133C protrusion portion, 301 photodetector, TG, TG' transfer transistor, VG, VG' vertical gate electrode portion

Claims

1. A photodetector comprising: a photoelectric conversion unit provided for each pixel; and an intra-pixel trench portion provided in the photoelectric conversion unit, wherein a transparent electrode material is provided in the intra-pixel trench portion.

2. The photodetector according to claim 1, wherein a predetermined voltage is applied to the transparent electrode material provided in the trench portion within the pixel.

3. The photodetector according to claim 1, wherein an insulating film is provided between the semiconductor substrate and the transparent electrode material in a cross-sectional view.

4. The photodetector according to claim 1, further comprising an inter-pixel separator that separates the photoelectric conversion units of adjacent pixels, the inter-pixel separator being provided with a transparent electrode material.

5. The photodetector according to claim 4, wherein a predetermined voltage is applied to the transparent electrode material of the intra-pixel trench portion and the transparent electrode material of the inter-pixel separation portion via the same transparent electrode film formed on the light incident surface side of the semiconductor substrate.

6. The photodetector according to claim 4, wherein an insulating film is provided between the transparent electrode material of the inter-pixel separating portion and the semiconductor substrate in a cross-sectional view.

7. The photodetector according to claim 1, wherein the width of the trench portion in a cross section within the pixel is configured to vary depending on the depth position in the semiconductor substrate.

8. The photodetector according to claim 7, wherein the width of the trench portion in the pixel in a cross-sectional view is configured to gradually increase from the light incident surface of the semiconductor substrate toward the surface opposite to the light incident surface.

9. The photodetector according to claim 7, wherein the width of the trench portion in the pixel in a cross-sectional view has a first width from the light incident surface side of the semiconductor substrate to a predetermined depth position, and a second width different from the first width at depth positions thereafter.

10. The photodetector according to claim 1, wherein the planar shape of the trench portion within the pixel is one of square, rectangular, linear, circular, elliptical, curved, and arcuate, or a combination thereof.

11. The photodetector according to claim 1, further comprising an inter-pixel isolation section on the outer periphery of each pixel, which is the boundary between adjacent pixels, and the intra-pixel trench section is disposed in isolation from the inter-pixel isolation section.

12. The photodetector according to claim 1, wherein a second semiconductor region of an opposite conductivity type to the first semiconductor region constituting the photoelectric conversion section is provided on a sidewall of the trench section within the pixel.

13. The photodetector according to claim 1, wherein the planar shape of the pixel is a rectangle with any two adjacent pixels forming a square.

14. A photodetector comprising: a photoelectric conversion unit provided for each pixel; an inter-pixel separation unit separating the photoelectric conversion units of each pixel; and a protrusion formed by extending in a direction perpendicular to a sidewall of the inter-pixel separation unit, wherein the protrusion includes a transparent electrode material.

15. The photodetector according to claim 14, further comprising a transparent electrode film on a side wall of the inter-pixel separation portion, and the protrusion is formed so as to be connected to the transparent electrode film.

16. The photodetector device according to claim 14, wherein the protrusion is formed in a plate shape having a plane parallel to the light incident surface of the semiconductor substrate and the surface opposite to the light incident surface, and the depth position of the protrusion is formed at a depth position close to the opposite surface of the light incident surface or the opposite surface of the semiconductor substrate.

17. The photodetector according to claim 14, wherein a predetermined voltage is applied to the transparent electrode material of the protrusion through a transparent electrode film formed on the light incident surface side of the semiconductor substrate.

18. The photodetector according to claim 14, wherein the protrusion has a rectangular planar shape.

19. The photodetector according to claim 14, wherein the protrusion has a planar shape consisting of two trapezoidal shapes arranged side by side.

20. The photodetector according to claim 19, wherein the semiconductor region of the photoelectric conversion section sandwiched between the two trapezoidal shapes of the protrusion section is formed so as to become wider as it approaches the transfer transistor.

21. The photodetector according to claim 14, wherein the pixel has a plurality of the protrusions stacked in the depth direction of the semiconductor substrate.

22. The photodetector device according to claim 14, wherein the pixel comprises a transfer transistor having a vertical gate electrode structure.

23. The photodetector according to claim 14, wherein the protrusions are formed in a stripe shape with a plurality of protrusions arranged in a line in a plan view.

24. The photodetector according to claim 23, wherein the pixel comprises a transfer transistor having a vertical gate electrode structure, and the length of the linear protrusion is shorter as it approaches the transfer transistor.

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