Method, program, and apparatus for detecting anomaly in device simulation based on artificial intelligence

A neural network-based framework for semiconductor device simulations addresses the challenge of identifying anomalies by generating latent vectors and calculating reconstruction errors, enhancing the precision and efficiency of semiconductor design and simulation processes.

WO2026014777A1PCT designated stage Publication Date: 2026-01-15ALSEMY INC
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Patent Information

Application Number
PCT/KR2025/009034
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-07-09
Filing Date
2025-06-27
Publication Date
2026-01-15

AI Technical Summary

Technical Problem

Identifying and filtering out unphysical behaviors and incorrect simulation results in semiconductor device simulations is challenging, requiring significant time and resources, and manual verification is not scalable.

Method used

A neural network-based framework for anomaly detection in semiconductor device simulations, utilizing a pre-trained model with an encoder and decoder to generate latent vectors and calculate reconstruction errors for anomaly detection, which can be automatically thresholded using nonparametric density estimation.

Benefits of technology

Enables efficient, scalable, and accurate identification of anomalies in semiconductor device simulations, improving precision, reliability, and efficiency of design and simulation processes.

✦ Generated by Eureka AI based on patent content.

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Abstract

According to an embodiment of the present disclosure, disclosed are: a method for detecting an anomaly in a device simulation based on artificial intelligence, which is performed by a computing apparatus; a program; and an apparatus. The method may comprise the steps of: acquiring first functional data about characteristics of a semiconductor device; generating a latent vector by inputting the first functional data into an encoder of a pre-trained neural network model; generating second functional data by inputting the latent vector into a decoder of the neural network model; and generating an anomaly detection result for the first functional data by calculating a reconstruction error on the basis of the first functional data and the second functional data.
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Description

Method, program, and device for detecting anomalies in device simulations based on artificial intelligence

[0001] The present disclosure relates to deep learning technology in the semiconductor field, and more specifically, to a method for detecting abnormal simulation results for semiconductor devices using artificial intelligence.

[0002]

[0003] Ensuring model validity in semiconductor device simulation is crucial for technological advancement. The use of empirical compact models, such as the Berkeley Single-Channel IGFET Model (BSIM), and new neural compact models has become standard practice. While these models have significantly advanced semiconductor technology, they rely on approximations of physical phenomena. This dependence can lead to discrepancies between behavior predicted by simulation and observed behavior in actual devices. Furthermore, as large-scale learning is increasingly applied to device simulation, data integrity verification is becoming increasingly important. However, identifying and filtering out unphysical behaviors and incorrect simulation results has traditionally been a challenging task that requires the involvement of numerous experts and is costly. Consequently, manual verification is not scalable and requires significant time and resources.

[0004]

[0005] The present disclosure is conceived in response to the aforementioned background technology, and aims to provide a framework designed to automate and simplify the anomaly detection process in simulation of semiconductor devices.

[0006] However, the problems to be solved in this disclosure are not limited to the problems mentioned above, and other problems not mentioned can be clearly understood based on the description below.

[0007]

[0008] According to one embodiment of the present disclosure for achieving the aforementioned task, a method for detecting anomalies in device simulation based on artificial intelligence, performed by a computing device, is disclosed. The method may include the steps of: obtaining first functional data regarding characteristics of a semiconductor device; inputting the first functional data into an encoder of a pre-trained neural network model to generate a latent vector; inputting the latent vector into a decoder of the neural network model to generate second functional data; and calculating a reconstruction error based on the first functional data and the second functional data to generate an anomaly detection result for the first functional data.

[0009] Alternatively, the neural network model may be pre-trained based only on normal data selected by domain experts.

[0010] Alternatively, the step of generating an anomaly detection result for the first functional data may include a step of comparing the reconstruction error with a threshold value to determine whether the first functional data is an anomaly.

[0011] Alternatively, the threshold value may be automatically determined using nonparametric density estimation based on reconstruction errors produced during the learning process of the neural network model.

[0012] Alternatively, the encoder may include a first encoder block that performs a cross-attention operation based on the first functional data; and a second encoder block that performs a self-attention operation based on the output of the first encoder block.

[0013] Alternatively, the first encoder block may use a second feature generated by reducing the size of a first feature extractable from the first functional data as a query, and use the first feature as a key and a value.

[0014] Alternatively, the decoder may include a first decoder block that performs a self-attention operation based on a latent vector generated by the second encoder block; and a second decoder block based on a fully connected neural network that receives an output of the first decoder block and generates the second functional data.

[0015] Alternatively, the size of the latent space in which the latent vector generated by the second encoder block exists can be limited through normalization of the latent vector.

[0016] According to one embodiment of the present disclosure for achieving the above-described task, a computer program stored in a computer-readable storage medium is disclosed. When the computer program is executed on one or more processors, it performs operations for anomaly detection in device simulation based on artificial intelligence. At this time, the operations may include an operation of obtaining first functional data regarding characteristics of a semiconductor device; an operation of inputting the first functional data to an encoder of a pre-trained neural network model to generate a latent vector; an operation of inputting the latent vector to a decoder of the neural network model to generate second functional data; and an operation of calculating a reconstruction error based on the first functional data and the second functional data to generate an anomaly detection result for the first functional data.

[0017] According to one embodiment of the present disclosure for achieving the above-described task, a computing device for anomaly detection in device simulation based on artificial intelligence is disclosed. The device may include a processor including at least one core; a memory including program codes executable by the processor; and a network unit for acquiring first functional data regarding characteristics of a semiconductor device. In this case, the processor may input the first functional data into an encoder of a pre-trained neural network model to generate a latent vector, input the latent vector into a decoder of the neural network model to generate second functional data, and calculate a reconstruction error based on the first functional data and the second functional data, thereby generating an anomaly detection result for the first functional data.

[0018]

[0019] A neural network model according to one embodiment of the present disclosure can support efficient identification of anomalies in simulation results of semiconductor devices without manual labeling based on unsupervised learning.

[0020] In addition, the neural network model according to one embodiment of the present disclosure can be applied to parameters and simulations of various devices, thereby ensuring scalability and high accuracy to identify physically impossible parameter configurations.

[0021] That is, the present disclosure can improve the precision, reliability, and efficiency of semiconductor design and simulation processes.

[0022]

[0023] FIG. 1 is a block diagram of a computing device according to one embodiment of the present disclosure.

[0024] FIG. 2 is a schematic diagram of a neural network model according to one embodiment of the present disclosure.

[0025] FIG. 3 is a graph showing test results of an anomaly detection framework according to one embodiment of the present disclosure.

[0026] FIG. 4 is a flowchart illustrating an anomaly detection method of an artificial intelligence-based device simulation according to one embodiment of the present disclosure.

[0027]

[0028] Below, embodiments of the present disclosure are described in detail with reference to the attached drawings so that those skilled in the art can easily implement the present disclosure. The embodiments presented in this disclosure are provided to enable those skilled in the art to utilize or implement the contents of the present disclosure. Accordingly, various modifications to the embodiments of the present disclosure will be apparent to those skilled in the art. That is, the present disclosure may be implemented in various different forms and is not limited to the embodiments described below.

[0029] Throughout the specification of this disclosure, identical or similar drawing numbers refer to identical or similar components. Furthermore, for clarity in the description of this disclosure, drawing numbers for parts unrelated to the description of this disclosure may be omitted in the drawings.

[0030] The term "or" as used herein is intended to mean an inclusive "or" rather than an exclusive "or." That is, unless otherwise specified herein or clear from context, "X employs A or B" should be understood to mean either of the natural inclusive permutations. For example, unless otherwise specified herein or clear from context, "X employs A or B" can be interpreted to mean either X employs A, X employs B, or X employs both A and B.

[0031] The term "and / or" as used herein should be understood to refer to and include all possible combinations of one or more of the related concepts listed.

[0032] The terms "comprises" and / or "comprising" as used herein should be understood to mean the presence of certain features and / or components. However, it should be understood that the terms "comprises" and / or "comprising" do not exclude the presence or addition of one or more other features, other components, and / or combinations thereof.

[0033] Unless otherwise specified in this disclosure or unless the context makes it clear that the singular form is intended to be referred to, the singular should generally be construed to include “one or more.”

[0034] The term "Nth (N is a natural number)" used in the present disclosure can be understood as an expression used to mutually distinguish components of the present disclosure based on a predetermined standard such as a functional perspective, a structural perspective, or convenience of explanation. For example, components performing different functional roles in the present disclosure can be distinguished as a first component or a second component. However, components that are substantially the same within the technical spirit of the present disclosure but must be distinguished for convenience of explanation may also be distinguished as a first component or a second component.

[0035] The term "acquisition" as used in this disclosure may be understood to mean not only receiving data through a wired or wireless communication network with an external device or system, but also generating data in an on-device form.

[0036] Meanwhile, the term "module" or "unit" used in the present disclosure can be understood as a term referring to an independent functional unit that processes computing resources, such as a computer-related entity, firmware, software or a part thereof, hardware or a part thereof, or a combination of software and hardware. At this time, the "module" or "unit" may be a unit composed of a single element, or a unit expressed as a combination or set of multiple elements. For example, as a narrow concept, a "module" or "unit" may refer to a hardware element of a computing device or a set thereof, an application program that performs a specific function of software, a processing process implemented through software execution, or a set of instructions for program execution, etc. In addition, as a broad concept, a "module" or "unit" may refer to the computing device itself that constitutes the system, or an application running on the computing device, etc. However, since the above-described concept is only an example, the concept of “module” or “part” may be defined in various ways within a range understandable to those skilled in the art based on the contents of the present disclosure.

[0037] The term "model" as used herein may be understood as a system implemented using mathematical concepts and language to solve a specific problem, a set of software units to solve a specific problem, or an abstract model of a processing process to solve a specific problem. For example, a neural network "model" may refer to the entire system implemented as a neural network that has problem-solving capabilities through learning. In this case, the neural network can have problem-solving capabilities by optimizing the parameters connecting nodes or neurons through learning. A neural network "model" may include a single neural network or a set of neural networks that are a combination of multiple neural networks.

[0038] The term "data" used in this disclosure may include "images," signals, and the like. The term "image" used in this disclosure may refer to multidimensional data composed of discrete image elements. In other words, "image" may be understood as a term referring to a digital representation of an object visible to the human eye. For example, "image" may refer to multidimensional data composed of elements corresponding to pixels in a two-dimensional image. "Image" may refer to multidimensional data composed of elements corresponding to voxels in a three-dimensional image.

[0039] The term "block" used in this disclosure can be understood as a set of configurations categorized based on various criteria, such as type and function. Therefore, the configurations classified as a single "block" can vary depending on the criteria. For example, a neural network "block" can be understood as a set of neural networks including at least one neural network. In this case, the neural networks included in the neural network "block" can be assumed to perform specific operations identically.

[0040] The term "functional data" used in this disclosure can be understood as multivariate data having infinite dimensional values. For example, "functional data" may be data that includes a continuously changing curve, such as a curve relating to device characteristics that represents changes in voltage with respect to current.

[0041] The explanation of the above terms is intended to aid understanding of the present disclosure. Therefore, unless explicitly stated as limiting the contents of the present disclosure, it should be noted that the above terms are not intended to limit the technical ideas of the contents of the present disclosure.

[0042] FIG. 1 is a block diagram of a computing device according to one embodiment of the present disclosure.

[0043] A computing device (100) according to one embodiment of the present disclosure may be a hardware device or a part of a hardware device that performs comprehensive processing and calculation of data, or may be a software-based computing environment connected to a communication network. For example, the computing device (100) may be a server that performs intensive data processing functions and shares resources, or may be a client that shares resources through interaction with a server. In addition, the computing device (100) may be a cloud system in which multiple servers and clients interact to comprehensively process data. Since the above description is only one example related to the type of computing device (100), the type of computing device (100) may be configured in various ways within a range understandable to those skilled in the art based on the contents of the present disclosure.

[0044] Referring to FIG. 1, a computing device (100) according to one embodiment of the present disclosure may include a processor (110), a memory (120), and a network unit (130). However, FIG. 1 is merely an example, and the computing device (100) may include other components for implementing a computing environment. In addition, only some of the disclosed components may be included in the computing device (100).

[0045] The processor (110) according to one embodiment of the present disclosure may be understood as a configuration unit including hardware and / or software for performing computing operations. For example, the processor (110) may read a computer program to perform data processing for machine learning. The processor (110) may process computational processes such as processing input data for machine learning, feature extraction for machine learning, and error calculation based on backpropagation. The processor (110) for performing such data processing may include a central processing unit (CPU), a general purpose graphics processing unit (GPGPU), a tensor processing unit (TPU), an application specific integrated circuit (ASIC), or a field programmable gate array (FPGA). The above-described type of the processor (110) is only one example, and thus, the type of the processor (110) may be configured in various ways within a range understandable to those skilled in the art based on the contents of the present disclosure.

[0046] The processor (110) can train a neural network model that performs anomaly detection for a simulation of a semiconductor device. At this time, the neural network model may be a model that inputs functional data regarding device characteristics acquired through the simulation of the semiconductor device into the neural network model and restores such input. In other words, since the neural network model aims to restore the input data, it can perform unsupervised learning that does not require separate labels. For example, the processor (110) can input functional data expressing the relationship between current and voltage or capacitance and voltage, which are characteristics of the semiconductor device, into the neural network model. The neural network model can extract feature vectors existing in the latent space from the input functional data and map the extracted feature vectors back to the observation space to reconstruct the functional data. The processor (110) can calculate a reconstruction error that indicates how much the functional data reconstructed by the neural network model corresponds to the functional data input to the neural network model. In addition, the processor (110) can compare the reconstruction error with a threshold value for anomaly detection to determine whether anomalies, such as non-physical operation patterns of elements, appear in the input functional data. At this time, the threshold value can be automatically determined using non-parametric density estimation based on the reconstruction errors produced during the learning process of the neural network model. Here, automatically determined can be understood as being determined during the learning process of the neural network model without human intervention. That is, the processor (110) can determine the threshold value by estimating the density of the reconstruction errors produced during the learning process of the neural network model. At this time, the density estimation can use a non-parametric method, kernel density estimation (KDE). However, since kernel density estimation is only one example, the non-parametric density estimation method used in the present disclosure is not limited to kernel density estimation.

[0047] Meanwhile, the functional data used for training a neural network model according to one embodiment of the present disclosure may include normal data selected by a domain expert. Here, a domain expert may be understood as a person who can evaluate the simulation results of a semiconductor device based on the device characteristics. In addition, normal data may be understood as data evaluated by a domain expert as having been simulated within the actual physical operating range according to the characteristics of the semiconductor device. For efficient training of a neural network model, it is common to use both normal and abnormal data for training. However, in cases where the value difference between data is small, such as functional data regarding semiconductor device characteristics, the learning effect may be reduced. Therefore, a neural network model according to one embodiment of the present disclosure may be trained solely based on normal data selected by a domain expert.

[0048] When new functional data that has not been learned by the neural network model is obtained, the processor (110) may input the new functional data into the neural network model so that the neural network model may perform an inference operation to reconstruct the new functional data. The processor (110) may calculate a reconstruction error between the input data of the neural network model and the output data generated by the neural network model through the inference operation, and may perform anomaly detection by comparing the reconstruction error with a threshold value. For example, if the reconstruction error exceeds the threshold value, the processor (110) may determine that an outlier exists in the new functional data input to the neural network model. In other words, if the reconstruction error exceeds the threshold value, the processor (110) may determine that the new functional data input to the neural network model is abnormal data. If the reconstruction error does not exceed the threshold value, the processor (110) may determine that no outlier exists in the new functional data input to the neural network model. In other words, if the reconstruction error does not exceed the threshold value, the processor (110) may determine that the new functional data input to the neural network model is normal data.

[0049] Meanwhile, when new functional data not learned by the neural network model is acquired, the processor (110) can dynamically adjust the threshold to reflect the newly generated reconstruction error. If this process is performed cumulatively, the accuracy of the criteria for determining anomaly detection can be improved even without additional neural network model training. In other words, through such threshold adjustments, the processor (110) can continuously improve anomaly detection performance.

[0050] The memory (120) according to one embodiment of the present disclosure may be understood as a configuration unit including hardware and / or software for storing and managing data processed in the computing device (100). That is, the memory (120) may store any type of data generated or determined by the processor (110) and any type of data received by the network unit (130). For example, the memory (120) may include at least one type of storage medium among a flash memory type, a hard disk type, a multimedia card micro type, a card type memory, a random access memory (RAM), a static random access memory (SRAM), a read-only memory (ROM), an electrically erasable programmable read-only memory (EEPROM), a programmable read-only memory (PROM), a magnetic memory, a magnetic disk, and an optical disk. In addition, the memory (120) may also include a database system that controls and manages data in a predetermined system. The type of memory (120) described above is only one example, and thus the type of memory (120) can be configured in various ways within a range understandable to those skilled in the art based on the contents of the present disclosure.

[0051] The memory (120) can structure and organize and manage data, combinations of data, and program codes executable by the processor (110) required for the processor (110) to perform operations. For example, the memory (120) can store functional data regarding semiconductor device characteristics received through the network unit (130) described below. The memory (120) can store program codes that operate a neural network model to perform learning by receiving functional data as input, program codes that operate a neural network model to perform inference according to the purpose of use of the computing device (100) by receiving functional data as input, and processed data generated as the program codes are executed.

[0052] The network unit (130) according to one embodiment of the present disclosure may be understood as a component that transmits and receives data through any type of known wired or wireless communication system. For example, the network unit (130) may perform data transmission and reception using a wired or wireless communication system such as a local area network (LAN), wideband code division multiple access (WCDMA), long term evolution (LTE), wireless broadband internet (WiBro), fifth generation mobile communication (5G), ultra wide-band, ZigBee, radio frequency (RF) communication, wireless LAN, wireless fidelity, near field communication (NFC), or Bluetooth. Since the above-described communication systems are only examples, the wired and wireless communication system for data transmission and reception of the network unit (130) may be applied in various ways other than the above-described examples.

[0053] The network unit (130) can receive data necessary for the processor (110) to perform calculations through wired or wireless communication with any system or any client, etc. In addition, the network unit (130) can transmit data generated through calculations of the processor (110) through wired or wireless communication with any system or any client, etc. For example, the network unit (130) can receive functional data regarding semiconductor device characteristics through communication with a database, a cloud server, or a client, etc. The network unit (130) can transmit output data of a neural network model, intermediate data derived from the calculation process of the processor (110), processed data, etc. through communication with the aforementioned database, server, or client, etc.

[0054] FIG. 2 is a schematic diagram of a neural network model according to one embodiment of the present disclosure.

[0055] Referring to FIG. 2, a neural network model (200) according to one embodiment of the present disclosure may include an encoder (210) that receives first functional data regarding characteristics of a semiconductor device and generates a latent vector, and a decoder (220) that generates second functional data based on the latent vector generated by the encoder (210). The encoder (210) may generate the latent vector by mapping features included in the first functional data to a latent space. In addition, the decoder (220) may generate the second functional data by reconstructing data based on the latent vector by mapping the latent space to an observation space. In addition, whether the first functional data is abnormal may be determined based on a reconstruction error between the first functional data and the second functional data.

[0056] Specifically, the encoder (210) may include a first encoder block (215) that performs a cross-attention operation based on the first functional data, and a second encoder block (219) that performs a self-attention operation based on the output of the first encoder block (215). The first encoder block (215) may generate a second feature by reducing the size of a first feature that can be extracted from the first functional data. That is, the first encoder block (215) may extract a discretized first feature, which is an embedding vector, from the first functional data, and generate the second feature by reducing the size of the first feature. In addition, the first encoder block (215) may perform a cross-attention operation by using the second feature as a query and the first feature as a key and a value. The first encoder block (215) can significantly reduce the computational complexity of subsequent operations because it can map the input space to a smaller latent space. The second encoder block (219) can perform self-attention operations using the output generated by the cross-attention operation of the first encoder block (215) as queries, keys, and values. Through this, the second encoder block (219) can generate a latent vector for the first functional data and capture the interactions of features existing in the latent space.

[0057] Meanwhile, the size of the latent space in which the latent vector generated by the second encoder block (219) exists can be limited through normalization of the latent vector. The second encoder block (219) can perform a self-attention operation based on the output of the first encoder block (215) and perform normalization on the generated latent vector. The second encoder block (219) can limit the latent space to a predetermined size through this normalization. By limiting the size of the latent space through this normalization, the reconstruction performance based on the latent vector can be further improved through the limited space.

[0058] The decoder (220) may include a first decoder block (225) that performs a self-attention operation based on a latent vector generated by a second encoder block (219) and a second decoder block (229) based on a fully connected neural network that receives an output of the first decoder block (225) and generates second functional data. The first decoder block (225) may perform a self-attention operation using the latent vector generated by the second encoder block (219) as a query, a key, and a value to generate a third feature. The second decoder block (229) may map the third feature generated by the first decoder block (225) to an output space to generate second functional data. Since it is common sense to design the encoder and decoder to have a symmetrical structure in order to restore or reconstruct input data, it may be a common method to configure the second decoder block (229) to perform a cross-attention operation. However, if the second decoder block (229) is configured as a neural network that performs a cross-attention operation, a problem occurs in that the decoding performance for restoring or reconstructing functional data is reduced. Therefore, in order to ensure the decoding performance for restoring or reconstructing functional data, the second decoder block (229) according to one embodiment of the present disclosure may be configured to include a fully connected neural network.

[0059] Meanwhile, anomaly detection using artificial neural networks has been extensively studied in vision data or table data. In the case of vision data or table data, since the dimension of the input data is fixed, it is common to use a neural network that applies a convolutional neural network (CNN) or a recurrent neural network (RNN) that can efficiently process such data. However, functional data regarding the characteristics of semiconductor devices, unlike vision data or table data, must be able to predict output from any input value in a non-fixed location, and because it belongs to an infinite-dimensional function space, existing neural networks based on CNN or RNN that process vision data or table data are bound to be unable to properly perform anomaly detection. The neural network model (200) according to one embodiment of the present disclosure can solve this problem through the structure described above with reference to FIG. 2. The neural network model (200) according to one embodiment of the present disclosure can effectively perform anomaly detection through a neural network structure that can receive a function as input and output a function as output.

[0060] Figure 3 is a graph showing test results of an anomaly detection framework according to one embodiment of the present disclosure. Tests were conducted to evaluate the performance of a neural network model according to one embodiment of the present disclosure, and the test results are summarized below with reference to Figure 3.

[0061] (1) Data set

[0062] For the training dataset, we used historical simulation data covering the 55nm to 180nm technology nodes, using the industry-standard BSIM4 model within the SPICE simulation framework. This approach aligns with common practice, which provides a wealth of historical simulation and measurement data sets, while also exhibiting variability in parameters such as bias range and number of measurement points. This variability can often complicate the application of deep learning networks.

[0063] For anomaly detection, the test data set consists of three types. First, it contains normal simulations that exhibit normal CV curves. Second, it contains simulation anomalies where device experts manually induce failures in the BSIM model. Finally, augmented anomalies are introduced to diversify the types of anomalies. These diverse test data types allow for thorough evaluation of anomaly detection methods in a variety of scenarios.

[0064] (2) Evaluation results

[0065] [Table 1] shows a performance comparison between FPCA, Kmeans clustering, spectral clustering, and the neural network model of the present disclosure. In all metrics (accuracy, recall, and precision), the neural network model of the present disclosure achieves superior results compared to the baseline method. In particular, it achieves 100% recall, demonstrating its ability to effectively detect anomalies without false positives, and its performance is nearly twice that of the baseline model. This highlights the robustness of the neural network model of the present disclosure as an anomaly detection method. To further evaluate robustness, noise was introduced into the test data. Even with 20 dB of noise, the performance of the neural network model of the present disclosure only decreased by approximately 3% in the average metric, demonstrating its resilience in processing real-world data with noise.

[0066] Model Accuracy Recall Precision FPCA 10.00% 50.00% 11.25% K-means clustering 79.23% 49.50% 49.75% Spectral clustering 82.15% 50.00% 56.50% Neural network model of this disclosure 100.00% 100.00% 100.00% Neural network model of this disclosure (20 dB noise) 98.69% 04.00% 98.75%

[0067] [Figure 3] shows the distribution of reconstruction errors using kernel density estimation (KDE) fitted to a probability density function. The neural network model of this disclosure automatically determines thresholds for decision-making, making it easy for users who are not AI experts to use. Furthermore, the neural network model of this disclosure has been shown to cluster specific types of anomalies. This potential for clustering these anomaly types suggests that the neural network model of this disclosure could provide enhanced insights during human inspection.

[0068] FIG. 4 is a flowchart illustrating an anomaly detection method of an artificial intelligence-based device simulation according to one embodiment of the present disclosure.

[0069] Referring to FIG. 4, a computing device (100) according to an embodiment of the present disclosure can obtain first functional data regarding the characteristics of a semiconductor device (S100). For example, if the computing device (100) is a cloud server, the computing device (100) can receive the first functional data from a client. The computing device (100) can also receive the first functional data through communication with a separate database according to a user command. That is, the computing device (100) can obtain simulation data regarding the characteristics of a semiconductor device through interaction with a user.

[0070] A computing device (100) can input the first functional data acquired through step S100 into the encoder of a pre-trained neural network model to generate a latent vector (S200). The encoder may include a first encoder block that performs a cross-attention operation based on the first functional data and a second encoder block that performs a self-attention operation based on the output of the first encoder block. Since the encoder structure and operation method have been specifically described with reference to FIG. 2, a detailed description thereof will be omitted below.

[0071] A computing device (100) can input a latent vector into a decoder of a neural network model to generate second functional data (S300). The decoder may include a first decoder block that performs a self-attention operation based on the latent vector generated by the second encoder block, and a second decoder block based on a fully connected neural network that receives the output of the first decoder block and generates second functional data. Since the decoder structure and operation method have been specifically described with reference to FIG. 2, their description will be omitted below.

[0072] The computing device (100) can generate an anomaly detection result for the first functional data by calculating a reconstruction error based on the first functional data and the second functional data (S400). Specifically, the computing device (100) can calculate the reconstruction error using a reconstruction loss function that uses the first functional data and the second functional data as input variables. The computing device (100) can compare the calculated reconstruction error with a threshold value automatically determined during the learning process of the neural network model. If the reconstruction error is less than or equal to the threshold value, the computing device (100) can determine that there is no anomaly in the first functional data. If the reconstruction error exceeds the threshold value, the computing device (100) can determine that there is an anomaly in the first functional data. That is, the computing device (100) can compare the reconstruction error with the threshold value to determine whether there is an anomaly in the first functional data.

[0073] The various embodiments of the present disclosure described above can be combined with additional embodiments and modified within the scope understood by those skilled in the art in light of the detailed description above. It should be understood that the embodiments of the present disclosure are illustrative in all respects and not restrictive. For example, each component described as a single component may be implemented in a distributed manner, and likewise, components described as distributed may be implemented in a combined manner. Accordingly, all changes or modifications derived from the meaning, scope, and equivalent concepts of the claims of the present disclosure should be construed as being included within the scope of the present disclosure.

Claims

1. An anomaly detection method of an artificial intelligence-based device simulation performed by a computing device including at least one processor, A step of obtaining first functional data regarding the characteristics of a semiconductor device; A step of generating a latent vector by inputting the first functional data into the encoder of a pre-trained neural network model; A step of generating second functional data by inputting the latent vector into the decoder of the neural network model; and A step of generating an anomaly detection result for the first functional data by calculating a reconstruction error based on the first functional data and the second functional data; including, method.

2. In paragraph 1, The above neural network model is, It is pre-trained based only on normal data selected by domain experts. method.

3. In paragraph 1, The step of generating anomaly detection results for the above first functional data is: A step of comparing the above reconstruction error with a threshold value to determine whether the first functional data is abnormal; including, method.

4. In paragraph 3, The above threshold is, Based on the reconstruction errors produced during the learning process of the above neural network model, it is automatically determined using nonparametric density estimation. method.

5. In paragraph 1, The above encoder, A first encoder block that performs a cross-attention operation based on the first functional data; and A second encoder block that performs a self-attention operation based on the output of the first encoder block; including, method.

6. In paragraph 5, The above first encoder block, A second feature generated by reducing the size of a first feature that can be extracted from the first functional data is used as a query, and the first feature is used as a key and value. method.

7. In paragraph 5, The above decoder, A first decoder block that performs a self-attention operation based on the latent vector generated by the second encoder block; and A second decoder block based on a fully connected neural network that receives the output of the first decoder block and generates the second functional data; Including, method.

8. In paragraph 5, The size of the latent space in which the latent vector generated by the second encoder block exists is limited through normalization of the latent vector. method.

9. A computer program stored in a computer-readable storage medium, wherein the computer program, when executed on one or more processors, performs operations for detecting anomalies in device simulation based on artificial intelligence. The above actions are, An operation of obtaining first functional data regarding the characteristics of a semiconductor device; An operation of generating a latent vector by inputting the first functional data into an encoder of a pre-trained neural network model; An operation of generating second functional data by inputting the latent vector into the decoder of the neural network model; and An operation of generating an anomaly detection result for the first functional data by calculating a reconstruction error based on the first functional data and the second functional data; including, Computer program.

10. A computing device for detecting anomalies in device simulations based on artificial intelligence. A processor comprising at least one core; A memory containing program codes executable by the processor; and A network unit for obtaining first functional data on the characteristics of a semiconductor device; Including, The above processor, Inputting the first functional data into the encoder of the pre-trained neural network model to generate a latent vector, By inputting the latent vector into the decoder of the neural network model, the second functional data is generated, By calculating a reconstruction error based on the first functional data and the second functional data, an anomaly detection result for the first functional data is generated. device.