MEMS pressure sensor and manufacturing method therefor, and electronic device

Abstract

Provided are a MEMS pressure sensor and a manufacturing method therefor, and an electronic device. The method comprises: providing a first substrate (210) and a second substrate (220), wherein a first pressure structure is formed on the first substrate (210), and a second pressure structure is formed on the second substrate (220); bonding the first pressure structure to the second pressure structure; and removing the first substrate (210), so that the first pressure structure and the second pressure structure together form a third pressure structure, wherein the third pressure structure comprises a first electrode layer (211), a second electrode layer (212), a third electrode layer (213), a fourth electrode layer (214) and a fifth electrode layer (215), which are arranged at intervals from top to bottom; a dielectric layer (230) is formed between every two adjacent electrode layers; and a cavity that runs through a dielectric layer (230) is formed in each dielectric layer (230).

Description

MEMS pressure sensor, manufacturing method thereof and electronic device

[0001] Related applications

[0002] The present application claims priority to the Chinese patent application No. 202410966204.4, filed on July 17, 2024, and entitled "MEMS pressure sensor, manufacturing method thereof and electronic device", the contents of which are hereby incorporated by reference in its entirety. TECHNICAL FIELD

[0003] The present application relates to the field of semiconductor technology, and in particular to a MEMS pressure sensor, a manufacturing method thereof and an electronic device. BACKGROUND

[0004] Micro-electro-mechanical system (MEMS) pressure sensor is a frontier research field developed on the basis of MEMS technology, which is suitable for harsh environments such as high impact, high overload, electrical conduction, corrosion and radiation, and is widely used in aerospace, electronics, industry, medical health and environmental monitoring fields. Compared with piezoresistive pressure sensors, capacitive pressure sensors have the advantages of high sensitivity, low power consumption and good temperature characteristics, and are widely used in various fields.

[0005] According to the capacitance formula, capacitive pressure sensors can be divided into three types: variable spacing, variable area and variable dielectric. Due to the convenience of implementation, the variable spacing capacitive pressure sensor is the most common, whose principle is that the change of spacing leads to the change of capacitance value, and the integrated circuit obtains the signal and performs amplification processing. SUMMARY

[0006] A series of simplified concepts are introduced in the summary section, which will be further described in detail in the specific embodiment section. The summary section of the present application does not mean to attempt to limit the key features and necessary technical features of the claimed technical solutions, nor to attempt to determine the protection scope of the claimed technical solutions.

[0007] In view of the existing problems, the present application provides a manufacturing method of a MEMS pressure sensor, comprising:

[0008] providing a first substrate and a second substrate, the first substrate being formed with a first pressure structure, and the second substrate being formed with a second pressure structure;

[0009] bonding the first pressure structure and the second pressure structure;

[0010] removing the first substrate to expose the first pressure structure, the first pressure structure and the second pressure structure together constituting a third pressure structure, the third pressure structure comprising a first electrode layer, a second electrode layer, a third electrode layer, a fourth electrode layer and a fifth electrode layer arranged in a top-down manner, a dielectric layer being formed between adjacent electrode layers, a cavity being formed in the dielectric layer and penetrating through the dielectric layer;

[0011] wherein, through holes are formed in the electrode layers other than the second electrode layer and penetrating through the electrode layers, or through holes are formed in the electrode layers other than the third electrode layer and penetrating through the electrode layers, or through holes are formed in the electrode layers other than the fourth electrode layer and penetrating through the electrode layers, the cavity exposing the through holes;

[0012] the first electrode layer and the second electrode layer constituting a first capacitor, the second electrode layer and the third electrode layer constituting a second capacitor, the third electrode layer and the fourth electrode layer constituting a third capacitor, and the fourth electrode layer and the fifth electrode layer constituting a fourth capacitor, the first capacitor, the second capacitor, the third capacitor and the fourth capacitor together constituting a Wheatstone bridge.

[0013] In some embodiments, the dielectric layer is formed on the surface of at least one of the first pressure structure and the second pressure structure for bonding, and the first pressure structure and the second pressure structure are bonded through the dielectric layer.

[0014] In some embodiments, the bonding is performed by a low-temperature vacuum bonding process.

[0015] In some embodiments, when through holes are formed in the electrode layers other than the third electrode layer and penetrating through the electrode layers, the through holes in the first electrode layer and the through holes in the second electrode layer are arranged alternately.

[0016] When through holes are formed in the electrode layers other than the fourth electrode layer and penetrating through the electrode layers, the through holes in the first electrode layer, the through holes in the second electrode layer and the through holes in the third electrode layer are arranged alternately.

[0017] In some embodiments, the first pressure structure comprises the first electrode layer and the second electrode layer, the second pressure structure comprises the third electrode layer, the fourth electrode layer and the fifth electrode layer, and the first pressure structure and the second pressure structure are bonded at the side of the first pressure structure where the second electrode layer is formed and the side of the second pressure structure where the third electrode layer is formed, wherein through holes are formed in the electrode layers other than the second electrode layer and penetrating through the electrode layers.

[0018] In some embodiments, the first pressure structure includes the first electrode layer, the second electrode layer, and the third electrode layer, the second pressure structure includes the fourth electrode layer and the fifth electrode layer, and the first pressure structure and the second pressure structure are bonded together in the bonding step with a side of the first pressure structure formed with the third electrode layer and a side of the second pressure structure formed with the fourth electrode layer, wherein a through hole is formed in each of the electrode layers except the third electrode layer.

[0019] In some embodiments, the first pressure structure includes the first electrode layer, the second electrode layer, the third electrode layer, and the fourth electrode layer, the second pressure structure includes the fifth electrode layer, and the first pressure structure and the second pressure structure are bonded together in the bonding step with a side of the first pressure structure formed with the fourth electrode layer and a side of the second pressure structure formed with the fifth electrode layer, wherein a through hole is formed in each of the electrode layers except the third electrode layer.

[0020] In some embodiments, a connection layer is further formed between the first substrate and the first electrode layer and between the second substrate and the fifth electrode layer, respectively.

[0021] In some embodiments, the material of the connection layer is an oxide, a nitride, or an oxynitride of silicon.

[0022] In some embodiments, the through hole is formed by a dry etching process or a wet etching process.

[0023] In some embodiments, the first capacitor, the second capacitor, the third capacitor, and the fourth capacitor are arranged in a vertical direction.

[0024] In some embodiments, the first capacitor and the second capacitor are variable capacitors, and the third capacitor and the fourth capacitor are fixed reference capacitors; or the second capacitor and the third capacitor are variable capacitors, and the first capacitor and the fourth capacitor are fixed reference capacitors; or the third capacitor and the fourth capacitor are variable capacitors, and the first capacitor and the second capacitor are fixed reference capacitors.

[0025] Another aspect of the present application provides a MEMS pressure sensor, comprising:

[0026] a substrate;

[0027] a pressure structure located on the substrate, including a first electrode layer, a second electrode layer, a third electrode layer, a fourth electrode layer, and a fifth electrode layer arranged in a top-down direction with a dielectric layer formed between adjacent electrode layers, wherein a cavity is formed in the dielectric layer;

[0028] The through holes are formed in the electrode layers other than the second electrode layer, or the through holes are formed in the electrode layers other than the third electrode layer, or the through holes are formed in the electrode layers other than the fourth electrode layer, and the cavity exposes the through holes;

[0029] The first electrode layer and the second electrode layer constitute a first capacitor, the second electrode layer and the third electrode layer constitute a second capacitor, the third electrode layer and the fourth electrode layer constitute a third capacitor, and the fourth electrode layer and the fifth electrode layer constitute a fourth capacitor, and the first capacitor, the second capacitor, the third capacitor and the fourth capacitor constitute a Wheatstone bridge.

[0030] In some embodiments, when the through holes are formed in the electrode layers other than the third electrode layer, the through holes in the first electrode layer and the through holes in the second electrode layer are staggered with each other.

[0031] When the through holes are formed in the electrode layers other than the fourth electrode layer, the through holes in the first electrode layer, the through holes in the second electrode layer and the through holes in the third electrode layer are staggered with each other.

[0032] The application further provides an electronic device comprising the MEMS pressure sensor.

[0033] The MEMS pressure sensor, the manufacturing method thereof and the electronic device provided by the application have the following advantages: the first pressure structure and the second pressure structure are bonded to obtain a third pressure structure, the third pressure structure comprises a first electrode layer, a second electrode layer, a third electrode layer, a fourth electrode layer and a fifth electrode layer which are arranged in a vertical direction, the first electrode layer and the second electrode layer constitute a first capacitor, the second electrode layer and the third electrode layer constitute a second capacitor, the third electrode layer and the fourth electrode layer constitute a third capacitor, and the fourth electrode layer and the fifth electrode layer constitute a fourth capacitor, and the first capacitor, the second capacitor, the third capacitor and the fourth capacitor constitute a Wheatstone bridge, i.e. a vertically integrated Wheatstone bridge, which improves the measurement accuracy of the MEMS pressure sensor, reduces the planar size of the MEMS pressure sensor, and improves the integration degree of the device and reduces the cost. BRIEF DESCRIPTION OF DRAWINGS

[0034] In order to more clearly illustrate the technical solutions in the embodiments of the application or the related art, the following will briefly introduce the drawings needed to be used in the embodiments or the related art description. Obviously, the drawings in the following description are only some embodiments of the application, and for those skilled in the art, other drawings can also be obtained without creative labor based on these drawings.

[0035] FIG. 1 is a flow chart of a method of fabricating a MEMS pressure sensor according to an embodiment of the present application.

[0036] FIGS. 2A-2C are cross-sectional schematic views of a device obtained by sequentially implementing a method of fabricating a MEMS pressure sensor according to some embodiments of the present application.

[0037] FIGS. 3A-3C are cross-sectional schematic views of a device obtained by sequentially implementing a method of fabricating a MEMS pressure sensor according to other embodiments of the present application.

[0038] FIGS. 4A-4C are cross-sectional schematic views of a device obtained by sequentially implementing a method of fabricating a MEMS pressure sensor according to still other embodiments of the present application.

[0039] FIG. 5 is a schematic view of a circuit structure of a Wheatstone bridge in the embodiment shown in FIG. 2C. DETAILED DESCRIPTION

[0040] The present application will be described more fully hereinafter with reference to the accompanying drawings, in which embodiments of the application are shown. This application may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the application to those skilled in the art. In the drawings, the size and relative sizes of layers and regions can be exaggerated for clarity. Like reference numerals can be used to denote like elements throughout the accompanying drawings.

[0041] It should be understood that when an element or layer is referred to as being "on", "adjacent", "connected" or "coupled" to another element or layer, it can be directly on, adjacent, connected or coupled to the other element or layer, or intervening elements or layers can be present. In contrast, when an element is referred to as being "directly on", "directly adjacent", "directly connected" or "directly coupled" to another element or layer, there are no intervening elements or layers present. It will be understood that, although the terms first, second, third, etc. can be used herein to describe various elements, components, regions, layers and / or sections, these elements, components, regions, layers and / or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present application.

[0042] Spatially relative terms, such as "beneath", "below", "lower", "under", "above", "upper" and the like, can be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use and / or operation in addition to the orientations depicted in the figures. For example, if a device in the figures is turned over, elements described as "below" or "beneath" other elements or features would then be oriented "above" the other elements or features. Thus, the exemplary term "below" can encompass both an orientation of above and below. The device can be otherwise oriented (rotated 90 degrees or at other orientations) and the spatial descriptions used herein interpreted accordingly.

[0043] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the present application. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and / or "comprising", when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0044] For a thorough understanding of the present application, reference will be made to the following detailed description, taken in conjunction with the accompanying drawings, in which:

[0045] The variable-gap capacitive pressure sensor in the related art generally adopts a single-capacitive structure to measure pressure, however, the measurement accuracy of the single-capacitive structure is low, which is not conducive to mass production application; in order to improve the measurement accuracy, a bridge capacitive structure of a planar structure is often used to measure pressure, however, the bridge capacitive structure of the planar structure will cause the planar size of the device to increase, and thus cause the area to be wasted, and the manufacturing cost is increased.

[0046] Therefore, in view of the above technical problems, the present application provides a manufacturing method of a MEMS pressure sensor, as shown in FIG. 1, which mainly includes the following steps S1 to S3.

[0047] Step S1: providing a first substrate and a second substrate, a first pressure structure is formed on the first substrate, and a second pressure structure is formed on the second substrate.

[0048] Step S2: bonding the first pressure structure and the second pressure structure.

[0049] Step S3: removing the first substrate to expose the first pressure structure, the first pressure structure and the second pressure structure together constituting a third pressure structure, the third pressure structure comprising first electrode layer, second electrode layer, third electrode layer, fourth electrode layer and fifth electrode layer arranged in sequence from top to bottom, a dielectric layer being formed between adjacent electrode layers, and a cavity being formed in the dielectric layer and penetrating the dielectric layer.

[0050] Among the electrode layers except the second electrode layer, a via penetrating the electrode layer is formed, or among the electrode layers except the third electrode layer, a via penetrating the electrode layer is formed, or among the electrode layers except the fourth electrode layer, a via penetrating the electrode layer is formed, and the cavity exposes the via.

[0051] The first electrode layer and the second electrode layer constitute a first capacitor; the second electrode layer and the third electrode layer constitute a second capacitor; the third electrode layer and the fourth electrode layer constitute a third capacitor; and the fourth electrode layer and the fifth electrode layer constitute a fourth capacitor. The first capacitor, the second capacitor, the third capacitor and the fourth capacitor together constitute a Wheatstone bridge.

[0052] According to the manufacturing method of the MEMS pressure sensor provided by the embodiment, the first pressure structure and the second pressure structure are bonded to obtain a third pressure structure, the third pressure structure comprising first electrode layer, second electrode layer, third electrode layer, fourth electrode layer and fifth electrode layer arranged in sequence from top to bottom, the first electrode layer and the second electrode layer constituting a first capacitor, the second electrode layer and the third electrode layer constituting a second capacitor, the third electrode layer and the fourth electrode layer constituting a third capacitor, the fourth electrode layer and the fifth electrode layer constituting a fourth capacitor, and the first capacitor, the second capacitor, the third capacitor and the fourth capacitor together constituting a Wheatstone bridge, i.e. a longitudinally integrated Wheatstone bridge, which improves the measurement accuracy of the MEMS pressure sensor while reducing its planar size, thereby improving the integration degree of the device and reducing the cost.

[0053] Embodiment one

[0054] The manufacturing method of the MEMS pressure sensor according to the present application is described in detail below with reference to FIG. 1, FIG. 2A to FIG. 2C, FIG. 3A to FIG. 3C, FIG. 4A to FIG. 4C, and FIG. 5, wherein FIG. 1 is a flow chart of the manufacturing method of the MEMS pressure sensor according to an embodiment of the present application, FIG. 2A to FIG. 2C are cross-sectional schematic diagrams of the device obtained by sequentially implementing the manufacturing method of the MEMS pressure sensor according to some embodiments of the present application, FIG. 3A to FIG. 3C are cross-sectional schematic diagrams of the device obtained by sequentially implementing the manufacturing method of the MEMS pressure sensor according to some other embodiments of the present application, FIG. 4A to FIG. 4C are cross-sectional schematic diagrams of the device obtained by sequentially implementing the manufacturing method of the MEMS pressure sensor according to yet some other embodiments of the present application, and FIG. 5 is a schematic diagram of the circuit structure of the Wheatstone bridge in the embodiment shown in FIG. 2C.

[0055] The manufacturing method of the MEMS pressure sensor provided in an embodiment of the present application comprises the following steps:

[0056] Firstly, step S1 is performed to provide a first substrate and a second substrate, wherein the first substrate is formed with a first pressure structure, and the second substrate is formed with a second pressure structure.

[0057] In one example, as shown in FIG. 2A to FIG. 4C, the first substrate 210 and the second substrate 220 are bulk silicon substrates, which can be at least one of the following materials: Si, Ge, SiGe, SiC, SiGeC, InAs, GaAs, InP, InGaAs or other III / V compound semiconductors, including multi-layer structures composed of these semiconductors, etc., or silicon-on-insulator (SOI), stacked silicon-on-insulator (SSOI), stacked silicon germanium on insulator (S-SiGeOI), silicon germanium on insulator (SiGeOI), germanium on insulator (GeOI), etc.

[0058] In one example, as shown in FIG. 2A to FIG. 2C, the first pressure structure comprises a first electrode layer 211 and a second electrode layer 212, and the second pressure structure comprises a third electrode layer 213, a fourth electrode layer 214 and a fifth electrode layer 215, wherein the second electrode layer 212 is located on the first electrode layer 211, the fourth electrode layer 214 is located on the fifth electrode layer 215, and the third electrode layer 213 is located on the fourth electrode layer 214. Through holes 250 are formed in each of the electrode layers except the second electrode layer 212, i.e., the through holes 250 are formed in the first electrode layer 211, the third electrode layer 213, the fourth electrode layer 214 and the fifth electrode layer 215. Exemplarily, a dielectric layer 230 is formed between adjacent electrode layers.

[0059] In one example, as shown in FIGS. 3A-3C, the first pressure structure includes a first electrode layer 211, a second electrode layer 212, and a third electrode layer 213, and the second pressure structure includes a fourth electrode layer 214 and a fifth electrode layer 215, wherein the second electrode layer 212 is on the first electrode layer 211, the third electrode layer 213 is on the second electrode layer 212, and the fourth electrode layer 214 is on the fifth electrode layer 215. Among the electrode layers, except for the third electrode layer 213, a via hole 250 is formed through each of the electrode layers, i.e., the via hole 250 is formed in the first electrode layer 211, the second electrode layer 212, the fourth electrode layer 214, and the fifth electrode layer 215.

[0060] In one example, as shown in FIGS. 4A-4C, the first pressure structure includes a first electrode layer 211, a second electrode layer 212, a third electrode layer 213, and a fourth electrode layer 214, and the second pressure structure includes a fifth electrode layer 215, wherein the second electrode layer 212 is on the first electrode layer 211, the third electrode layer 213 is on the second electrode layer 212, and the fourth electrode layer 214 is on the third electrode layer 213. Among the electrode layers, except for the fourth electrode layer 214, a via hole 250 is formed through each of the electrode layers, i.e., the via hole 250 is formed in the first electrode layer 211, the second electrode layer 212, the third electrode layer 213, and the fifth electrode layer 215.

[0061] In one example, the first electrode layer 211, the second electrode layer 212, the third electrode layer 213, the fourth electrode layer 214, and the fifth electrode layer 215 can be made of doped polysilicon, SiGe, or amorphous silicon after implantation and annealing, and are not limited to a certain material. The first electrode layer 211 can be formed by chemical vapor deposition (CVD), physical vapor deposition (PVD), or atomic layer deposition (ALD), or can be formed by one of furnace tube growth and selective epitaxial growth (SEG), which is not limited in the present application.

[0062] In one example, the dielectric layer 230 serves as a support and can be used to improve the strength of the device. For example, the dielectric layer 230 can be made of an oxide layer, such as silicon oxide and carbon-doped silicon oxide (SiOC), but is not limited to the above examples. In addition, the dielectric layer 230 can be formed by various deposition methods commonly used in the art, such as plasma-enhanced chemical vapor deposition (PECVD), low-pressure chemical vapor deposition (LPCVD), physical vapor deposition, or atomic layer deposition (ALD).

[0063] In step S2, the first pressure structure and the second pressure structure are bonded.

[0064] In one example, as shown in FIG. 2C, when the first pressure structure includes the first electrode layer 211 and the second electrode layer 212, and the second pressure structure includes the third electrode layer 213, the fourth electrode layer 214 and the fifth electrode layer 215, the first pressure structure is bonded with the second pressure structure at the side of the first pressure structure formed with the second electrode layer 212 and the side of the second pressure structure formed with the third electrode layer 213 in the bonding step.

[0065] In one example, as shown in FIG. 3C, when the first pressure structure includes the first electrode layer 211, the second electrode layer 212 and the third electrode layer 213, and the second pressure structure includes the fourth electrode layer 214 and the fifth electrode layer 215, the first pressure structure is bonded with the second pressure structure at the side of the first pressure structure formed with the third electrode layer 213 and the side of the second pressure structure formed with the fourth electrode layer 214 in the bonding step.

[0066] In one example, as shown in FIG. 4C, when the first pressure structure includes the first electrode layer 211, the second electrode layer 212, the third electrode layer 213 and the fourth electrode layer 214, and the second pressure structure includes the fifth electrode layer 215, the first pressure structure is bonded with the second pressure structure at the side of the first pressure structure formed with the fourth electrode layer 214 and the side of the second pressure structure formed with the fifth electrode layer 215 in the bonding step.

[0067] In one example, the above bonding step is performed by a low-temperature vacuum bonding process. Illustratively, after the low-temperature vacuum bonding, a low-temperature annealing process is performed. Illustratively, the temperature of the low-temperature bonding process is lower than 450 degrees Celsius.

[0068] In one example, as shown in FIGS. 2A-4C, a dielectric layer 230 is formed on the surface of at least one of the first pressure structure and the second pressure structure for bonding, and the first pressure structure and the second pressure structure are bonded through the dielectric layer 230. Illustratively, as shown in the drawings of the present application, the dielectric layer 230 is formed on the surface of both the first pressure structure and the second pressure structure for bonding. In other embodiments, the dielectric layer 230 can also be formed only on the surface of the first pressure structure for bonding, or only on the surface of the second pressure structure for bonding.

[0069] A step S3 is performed to remove the first substrate to expose the first pressure structure, the first pressure structure and the second pressure structure together constituting a third pressure structure, the third pressure structure including a first electrode layer, a second electrode layer, a third electrode layer, a fourth electrode layer and a fifth electrode layer arranged in sequence from top to bottom, a dielectric layer being formed between adjacent electrode layers, the dielectric layer being formed with a cavity penetrating through the dielectric layer.

[0070] In one example, as shown in FIGS. 2C, 3C and 4C, the first substrate 210 needs to be removed after the bonding step to expose the first pressure structure. Exemplarily, a conventional thinning and etching process can be employed to remove the first substrate 210.

[0071] In one example, as shown in FIGS. 2A to 4C, a connection layer can also be formed between the first substrate 210 and the electrode layer and between the second substrate 220 and the electrode layer. The material of the connection layer can include any of a plurality of dielectric materials, non-limiting examples of which include oxides, nitrides and oxynitrides, especially oxides, nitrides and oxynitrides of silicon, but not oxides, nitrides and oxynitrides of other elements. Any of a plurality of methods can be employed to form the connection layer, non-limiting examples of which include ion implantation methods, thermal oxidation or plasma oxidation or thermal nitridation or plasma nitridation methods, plasma enhanced chemical vapor deposition methods, low pressure chemical vapor deposition methods and physical vapor deposition methods. Exemplarily, when a connection layer is also formed between the first substrate 210 and the electrode layer, part of the connection layer should also be removed to expose the via hole 250 when the first substrate 210 is removed.

[0072] In one example, the via hole 250 can be formed by employing a conventional etching process in the art, for example, a dry etching process or a wet etching process can be employed to form the via hole 250, more specifically, a buffer oxide etchant can be employed, or gaseous hydrogen fluoride (VHF) can be employed.

[0073] In one example, the cavity 240 is obtained by removing part of the dielectric layer 230 through the via hole 250. Exemplarily, part of the dielectric layer 230 can be removed by employing a conventional etching process in the art, for example, a wet etching process can be employed to remove part of the dielectric layer 230, more specifically, a buffer oxide etchant can be employed to remove part of the dielectric layer 230, or gaseous hydrogen fluoride (VHF) can be employed to remove part of the dielectric layer 230. Exemplarily, the release boundary of the dielectric layer 230 can be reasonably set according to actual needs, wherein the release boundary refers to the width of the remaining dielectric layer 230.

[0074] In one example, the cavity 240 and the via hole 250 in the second pressure structure are formed before the bonding step. In one example, the cavity 240 and the via hole 250 in the first pressure structure can be formed before the bonding step, or can be formed after the bonding step, for example, the via hole 250 can be formed first, then the bonding is performed, and then the cavity 240 is formed, or the via hole 250 and the cavity 240 can be formed first, then the bonding is performed, or the bonding can be performed first, and then the via hole 250 and the cavity 240 are formed.

[0075] In one example, as shown in FIG. 3C and FIG. 4C, when the through holes 250 are formed in each of the electrode layers except the third electrode layer 213, the through holes 250 in the first electrode layer 211 and the through holes 250 in the second electrode layer 212 are staggered with each other; when the through holes 250 are formed in each of the electrode layers except the fourth electrode layer 214, the through holes 250 in the first electrode layer 211, the through holes 250 in the second electrode layer 212 and the through holes 250 in the third electrode layer 213 are staggered with each other. Exemplarily, the staggered with each other means that the positions of the through holes are not aligned with each other. Exemplarily, when the through holes 250 are formed in each of the electrode layers except the third electrode layer 213, the first electrode layer 211 and the second electrode layer 212 are directly contacted with the external environment, by staggering the through holes 250 in the first electrode layer 211 and the through holes 250 in the second electrode layer 212 with each other, the foreign matters in the external environment can be effectively avoided from entering into the device to cause the performance of the device to be degraded. Similarly, when the through holes 250 are formed in each of the electrode layers except the fourth electrode layer 214, the first electrode layer 211, the second electrode layer 212 and the third electrode layer 213 are directly contacted with the external environment, by staggering the through holes 250 in the first electrode layer 211, the through holes 250 in the second electrode layer 212 and the through holes 250 in the third electrode layer 213 with each other, the foreign matters in the external environment can be effectively avoided from entering into the device to cause the performance of the device to be degraded.

[0076] In one example, as shown in FIG. 2C, FIG. 3C and FIG. 4C, the first electrode layer 211 and the second electrode layer 212 constitute the first capacitor C1, the second electrode layer 212 and the third electrode layer 213 constitute the second capacitor C2, the third electrode layer 213 and the fourth electrode layer 214 constitute the third capacitor C3, and the fourth electrode layer 214 and the fifth electrode layer 215 constitute the fourth capacitor C4. Among them, the first capacitor C1, the second capacitor C2, the third capacitor C3 and the fourth capacitor C4 together constitute a Wheatstone bridge as shown in FIG. 5. Exemplarily, since the first electrode layer 211, the second electrode layer 212, the third electrode layer 213, the fourth electrode layer 214 and the fifth electrode layer 215 are arranged in a vertical direction, the first capacitor C1, the second capacitor C2, the third capacitor C3 and the fourth capacitor C4 are also arranged in a vertical direction, which can greatly reduce the planar size of the MEMS pressure sensor, improve the integration of the device, and further reduce the cost of the device. Exemplarily, the positions of the first capacitor C1, the second capacitor C2, the third capacitor C3 and the fourth capacitor C4 in the Wheatstone bridge as shown in FIG. 5 are only exemplary, and in other embodiments, the first capacitor C1, the second capacitor C2, the third capacitor C3 and the fourth capacitor C4 can also constitute a Wheatstone bridge through other connection modes, for example, the first capacitor C1 and the fourth capacitor C4 are located in the same bridge arm, and the second capacitor C2 and the third capacitor C3 are located in the same bridge arm, which is not limited in the present application.

[0077] Exemplarily, as shown in FIG. 2C, the first capacitor C1 constituted by the first electrode layer 211 and the second electrode layer 212 is a variable capacitor. When subjected to external pressure, the second electrode layer 212 deforms to increase the distance between the first electrode layer 211 and the second electrode layer 212, thereby reducing the capacitance of the first capacitor C1. The second capacitor C2 constituted by the second electrode layer 212 and the third electrode layer 213 is also a variable capacitor. When subjected to external pressure, the second electrode layer 212 deforms to reduce the distance between the third electrode layer 213 and the second electrode layer 212, thereby increasing the capacitance of the second capacitor C2. The third capacitor C3 constituted by the third electrode layer 213 and the fourth electrode layer 214 and the fourth capacitor C4 constituted by the fourth electrode layer 214 and the fifth electrode layer 215 are both fixed reference capacitors, and the capacitances of the third capacitor C3 and the fourth capacitor C4 remain unchanged when subjected to external pressure.

[0078] In another example, as shown in FIG. 3C, the second capacitor C2 formed by the second electrode layer 212 and the third electrode layer 213 is a variable capacitor. When subjected to external pressure, the third electrode layer 213 deforms, increasing the distance between the second electrode layer 212 and the third electrode layer 213, and thus decreasing the capacitance of the second capacitor C2. The third capacitor C3 formed by the third electrode layer 213 and the fourth electrode layer 214 is also a variable capacitor. When subjected to external pressure, the third electrode layer 213 deforms, decreasing the distance between the fourth electrode layer 214 and the third electrode layer 213, and thus increasing the capacitance of the third capacitor C3. The first capacitor C1 formed by the first electrode layer 211 and the second electrode layer 212 and the fourth capacitor C4 formed by the fourth electrode layer 214 and the fifth electrode layer 215 are both fixed reference capacitors. When subjected to external pressure, the capacitances of the first capacitor C1 and the fourth capacitor C4 remain unchanged.

[0079] In another example, as shown in FIG. 4C, the third capacitor C3 formed by the third electrode layer 213 and the fourth electrode layer 214 is a variable capacitor. When subjected to external pressure, the fourth electrode layer 214 deforms, increasing the distance between the third electrode layer 213 and the fourth electrode layer 214, and thus decreasing the capacitance of the third capacitor C3. The fourth capacitor C4 formed by the fourth electrode layer 214 and the fifth electrode layer 215 is also a variable capacitor. When subjected to external pressure, the fourth electrode layer 214 deforms, decreasing the distance between the fifth electrode layer 215 and the fourth electrode layer 214, and thus increasing the capacitance of the fourth capacitor C4. The first capacitor C1 formed by the first electrode layer 211 and the second electrode layer 212 and the second capacitor C2 formed by the second electrode layer 212 and the third electrode layer 213 are both fixed reference capacitors. When subjected to external pressure, the capacitances of the first capacitor C1 and the second capacitor C2 remain unchanged.

[0080] In one example, the device structure shown in FIG. 2C and the Wheatstone bridge structure shown in FIG. 5 are taken as examples for illustration, the first capacitor C1 and the third capacitor C3 are arranged on one bridge arm of the Wheatstone bridge, and the second capacitor C2 and the fourth capacitor C4 are arranged on the other bridge arm, wherein the first capacitor C1 and the second capacitor C2 are variable capacitors, and the third capacitor C3 and the fourth capacitor C4 are fixed reference capacitors. When subjected to external pressure, the capacitances of the first capacitor C1 and the second capacitor C2 change, so that the voltage value of the output voltage between V+ and V- changes, and by measuring the output voltage, the change amount of the capacitances of the first capacitor C1 and the second capacitor C2 can be obtained, and the size of the corresponding pressure value can be obtained, that is, the measurement of the pressure is completed. Illustratively, compared with the measurement of pressure by the single-capacitor structure, when the pressure is measured by the Wheatstone bridge, the differential output is obtained, the measurement accuracy is higher, and the interference of common-mode noise can be effectively eliminated. Illustratively, the initial capacitances of the first capacitor C1, the second capacitor C2, the third capacitor C3 and the fourth capacitor C4 when not subjected to pressure can be equal, so that the Wheatstone bridge is in a balanced state when not subjected to pressure, and when subjected to pressure, the Wheatstone bridge is unbalanced, and the change value of the output voltage is easier to measure. Further, the change amounts of two variable capacitors in the first capacitor C1, the second capacitor C2, the third capacitor C3 and the fourth capacitor C4 when subjected to pressure can be equal, and at this time, the change value of the output voltage is easier to measure.

[0081] It is worth mentioning that the above steps are only examples, and the order of the above steps can also be adjusted without conflict.

[0082] The description of the key steps of the manufacturing method of the MEMS pressure sensor of the present application is completed, and other steps can also be included in the complete manufacturing of the MEMS pressure sensor, such as the pad lamp step of forming the lead electrode layer, which is not described here.

[0083] In summary, according to the manufacturing method of the MEMS pressure sensor of the present application, the first pressure structure and the second pressure structure are bonded to obtain the third pressure structure, the third pressure structure includes the first electrode layer, the second electrode layer, the third electrode layer, the fourth electrode layer and the fifth electrode layer arranged in sequence from top to bottom, the first electrode layer and the second electrode layer constitute the first capacitor, the second electrode layer and the third electrode layer constitute the second capacitor, the third electrode layer and the fourth electrode layer constitute the third capacitor, and the fourth electrode layer and the fifth electrode layer constitute the fourth capacitor, the first capacitor, the second capacitor, the third capacitor and the fourth capacitor together constitute the Wheatstone bridge, that is, the vertically integrated Wheatstone bridge is formed, which improves the measurement accuracy of the MEMS pressure sensor while reducing its planar size, thereby improving the integration of the device and reducing the cost.

[0084] Embodiment two

[0085] The application also provides a MEMS pressure sensor, which is manufactured by the method in the first embodiment and is described below with reference to Figs. 2B-2C, 3C, 4C and 5. The MEMS pressure sensor comprises:

[0086] a substrate 220;

[0087] a pressure structure on the substrate 200, which comprises first, second, third, fourth and fifth electrode layers 211, 212, 213, 214 and 215 arranged in sequence from top to bottom, and a dielectric layer 230 formed between adjacent electrode layers, wherein the dielectric layer 230 is provided with a cavity 240 penetrating the dielectric layer 230.

[0088] In the embodiment, the electrode layers other than the second electrode layer 212 are provided with a through hole 250 penetrating the electrode layer, or the electrode layers other than the third electrode layer 213 are provided with a through hole 250 penetrating the electrode layer, or the electrode layers other than the fourth electrode layer 214 are provided with a through hole 250 penetrating the electrode layer, and the cavity 240 exposes the through hole 250. The first electrode layer 211 and the second electrode layer 212 form a first capacitor, the second electrode layer 212 and the third electrode layer 213 form a second capacitor, the third electrode layer 213 and the fourth electrode layer 214 form a third capacitor, and the fourth electrode layer 214 and the fifth electrode layer 215 form a fourth capacitor, and the first, second, third and fourth capacitors form a Wheatstone bridge.

[0089] In one example, the substrate 220 is a bulk silicon substrate, which can be at least one of the following materials: Si, Ge, SiGe, SiC, SiGeC, InAs, GaAs, InP, InGaAs or other III / V compound semiconductors, and also includes a multi-layer structure of these semiconductors, etc., or a silicon-on-insulator (SOI), a stacked silicon-on-insulator (SSOI), a stacked silicon germanium-on-insulator (S-SiGeOI), a silicon germanium-on-insulator (SiGeOI) and a germanium-on-insulator (GeOI), etc.

[0090] In one example, as shown in FIG. 3C and FIG. 4C, when the through holes 250 are formed in each of the electrode layers except the third electrode layer 213, the through holes 250 in the first electrode layer 211 and the through holes 250 in the second electrode layer 212 are staggered with each other. When the through holes 250 are formed in each of the electrode layers except the fourth electrode layer 214, the through holes 250 in the first electrode layer 211, the through holes 250 in the second electrode layer 212 and the through holes 250 in the third electrode layer 213 are staggered with each other. Exemplarily, the staggered with each other means that the positions of the through holes are not aligned with each other. Exemplarily, when the through holes 250 are formed in each of the electrode layers except the third electrode layer 213, the first electrode layer 211 and the second electrode layer 212 are directly contacted with the external environment, by staggering the through holes 250 in the first electrode layer 211 and the through holes 250 in the second electrode layer 212 with each other, the foreign matters in the external environment can be effectively avoided from entering into the device to cause the performance of the device to be degraded. Similarly, when the through holes 250 are formed in each of the electrode layers except the fourth electrode layer 214, the first electrode layer 211, the second electrode layer 212 and the third electrode layer 213 are directly contacted with the external environment, by staggering the through holes 250 in the first electrode layer 211, the through holes 250 in the second electrode layer 212 and the through holes 250 in the third electrode layer 213 with each other, the foreign matters in the external environment can be effectively avoided from entering into the device to cause the performance of the device to be degraded.

[0091] In one example, as shown in FIG. 2C, FIG. 3C and FIG. 4C, the first electrode layer 211 and the second electrode layer 212 constitute a first capacitor C1, the second electrode layer 212 and the third electrode layer 213 constitute a second capacitor C2, the third electrode layer 213 and the fourth electrode layer 214 constitute a third capacitor C3, and the fourth electrode layer 214 and the fifth electrode layer 215 constitute a fourth capacitor C4. Among them, the first capacitor C1, the second capacitor C2, the third capacitor C3 and the fourth capacitor C4 together constitute a Wheatstone bridge as shown in FIG. 5. Exemplarily, since the first electrode layer 211, the second electrode layer 212, the third electrode layer 213, the fourth electrode layer 214 and the fifth electrode layer 215 are arranged in a vertical direction, the first capacitor C1, the second capacitor C2, the third capacitor C3 and the fourth capacitor C4 are also arranged in a vertical direction, which can greatly reduce the planar size of the MEMS pressure sensor, improve the integration of the device, and further reduce the cost of the device. Exemplarily, the positions of the first capacitor C1, the second capacitor C2, the third capacitor C3 and the fourth capacitor C4 in the Wheatstone bridge shown in FIG. 5 are only exemplary, and in other embodiments, the first capacitor C1, the second capacitor C2, the third capacitor C3 and the fourth capacitor C4 can also constitute a Wheatstone bridge through other connection modes, for example, the first capacitor C1 and the fourth capacitor C4 are located in the same bridge arm, and the second capacitor C2 and the third capacitor C3 are located in the same bridge arm, which is not limited in the present application.

[0092] In one example, as shown in FIG. 2C, the first capacitor C1 constituted by the first electrode layer 211 and the second electrode layer 212 is a variable capacitor. When subjected to external pressure, the second electrode layer 212 deforms to increase the distance between the first electrode layer 211 and the second electrode layer 212, thereby reducing the capacitance of the first capacitor C1. The second capacitor C2 constituted by the second electrode layer 212 and the third electrode layer 213 is also a variable capacitor. When subjected to external pressure, the second electrode layer 212 deforms to reduce the distance between the third electrode layer 213 and the second electrode layer 212, thereby increasing the capacitance of the second capacitor C2. The third capacitor C3 constituted by the third electrode layer 213 and the fourth electrode layer 214 and the fourth capacitor C4 constituted by the fourth electrode layer 214 and the fifth electrode layer 215 are both fixed reference capacitors, and the capacitances of the third capacitor C3 and the fourth capacitor C4 remain unchanged when subjected to external pressure.

[0093] In another example, as shown in FIG. 3C, the second capacitor C2 formed by the second electrode layer 212 and the third electrode layer 213 is a variable capacitor. When subjected to external pressure, the third electrode layer 213 deforms, increasing the distance between the second electrode layer 212 and the third electrode layer 213, and thus decreasing the capacitance of the second capacitor C2. The third capacitor C3 formed by the third electrode layer 213 and the fourth electrode layer 214 is also a variable capacitor. When subjected to external pressure, the third electrode layer 213 deforms, decreasing the distance between the fourth electrode layer 214 and the third electrode layer 213, and thus increasing the capacitance of the third capacitor C3. The first capacitor C1 formed by the first electrode layer 211 and the second electrode layer 212 and the fourth capacitor C4 formed by the fourth electrode layer 214 and the fifth electrode layer 215 are both fixed reference capacitors. When subjected to external pressure, the capacitances of the first capacitor C1 and the fourth capacitor C4 remain unchanged.

[0094] In another example, as shown in FIG. 4C, the third capacitor C3 formed by the third electrode layer 213 and the fourth electrode layer 214 is a variable capacitor. When subjected to external pressure, the fourth electrode layer 214 deforms, increasing the distance between the third electrode layer 213 and the fourth electrode layer 214, and thus decreasing the capacitance of the third capacitor C3. The fourth capacitor C4 formed by the fourth electrode layer 214 and the fifth electrode layer 215 is also a variable capacitor. When subjected to external pressure, the fourth electrode layer 214 deforms, decreasing the distance between the fifth electrode layer 215 and the fourth electrode layer 214, and thus increasing the capacitance of the fourth capacitor C4. The first capacitor C1 formed by the first electrode layer 211 and the second electrode layer 212 and the second capacitor C2 formed by the second electrode layer 212 and the third electrode layer 213 are both fixed reference capacitors. When subjected to external pressure, the capacitances of the first capacitor C1 and the second capacitor C2 remain unchanged.

[0095] In one example, the device structure shown in FIG. 2C and the Wheatstone bridge structure shown in FIG. 5 are taken as an example for illustration, the first capacitor C1 and the third capacitor C3 are arranged on one bridge arm of the Wheatstone bridge, and the second capacitor C2 and the fourth capacitor C4 are arranged on the other bridge arm, wherein the first capacitor C1 and the second capacitor C2 are variable capacitors, and the third capacitor C3 and the fourth capacitor C4 are fixed reference capacitors. When subjected to external pressure, the capacitances of the first capacitor C1 and the second capacitor C2 change, so that the voltage value of the output voltage between V+ and V- changes, and by measuring the output voltage, the change amount of the capacitances of the first capacitor C1 and the second capacitor C2 can be obtained, and the size of the corresponding pressure value can be further obtained, that is, the measurement of the pressure is completed. Illustratively, compared with the measurement of pressure by a single capacitor structure, when the pressure is measured by the Wheatstone bridge, the differential output is obtained, the measurement accuracy is higher, and the interference of common-mode noise can be effectively eliminated. Illustratively, the initial capacitances of the first capacitor C1, the second capacitor C2, the third capacitor C3 and the fourth capacitor C4 when not subjected to pressure can be all equal, so that the Wheatstone bridge is in a balanced state when not subjected to pressure, and when subjected to pressure, the Wheatstone bridge is unbalanced, and the change value of the output voltage is easier to measure. Further, the change amounts of two variable capacitors in the first capacitor C1, the second capacitor C2, the third capacitor C3 and the fourth capacitor C4 when subjected to pressure can be equal, and at this time, the change value of the output voltage is easier to measure.

[0096] So far, the structure of the MEMS pressure sensor of the present application has been introduced, and the complete device can further include other component structures, such as pads for leading out the electrode layer, which are not described here.

[0097] The MEMS pressure sensor of the present application is formed with a pressure structure, the pressure structure includes first, second, third, fourth and fifth electrode layers arranged in sequence from top to bottom, the first and second electrode layers constitute a first capacitor, the second and third electrode layers constitute a second capacitor, the third and fourth electrode layers constitute a third capacitor, and the fourth and fifth electrode layers constitute a fourth capacitor, the first, second, third and fourth capacitors together constitute a Wheatstone bridge, that is, a vertically integrated Wheatstone bridge is formed, which improves the measurement accuracy of the MEMS pressure sensor while reducing its planar size, thereby improving the integration of the device and reducing the cost.

[0098] Embodiment Three

[0099] The present application also provides an electronic device comprising the MEMS pressure sensor of embodiment two or the MEMS pressure sensor manufactured by the method of embodiment one.

[0100] The electronic device can be a mobile phone, a tablet computer, a notebook computer, a netbook, a game console, a television, a VCD, a DVD, a navigator, a camera, a video camera, a voice recorder, an MP3, an MP4, a PSP, or any other electronic product or device, or can be an intermediate product having the MEMS pressure sensor, such as a mobile phone mainboard having the integrated circuit. The electronic device of the embodiment has better performance due to the use of the MEMS pressure sensor.

[0101] The technical features of the above embodiments can be combined in any manner. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described, but it should be understood that any combination of the technical features is within the scope of the present disclosure as long as the combination does not result in contradictions.

[0102] The above embodiments only express several implementation manners of the present application, and the description is relatively specific and detailed, but it should not be understood as a limitation on the scope of the patent. It should be pointed out that, for those skilled in the art, some modifications and improvements can be made without departing from the concept of the present application, and these are within the protection scope of the present application. Therefore, the protection scope of the patent of the present application should be subject to the appended claims.

Claims

1. A method for manufacturing a micro-electro-mechanical system (MEMS) pressure sensor, comprising: providing a first substrate and a second substrate, the first substrate having a first pressure structure formed thereon, and the second substrate having a second pressure structure formed thereon; bonding the first pressure structure and the second pressure structure; removing the first substrate to expose the first pressure structure, the first pressure structure and the second pressure structure together constituting a third pressure structure, the third pressure structure comprising a first electrode layer, a second electrode layer, a third electrode layer, a fourth electrode layer and a fifth electrode layer arranged in a top-down manner, a dielectric layer being formed between adjacent electrode layers, and a cavity being formed in the dielectric layer and penetrating through the dielectric layer; wherein through holes are formed in the electrode layers except the second electrode layer, or through holes are formed in the electrode layers except the third electrode layer, or through holes are formed in the electrode layers except the fourth electrode layer, the cavity exposing the through holes; the first electrode layer and the second electrode layer constituting a first capacitor, the second electrode layer and the third electrode layer constituting a second capacitor, the third electrode layer and the fourth electrode layer constituting a third capacitor, and the fourth electrode layer and the fifth electrode layer constituting a fourth capacitor, the first capacitor, the second capacitor, the third capacitor and the fourth capacitor together constituting a Wheatstone bridge. 2.The method according to claim 1, wherein a surface of at least one of the first pressure structure and the second pressure structure for bonding is formed with the dielectric layer, and the first pressure structure and the second pressure structure are bonded through the dielectric layer. 3.The method according to claim 1, wherein the bonding is performed by a low-temperature vacuum bonding process. 4.The method according to claim 1, wherein when the through holes are formed in the electrode layers except the third electrode layer, the through holes in the first electrode layer and the through holes in the second electrode layer are arranged alternately; when the through holes are formed in the electrode layers except the fourth electrode layer, the through holes in the first electrode layer, the through holes in the second electrode layer and the through holes in the third electrode layer are arranged alternately. The through holes are formed in the electrode layers except the second electrode layer. The through holes are formed in the electrode layers except the third electrode layer. The through holes are formed in the electrode layers except the third electrode layer. 8.The method according to claim 1, wherein a connecting layer is further formed between the first substrate and the first electrode layer, and between the second substrate and the fifth electrode layer, respectively. 9.The method according to claim 8, wherein the connecting layer is made of an oxide, a nitride or an oxynitride of silicon. 10.The method according to claim 1, wherein the through holes are formed by a dry etching process or a wet etching process.

5. The manufacturing method according to claim 1, wherein the first pressure structure includes the first electrode layer and the second electrode layer, the second pressure structure includes the third electrode layer, the fourth electrode layer, and the fifth electrode layer, and in the bonding step, the first pressure structure is bonded with a side on which the second electrode layer is formed and a side on which the third electrode layer of the second pressure structure is formed, wherein, ​ 6. The manufacturing method according to claim 1, wherein the first pressure structure includes the first electrode layer, the second electrode layer, and the third electrode layer, the second pressure structure includes the fourth electrode layer and the fifth electrode layer, in the bonding step, a side of the first pressure structure formed with the third electrode layer and a side of the second pressure structure formed with the fourth electrode layer are bonded, wherein, ​ 7. The manufacturing method according to claim 1, wherein the first pressure structure includes the first electrode layer, the second electrode layer, the third electrode layer, and the fourth electrode layer, the second pressure structure includes the fifth electrode layer, and in the bonding step, a side of the first pressure structure formed with the fourth electrode layer and a side of the second pressure structure formed with the fifth electrode layer are bonded. ​ ​ ​ ​ 11. The manufacturing method of claim 1, wherein the first capacitor, the second capacitor, the third capacitor and the fourth capacitor are arranged in a vertical direction.

12. The manufacturing method of claim 1, wherein the first capacitor and the second capacitor are variable capacitors, and the third capacitor and the fourth capacitor are fixed reference capacitors; or the second capacitor and the third capacitor are variable capacitors, and the first capacitor and the fourth capacitor are fixed reference capacitors; or the third capacitor and the fourth capacitor are variable capacitors, and the first capacitor and the second capacitor are fixed reference capacitors.

13. A MEMS pressure sensor, comprising: a substrate; a pressure structure on the substrate, comprising a first electrode layer, a second electrode layer, a third electrode layer, a fourth electrode layer and a fifth electrode layer arranged in a vertical direction, a dielectric layer is formed between adjacent electrode layers, and a cavity is formed in the dielectric layer and penetrates the dielectric layer; wherein through holes are formed in the electrode layers except the second electrode layer, or through holes are formed in the electrode layers except the third electrode layer, or through holes are formed in the electrode layers except the fourth electrode layer, and the cavity exposes the through holes; the first electrode layer and the second electrode layer form a first capacitor, the second electrode layer and the third electrode layer form a second capacitor, the third electrode layer and the fourth electrode layer form a third capacitor, and the fourth electrode layer and the fifth electrode layer form a fourth capacitor, and the first capacitor, the second capacitor, the third capacitor and the fourth capacitor form a Wheatstone bridge.

14. The MEMS pressure sensor of claim 13, wherein when through holes are formed in the electrode layers except the third electrode layer, the through holes in the first electrode layer and the through holes in the second electrode layer are staggered with each other; and when through holes are formed in the electrode layers except the fourth electrode layer, the through holes in the first electrode layer, the through holes in the second electrode layer and the through holes in the third electrode layer are staggered with each other.

15. An electronic device comprising the MEMS pressure sensor of claim 13 or 14. ​ ​ ​ ​ ​ ​ ​ ​

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