Optical fiber cable adapter and application device therefor

Abstract

The embodiments of the present application relate to the technical field of computer systems and servers. Provided are an optical fiber cable adapter and an application device therefor. The optical fiber cable adapter comprises a switch circuit, which is connected to an optical fiber cable connector, wherein the switch circuit has the same number of short-circuit resistors and the same number of coupling switches as the number of channels, and the switch circuit is used for outputting, when the optical fiber cable connector comes into contact with one coupling switch, a voltage-drop voltage corresponding to the optical fiber cable connector; one voltage-drop voltage is used for representing a target channel matching the optical fiber cable connector; the voltage-drop voltages of different channels are different; an input end of a gate logic circuit is connected to the switch circuit, and the gate logic circuit is used for receiving one voltage-drop voltage and generating a control signal; and an input end of each motor control circuit is connected to an output end of the gate logic circuit, an output end of the motor control circuit is connected to a motor, and the motor control circuit is used for controlling, according to the control signal, the motor to rotate, so as to couple the optical fiber connector to the target channel. The embodiments of the present application improve the wiring efficiency during the connection between optical fiber cables and optical fiber cable management racks while also preventing errors and mistakes.

Description

A fiber optic adapter and its application device

[0001] Cross-references to related applications

[0002] This application claims priority to Chinese Patent Application No. 202410963471.6, filed on July 17, 2024, entitled "An Fiber Optic Adapter and Its Application Device", the entire contents of which are incorporated herein by reference. Technical Field

[0003] This application relates to the field of computer systems and server technology, and in particular to a fiber optic adapter, a fiber optic connection module, a fiber optic patch panel, and a server rack. Background Technology

[0004] With the advancement of human technology and the widespread application and popularization of the Internet, artificial intelligence, the Internet of Things, and big data, servers have become indispensable key equipment in human society. Fiber optic cables, as an important medium for data transmission, are widely used in the network transmission of various servers. Fiber optic cables have advantages such as high transmission speed, long distance, large data capacity, immunity to electromagnetic interference, resistance to lightning strikes, difficulty in external eavesdropping, non-conductive properties, and no grounding issues between devices. However, commonly used fiber optic adapters can only be manually installed one by one into the correct position in the adapter according to the markings on the fiber optic patch cord. This is extremely inefficient during server cabling installation, not only time-consuming and labor-intensive but also difficult to check and prone to installation errors. Summary of the Invention

[0005] In view of the above problems, embodiments of this application are proposed to provide a fiber optic adapter, a fiber optic connection module, a fiber optic patch panel, and a server rack that overcome or at least partially solve the above problems.

[0006] To address the aforementioned issues, this application discloses an optical fiber adapter with multiple channels, each channel including: a switching circuit, a gate logic circuit, a motor control circuit, and a motor.

[0007] The switching circuit is connected to the fiber optic connector. The switching circuit has the same number of short-circuit resistors and coupling switches as the channels. The switching circuit is used to output a voltage drop corresponding to the fiber optic connector when the fiber optic connector contacts the coupling switch. The voltage drop is used to characterize the target channel matched by the fiber optic connector. The voltage drop is different for different channels.

[0008] The input terminal of the gate logic circuit is connected to the switching circuit to receive the voltage drop and generate control signals;

[0009] The input terminal of the motor control circuit is connected to the output terminal of the gate logic circuit, and the output terminal of the motor control circuit is connected to the motor. It is used to control the motor rotation according to the control signal so as to couple the fiber optic connector to the target channel.

[0010] In some embodiments of this application, the switching circuit includes: a short-circuit resistor, a coupling switch, and a first operating power supply; the resistance values ​​of the multiple short-circuit resistors are different; the multiple short-circuit resistors are connected in series with the first operating power supply; the multiple short-circuit resistors are connected in series sequentially; each short-circuit resistor is connected in parallel with a corresponding coupling switch.

[0011] When the fiber optic connector is inserted, one of the compression coupling switches is closed, and the short-circuit resistor corresponding to the coupling switch is short-circuited, forming a voltage drop under the power supply of the first operating power source.

[0012] In some embodiments of this application, the switching circuit further includes:

[0013] The first voltage divider resistor is connected in series between the short-circuit resistor and the first operating power supply.

[0014] In some embodiments of this application, the switching circuit further includes:

[0015] The branch circuit on / off switch is connected in series between the short-circuit resistor and the first operating power supply, and closes when the fiber optic connector is inserted.

[0016] In some embodiments of this application, the gate logic circuit includes: an AND gate circuit with the same number of channels;

[0017] Multiple AND gates are connected in parallel; one of the multiple AND gates is the target AND gate, and the threshold voltage of the target AND gate is the same as the voltage drop voltage.

[0018] In some embodiments of this application, one of the plurality of AND gate circuits is an AND gate, and the rest are first NAND gates;

[0019] The input of the first NAND gate in a plurality of first NAND gates is connected to the output of the first operating power supply and the switching circuit, and its output is connected to the next first NAND gate circuit; the outputs of the first NAND gates other than the first one are connected to the input of the motor control circuit.

[0020] The input of the AND gate is connected to the first operating power supply and the output of the last first NAND gate; the output of the AND gate is connected to the input of the motor control circuit.

[0021] In some embodiments of this application, the gate logic circuit further includes: an adjustment resistor of the same number as the AND gate circuits described above, the adjustment resistor being connected to the corresponding AND gate circuit for adjusting the threshold voltage of the corresponding AND gate circuit.

[0022] In some embodiments of this application, the resistance values ​​of the adjusting resistors are not the same.

[0023] In some embodiments of this application, the motor control circuit includes: a multi-channel control sub-circuit, each control sub-circuit being used to control a corresponding motor;

[0024] The multiple control sub-circuits are connected in parallel, and the output of the multiple control sub-circuit is connected to the corresponding motor.

[0025] In some embodiments of this application, the input terminal of each control sub-circuit is connected to the corresponding AND gate circuit and the first operating power supply, and the output terminal is connected to the corresponding motor.

[0026] In some embodiments of this application, each control sub-circuit includes:

[0027] The input of the second NAND gate is connected to the corresponding AND gate circuit and the first operating power supply, and the output is connected to the corresponding motor.

[0028] A trigger switch corresponding to the second NAND gate is connected in series between the corresponding second NAND gate and the motor.

[0029] In some embodiments of this application, each control sub-circuit further includes:

[0030] The second voltage divider resistor is connected in series between the input terminal of the second NAND gate and the first operating power supply.

[0031] In some embodiments of this application, the trigger switch includes a first sub-trigger switch and a second trigger sub-switch.

[0032] The first sub-trigger switch is connected to one of the outputs of the corresponding second NAND gate;

[0033] The second sub-trigger switch is connected to the other output terminal of the corresponding second NAND gate.

[0034] In some embodiments of this application, the motor control circuit further includes: a second operating power supply and a third operating power supply.

[0035] The second power supply is connected to the motor and is used to supply power to the motor when the first sub-trigger switch is turned on.

[0036] The third power supply is connected to the motor and is used to supply power to the motor when the second sub-trigger switch is turned on.

[0037] In some embodiments of this application, the number of control sub-circuits is one less than the number of coupling switches.

[0038] In some embodiments of this application, the number of short-circuit resistors is four, and the number of coupling switches is four.

[0039] A fiber optic connection module includes a fiber optic connector and a fiber optic adapter as described above.

[0040] The fiber optic connector connects to the fiber optic adapter.

[0041] In some embodiments of this application, the fiber optic connector is provided with protrusions.

[0042] The bumps are used to press the coupling switch in the fiber optic adapter; the bump positions are different for fiber optic connectors that connect different channels of the same fiber optic adapter.

[0043] A fiber optic patch panel includes the fiber optic cable connection module as described above.

[0044] A server rack, including the fiber optic patch panel as described above.

[0045] The embodiments of this application have the following advantages:

[0046] This embodiment connects to the fiber optic connector via a switching circuit. The switching circuit has short-circuit resistors and coupling switches equal in number to the number of channels. When the fiber optic connector contacts the coupling switch, the switching circuit outputs a voltage drop corresponding to the fiber optic connector. This voltage drop characterizes the target channel matched to the fiber optic connector; different channels have different voltage drops. The input of a gate logic circuit is connected to the switching circuit to receive the voltage drop and generate a control signal. The input of a motor control circuit is connected to the output of the gate logic circuit, and the output of the motor control circuit is connected to the motor. This controls the motor's rotation based on the control signal to couple the fiber optic connector to the target channel. The fiber optic adapter contains coupling switches. When the fiber optic connector is connected to the adapter, different coupling contact switches are triggered, generating different voltage drops to automatically identify the fiber optic cable sequence. Different signals are received through different contact switches, and signals are automatically output to control different rotating motors. This allows for automatic adjustment of the internal coupling position even when the fiber optic cables are installed in a freely disordered manner, and the output automatically outputs the correct connection sequence. This eliminates the need for visual confirmation of the fiber optic cable's numerical identification and for individual cable matching, greatly simplifying cable management, significantly improving cabling efficiency, and reducing labor costs. Attached Figure Description

[0047] Figure 1 is a structural block diagram of an embodiment of a fiber optic adapter according to this application;

[0048] Figure 2 is a schematic diagram of the channel interface of an embodiment of an optical fiber adapter according to this application;

[0049] Figure 3 is a schematic diagram of the switching circuit of an embodiment of an optical fiber adapter according to this application;

[0050] Figure 4 is a schematic diagram of the internal optical path of an embodiment of an optical fiber adapter according to this application;

[0051] Figure 5 is a schematic diagram of a gate logic circuit of an embodiment of an optical fiber adapter according to this application;

[0052] Figure 6 is a schematic diagram of a motor control circuit according to an embodiment of an optical fiber adapter of this application;

[0053] Figure 7 is a structural block diagram of an embodiment of an optical fiber connection module of this application;

[0054] Figure 8 is a schematic diagram of the fiber optic connector protrusions of an embodiment of the fiber optic connection module of this application;

[0055] Figure 9 is a structural block diagram of an embodiment of a fiber optic distribution frame according to this application;

[0056] Figure 10 is a structural block diagram of a server rack embodiment of this application;

[0057] Figure 11 is a schematic diagram of fiber optic cabling in one embodiment of a server rack according to this application. Detailed Implementation

[0058] To make the above-mentioned objectives, features and advantages of this application more apparent and understandable, the application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0059] Referring to Figure 1, a structural block diagram of an embodiment of the fiber optic adapter of this application is shown; referring to Figure 2, a channel interface schematic diagram of an embodiment of the fiber optic adapter of this application is shown. The fiber optic adapter has multiple channels, each channel including: a switching circuit, a gate logic circuit, a motor control circuit, and a motor;

[0060] The switching circuit is connected to the fiber optic connector. The switching circuit has the same number of short-circuit resistors and coupling switches as the channels. The switching circuit is used to output a voltage drop corresponding to the fiber optic connector when the fiber optic connector contacts the coupling switch. The voltage drop is used to characterize the target channel matched by the fiber optic connector. The voltage drop is different for different channels.

[0061] The input terminal of the gate logic circuit is connected to the switching circuit to receive the voltage drop and generate control signals;

[0062] The input terminal of the motor control circuit is connected to the output terminal of the gate logic circuit, and the output terminal of the motor control circuit is connected to the motor. It is used to control the motor rotation according to the control signal so as to couple the fiber optic connector to the target channel.

[0063] In the embodiments of this application, each fiber optic adapter has multiple channels, such as four channels, eight channels, etc., and each channel includes a switching circuit, a gate logic circuit, a motor control circuit, and a motor.

[0064] The circuit consists of a switching circuit connected to the fiber optic connector. Each switching circuit has a short-circuit resistor and a coupling switch, the same number as the number of channels. When the fiber optic connector contacts the coupling switch, the switching circuit outputs a voltage drop corresponding to the fiber optic connector. This voltage drop characterizes the target channel matched to the fiber optic connector; different channels have different voltage drops. The output of each switching circuit is then connected to a gate logic circuit. The gate logic circuit performs logic operations based on the voltage drop, calculating the output level signal to generate a control signal. The input of the motor control circuit is connected to the input of the gate logic circuit. Upon receiving the control signal output from the gate logic circuit, it controls the corresponding motor to rotate, coupling it to the corresponding channel.

[0065] For example, each channel of a fiber optic adapter contains four contact-coupled switches, each connected in parallel with a resistor of a specific value. The four resistors have different values, ensuring that when each of the four contacts is turned on, the corresponding parallel resistor is short-circuited according to the circuit characteristics, resulting in different voltage drops. The switch output is connected to a gate logic circuit consisting of four parallel AND gates. Because each fiber optic interface has one raised contact, and the positions of the raised contacts on the four ports are different, this ensures that each of the four channels has a unique contact-coupled switch turned on, and the positions of the connected switches on the four channels are all different. Thus, the four channels receive four different input voltage drops flowing into the AND gate chip. The gate logic circuit consists of four parallel AND gates, and each parallel AND gate is connected in series with a resistor of a specific value. The input voltage Vcc (Positive Supply Voltage) is adjusted through these four resistors. The voltage drop U1 after V1 is connected to the first contact coupling switch, U2 after V2 is connected to the second contact coupling switch, U3 after V3 is connected to the third contact coupling switch, and U4 after V4 is connected to the fourth contact coupling switch. The scheme sets the first AND gate circuit to a low level below V1, the second AND gate circuit to a low level below V2, the third AND gate circuit to a low level below V3, and the fourth AND gate circuit to a low level below V4 (in actual logic gate circuits, the high and low voltages have a certain voltage range; here, Vcc1 is the dividing point between high and low levels, and the voltage can fluctuate, as long as the difference between V1, V2, V3, and V4 exceeds the fluctuation range of high and low levels). Since the inputs of the logic AND gate circuits are all high, the output is high; otherwise, the output is low. Because the logic AND gate chip is composed of four independent AND gate circuits connected in parallel, they do not interfere with each other. The voltage drops (U1, U2, U3, and U4) within each channel are different and will only be the same as the voltage of one of the AND gates in each logic circuit. Thus, only one of the four output ports of the operational chip is a valid voltage, while the rest are invalid. The output terminals are connected to a rotary motor switch circuit control chip. Each channel has three output terminals connected to the rotary motor control chip, with terminals y1, y2, and y3 being AND gate output circuits. Because, as mentioned earlier, in the logic AND gate operational chip, only one of the four output voltages in each channel is a valid voltage, while the other three are invalid, a valid high-level signal will only be generated if the input voltage matches the preset voltage of the logic gate circuit; otherwise, no high-level signal will be output. For the four-channel fiber optic adapter module, there are four possible scenarios after each fiber optic cable connection: one scenario is that the fiber optic cable sequence perfectly matches the installed channel, in which case no adjustment is needed for that channel.The other three scenarios involve mismatches between the fiber optic cable and the installed channel. In these cases, the adapter needs to trigger the automatic adjustment function. Each channel will have three scenarios requiring the rotation motor to be triggered for adjustment, and each scenario will activate an independent rotation motor trigger switch circuit. Because the channel to which the fiber optic cable should be adjusted is determined the moment it is connected to the adapter, only one of the three rotation motors will rotate due to a high-level circuit closure. This means that at most one rotation motor in each of the four channels will rotate, or all three motors will not rotate. This allows for correct connection sequence at the output end of the four fiber optic cables without considering their installation location.

[0066] Specifically, the switching circuit includes: short-circuit resistors, coupling switches, and a first operating power supply. The resistance values ​​of the multiple short-circuit resistors are different. The multiple short-circuit resistors are connected in series with the first operating power supply. The multiple short-circuit resistors are connected in series sequentially. Each short-circuit resistor is connected in parallel with the corresponding coupling switch.

[0067] When the fiber optic connector is inserted, one of the compression coupling switches is closed, and the short-circuit resistor corresponding to the coupling switch is short-circuited, forming a voltage drop under the power supply of the first operating power source.

[0068] When the fiber optic connector is inserted, one of the fiber optic compression coupling switches closes, and the short-circuit resistor corresponding to the coupling switch is short-circuited. Under the power supply of the first working power supply, a voltage drop is formed, thereby determining the coupling channel corresponding to the fiber optic connector.

[0069] Furthermore, the switching circuit also includes:

[0070] The first voltage divider resistor is connected in series between the short-circuit resistor and the first operating power supply.

[0071] The branch circuit on / off switch is connected in series between the short-circuit resistor and the first operating power supply, and closes when the fiber optic connector is inserted.

[0072] For example, referring to Figure 3, each channel of the 4-channel adapter module contains five contact switches: K, K1, K2, K3, and K4. When an optical fiber is connected to a channel, the four preset positions of the coupling protrusions at the connector end of the optical fiber overlap with the positions of the four contact switches in the adapter. For example, protrusion 1 coincides with switch K1, protrusion 2 with switch K2, protrusion 3 with switch K3, and protrusion 4 with switch K4. Resistors R1, R2, R3, and R4 are resistors whose values ​​can be freely adjusted according to the actual output voltage requirements. As shown in circuit diagram 3, switch K is a branch on / off switch, while K1, K2, K3, and K4 are resistor short-circuit switches. Switch K automatically connects when an optical fiber is connected to the channel and automatically disconnects when the fiber is removed.

[0073] As shown in Figure 4, to achieve the goal of automatic coupling of four fiber optic cables regardless of their installation location, each adapter module needs three rotating motors to automatically adjust to the other three. When the order of the installed fiber optic cables in a particular channel perfectly matches that channel, no adjustment of the rotating motors in that channel is required. Therefore, when switch K1 in channel 1 is turned on, the fiber optic cable order and installation position are already perfectly aligned, requiring no adjustment. Therefore, the rotation motor only needs to be adjusted when K2, K3, and K4 in channel 1 are switched on; similarly, when switch K2 in channel 2 is switched on, the fiber optic cable sequence matches the installation channel position, meaning the rotation motor only needs to be adjusted when K1, K3, and K4 in channel 2 are switched on; when switch K3 in channel 3 is switched on, the fiber optic cable sequence matches the installation channel position, meaning the rotation motor only needs to be adjusted when K1, K2, and K4 in channel 3 are switched on; when switch K4 in channel 4 is switched on, the fiber optic cable sequence matches the installation channel position, meaning the rotation motor only needs to be adjusted when K1, K2, and K3 in channel 4 are switched on.

[0074] Furthermore, the gate logic circuit includes: an AND gate circuit with the same number of channels;

[0075] Multiple AND gates are connected in parallel; one of the multiple AND gates is the target AND gate, and the threshold voltage of the target AND gate is the same as the voltage drop voltage.

[0076] In the embodiments of this application, the gate logic circuit is formed by parallel connection of AND gates with the same number of channels. One of the multiple AND gates in a channel is the target AND gate. The threshold voltage and voltage drop voltage of the target AND gate are the same, thereby identifying the channel that needs to be coupled.

[0077] Among them, one of the multiple AND gate circuits is an AND gate, and the rest are first NAND gates;

[0078] The input of the first NAND gate in a plurality of first NAND gates is connected to the output of the first operating power supply and the switching circuit, and its output is connected to the next first NAND gate circuit; the outputs of the first NAND gates other than the first one are connected to the input of the motor control circuit.

[0079] The input of the AND gate is connected to the first operating power supply and the output of the last first NAND gate; the output of the AND gate is connected to the input of the motor control circuit.

[0080] Furthermore, the gate logic circuit also includes: an adjustment resistor of the same number as the AND gate circuits described above, the adjustment resistor being connected to the corresponding AND gate circuit and used to adjust the threshold voltage of the corresponding AND gate circuit.

[0081] In the AND gate circuit, the same number of adjustable resistors as the AND gate circuits mentioned above can also be set. Each adjustable resistor is connected to the corresponding AND gate circuit to adjust the threshold voltage of the corresponding AND gate circuit. As shown in Figure 5, the four resistors r1, r2, r3, and r4 adjust the voltage drop of each path. The Y1 voltage can be set to be the same after V1 is connected to K1, the Y1 voltage after V2 is connected to K2, the Y1 voltage after V3 is connected to K3, and the Y1 voltage after V4 is connected to K4. The output terminals y1, y2, and y3 are connected to the switches M1, M2, and M3 of the rotating motor control circuit, respectively.

[0082] The resistance values ​​of the adjusting resistors are not the same.

[0083] For example, as shown in Figure 5, the NAND gates from left to right are gates 1 to 4.

[0084] Input Y1 is connected in parallel to gate circuits 1-4 as one of the input signals; Vcc is connected to gate circuit 1 through resistor r1 as an input signal; Vcc is connected to gate circuit 2 through resistor r2 as an input signal; Vcc is connected to gate circuit 3 through resistor r3 as an input signal; Vcc is connected to gate circuit 4 through resistor r4 as an input signal; Output a of gate circuit 1 is connected in parallel to gate circuits 2-4, together with Y1 and the corresponding Vcc as input signals; Output c of gate circuit 2 is connected in parallel to gate circuits 3-4, together with Y1 and the corresponding Vcc as input signals; Output e of gate circuit 3 is connected in parallel to gate circuit 4, together with Y1 and the corresponding Vcc as input signals; Output b of gate circuit 2 is the output terminal y1 of the overall circuit; Output d of gate circuit 3 is the output terminal y2 of the overall circuit; Output of gate circuit 4 is the output terminal y3 of the overall circuit.

[0085] As the characteristics of the gate circuits show, if all inputs are high, the output is high; otherwise, the output is low. Referring to Figures 4 and 5, when K1 is turned on, the voltages V1 and Y1 are the same and both high. K1 being on indicates that the fiber optic cable sequence connected in channel 1 perfectly matches the channel's position, and no adjustment of the rotating motor is needed. After the high-level signal passes through the NAND gate, terminal a outputs a low level. This low-level signal serves as the input to the subsequent NAND gate circuits. According to the characteristics of the AND gate circuit, if any input is low, the output is low. Therefore, the final outputs of y1, y2, and y3 are all low. The rotating motor switches in channel 1 will not be turned on, satisfying the setting that no adjustment of the rotating motor is needed when K1 is on.

[0086] When K2 in channel 1 is turned on, the voltage of Y1 is the same as the voltage of V2. At this time, Y1 is low relative to the input of logic gate 1, and the output terminal a of the NAND gate is high. At this time, all three inputs of logic gate 2 are high, so the output terminal b is high, that is, the output y1 triggers the rotation switch of the rotating motor M1 to conduct. At the same time, the output terminal c is low, and this low level serves as the input of the subsequent logic gate circuits. At this time, the final outputs of y2 and y3 are both low. The rotating motor M1 in channel 1 is turned on, and M2 and M3 are not turned on. Because the coupling switch K2 is turned on in this case, the fiber optic cable sequence of the second protruding contact of the fiber optic connector can be set to match the position of the optical path adapter module after the rotating motor M1 is turned on.

[0087] When K3 in channel 1 is turned on, the input voltage Y1 is the same as the voltage V3. At this time, Y1 is low relative to the inputs of logic gates #1 and #2. After passing through the NAND gate, output a is high, output b is low, and output c is high. At this time, all four inputs of logic gate #3 are high, so output d is high, which means that output y2 triggers the rotation switch of motor M2 to conduct. At the same time, output e is low, and this low level serves as the input of the subsequent logic gate. At this time, the final output y3 is low. When motor M2 in channel 1 is turned on, neither M1 nor M3 is turned on. Because the coupling switch K3 is turned on in this case, the fiber optic cable sequence of the 3rd protruding contact of the fiber optic connector can be set to match the position of the optical path adapter module after the rotation motor M2 is turned on.

[0088] When K4 in channel 1 is turned on, the voltage of Y1 is the same as the voltage of V4. At this time, the input of Y1 to logic gates 1#, 2#, and 3# is low. After passing through NAND gates, the outputs a, b, c, d, and e are all high. At this time, all five inputs of logic gate 4# are high, so the output y3 is high, which triggers the rotation switch of motor M3 to turn on. Therefore, the final output of y3 is high. Motor M3 in channel 1 is turned on, while M1 and M2 are not turned on. Because the coupling switch K4 is turned on in this case, the fiber optic cable sequence of the fourth protruding contact of the fiber optic connector can be set to match the position of the optical path adapter module after the M3 rotation motor is turned on.

[0089] To prevent the output voltage from being simultaneously interpreted as high by multiple logic gates in the subsequent switching control chip, for example, if logic gate 1 is 12V ± 2V high, logic gate 2 is 7V ± 2V high, logic gate 3 is 5V ± 2V high, and logic gate 4 is 3V ± 2V high, then the resistor values ​​must be adjusted to ensure that when R1, R2, R3, and R4 are shorted, the output voltage is at least 10V, 8V, 6V, and 2V respectively. Changing 8V to 7V would be incorrect because 7V falls within the common range of logic gates 2 and 3, and would be simultaneously interpreted as high.

[0090] In one optional embodiment of this application, the motor control circuit includes: a multi-channel control sub-circuit, each control sub-circuit being used to control a corresponding motor;

[0091] The multiple control sub-circuits are connected in parallel, and the output of the multiple control sub-circuit is connected to the corresponding motor.

[0092] A motor control circuit in a channel includes multiple control sub-circuits connected in parallel. The output of each control sub-circuit is connected to the corresponding motor to control that motor.

[0093] Specifically, the input terminal of each control sub-circuit is connected to the corresponding AND gate circuit and the first operating power supply, and the output terminal is connected to the corresponding motor.

[0094] Each control sub-circuit includes:

[0095] The input of the second NAND gate is connected to the corresponding AND gate circuit and the first operating power supply, and the output is connected to the corresponding motor.

[0096] A trigger switch corresponding to the second NAND gate is connected in series between the corresponding second NAND gate and the motor.

[0097] The second voltage divider resistor is connected in series between the input terminal of the second NAND gate and the first operating power supply.

[0098] The second NAND gate is the NAND gate in the control sub-circuit. It can determine the motor to be controlled based on the voltage of the first working power supply Vcc and the corresponding voltage in the input control signal, so as to control only the corresponding motor to rotate and achieve automatic coupling.

[0099] Furthermore, since automatic coupling can be achieved by rotating only one motor in a single channel, meaning there is a single correct connection, the number of control sub-circuits can be one less than the number of coupling switches. This avoids duplication of control sub-circuits and ensures a compact circuit.

[0100] Furthermore, the trigger switch includes a first sub-trigger switch and a second trigger sub-switch.

[0101] The first sub-trigger switch is connected to one of the outputs of the corresponding second NAND gate;

[0102] The second sub-trigger switch is connected to the other output terminal of the corresponding second NAND gate.

[0103] The motor control circuit also includes: a second operating power supply and a third operating power supply.

[0104] The second power supply is connected to the motor and is used to supply power to the motor when the first sub-trigger switch is turned on.

[0105] The third power supply is connected to the motor and is used to supply power to the motor when the second sub-trigger switch is turned on.

[0106] The motor is powered by a second and a third power source to achieve forward or reverse rotation.

[0107] Continuing the example above, referring to Figure 6, Vcc adjusts to the same voltage as the input sources y1, y2, and y3 by adjusting resistors r5, r6, and r7. The rotating motors Ma, Mb, and Mc are connected to the forward rotation circuit Vcc1 and the reverse rotation circuit Vcc2, respectively. The forward rotation circuit's on / off switch controls M1, M2, and M3 through the chip's output terminals f, h, and j; similarly, the reverse rotation circuit's on / off switch controls m1, m2, and m3 through the chip's output terminals g, i, and k.

[0108] Combining the logic of the output signals y1, y2, and y3 of the gate logic circuit, when the input y1 is high, both the input Vcc and y1 are high. After passing through the logic AND gate circuit, the high level at the output j terminal triggers the switch M1 to conduct. At this time, Vcc1 drives the rotating motor Ma to rotate after passing through M1. The fiber optic cable sequence of the 2nd protruding contact of the fiber optic connector matches the position of the optical path adapter module after the rotating motor M1 is turned on. The switch M1 controls the rotating motor Ma. After rotation, the optical path is switched to channel 4. That is, the fiber optic cable in channel 1 should be inserted into channel 4 at this time to be in the correct position. This solution realizes that the fiber optic cable can be installed arbitrarily, and the fiber optic adapter is automatically coupled to channel 4.

[0109] When y1 output is high, output terminal k is low, and switch m1 is open. At this time, the Vcc2 circuit is disconnected, and the Vcc1 circuit operates. The rotating motor adjusts the internal optical path of the fiber optic adapter. This means that the order of the fiber optic cables inserted into the channel does not match their actual installation position on the adapter channel, automatically triggering the internal adjustment mechanism. Because fiber optic cables are frequently removed and replaced for maintenance, the rotating motor inside the automatic coupling adapter module needs to automatically return to its initial state after the fiber optic cable is removed from the adapter. When the y1 output changes from high to low, output terminal j becomes low, and output terminal k becomes high. At this time, switch m1 in the Vcc2 circuit is turned on. We set Vcc2 to a reverse voltage, causing the rotating motor Ma to reverse and reset.

[0110] Similarly, when y2 and y3 outputs are high, the principle is the same as when y1 outputs a high level. Normally, fiber optic cable 1 is installed in adapter channel 1, fiber optic cable 2 in adapter channel 2, fiber optic cable 3 in adapter channel 3, and fiber optic cable 4 in adapter channel 4. However, this solution allows for arbitrary installation of fiber optic cables regardless of their order. The adapter's internal automatic coupling function automatically adjusts the optical path output position. Because in this solution, the channel to which a fiber optic cable belongs is already determined the moment it is installed in a particular adapter channel. That is, output signals y1, y2, and y3 are either all low, indicating correct installation without adjustment, or only one is high and the other two are low, requiring adjustment of the corresponding channel's rotation motor.

[0111] The above description primarily uses the fiber optic cable connected in channel 1 as an example. The protruding contacts of the fiber optic connector in channel 1 trigger the coupling contact switches within channel 1. Different output voltages Y1 are generated after short-circuiting different contact switches in channel 1. These output voltages Y1 enter the logic chip and, through AND gate operations, automatically generate three different output signals y1, y2, and y3. Finally, the chip outputs signals y1, y2, and y3 to drive the corresponding rotating motors, thus controlling the on / off state of the rotating motor circuit and consequently controlling the automatic rotation adjustment of the rotating motors. The switch triggering circuits, logic chip circuits, and motor drive circuits in channels 2, 3, and 4 are all implemented using the same scheme and are independent of each other, so they will not be described further here.

[0112] This embodiment connects to the fiber optic connector via a switching circuit. The switching circuit has short-circuit resistors and coupling switches equal in number to the number of channels. When the fiber optic connector contacts the coupling switch, the switching circuit outputs a voltage drop corresponding to the fiber optic connector. This voltage drop characterizes the target channel matched to the fiber optic connector; different channels have different voltage drops. The input of a gate logic circuit is connected to the switching circuit to receive the voltage drop and generate a control signal. The input of a motor control circuit is connected to the output of the gate logic circuit, and the output of the motor control circuit is connected to the motor. This controls the motor's rotation based on the control signal to couple the fiber optic connector to the target channel. The fiber optic adapter contains coupling switches. When the fiber optic connector is connected to the adapter, different coupling contact switches are triggered, generating different voltage drops to automatically identify the fiber optic cable sequence. Different signals are received through different contact switches, and signals are automatically output to control different rotating motors. This allows for automatic adjustment of the internal coupling position even when the fiber optic cables are installed in a freely disordered manner, and the output automatically outputs the correct connection sequence. This eliminates the need for visual confirmation of the fiber optic cable's numerical identification and for individual cable matching, greatly simplifying cable management, significantly improving cabling efficiency, and reducing labor costs.

[0113] It should be noted that, for the sake of simplicity, all actions are described as a series of combinations of actions. However, those skilled in the art should understand that the embodiments of this application are not limited to the described order of actions, because according to the embodiments of this application, some steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should also understand that the embodiments described in the specification are all preferred embodiments, and the actions involved are not necessarily required for the embodiments of this application.

[0114] Referring to FIG7, a structural block diagram of an embodiment of an optical fiber connection module of this application is shown; the optical fiber connection module includes: an optical fiber connector and an optical fiber adapter as described above.

[0115] The fiber optic connector connects to the fiber optic adapter.

[0116] Fiber optic connectors connect to fiber optic adapters, thereby enabling fiber optic communication links.

[0117] Specifically, the fiber optic connector has raised dots.

[0118] The bumps are used to press the coupling switch in the fiber optic adapter; the bump positions are different for fiber optic connectors that connect different channels of the same fiber optic adapter.

[0119] For example, referring to Figure 8, each of the four fiber optic connectors has a raised contact at its side end, and the position of each raised contact is different. The four fiber optic connectors have four different raised contacts. By connecting the raised contacts at different positions to the coupling switches at different positions inside the fiber optic adapter, the correct order of the four fiber optic connectors connected in the channel can be determined. The raised contacts replace the numerical coding labels, specifying that for connector 1, the contact at position 1 is raised, while positions 2, 3, and 4 are not raised; for connector 2, the contact at position 2 is raised, while positions 1, 3, and 4 are not raised; for connector 3, the contact at position 3 is raised, while positions 1, 2, and 4 are not raised; and for connector 4, the contact at position 4 is raised, while positions 1, 2, and 3 are not raised. After all four fiber optic connectors are connected to the adapter module, all four module circuits are conductive. Since the raised contacts of each channel are different, and the resistance values ​​of the four resistors R1, R2, R3, and R4 are different, the resistance of each short circuit is different. As a result, the output voltages Y1, Y2, Y3, and Y4 are four output signals with different voltage drops.

[0120] Furthermore, the fiber optic adapter has multiple channels, each channel including: a switching circuit, a gate logic circuit, a motor control circuit, and a motor;

[0121] The switching circuit is connected to the fiber optic connector. The switching circuit has the same number of short-circuit resistors and coupling switches as the channels. The switching circuit is used to output a voltage drop corresponding to the fiber optic connector when the fiber optic connector contacts the coupling switch. The voltage drop is used to characterize the target channel matched by the fiber optic connector. The voltage drop is different for different channels.

[0122] The input terminal of the gate logic circuit is connected to the switching circuit to receive the voltage drop and generate control signals;

[0123] The input terminal of the motor control circuit is connected to the output terminal of the gate logic circuit, and the output terminal of the motor control circuit is connected to the motor. It is used to control the motor rotation according to the control signal so as to couple the fiber optic connector to the target channel.

[0124] In some embodiments of this application, the switching circuit includes: a short-circuit resistor, a coupling switch, and a first operating power supply; the resistance values ​​of the multiple short-circuit resistors are different; the multiple short-circuit resistors are connected in series with the first operating power supply; the multiple short-circuit resistors are connected in series sequentially; each short-circuit resistor is connected in parallel with a corresponding coupling switch.

[0125] When the fiber optic connector is inserted, one of the compression coupling switches is closed, and the short-circuit resistor corresponding to the coupling switch is short-circuited, forming a voltage drop under the power supply of the first operating power source.

[0126] In some embodiments of this application, the switching circuit further includes:

[0127] The first voltage divider resistor is connected in series between the short-circuit resistor and the first operating power supply.

[0128] In some embodiments of this application, the switching circuit further includes:

[0129] The branch circuit on / off switch is connected in series between the short-circuit resistor and the first operating power supply, and closes when the fiber optic connector is inserted.

[0130] In some embodiments of this application, the gate logic circuit includes: an AND gate circuit with the same number of channels;

[0131] Multiple AND gates are connected in parallel; one of the multiple AND gates is the target AND gate, and the threshold voltage of the target AND gate is the same as the voltage drop voltage.

[0132] In some embodiments of this application, one of the plurality of AND gate circuits is an AND gate, and the rest are first NAND gates;

[0133] The input of the first NAND gate in a plurality of first NAND gates is connected to the output of the first operating power supply and the switching circuit, and its output is connected to the next first NAND gate circuit; the outputs of the first NAND gates other than the first one are connected to the input of the motor control circuit.

[0134] The input of the AND gate is connected to the first operating power supply and the output of the last first NAND gate; the output of the AND gate is connected to the input of the motor control circuit.

[0135] In some embodiments of this application, the gate logic circuit further includes: an adjustment resistor of the same number as the AND gate circuits described above, the adjustment resistor being connected to the corresponding AND gate circuit for adjusting the threshold voltage of the corresponding AND gate circuit.

[0136] In some embodiments of this application, the resistance values ​​of the adjusting resistors are not the same.

[0137] In some embodiments of this application, the motor control circuit includes: a multi-channel control sub-circuit, each control sub-circuit being used to control a corresponding motor;

[0138] The multiple control sub-circuits are connected in parallel, and the output of the multiple control sub-circuit is connected to the corresponding motor.

[0139] In some embodiments of this application, the input terminal of each control sub-circuit is connected to the corresponding AND gate circuit and the first operating power supply, and the output terminal is connected to the corresponding motor.

[0140] In some embodiments of this application, each control sub-circuit includes:

[0141] The input of the second NAND gate is connected to the corresponding AND gate circuit and the first operating power supply, and the output is connected to the corresponding motor.

[0142] A trigger switch corresponding to the second NAND gate is connected in series between the corresponding second NAND gate and the motor.

[0143] In some embodiments of this application, each control sub-circuit further includes:

[0144] The second voltage divider resistor is connected in series between the input terminal of the second NAND gate and the first operating power supply.

[0145] In some embodiments of this application, the trigger switch includes a first sub-trigger switch and a second trigger sub-switch.

[0146] The first sub-trigger switch is connected to one of the outputs of the corresponding second NAND gate;

[0147] The second sub-trigger switch is connected to the other output terminal of the corresponding second NAND gate.

[0148] In some embodiments of this application, the motor control circuit further includes: a second operating power supply and a third operating power supply.

[0149] The second power supply is connected to the motor and is used to supply power to the motor when the first sub-trigger switch is turned on.

[0150] The third power supply is connected to the motor and is used to supply power to the motor when the second sub-trigger switch is turned on.

[0151] In some embodiments of this application, the number of control sub-circuits is one less than the number of coupling switches.

[0152] In some embodiments of this application, the number of short-circuit resistors is four, and the number of coupling switches is four.

[0153] This fiber optic connection module automatically adjusts the internal coupling position even when fiber optic cables are installed in a freely disordered manner, ensuring the correct connection sequence is automatically output at the output end. It also allows for freely configurable internal sequence rules, enabling customized output of paired ports in special scenarios. Furthermore, it eliminates the need for visual verification of fiber optic cable identification numbers and manual matching, greatly simplifying cable management, significantly improving cabling efficiency, and reducing labor costs. It also features a foolproof and error-proofing mechanism to avoid the risk of installation errors, thereby improving production efficiency.

[0154] Referring to FIG9, a structural block diagram of an embodiment of the fiber optic distribution frame of this application is shown; the fiber optic distribution frame includes the fiber optic cable connection module as described above.

[0155] The fiber optic connection module includes: a fiber optic connector and a fiber optic adapter as described above.

[0156] The fiber optic connector connects to the fiber optic adapter.

[0157] Fiber optic connectors connect to fiber optic adapters, thereby enabling fiber optic communication links.

[0158] Specifically, the fiber optic connector has raised dots.

[0159] The bumps are used to press the coupling switch in the fiber optic adapter; the bump positions are different for fiber optic connectors that connect different channels of the same fiber optic adapter.

[0160] Furthermore, the fiber optic adapter has multiple channels, each channel including: a switching circuit, a gate logic circuit, a motor control circuit, and a motor;

[0161] The switching circuit is connected to the fiber optic connector. The switching circuit has the same number of short-circuit resistors and coupling switches as the channels. The switching circuit is used to output a voltage drop corresponding to the fiber optic connector when the fiber optic connector contacts the coupling switch. The voltage drop is used to characterize the target channel matched by the fiber optic connector. The voltage drop is different for different channels.

[0162] The input terminal of the gate logic circuit is connected to the switching circuit to receive the voltage drop and generate control signals;

[0163] The input terminal of the motor control circuit is connected to the output terminal of the gate logic circuit, and the output terminal of the motor control circuit is connected to the motor. It is used to control the motor rotation according to the control signal so as to couple the fiber optic connector to the target channel.

[0164] In some embodiments of this application, the switching circuit includes: a short-circuit resistor, a coupling switch, and a first operating power supply; the resistance values ​​of the multiple short-circuit resistors are different; the multiple short-circuit resistors are connected in series with the first operating power supply; the multiple short-circuit resistors are connected in series sequentially; each short-circuit resistor is connected in parallel with a corresponding coupling switch.

[0165] When the fiber optic connector is inserted, one of the compression coupling switches is closed, and the short-circuit resistor corresponding to the coupling switch is short-circuited, forming a voltage drop under the power supply of the first operating power source.

[0166] In some embodiments of this application, the switching circuit further includes:

[0167] The first voltage divider resistor is connected in series between the short-circuit resistor and the first operating power supply.

[0168] In some embodiments of this application, the switching circuit further includes:

[0169] The branch circuit on / off switch is connected in series between the short-circuit resistor and the first operating power supply, and closes when the fiber optic connector is inserted.

[0170] In some embodiments of this application, the gate logic circuit includes: an AND gate circuit with the same number of channels;

[0171] Multiple AND gates are connected in parallel; one of the multiple AND gates is the target AND gate, and the threshold voltage of the target AND gate is the same as the voltage drop voltage.

[0172] In some embodiments of this application, one of the plurality of AND gate circuits is an AND gate, and the rest are first NAND gates;

[0173] The input of the first NAND gate in a plurality of first NAND gates is connected to the output of the first operating power supply and the switching circuit, and its output is connected to the next first NAND gate circuit; the outputs of the first NAND gates other than the first one are connected to the input of the motor control circuit.

[0174] The input of the AND gate is connected to the first operating power supply and the output of the last first NAND gate; the output of the AND gate is connected to the input of the motor control circuit.

[0175] In some embodiments of this application, the gate logic circuit further includes: an adjustment resistor of the same number as the AND gate circuits described above, the adjustment resistor being connected to the corresponding AND gate circuit for adjusting the threshold voltage of the corresponding AND gate circuit.

[0176] In some embodiments of this application, the resistance values ​​of the adjusting resistors are not the same.

[0177] In some embodiments of this application, the motor control circuit includes: a multi-channel control sub-circuit, each control sub-circuit being used to control a corresponding motor;

[0178] The multiple control sub-circuits are connected in parallel, and the output of the multiple control sub-circuit is connected to the corresponding motor.

[0179] In some embodiments of this application, the input terminal of each control sub-circuit is connected to the corresponding AND gate circuit and the first operating power supply, and the output terminal is connected to the corresponding motor.

[0180] In some embodiments of this application, each control sub-circuit includes:

[0181] The input of the second NAND gate is connected to the corresponding AND gate circuit and the first operating power supply, and the output is connected to the corresponding motor.

[0182] A trigger switch corresponding to the second NAND gate is connected in series between the corresponding second NAND gate and the motor.

[0183] In some embodiments of this application, each control sub-circuit further includes:

[0184] The second voltage divider resistor is connected in series between the input terminal of the second NAND gate and the first operating power supply.

[0185] In some embodiments of this application, the trigger switch includes a first sub-trigger switch and a second trigger sub-switch.

[0186] The first sub-trigger switch is connected to one of the outputs of the corresponding second NAND gate;

[0187] The second sub-trigger switch is connected to the other output terminal of the corresponding second NAND gate.

[0188] In some embodiments of this application, the motor control circuit further includes: a second operating power supply and a third operating power supply.

[0189] The second power supply is connected to the motor and is used to supply power to the motor when the first sub-trigger switch is turned on.

[0190] The third power supply is connected to the motor and is used to supply power to the motor when the second sub-trigger switch is turned on.

[0191] In some embodiments of this application, the number of control sub-circuits is one less than the number of coupling switches.

[0192] In some embodiments of this application, the number of short-circuit resistors is four, and the number of coupling switches is four.

[0193] This embodiment connects to the fiber optic connector via a switching circuit. The switching circuit has short-circuit resistors and coupling switches equal in number to the number of channels. When the fiber optic connector contacts the coupling switch, the switching circuit outputs a voltage drop corresponding to the fiber optic connector. This voltage drop characterizes the target channel matched to the fiber optic connector; different channels have different voltage drops. The input of a gate logic circuit is connected to the switching circuit to receive the voltage drop and generate a control signal. The input of a motor control circuit is connected to the output of the gate logic circuit, and the output of the motor control circuit is connected to the motor. This controls the motor's rotation based on the control signal to couple the fiber optic connector to the target channel. The fiber optic adapter contains coupling switches. When the fiber optic connector is connected to the adapter, different coupling contact switches are triggered, generating different voltage drops to automatically identify the fiber optic cable sequence. Different signals are received through different contact switches, and signals are automatically output to control different rotating motors. This allows for automatic adjustment of the internal coupling position even when the fiber optic cables are installed in a freely disordered manner, and the output automatically outputs the correct connection sequence. This eliminates the need for visual confirmation of the fiber optic cable's numerical identification and for individual cable matching, greatly simplifying cable management, significantly improving cabling efficiency, and reducing labor costs.

[0194] Referring to FIG10, a structural block diagram of a server rack embodiment of the present application is shown. The server rack includes the fiber optic patch panel as described above.

[0195] Fiber optic patch panel, including the fiber optic cable connection module as described above.

[0196] The fiber optic connection module includes: a fiber optic connector and a fiber optic adapter as described above.

[0197] The fiber optic connector connects to the fiber optic adapter.

[0198] Fiber optic connectors connect to fiber optic adapters, thereby enabling fiber optic communication links.

[0199] Specifically, the fiber optic connector has raised dots.

[0200] The bumps are used to press the coupling switch in the fiber optic adapter; the bump positions are different for fiber optic connectors that connect different channels of the same fiber optic adapter.

[0201] Furthermore, the fiber optic adapter has multiple channels, each channel including: a switching circuit, a gate logic circuit, a motor control circuit, and a motor;

[0202] The switching circuit is connected to the fiber optic connector. The switching circuit has the same number of short-circuit resistors and coupling switches as the channels. The switching circuit is used to output a voltage drop corresponding to the fiber optic connector when the fiber optic connector contacts the coupling switch. The voltage drop is used to characterize the target channel matched by the fiber optic connector. The voltage drop is different for different channels.

[0203] The input terminal of the gate logic circuit is connected to the switching circuit to receive the voltage drop and generate control signals;

[0204] The input terminal of the motor control circuit is connected to the output terminal of the gate logic circuit, and the output terminal of the motor control circuit is connected to the motor. It is used to control the motor rotation according to the control signal so as to couple the fiber optic connector to the target channel.

[0205] In some embodiments of this application, the switching circuit includes: a short-circuit resistor, a coupling switch, and a first operating power supply; the resistance values ​​of the multiple short-circuit resistors are different; the multiple short-circuit resistors are connected in series with the first operating power supply; the multiple short-circuit resistors are connected in series sequentially; each short-circuit resistor is connected in parallel with a corresponding coupling switch.

[0206] When the fiber optic connector is inserted, one of the compression coupling switches is closed, and the short-circuit resistor corresponding to the coupling switch is short-circuited, forming a voltage drop under the power supply of the first operating power source.

[0207] In some embodiments of this application, the switching circuit further includes:

[0208] The first voltage divider resistor is connected in series between the short-circuit resistor and the first operating power supply.

[0209] In some embodiments of this application, the switching circuit further includes:

[0210] The branch circuit on / off switch is connected in series between the short-circuit resistor and the first operating power supply, and closes when the fiber optic connector is inserted.

[0211] In some embodiments of this application, the gate logic circuit includes: an AND gate circuit with the same number of channels;

[0212] Multiple AND gates are connected in parallel; one of the multiple AND gates is the target AND gate, and the threshold voltage of the target AND gate is the same as the voltage drop voltage.

[0213] In some embodiments of this application, one of the plurality of AND gate circuits is an AND gate, and the rest are first NAND gates;

[0214] The input of the first NAND gate in a plurality of first NAND gates is connected to the output of the first operating power supply and the switching circuit, and its output is connected to the next first NAND gate circuit; the outputs of the first NAND gates other than the first one are connected to the input of the motor control circuit.

[0215] The input of the AND gate is connected to the first operating power supply and the output of the last first NAND gate; the output of the AND gate is connected to the input of the motor control circuit.

[0216] In some embodiments of this application, the gate logic circuit further includes: an adjustment resistor of the same number as the AND gate circuits described above, the adjustment resistor being connected to the corresponding AND gate circuit for adjusting the threshold voltage of the corresponding AND gate circuit.

[0217] In some embodiments of this application, the resistance values ​​of the adjusting resistors are not the same.

[0218] In some embodiments of this application, the motor control circuit includes: a multi-channel control sub-circuit, each control sub-circuit being used to control a corresponding motor;

[0219] The multiple control sub-circuits are connected in parallel, and the output of the multiple control sub-circuit is connected to the corresponding motor.

[0220] In some embodiments of this application, the input terminal of each control sub-circuit is connected to the corresponding AND gate circuit and the first operating power supply, and the output terminal is connected to the corresponding motor.

[0221] In some embodiments of this application, each control sub-circuit includes:

[0222] The input of the second NAND gate is connected to the corresponding AND gate circuit and the first operating power supply, and the output is connected to the corresponding motor.

[0223] A trigger switch corresponding to the second NAND gate is connected in series between the corresponding second NAND gate and the motor.

[0224] In some embodiments of this application, each control sub-circuit further includes:

[0225] The second voltage divider resistor is connected in series between the input terminal of the second NAND gate and the first operating power supply.

[0226] In some embodiments of this application, the trigger switch includes a first sub-trigger switch and a second trigger sub-switch.

[0227] The first sub-trigger switch is connected to one of the outputs of the corresponding second NAND gate;

[0228] The second sub-trigger switch is connected to the other output terminal of the corresponding second NAND gate.

[0229] In some embodiments of this application, the motor control circuit further includes: a second operating power supply and a third operating power supply.

[0230] The second power supply is connected to the motor and is used to supply power to the motor when the first sub-trigger switch is turned on.

[0231] The third power supply is connected to the motor and is used to supply power to the motor when the second sub-trigger switch is turned on.

[0232] In some embodiments of this application, the number of control sub-circuits is one less than the number of coupling switches.

[0233] In some embodiments of this application, the number of short-circuit resistors is four, and the number of coupling switches is four.

[0234] In summary, for example, referring to Figure 11, a 42U (Unit) high rack-mount server unit houses 12 1U servers. Each server is connected to a data switch at the 40U location via a data cable. Simultaneously, the switch's uplink is connected to the fiber optic cable management rack at the 42U location via MPO (Multi-fiber Push-On) to DLC (Dual Lucent Connector) fiber optic patch cords. Each MPO patch cord connects to the MPO interface at the switch end via an optical module. Each patch cord leads out four independent DLC fiber optic cables, each with two cores: one for input and one for output. Each fiber optic cable needs to be installed in the fiber optic adapter within the cable management rack. The MPO to LC (Lucent Connector) fiber optic patch cords are marked with lines. Currently, common MPO adapter patch cords offer either 100G speed to four 25G speed fibers or 40G speed to four 10G speed fibers. The traditional practice is to assign numerical numbers to both ends of each fiber optic cable to identify the order of the fiber optic cables.

[0235] This embodiment connects to the fiber optic connector via a switching circuit. The switching circuit has short-circuit resistors and coupling switches equal in number to the number of channels. When the fiber optic connector contacts the coupling switch, the switching circuit outputs a voltage drop corresponding to the fiber optic connector. This voltage drop characterizes the target channel matched to the fiber optic connector; different channels have different voltage drops. The input of a gate logic circuit is connected to the switching circuit to receive the voltage drop and generate a control signal. The input of a motor control circuit is connected to the output of the gate logic circuit, and the output of the motor control circuit is connected to the motor. This controls the motor's rotation based on the control signal to couple the fiber optic connector to the target channel. The fiber optic adapter contains coupling switches. When the fiber optic connector is connected to the adapter, different coupling contact switches are triggered, generating different voltage drops to automatically identify the fiber optic cable sequence. Different signals are received through different contact switches, and signals are automatically output to control different rotating motors. This allows for automatic adjustment of the internal coupling position even when the fiber optic cables are installed in a freely disordered manner, and the output automatically outputs the correct connection sequence. This eliminates the need for visual confirmation of the fiber optic cable's numerical identification and for individual cable matching, greatly simplifying cable management, significantly improving cabling efficiency, and reducing labor costs.

[0236] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.

[0237] Those skilled in the art will understand that embodiments of this application can be provided as methods, apparatus, or computer program products. Therefore, embodiments of this application can take the form of entirely hardware embodiments, entirely software embodiments, or embodiments combining software and hardware aspects. Furthermore, embodiments of this application can take the form of computer program products implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM (Compact Disc Read-Only Memory), optical storage, etc.) containing computer-usable program code.

[0238] This application describes embodiments with reference to flowchart illustrations and / or block diagrams of methods, terminal devices (systems), and computer program products according to embodiments of this application. It should be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing terminal device to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing terminal device, create means for implementing the functions specified in one or more blocks of the flowchart illustrations and / or one or more blocks of the block diagrams.

[0239] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing terminal device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means that implement the functions specified in one or more flowcharts and / or one or more block diagrams.

[0240] These computer program instructions may also be loaded onto a computer or other programmable data processing terminal equipment to cause a series of operational steps to be performed on the computer or other programmable terminal equipment to produce a computer-implemented process, such that the instructions, which execute on the computer or other programmable terminal equipment, provide steps for implementing the functions specified in one or more flowcharts and / or one or more block diagrams.

[0241] Although preferred embodiments of the present application have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of the embodiments of the present application.

[0242] Finally, it should be noted that in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or terminal device that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or terminal device. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or terminal device that includes the element.

[0243] The foregoing has provided a detailed description of an optical fiber adapter, an optical fiber connection module, an optical fiber distribution frame, and a server rack provided in this application. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the above embodiments are only for the purpose of helping to understand the methods and core ideas of this application. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this application. Therefore, the content of this specification should not be construed as a limitation of this application.

Claims

1. An optical fiber cable adapter, comprising: The application relates to a multi-channel switch circuit, which comprises a switch circuit, a gate logic circuit, a motor control circuit and a motor in each channel. The switch circuit is connected with a fiber line connector, and the switch circuit has a same number of short-circuit resistors and coupling switches as the number of channels; the switch circuit is configured to output a voltage drop voltage corresponding to the fiber line connector when the fiber line connector contacts the coupling switch; the voltage drop voltage is configured to represent a target channel matched by the fiber line connector; the voltage drop voltages of different channels are different; The input end of the gate logic circuit is connected with the switch circuit and configured to receive the voltage drop voltage and generate a control signal; The input end of the motor control circuit is connected with the output end of the gate logic circuit, and the output end of the motor control circuit is connected with the motor and configured to control the motor to rotate according to the control signal so as to couple the fiber line connector to the target channel.

2. The fiber optic connector of claim 1, wherein, The switch circuit comprises the short-circuit resistors, the coupling switches and a first working power supply; the short-circuit resistors are connected in series and have different resistance values; each short-circuit resistor is connected in parallel with a corresponding coupling switch; When the fiber line connector is inserted, one of the coupling switches is closed, the corresponding short-circuit resistor of the coupling switch is short-circuited, and the voltage drop voltage is formed under the power supply of the first working power supply.

3. The fiber optic connector of claim 2, wherein, The switch circuit further comprises: A first voltage dividing resistor connected in series between the short-circuit resistor and the first working power supply.

4. The fiber optic connector of claim 2, wherein, The switch circuit further comprises: A branch on-off switch connected in series between the short-circuit resistor and the first working power supply and closed when the fiber line connector is inserted.

5. The fiber optic connector of claim 2, wherein, The gate logic circuit comprises a same number of AND gate circuits as the number of channels; The AND gate circuits are connected in parallel; one of the AND gate circuits is a target AND gate circuit, and the threshold voltage of the target AND gate circuit is the same as the voltage drop voltage.

6. The fiber optic connector of claim 5, wherein, One of the AND gate circuits is an AND gate, and the rest are first NAND gates; The input end of the first NAND gate is connected with the first working power supply and the output end of the switch circuit, and the output end is connected with the next first NAND gate circuit; the output end of the first NAND gate except the first one is connected with the input end of the motor control circuit, The input end of the AND gate is connected with the first working power supply and the output end of the last first NAND gate; and the output end of the AND gate is connected with the input end of the motor control circuit.

7. The fiber optic connector of claim 5, wherein, The gate logic circuit further comprises a same number of adjusting resistors as the number of AND gate circuits, the adjusting resistors are connected with the corresponding AND gate circuits and configured to adjust the threshold voltage of the corresponding AND gate circuits.

8. The fiber optic connector of claim 7, wherein, The adjusting resistors have different resistance values.

9. The fiber optic connector of claim 5, wherein, The motor control circuit comprises a plurality of control sub-circuits, each of which is configured to control a corresponding motor; The control sub-circuits are connected in parallel, and the output ends of the control sub-circuits are connected with the corresponding motors.

10. The fiber optic connector of claim 9, wherein, An input end of each control sub-circuit is connected with a corresponding AND gate circuit and the first working power supply, and an output end is connected with a corresponding motor.

11. The fiber optic connector of claim 10, wherein, Each control sub-circuit comprises: a second NAND gate, an input end of the second NAND gate being connected with a corresponding AND gate circuit and the first working power supply, and an output end being connected with a corresponding motor; a trigger switch corresponding to the second NAND gate, the trigger switch being connected in series between the corresponding second NAND gate and the motor.

12. The fiber optic connector of claim 11, wherein, Each control sub-circuit further comprises: a second voltage dividing resistor connected in series between the input end of the second NAND gate and the first working power supply.

13. The fiber optic connector of claim 11, wherein, The trigger switch comprises a first sub-trigger switch and a second sub-trigger switch, the first sub-trigger switch being connected with one of the output ends of the corresponding second NAND gate; the second sub-trigger switch being connected with the other output end of the corresponding second NAND gate.

14. The fiber optic connector of claim 13, wherein, The motor control circuit further comprises a second working power supply and a third working power supply, the second working power supply being connected with the motor and configured to supply power to the motor when the first sub-trigger switch is turned on; the third working power supply being connected with the motor and configured to supply power to the motor when the second sub-trigger switch is turned on.

15. The fiber optic connector of claim 9, wherein, The number of the control sub-circuits is one less than the number of the coupling switches.

16. The fiber optic connector of any of claims 2-15, wherein, The number of the short circuit resistors is four, and the number of the coupling switches is four.

17. An optical fiber cable connection module, characterized by The optical fiber cable connector is connected with the optical fiber cable adapter. The optical fiber cable connector is provided with a convex point.

18. The fiber optic cable connection module of claim 17, wherein, The convex point is configured to press the coupling switch in the optical fiber cable adapter. The positions of the convex points of the optical fiber cable connectors connected with different channels of the same optical fiber cable adapter are different.

19. An optical fiber distribution frame, characterized by, The optical fiber cable connection module comprises the optical fiber cable adapter according to any one of claims 17-18.

20. A server cabinet characterized by The optical fiber distribution frame comprises the optical fiber cable adapter according to claim 19.

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