Bottom cell structure for tandem solar cells

Abstract

The invention relates to a method of manufacturing of bottom cell for two-terminal perovskite-silicon tandem solar cells.

Description

[0001] BOTTOM CELL STRUCTURE FOR TANDEM SOLAR CELLS

[0002] Technical Field

[0003] The invention relates to a method of manufacturing of bottom cell for two-terminal perovskite-silicon tandem solar cells.

[0004] State of the Art

[0005] The bottom cell structure is designed as a crucial component in the development of tandem solar cells, which are created to enhance the efficiency of photovoltaic energy conversion. In a tandem solar cell, multiple layers or cells are stacked on top of each other, with each layer engineered to absorb a different segment of the solar spectrum. The bottom cell, which is typically made of materials like silicon, germanium, or other low-bandgap semiconductors, is intended to absorb the lower-energy, longer-wavelength portion of the spectrum that passes through the top cells. This configuration is utilized to enable the tandem cell to harness a broader range of sunlight, significantly improving overall efficiency compared to singlejunction cells. The bottom cell must be optimized for both its electronic properties and its ability to be integrated seamlessly with the upper layers, ensuring minimal energy loss and maximum light absorption.

[0006] CN113410390B discloses thin-film solar cell materials and devices, and in particular relates to a perovskite / PERC two-terminal laminate cell and a preparation method thereof. This document discloses passivated emitter and rear cell (PERC) crystalline silicon solar cell as bottom battery for perovskite / PERC two-terminal battery. The bottom silicon solar is based on p-type doped light absorption layer with n-type doped emitter. The phosphorus doped n+ emitter is formed by coating a phosphorus source on the surface of p-type doped crystalline silicon absorber in spin mode. The back side of the bottom cell consists of Al2O3and SiNxfilms to passivate the silicon absorber and the electrodes are formed by direct Aluminum-Si local contacts through the Al2O3and SiNxthen another silver electrode is deposited on top of the aluminum electrode. CN113410390B used indium doped-tin oxide (ITO). Having n+ emitter in CN113410390B in direct contact with ITO will lead to severe surface recombination losses leading to too low l / oc. The back side of the bottom cell feature direct Aluminum-Si contact which lead to severe charge carrier recombination.

[0007] CN111430494A discloses a tandem perovskite crystalline silicon solar cell and a preparation method thereof. It comprises p-type PERC crystalline silicon bottom cell structure. The front emitter is formed by phosphorus diffusion and back side is formed by heavily boron doping by diffusion (also by laser or boron implantation) either locally or full area while the rear side electrodes are made through contact opening through the rear side passivation layer. The front emitter is then coated by passivation layer prepared by atomic layer deposition or plasma enhanced chemical vapor deposition.

[0008] CN111987184A discloses a two-terminal stacked cell structure composed of a PERC bottom cell and a perovskite top cell and a preparation method. It comprises PERC bottom cell with diffused phosphorus emitter. CN111987184 A proposes to use passivating contact layer of oxide / Si on top of the diffused emitter. The rear side either back passivation with TCO or back passivation with local opening to form the back surface field (depositing metal).

[0009] Brief Description of the Invention

[0010] The invention relates to the preparation method of the bottom cell structure for two-terminal perovskite-silicon tandem solar cells.

[0011] The invention aims to provide a novel bottom cell structure based on p-type crystalline silicon for perovskite-silicon tandem solar cells. Instead of a phosphorus doped front emitter, which suffers from high recombination rates, employs a different doping technique that significantly reduces recombination, resulting in higher l / oc. Moreover, the back side of the cell is engineered to prevent direct metal-Si contact, thereby minimizing severe recombination losses and further enhancing l / oc. Additionally, the need for TCO on the back side is eliminated, simplifying the fabrication process by reducing the number of necessary steps. This approach not only streamlines manufacturing but also improves the overall performance of the solar cell.

[0012] The proposed bottom cell structure in this invention will solve the above-mentioned issues mainly high surface passivation for front side combined with emitter in one stack layer, reduce process steps, reduce material, and water consumption, and provide a solution to passivate the rear side of the p-type crystalline silicon.

[0013] The invention employs a novel method that significantly enhances the passivation quality, leading to ultra-high l / oc, by utilizing phosphorus doped polycrystalline silicon instead of using phosphorus diffusion to form the front emitter. The back side contact in the invention is optimized to minimize recombination losses by avoiding direct contact with p-type doped crystalline silicon, thus allowing for higher l / ocin the bottom silicon cell structure. Additionally, the need for heavy boron doping on the back side is eliminated, simplifying the process steps required for the bottom cell. This approach reduces the complexity of the fabrication process by minimizing the number of diffusion processes and the associated masking, etching, and wet chemistry steps. This not only streamlines the manufacturing process but also reduces water usage, making it more environmentally friendly.

[0014] Figures

[0015] Figure 1 : View of the steps of the preparation method of the solar cell.

[0016] Figure 2: View of the bottom cell structure for two-terminal perovskite-silicon tandem solar cells.

[0017] Figure 3: View of the simulated W values of the bottom cell structure.

[0018] 1. p-type crystalline silicon

[0019] 2. tunnel oxide layer

[0020] 3. polycrystalline silicon

[0021] 4. dielectric passivation layer A

[0022] 5. dielectric passivation layer B

[0023] 6. locally opened area

[0024] 7. hole selective and passivating contact

[0025] 8. back metal electrode

[0026] Detailed Description of the Invention

[0027] The invention relates to a method of manufacturing of bottom cell for two-terminal perovskite-silicon tandem solar cells.

[0028] The invention aims to solve the problems and provide a novel bottom cell structure based on p-type crystalline silicon (1) for perovskite-silicon tandem solar cells. The bottom cell comprises from top to bottom is sequentially planar or micro textured or nano textured crystalline silicon surface of a gallium-doped or boron-doped p-type crystalline silicon (1), a heavily phosphorus doped polycrystalline silicon (3), ultra-thin tunnel oxide layer (2), dielectric passivation layer A (4) touching the p-type crystalline silicon (1), dielectric passivation layer B (5), locally opened area (6) though the dielectric passivation layers (A) and (B), hole selective and passivating contact (7), and back metal electrode (8).

[0029] The hole selective and passivating contact (7) can be molybdenum oxide (MoOx), Nickel oxide (NiOx), vanadium oxide (V2OX), or tungsten oxide (WOX).

[0030] The thickness of phosphorus doped polycrystalline silicon (3) is 15-130 nm, the thickness of the tunnel oxide layer (2) is 1-2 nm, the thickness of p-type crystalline silicon (1) is 50-200 pm, the thickness of the dielectric passivation layer A (4) is 5-30 nm, the thickness of dielectric passivation layer B (5) is 80-120 nm, the thickness of hole selective and passivating contact (7) is 5-15 nm.

[0031] The p-type bottom cell structure with either diffused phosphorus emitter and / or direct local metal at the back and / or screen-printed Aluminum its associated high-temperature process to create the back surface field and metal electrode, the hole selective and passivation layer is prepared at room temperature. The back electrode is prepared at room temperature. The hole selective and passivation layer as well as the back electrode can be prepared in sequential processes in a single fabrication tool and a single step. The presence of a hole selective and passivation layer (7) in contact with the p-type crystalline silicon (1) at the back side will prevent direct metal contact with the silicon and therefore passivate the local opening in the silicon (lead to high l / occompared to direct metal-silicon contact), reduce process steps including the need of wet-chemical processes so reduce water and chemical consumption, eliminate one high-temperature process and therefore reduce the cost and the need for thick polycrystalline silicon on the front side (reduce silicon material).

[0032] The bottom cell structure preparation method comprises steps below:

[0033] 1. Preparing a p-type crystalline silicon (1) wafer.

[0034] The p-type crystalline silicon (1) wafer can be gallium or boron doped, with front side is planarized which is done by acidic and alkaline processes or the front side is structured by forming micron sized or nano sized pyramids by alkaline texturing, or nano structuring by laser processes or reactive ion etching.

[0035] 2. Growing ultra-thin tunnel oxide (SiOx) layer (2) on the p-type crystalline silicon (1) wafer by wet chemical oxidation in nitric acid or hydrogen peroxide, or by ozone oxidation, or by thermal oxidation, or by atomic layer deposition.

[0036] 3. Depositing phosphorus doped poly crystalline silicon (3) on tunnel oxide layer (2) by LPCVD (Low pressure chemical vapor deposition) or PECVD (Plasma-enhanced chemical vapor deposition) or PVD (sputtering or electron-beam deposition).

[0037] Step 3 is done either by: a. Incorporating phosphorus atoms during LPCVD, or PECVD, or PVD processes (in-situ doping) followed by furnace annealing or b. Depositing undoped thin silicon layer followed by doping the silicon layer by phosphorus using diffusion process, spin-on doping of phosphorus atoms, or ion implantation of phosphorus. During diffusion process, the n-type polycrystalline silicon is formed and activated. A wet-chemical cleaning process is required to etch back side phosphorus formed during phosphorus diffusion process and the phosphorosilicate glass from the front side. The spin-on doping and implantation processes are followed by annealing process to diffuse phosphorus into the polycrystalline silicon and activate the phosphorus atoms.

[0038] 4. Depositing Al2Oxdielectric passivation layer A (4) at the other side of p-type crystalline silicon (1) by ALD (Atomic Layer Deposition) or PECVD (Plasma- enhanced chemical vapor deposition),

[0039] 5. Depositing SiNxdielectric passivation layer B (5) on top of the dielectric passivation layer B (5) by PECVD (Plasma-enhanced chemical vapor deposition)

[0040] 6. Local removal of Al2Oxor SiNxby laser process or photolightography from predetermined areas

[0041] Step 6 is not necessary in case of depositing dielectric passivation layer A (4) and dielectric passivation layer B (5) by (ALD (Atomic Layer Deposition) or PECVD (Plasma-enhanced chemical vapor deposition)) through shadow mask.

[0042] 7. Placing back side hole selective and passivation contact (7) comprising one of these MoOx, V2OX, WOX, or NiOxby PVD (thermal evaporation or sputtering at room temperature) or by solution processes at room temperature, or by ALD (Atomic Layer Deposition) at less than 180°C on the locally opened area (6) through the dielectric passivation layer A (4) and dielectric passivation layer B (5).

[0043] 8. Depositing back metal electrode (8) on top of the hole selective and passivation contact (7) at room temperature by PVD (thermal evaporation or sputtering)

[0044] Depositing back metal electrode (8) can be aluminum as cost-effective or silver.

[0045] For hole selective and passivation contact (7) layer prepared by PVD, step 7 and 8 can be combined is single sequential process of depositing hole selective and passivation contact (7) layer and metal electrode in the same process run.

[0046] MoOxhole selective and passivation contact (7) layer deposited at room temperature using thermal evaporation on p-type crystalline silicon (1) wafer results in contact recombination parameter (Jorear contact) of 68.5 fA / cm2much less than direct metal-Si contact (Jos 105fA / cm2) or screen printed and high temperature annealing aluminum with p-type crystalline silicon (1) (Jo> 1000 fA / cm2). These results shows that MoOxhole selective and passivation contact (7) layer deposited at room temperature using thermal evaporation on p-type crystalline silicon (1) wafer induces better passivation parameters leading to higher Voc.

Claims

CLAIMS1. Method for manufacturing bottom cell characterized in comprising steps of; i. Preparing a p-type crystalline silicon (1) wafer, ii. Growing tunnel oxide layer (2) on the p-type crystalline silicon (1) wafer, iii. Depositing phosphorus doped polycrystalline silicon (3) on tunnel oxide layer (2), iv. Depositing Al2Oxdielectric passivation layer A (4) on the other side of p-type crystalline silicon (1), v. Depositing SiNxdielectric passivation layer B (5) on the Al2Oxdielectric passivation layer A (4), vi. Local removal of Al2Oxand SiNxfrom predetermined areas, vii. Placing back side hole selective and passivation contact (7) on the locally opened area (6), viii. Depositing back metal electrode (8) in contact with the hole selective and passivation contact (7).

2. The method for manufacturing the bottom cell according to claim 1, characterized in that the process step preparing a p-type crystalline silicon (1) wafer comprises;• planarizing which is done by acidic and alkaline processes of the front side of a p-type crystalline silicon (1) wafer or,• structuring by forming micron sized or nano sized pyramids by alkaline texturing of the front side of p-type crystalline silicon (1) wafer or,• nano structuring by laser processes or reactive ion etching.

3. The method for manufacturing the bottom cell according to claim 1, wherein said growing tunnel oxide layer (2) on the p-type crystalline silicon (1) wafer is wet chemical oxidation in nitric acid or hydrogen peroxide, ozone oxidation, thermal oxidation, or atomic layer deposition.

4. The method for manufacturing the bottom cell according to claim 1, wherein said depositing phosphorus doped polycrystalline silicon (3) on tunnel oxide layer (2) is low pressure chemical vapor deposition, plasma-enhanced chemical vapor deposition, sputtering, or electron-beam deposition followed by furnace annealing.

5. The method for manufacturing the bottom cell according to claim 4, wherein said depositing phosphorus is incorporating phosphorus atoms during low pressurechemical vapor deposition, plasma-enhanced chemical vapor deposition, sputtering, or electron-beam deposition.

6. The method for manufacturing the bottom cell according to claim 4, characterized in that the process of depositing phosphorus doped polycrystalline silicon (3) on tunnel oxide layer (2) comprises;• depositing undoped thin silicon layer,• doping the silicon layer by phosphorus using diffusion process, spin-on doping of phosphorus atoms, or ion implantation of phosphorus.

7. The method for manufacturing bottom cell according to claim 6, characterized by comprising a wet chemical cleaning process to etch back side phosphorus formed during the phosphorus diffusion process and the phosphorosilicate glass from the front side.

8. The method for manufacturing bottom cell according to claim 6, characterized by comprising an annealing process to diffuse phosphorus into the polycrystalline silicon and activate the phosphorus atoms.

9. The method for manufacturing bottom cell according to claim 1, wherein said Al2Oxdeposited by atomic layer deposition or plasma-enhanced chemical vapor deposition.

10. The method for manufacturing bottom cell according to claim 1, wherein said SiNxis deposited by plasma-enhanced chemical vapor deposition.

11. The method for manufacturing bottom cell according to claim 1, wherein the said back hole selective and passivating contact (7) deposited by thermal evaporation, sputtering, atomic layer deposition, or solution process12. The method for manufacturing bottom cell according to claim 1, wherein said back metal electrode (8) deposited by thermal evaporation or sputtering.

13. The method for manufacturing bottom cell according to claim 12, wherein said back metal electrode (8) is aluminum or silver.

14. The bottom cell produced according to the method of claim 1.

15. The bottom cell according to claim 14, characterized by comprising gallium or boron doped p-type crystalline silicon (1) wafer16. The bottom cell according to claim 14, characterized in that said hole selective and passivating contact (7) is molybdenum oxide, nickel oxide, vanadium oxide or tungsten oxide.

17. The bottom cell according to claim 14, characterized in that the thickness of phosphorus doped polycrystalline silicon (3) is 15-130 nm.

18. The bottom cell according to claim 14, characterized in that the thickness of the tunnel oxide layer (2) is 1-2 nm.

19. The bottom cell according to claim 14, characterized in that the thickness of p-type crystalline silicon (1) is 50-200 pm.

20. The bottom cell according to claim 14, characterized in that the thickness of dielectric passivation layer A (4) is 5-30 nm.

21. The bottom cell according to claim 14, characterized that the thickness of dielectric passivation layer B (5) is 80-120 nm.

22. The bottom cell according to claim 14, characterized in that the thickness of hole selective and passivating contact (7) is 5-15 nm.

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