Signal processing system and signal processing method
The signal processing system simplifies filter characteristic setting by allowing users to specify frequency components to be reduced, addressing the complexity of existing A/D conversion devices that require noise analysis and filter design.
Patent Information
- Application Number
- PCT/JP2024/026318
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-07-23
- Publication Date
- 2026-01-29
AI Technical Summary
Existing A/D conversion devices require users to analyze noise and design filters, which places a heavy burden on users lacking knowledge of filters and noise.
A signal processing system with a setting device that allows users to easily set filter characteristics by identifying and specifying frequency components to be reduced, using a reduction component identification means, characteristic determination means, and a setting means to configure the digital filter.
Enables users to set desired filter characteristics without requiring knowledge of noise or digital filters, simplifying the process and ensuring accurate frequency component reduction.
Smart Images

Figure JP2024026318_29012026_PF_FP_ABST
Abstract
Description
Signal processing system and signal processing method
[0001] The present disclosure relates to a signal processing system and a signal processing method.
[0002] A technology is known in which an A / D (Analog / Digital) conversion device is provided with a digital filter with configurable filter characteristics to obtain a digital signal from an analog signal in which frequency components other than a desired frequency component are reduced. For example, Patent Document 1 discloses an A / D conversion device that allows a user to set filter characteristics to obtain a digital signal from an analog signal in which noise is reduced. The A / D conversion device of Patent Document 1 allows the filter characteristics to be flexibly set according to the usage environment.
[0003] International Publication No. 2014 / 068747
[0004] When setting the filter characteristics in the A / D conversion device of Patent Document 1, the user needs to analyze noise in the input signal and then design a filter suitable for removing the analyzed noise. However, analyzing noise and designing a filter requires knowledge about filters and noise, which places a heavy burden on the user.
[0005] In view of the above circumstances, an object of the present disclosure is to provide a signal processing system etc. that allows a user to easily set desired filter characteristics.
[0006] In order to achieve the above object, the signal processing system according to the present disclosure comprises a signal processing device and a setting device, wherein the signal processing device comprises: a conversion means for converting an analog signal into a digital signal; and a digital filter means for filtering the digital signal, wherein the setting device comprises: a reduction component identification means for identifying frequency components to be reduced based on a user's designation; a characteristic determination means for determining filter characteristics for reducing the frequency components identified by the reduction component identification means; and a setting means for setting the filter characteristics identified by the characteristic determination means in the digital filter means of the signal processing device, and the digital filter means filters the digital signal based on the filter characteristics set by the setting means of the setting device.
[0007] According to the present disclosure, a user can easily set desired filter characteristics.
[0008] FIG. 1 is a block diagram showing the overall configuration of a signal processing system according to an embodiment of the present disclosure; FIG. 2 is a diagram showing an example of a reduction frequency setting screen displayed by a setting device according to an embodiment of the present disclosure; FIG. 3 is a diagram explaining an FIR filter in a digital filter section of an A / D conversion device according to an embodiment of the present disclosure; FIG. 4 is a block diagram showing the functional configuration of a setting device according to an embodiment of the present disclosure; FIG. 5 is a diagram showing an example of the hardware configuration of an A / D conversion device and a setting device according to an embodiment of the present disclosure;
[0009] Hereinafter, a signal processing system according to an embodiment of the present disclosure will be described with reference to the drawings. In each drawing, the same or equivalent parts are denoted by the same reference numerals.
[0010] (Embodiment) A signal processing system 1 according to an embodiment will be described with reference to FIG. 1 . The signal processing system 1 includes a PLC (Programmable Logic Controller) 10 and a setting device 20. The PLC 10 includes an A / D conversion device 100 and a CPU (Central Processing Unit) device 110. In the signal processing system 1, the A / D conversion device 100 converts an input analog signal into a digital signal, applies a digital filter to the digital signal, and the CPU device 110 processes the digital signal with the digital filter applied. The signal processing system 1 is installed, for example, at a production site. The A / D conversion device 100 converts an analog signal output by a field device (not shown) installed at the production site into a digital signal, and applies a digital filter to the digital signal. The CPU device 110 processes the digital signal with the digital filter applied and outputs a signal corresponding to the processing result to another field device (not shown), such as a drive device. The signal processing system 1 is an example of a signal processing system according to the present disclosure.
[0011] Next, each device will be described in outline. The functional configurations of the A / D conversion device 100 and the setting device 20 will be described in detail below. The CPU device 110 relays communication between the setting device 20 and the A / D conversion device 100. Like the CPU device of a general PLC, the CPU device 110 continuously executes a control program created by the user. The CPU device 110 processes the digital signal output by the A / D conversion device 100 by executing the control program.
[0012] The A / D conversion device 100 converts an analog signal input thereto into a digital signal, applies a digital filter to the digital signal obtained by the conversion, and outputs the digitally filtered digital signal to the CPU device 110. As will be described later, a user can set the filter characteristics of the digital filter by operating the setting device 20. This allows the user to reduce frequency components of no interest from the digital signal.
[0013] Furthermore, the A / D conversion device 100 logs the signal before application of the digital filter for a certain period of time, saves the signal log SL, and outputs the saved signal log SL to the setting device 20 via the CPU device 110. As will be described later, this signal log SL is used by the user to specify a reduction frequency and to simulate filtering. The A / D conversion device 100 is an example of a signal processing device according to the present disclosure.
[0014] The setting device 20 is a setting device through which a user sets the filter characteristics of the A / D conversion device 100. The setting device 20 is, for example, a computer such as a personal computer, smartphone, or tablet terminal on which an engineering tool program is installed. Using the setting device 20, a user can easily set filter characteristics for reducing the specified frequency components in the digital filter of the A / D conversion device 100 by specifying the frequency components to be reduced while checking the signal related to the signal log SL. The setting device 20 also displays a signal obtained by reducing the frequency components specified by the user in the signal related to the signal log SL as a simulation result. This allows the user to confirm how the signal will change when the digital filter is applied before setting the filter characteristics. The setting device 20 is an example of a setting device according to the present disclosure.
[0015] Referring to FIG. 2 , an example of displaying a signal related to the signal log SL and specifying frequency components to be reduced by the setting device 20 will be described. When a user performs an operation to start setting filter characteristics, the setting device 20 displays the screen shown in FIG. 2 . The screen shown in FIG. 2 includes an input waveform display area AW and an input frequency display area AF. The input waveform display area AW displays the waveform of the signal related to the signal log SL. The input frequency display area AF displays a frequency spectrum obtained by frequency analysis of the waveform of the signal related to the signal log SL. The user can specify frequency components corresponding to the selection area LR as frequency components to be reduced by performing a selection operation, such as a click or tap operation, on an area within the input frequency display area AF. After specifying the required number of frequency components to be reduced, the user can complete the specification of the frequencies to be reduced by selecting button BC.
[0016] Referring to FIG. 3 , an example of displaying the simulation results of frequency reduction and setting filter characteristics using the setting device 20 will be described. When the setting device 20 has completed specifying the frequency to be reduced, it displays the screen shown in FIG. 3 . The screen shown in FIG. 3 includes a simulation waveform display area SAW and a simulation frequency display area SAF. The simulation waveform display area SAW displays the waveform of the signal obtained by reducing the specified frequency from the signal related to the signal log SL. The simulation frequency display area SAF displays the frequency spectrum of the signal obtained by reducing the specified frequency from the signal related to the signal log SL. The user checks the simulation results, and if there are no problems, they can select button BY to set the filter characteristics for reducing the specified frequency in the digital filter of the A / D conversion device 100. If there are problems, the user can select button BN to cancel the current frequency selection and redo the frequency specification operation.
[0017] In this way, the user can simply specify the frequency components to be reduced and set the filter characteristics for reducing those frequency components in the digital filter without needing any knowledge of noise or digital filters. This allows the user to easily set the desired filter characteristics.
[0018] 1, the following describes the functional configuration of the A / D conversion device 100. The A / D conversion device 100 includes an analog input interface 101, an A / D conversion unit 102, a storage unit 103, a logging unit 104, a digital filter unit 105, and a communication unit 106.
[0019] The analog input interface 101 receives an analog signal from the outside and outputs it to the A / D conversion unit 102. The analog input interface 101 includes an analog filter. The analog filter can reduce, from the analog signal, frequency components higher than the Nyquist frequency of the A / D conversion unit 102, frequency components that are desired to be reduced in the design stage of the PLC 10, and the like.
[0020] The A / D conversion unit 102 converts the analog signal output by the analog input interface 101 into a digital signal by sampling and quantizing the signal at regular intervals. The A / D conversion unit 102 outputs the digital signal obtained by the conversion to the logging unit 104 and the digital filter unit 105. No digital filter is applied to the digital signal output by the A / D conversion unit 102. The A / D conversion unit 102 is realized by, for example, an integrated circuit including an A / D conversion circuit. The A / D conversion unit 102 is an example of a conversion means according to the present disclosure.
[0021] The storage unit 103 stores a signal log SL logged by the logging unit 104 and coefficient data CD transmitted by the setting device 20 via the CPU device 110. As will be described in detail later, the coefficient data CD is data indicating coefficients set in each of the multiple multipliers of the digital filter. Since the output result of the digital filter changes depending on the coefficient, the coefficient represents the filter characteristics.
[0022] The logging unit 104 logs the digital signal output by the A / D conversion unit 102 for a certain period of time and stores it as a signal log SL in the storage unit 103. The logging unit 104 is an example of a logging means according to the present disclosure.
[0023] The digital filter unit 105 sets a digital filter by referring to the coefficient data CD stored in the storage unit 103, and applies the digital filter to the digital signal output by the A / D conversion unit 102. The digital filter unit 105 outputs the digital signal to which the digital filter has been applied to the CPU device 110 via the communication unit 106. The digital filter unit 105 is an example of a digital filter means according to the present disclosure.
[0024] The digital filter unit 105 includes, for example, an FIR (Finite Impulse Response) filter circuit shown in Fig. 4. The circuit shown in Fig. 4 is realized by, for example, a DSP (Digital Signal Processor). The digital filter unit 105 includes N (N is a positive integer) delay elements DE, N+1 multipliers MP, and N adders AD.
[0025] A coefficient h(0)-h(N) can be set for each multiplier MP. The input signal is assumed to be x[k], where k is an integer between 0 and N, x[0] is the digital signal obtained by the most recent sampling, and x[p-1] is the signal obtained by the sampling following the sampling of x[p] (p is an integer between 1 and N). x[0]-x[N], h(0)-h(N), etc. are collectively expressed simply as x, h, etc. x represents the digital signal sampled most recently N+1 times.
[0026] Similarly, if the output signal is represented as y, y[0] is expressed by the following formula: y[0] = h(0) x [0] + h(1) x x [1] + ... + h(N) x x [N]
[0027] As described above, y, which represents the signal after application of the digital filter, is determined only from x, which represents the digital signal before application of the digital filter, and the coefficient h. Therefore, the characteristics of the digital filter are set by setting the coefficient h. The digital filter unit 105 can set the filter characteristics of the digital filter by referring to the coefficient data CD stored in the storage unit 103 and setting the coefficient indicated by the coefficient data CD to h(0)-h(N).
[0028] Each coefficient can be obtained by calculating an impulse response obtained by performing an inverse fast Fourier transform on the frequency characteristics. As will be described later, the setting device 20 calculates frequency characteristics for reducing a frequency specified by the user, and calculates coefficients based on the frequency characteristics. The frequency characteristics here are digital data representing a frequency spectrum that does not include the frequency component to be reduced, but includes other frequency components.
[0029] Referring again to Fig. 1, the communication unit 106 communicates with the CPU device 110. The communication unit 106 stores coefficient data CD received from the setting device 20 via the CPU device 110 in the storage unit 103. In response to a request from the setting device 20, the communication unit 106 transmits a signal log SL to the setting device 20 via the CPU device 110. The communication unit 106 transmits the digital signal output by the digital filter unit 105 after application of the digital filter to the CPU device 110.
[0030] 5, the functional configuration of the setting device 20 will be described. The setting device 20 includes a communication unit 21, an analysis unit 22, a presentation unit 23, a display unit 24, an operation unit 25, a reduced component identification unit 26, a characteristic determination unit 27, and a setting unit 28.
[0031] The communication unit 21 communicates with the CPU device 110. The communication unit 21 communicates with the A / D conversion device 100 via the CPU device 110. In particular, the communication unit 21 receives a signal log SL from the A / D conversion device 100 and transmits coefficient data CD to the A / D conversion device 100.
[0032] The analysis unit 22 acquires the signal log SL stored in the storage unit 103 of the A / D conversion device 100 via the communication unit 21, and performs frequency analysis on the signal log SL. The analysis unit 22 performs frequency analysis on the signal log SL by applying a fast Fourier transform to the signal related to the signal log SL. The analysis unit 22 is an example of an analysis means according to the present disclosure.
[0033] The presentation unit 23 controls the display unit 24 and executes various presentations, which will be described later. The presentation unit 23 presents to the user the waveform of a signal related to the signal log SL, as shown in FIG. 2, for example. The presentation unit 23 presents to the user a frequency spectrum indicating the result of frequency analysis of the signal log SL by the analysis unit 22, as shown in FIG. 2, for example. The presentation unit 23 presents to the user a signal obtained by reducing frequency components identified by a reduced component identification unit 26, which will be described later, from the signal related to the signal log SL as a simulation result. More specifically, the presentation unit 23 presents to the user the waveform and frequency spectrum of the obtained signal, as shown in FIG. 3, for example. The presentation unit 23 is an example of a presentation means according to the present disclosure.
[0034] The presentation of the simulation results by the presentation unit 23 will now be described in detail. The presentation unit 23 obtains a waveform by performing an inverse fast Fourier transform on digital data representing a frequency spectrum including only the frequency components identified by the reduced component identification unit 26. The presentation unit 23 obtains a waveform that is opposite in phase to the obtained waveform and adds the opposite-phase waveform to the signal related to the signal log SL. This makes it possible to reduce the identified frequency components from the signal related to the signal log SL.
[0035] The display unit 24 displays a screen to the user. In particular, the display unit 24 presents information to the user in accordance with the control of the presentation unit 23. The display unit 24 is, for example, a liquid crystal display. The display unit 24 may also be a touch screen integrated with the operation unit 25, which will be described later.
[0036] The operation unit 25 receives operations from a user and outputs signals corresponding to the operations. The operation unit 25 is, for example, a mouse, a keyboard, or a touch screen.
[0037] The reduced component identifying unit 26 identifies frequency components to be reduced based on a user's designation. Specifically, the reduced component identifying unit 26 identifies, as frequency components to be reduced, frequencies designated by the user in accordance with the results of frequency analysis presented by the presentation unit 23. The reduced component identifying unit 26 identifies frequency components to be reduced based on, for example, a selected region LR selected by the user in accordance with the results of frequency analysis shown in FIG. 2 . The reduced component identifying unit 26 is an example of a reduced component identifying means according to the present disclosure.
[0038] The characteristic determination unit 27 determines filter characteristics that reduce the frequency components identified by the reduction component identification unit 26. Specifically, as described above, the filter characteristics are determined by calculating the impulse response obtained by performing an inverse fast Fourier transform on the frequency characteristics to obtain the coefficients h(0)-h(N). The characteristic determination unit 27 is an example of a characteristic determination means according to the present disclosure.
[0039] The setting unit 28 sets the filter characteristics determined by the characteristics determination unit 27 in the digital filter unit 105 of the A / D conversion device 100. Specifically, the setting unit 28 transmits coefficient data CD indicating each coefficient obtained by the characteristics determination unit 27 to the A / D conversion device 100 via the communication unit 21 and the CPU device 110, and the coefficient data CD is stored in the storage unit 103, thereby setting the filter characteristics determined by the characteristics determination unit 27 in the digital filter unit 105 of the A / D conversion device 100. The setting unit 28 is an example of a setting means according to the present disclosure.
[0040] An example of the hardware configuration of the A / D conversion device 100 and the setting device 20 (hereinafter referred to as "A / D conversion device 100, etc.") will be described with reference to Fig. 6. The A / D conversion device 100 is realized by, for example, a microcontroller. The setting device 20 is realized by, for example, a computer such as a personal computer, a smartphone, or a tablet terminal.
[0041] The A / D conversion device 100 etc. includes a processor 1001 , a memory 1002 , an interface 1003 , and a secondary storage device 1004 , which are connected to each other via a bus 1000 .
[0042] The processor 1001 is, for example, a CPU. The processor 1001 loads an operating program stored in the secondary storage device 1004 into the memory 1002 and executes the program, thereby realizing various functions of the A / D conversion device 100, etc. The processor 1001 of the A / D conversion device 100 may also include a DSP.
[0043] The memory 1002 is a main storage device configured, for example, by a RAM (Random Access Memory). The memory 1002 stores the operating program that the processor 1001 reads from the secondary storage device 1004. The memory 1002 also functions as a working memory when the processor 1001 executes the operating program.
[0044] The interface 1003 is, for example, an I / O (Input / Output) interface such as a serial port, a USB (Universal Serial Bus) port, a network interface, etc. For example, the interface 1003 realizes the functions of the communication unit 106 and the communication unit 21. Also, for example, the A / D conversion unit 102 of the A / D conversion device 100 is realized by connecting an integrated circuit including an A / D conversion circuit to the interface 1003.
[0045] The secondary storage device 1004 is, for example, a flash memory, a hard disk drive (HDD), or a solid state drive (SSD). The secondary storage device 1004 stores the operating programs executed by the processor 1001. The secondary storage device 1004 realizes the functions of the storage unit 103.
[0046] An example of the filter characteristic setting process by the setting device 20 will be described with reference to Fig. 7. The process shown in Fig. 7 is started, for example, when a user performs an operation to set the filter characteristic in the digital filter unit 105 of the A / D conversion device 100 using the setting device 20.
[0047] The communication unit 21 of the setting device 20 acquires the signal log SL from the A / D conversion device 100 (step S101).
[0048] The analysis unit 22 of the setting device 20 performs frequency analysis on the signal log SL acquired in step S101 (step S102).
[0049] The presentation unit 23 of the setting device 20 presents to the user the waveform of the signal related to the signal log SL and the frequency spectrum of the signal related to the signal log SL obtained by the frequency analysis in step S102, for example, by displaying a screen shown in Figure 2 on the display unit 24 (step S103).
[0050] The reduced component identifying unit 26 of the setting device 20 waits for the user to specify a frequency (step S104). For example, the reduced component identifying unit 26 waits for the user to select button BC on the screen shown in FIG. 2 to complete the frequency specification.
[0051] The reduced component identifying unit 26 identifies the frequency designated by the user as the frequency component to be reduced (step S105).
[0052] The presentation unit 23 presents the simulation results, including the waveform and frequency spectrum of the signal with the frequency components identified in step S105 reduced from the signal log SL, to the user by displaying, for example, the screen shown in Figure 3 on the display unit 24 (step S106).
[0053] The characteristic determination unit 27 of the setting device 20 waits for a setting operation by the user (step S107). The characteristic determination unit 27 waits for the user to select button BY on the screen shown in Fig. 3, for example, to perform a setting operation for the filter characteristics. Note that when the user selects button BN on the screen shown in Fig. 3 to cancel the operation, the setting device 20 may end this process or may execute the process from step S103 again.
[0054] The characteristic determining unit 27 determines the filter characteristic for reducing the frequency component identified in step S105 (step S108).
[0055] The setting unit 28 sets the filter characteristics determined in step S108 in the A / D conversion device 100 (step S109), and the setting device 20 then ends the filter characteristic setting process.
[0056] The signal processing system 1 according to the embodiment has been described above. According to the signal processing system 1, the A / D conversion device 100 logs the digital signal before application of the digital filter as a signal log SL, and the setting device 20 presents the waveform and frequency spectrum of the signal related to the signal log SL to the user. The user specifies the frequency to be reduced based on the information provided by the setting device 20. The setting device 20 determines filter characteristics based on the user's specification and sets the determined filter characteristics in the digital filter unit 105 of the A / D conversion device 100. This allows the user to set filter characteristics for reducing the frequency component to the digital filter simply by specifying the frequency component to be reduced, without requiring knowledge of noise or digital filters. This allows the user to easily set the desired filter characteristics.
[0057] The setting device 20 also presents the waveform and frequency spectrum in which the frequency components identified from the signal log SL have been reduced to the user as simulation results, allowing the user to check how the signal will change when the digital filter is applied before setting the filter characteristics.
[0058] (Modification) In the embodiment, the setting device 20 presents the waveform and frequency spectrum of the signal log SL to the user, and the user specifies the frequency to be reduced, for example, on the screen shown in FIG. 2 . Alternatively, or in addition, the user may directly input numerical values for the frequency range to be reduced. For example, assume that the frequency band of an analog signal output by a field device connected to the analog input interface 101 of the A / D conversion device 100 is known based on the specifications of the field device. In this case, frequency components outside this frequency band are clearly noise. Therefore, by inputting a frequency band based on the specifications of the field device, the user can easily set filter characteristics to reduce frequency components outside the specifications. The signal log SL is not used in this frequency specification. Therefore, if direct numerical input is sufficient, the logging unit 104 can be omitted from the A / D conversion device 100, and the analysis unit 22 and presentation unit 23 can be omitted from the setting device 20.
[0059] 6, the A / D conversion device 100 or the like includes a secondary storage device 1004. However, this is not limiting, and the secondary storage device 1004 may be provided outside the A / D conversion device 100 or the like, and the A / D conversion device 100 or the like and the secondary storage device 1004 may be connected via an interface 1003. In this configuration, removable media such as a USB flash drive or a memory card can also be used as the secondary storage device 1004.
[0060] 6, the A / D conversion device 100 may be configured by a dedicated circuit using an ASIC (Application Specific Integrated Circuit), an FPGA (Field Programmable Gate Array), etc. In the hardware configuration shown in FIG. 6, some of the functions of the A / D conversion device 100 may be realized by a dedicated circuit connected to the interface 1003, for example.
[0061] The programs used in the A / D conversion device 100 and the like can be stored and distributed on computer-readable recording media such as CD-ROMs (Compact Disc Read Only Memory), DVDs (Digital Versatile Discs), USB flash drives, memory cards, HDDs, etc. By installing such programs on a specific or general-purpose computer, the computer can be made to function as the A / D conversion device 100 and the like.
[0062] Furthermore, the above-mentioned program may be stored in a storage device owned by another server on the Internet, and the program may be downloaded from that server.
[0063] The present disclosure allows various embodiments and modifications without departing from the broad spirit and scope of the present disclosure. Furthermore, the above-described embodiments are intended to explain the present disclosure and do not limit the scope of the present disclosure. In other words, the scope of the present disclosure is defined by the claims, not the embodiments. Various modifications made within the scope of the claims and the meaning of equivalent disclosures are considered to be within the scope of the present disclosure.
[0064] 1 Signal processing system, 10 PLC, 20 Setting device, 21 Communication unit, 22 Analysis unit, 23 Presentation unit, 24 Display unit, 25 Operation unit, 26 Reduced component identification unit, 27 Characteristic determination unit, 28 Setting unit, 100 A / D conversion device, 101 Analog input interface, 102 A / D conversion unit, 103 Memory unit, 104 Logging unit, 105 Digital filter unit, 106 Communication unit, 110 CPU device, 1000 Bus, 1001 Processor, 1002 Memory, 1003 Interface, 1004 Secondary storage device, AD Adder, AF Input frequency display area, AW Input waveform display area, BC, BN, BY Button, CD Coefficient data, DE Delay element, LR Selection area, MP Multiplier, SAW Simulation waveform display area, SAF Simulation frequency display area, SL Signal log.
Claims
1. A signal processing system comprising a signal processing device and a setting device, wherein the signal processing device comprises: conversion means for converting an analog signal into a digital signal; and digital filter means for filtering the digital signal, wherein the setting device comprises: reduction component identification means for identifying frequency components to be reduced based on a user's designation; characteristic determination means for determining filter characteristics for reducing the frequency components identified by the reduction component identification means; and setting means for setting the filter characteristics identified by the characteristic determination means in the digital filter means of the signal processing device, wherein the digital filter means filters the digital signal based on the filter characteristics set by the setting means of the setting device.
2. The signal processing system of claim 1, wherein the signal processing device further comprises logging means for logging the digital signal and saving it as a signal log, and the setting device further comprises analysis means for performing frequency analysis on the signal log saved by the logging means of the signal processing device, and presentation means for presenting to the user the results of the frequency analysis of the signal log by the analysis means, and the reduction component identification means of the setting device identifies the frequency specified by the user as the frequency component to be reduced in accordance with the results of the frequency analysis presented by the presentation means.
3. The signal processing system according to claim 2, wherein the setting device further comprises: the presentation means of the setting device further presents to the user as a simulation result a signal obtained by reducing the frequency components identified by the reduced component identification means for the signal related to the signal log.
4. A signal processing method comprising: converting an analog signal into a digital signal; identifying frequency components to be reduced based on a user specification; determining filter characteristics that reduce the identified frequency components; and filtering the digital signal based on the determined filter characteristics.
Citation Information
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